bt.c 44 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stddef.h>
  7. #include <stdlib.h>
  8. #include <stdio.h>
  9. #include <string.h>
  10. #include "sdkconfig.h"
  11. #include "esp_heap_caps.h"
  12. #include "esp_heap_caps_init.h"
  13. #include "freertos/FreeRTOS.h"
  14. #include "freertos/task.h"
  15. #include "freertos/queue.h"
  16. #include "freertos/semphr.h"
  17. #include "freertos/xtensa_api.h"
  18. #include "freertos/portmacro.h"
  19. #include "xtensa/core-macros.h"
  20. #include "esp_types.h"
  21. #include "esp_system.h"
  22. #include "esp_task.h"
  23. #include "esp_attr.h"
  24. #include "esp_phy_init.h"
  25. #include "esp_bt.h"
  26. #include "esp_err.h"
  27. #include "esp_log.h"
  28. #include "esp_pm.h"
  29. #include "esp_ipc.h"
  30. #include "driver/periph_ctrl.h"
  31. #include "soc/rtc.h"
  32. #include "soc/rtc_cntl_reg.h"
  33. #include "soc/soc_memory_layout.h"
  34. #include "esp32c3/clk.h"
  35. #include "esp_coexist_internal.h"
  36. #include "esp_timer.h"
  37. #include "esp_sleep.h"
  38. #if CONFIG_BT_ENABLED
  39. /* Macro definition
  40. ************************************************************************
  41. */
  42. #define BT_LOG_TAG "BT_INIT"
  43. #define BTDM_INIT_PERIOD (5000) /* ms */
  44. /* Low Power Clock Selection */
  45. #define BTDM_LPCLK_SEL_XTAL (0)
  46. #define BTDM_LPCLK_SEL_XTAL32K (1)
  47. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  48. #define BTDM_LPCLK_SEL_8M (3)
  49. // wakeup request sources
  50. enum {
  51. BTDM_ASYNC_WAKEUP_SRC_VHCI = 0,
  52. BTDM_ASYNC_WAKEUP_SRC_DISA,
  53. BTDM_ASYNC_WAKEUP_SRC_TMR,
  54. BTDM_ASYNC_WAKEUP_SRC_MAX,
  55. };
  56. // low power control struct
  57. typedef union {
  58. struct {
  59. uint32_t enable : 1; // whether low power mode is required
  60. uint32_t lpclk_sel : 2; // low power clock source
  61. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) force-power-down is required during sleep
  62. uint32_t wakeup_timer_required : 1; // whether system timer is needed
  63. uint32_t no_light_sleep : 1; // do not allow system to enter light sleep after bluetooth is enabled
  64. uint32_t reserved : 26; // reserved
  65. };
  66. uint32_t val;
  67. } btdm_lpcntl_t;
  68. // low power control status
  69. typedef union {
  70. struct {
  71. uint32_t pm_lock_released : 1; // whether power management lock is released
  72. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) is powered down
  73. uint32_t phy_enabled : 1; // whether phy is switched on
  74. uint32_t wakeup_timer_started : 1; // whether wakeup timer is started
  75. uint32_t reserved : 28; // reserved
  76. };
  77. uint32_t val;
  78. } btdm_lpstat_t;
  79. /* Sleep and wakeup interval control */
  80. #define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
  81. #define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
  82. #define BT_DEBUG(...)
  83. #define BT_API_CALL_CHECK(info, api_call, ret) \
  84. do{\
  85. esp_err_t __err = (api_call);\
  86. if ((ret) != __err) {\
  87. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  88. return __err;\
  89. }\
  90. } while(0)
  91. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  92. #define OSI_VERSION 0x00010006
  93. #define OSI_MAGIC_VALUE 0xFADEBEAD
  94. /* Types definition
  95. ************************************************************************
  96. */
  97. /* vendor dependent signals to be posted to controller task */
  98. typedef enum {
  99. BTDM_VND_OL_SIG_WAKEUP_TMR = 0,
  100. BTDM_VND_OL_SIG_NUM,
  101. } btdm_vnd_ol_sig_t;
  102. /* prototype of function to handle vendor dependent signals */
  103. typedef void (* btdm_vnd_ol_task_func_t)(void *param);
  104. /* VHCI function interface */
  105. typedef struct vhci_host_callback {
  106. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  107. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  108. } vhci_host_callback_t;
  109. /* Dram region */
  110. typedef struct {
  111. esp_bt_mode_t mode;
  112. intptr_t start;
  113. intptr_t end;
  114. } btdm_dram_available_region_t;
  115. typedef void (* osi_intr_handler)(void);
  116. /* OSI function */
  117. struct osi_funcs_t {
  118. uint32_t _magic;
  119. uint32_t _version;
  120. void (*_interrupt_set)(int32_t cpu_no, int32_t intr_source, int32_t interrupt_no, int32_t interrpt_prio);
  121. void (*_interrupt_clear)(int32_t interrupt_source, int32_t interrupt_no);
  122. void (*_interrupt_handler_set)(int32_t interrupt_no, void *fn, void *arg);
  123. void (*_interrupt_disable)(void);
  124. void (*_interrupt_restore)(void);
  125. void (*_task_yield)(void);
  126. void (*_task_yield_from_isr)(void);
  127. void *(*_semphr_create)(uint32_t max, uint32_t init);
  128. void (*_semphr_delete)(void *semphr);
  129. int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
  130. int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
  131. int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  132. int32_t (*_semphr_give)(void *semphr);
  133. void *(*_mutex_create)(void);
  134. void (*_mutex_delete)(void *mutex);
  135. int32_t (*_mutex_lock)(void *mutex);
  136. int32_t (*_mutex_unlock)(void *mutex);
  137. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  138. void (* _queue_delete)(void *queue);
  139. int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  140. int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  141. int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  142. int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  143. int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  144. void (* _task_delete)(void *task_handle);
  145. bool (* _is_in_isr)(void);
  146. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  147. void *(* _malloc)(size_t size);
  148. void *(* _malloc_internal)(size_t size);
  149. void (* _free)(void *p);
  150. int32_t (* _read_efuse_mac)(uint8_t mac[6]);
  151. void (* _srand)(unsigned int seed);
  152. int (* _rand)(void);
  153. uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
  154. uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
  155. bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
  156. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  157. void (* _btdm_sleep_enter_phase2)(void);
  158. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  159. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  160. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  161. void (* _coex_wifi_sleep_set)(bool sleep);
  162. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  163. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  164. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  165. void (* _interrupt_on)(int intr_num);
  166. void (* _interrupt_off)(int intr_num);
  167. void (* _esp_hw_power_down)(void);
  168. void (* _esp_hw_power_up)(void);
  169. void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
  170. };
  171. /* External functions or values
  172. ************************************************************************
  173. */
  174. /* not for user call, so don't put to include file */
  175. /* OSI */
  176. extern int btdm_osi_funcs_register(void *osi_funcs);
  177. /* Initialise and De-initialise */
  178. extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
  179. extern void btdm_controller_deinit(void);
  180. extern int btdm_controller_enable(esp_bt_mode_t mode);
  181. extern void btdm_controller_disable(void);
  182. extern uint8_t btdm_controller_get_mode(void);
  183. extern const char *btdm_controller_get_compile_version(void);
  184. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  185. /* Sleep */
  186. extern void btdm_controller_enable_sleep(bool enable);
  187. extern uint8_t btdm_controller_get_sleep_mode(void);
  188. extern bool btdm_power_state_active(void);
  189. extern void btdm_wakeup_request(void);
  190. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  191. /* vendor dependent tasks to be posted and handled by controller task*/
  192. extern int btdm_vnd_offload_task_register(btdm_vnd_ol_sig_t sig, btdm_vnd_ol_task_func_t func);
  193. extern int btdm_vnd_offload_task_deregister(btdm_vnd_ol_sig_t sig);
  194. extern int btdm_vnd_offload_post_from_isr(btdm_vnd_ol_sig_t sig, void *param, bool need_yield);
  195. extern int btdm_vnd_offload_post(btdm_vnd_ol_sig_t sig, void *param);
  196. /* Low Power Clock */
  197. extern bool btdm_lpclk_select_src(uint32_t sel);
  198. extern bool btdm_lpclk_set_div(uint32_t div);
  199. extern int btdm_hci_tl_io_event_post(int event);
  200. /* VHCI */
  201. extern bool API_vhci_host_check_send_available(void);
  202. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  203. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  204. /* TX power */
  205. extern int ble_txpwr_set(int power_type, int power_level);
  206. extern int ble_txpwr_get(int power_type);
  207. extern uint16_t l2c_ble_link_get_tx_buf_num(void);
  208. extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high);
  209. extern bool btdm_deep_sleep_mem_init(void);
  210. extern void btdm_deep_sleep_mem_deinit(void);
  211. extern void btdm_ble_power_down_dma_copy(bool copy);
  212. extern uint8_t btdm_sleep_clock_sync(void);
  213. #if CONFIG_MAC_BB_PD
  214. extern void esp_mac_bb_power_down(void);
  215. extern void esp_mac_bb_power_up(void);
  216. extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  217. #endif
  218. extern char _bss_start_btdm;
  219. extern char _bss_end_btdm;
  220. extern char _data_start_btdm;
  221. extern char _data_end_btdm;
  222. extern uint32_t _data_start_btdm_rom;
  223. extern uint32_t _data_end_btdm_rom;
  224. extern uint32_t _bt_bss_start;
  225. extern uint32_t _bt_bss_end;
  226. extern uint32_t _btdm_bss_start;
  227. extern uint32_t _btdm_bss_end;
  228. extern uint32_t _bt_data_start;
  229. extern uint32_t _bt_data_end;
  230. extern uint32_t _btdm_data_start;
  231. extern uint32_t _btdm_data_end;
  232. extern char _bt_tmp_bss_start;
  233. extern char _bt_tmp_bss_end;
  234. /* Local Function Declare
  235. *********************************************************************
  236. */
  237. static void interrupt_set_wrapper(int32_t cpu_no, int32_t intr_source, int32_t intr_num, int32_t intr_prio);
  238. static void interrupt_clear_wrapper(int32_t intr_source, int32_t intr_num);
  239. static void interrupt_handler_set_wrapper(int n, void *fn, void *arg);
  240. static void IRAM_ATTR interrupt_disable(void);
  241. static void IRAM_ATTR interrupt_restore(void);
  242. static void IRAM_ATTR task_yield_from_isr(void);
  243. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  244. static void semphr_delete_wrapper(void *semphr);
  245. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  246. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  247. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  248. static int32_t semphr_give_wrapper(void *semphr);
  249. static void *mutex_create_wrapper(void);
  250. static void mutex_delete_wrapper(void *mutex);
  251. static int32_t mutex_lock_wrapper(void *mutex);
  252. static int32_t mutex_unlock_wrapper(void *mutex);
  253. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  254. static void queue_delete_wrapper(void *queue);
  255. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  256. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  257. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  258. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  259. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  260. static void task_delete_wrapper(void *task_handle);
  261. static bool IRAM_ATTR is_in_isr_wrapper(void);
  262. static void *malloc_internal_wrapper(size_t size);
  263. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  264. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  265. static int IRAM_ATTR rand_wrapper(void);
  266. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
  267. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus);
  268. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *slot_cnt);
  269. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  270. static void btdm_sleep_enter_phase2_wrapper(void);
  271. static void btdm_sleep_exit_phase3_wrapper(void);
  272. static void coex_wifi_sleep_set_hook(bool sleep);
  273. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  274. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  275. static void interrupt_on_wrapper(int intr_num);
  276. static void interrupt_off_wrapper(int intr_num);
  277. static void btdm_hw_mac_power_up_wrapper(void);
  278. static void btdm_hw_mac_power_down_wrapper(void);
  279. static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  280. static void btdm_slp_tmr_callback(void *arg);
  281. /* Local variable definition
  282. ***************************************************************************
  283. */
  284. /* OSI funcs */
  285. static const struct osi_funcs_t osi_funcs_ro = {
  286. ._magic = OSI_MAGIC_VALUE,
  287. ._version = OSI_VERSION,
  288. ._interrupt_set = interrupt_set_wrapper,
  289. ._interrupt_clear = interrupt_clear_wrapper,
  290. ._interrupt_handler_set = interrupt_handler_set_wrapper,
  291. ._interrupt_disable = interrupt_disable,
  292. ._interrupt_restore = interrupt_restore,
  293. ._task_yield = vPortYield,
  294. ._task_yield_from_isr = task_yield_from_isr,
  295. ._semphr_create = semphr_create_wrapper,
  296. ._semphr_delete = semphr_delete_wrapper,
  297. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  298. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  299. ._semphr_take = semphr_take_wrapper,
  300. ._semphr_give = semphr_give_wrapper,
  301. ._mutex_create = mutex_create_wrapper,
  302. ._mutex_delete = mutex_delete_wrapper,
  303. ._mutex_lock = mutex_lock_wrapper,
  304. ._mutex_unlock = mutex_unlock_wrapper,
  305. ._queue_create = queue_create_wrapper,
  306. ._queue_delete = queue_delete_wrapper,
  307. ._queue_send = queue_send_wrapper,
  308. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  309. ._queue_recv = queue_recv_wrapper,
  310. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  311. ._task_create = task_create_wrapper,
  312. ._task_delete = task_delete_wrapper,
  313. ._is_in_isr = is_in_isr_wrapper,
  314. ._cause_sw_intr_to_core = NULL,
  315. ._malloc = malloc,
  316. ._malloc_internal = malloc_internal_wrapper,
  317. ._free = free,
  318. ._read_efuse_mac = read_mac_wrapper,
  319. ._srand = srand_wrapper,
  320. ._rand = rand_wrapper,
  321. ._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
  322. ._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
  323. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  324. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  325. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  326. ._btdm_sleep_exit_phase1 = NULL,
  327. ._btdm_sleep_exit_phase2 = NULL,
  328. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  329. ._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
  330. ._coex_core_ble_conn_dyn_prio_get = coex_core_ble_conn_dyn_prio_get,
  331. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  332. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  333. ._interrupt_on = interrupt_on_wrapper,
  334. ._interrupt_off = interrupt_off_wrapper,
  335. ._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
  336. ._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
  337. ._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
  338. };
  339. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  340. /* Static variable declare */
  341. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  342. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  343. // low power control struct
  344. static DRAM_ATTR btdm_lpcntl_t s_lp_cntl;
  345. // low power status struct
  346. static DRAM_ATTR btdm_lpstat_t s_lp_stat;
  347. // measured average low power clock period in micro seconds
  348. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  349. // number of fractional bit for btdm_lpcycle_us
  350. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
  351. // semaphore used for blocking VHCI API to wait for controller to wake up
  352. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  353. // wakeup timer
  354. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  355. #ifdef CONFIG_PM_ENABLE
  356. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  357. // pm_lock to prevent light sleep due to incompatibility currently
  358. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  359. #endif
  360. void IRAM_ATTR btdm_hw_mac_power_down_wrapper(void)
  361. {
  362. #if CONFIG_MAC_BB_PD
  363. esp_mac_bb_power_down();
  364. #endif
  365. }
  366. void IRAM_ATTR btdm_hw_mac_power_up_wrapper(void)
  367. {
  368. #if CONFIG_MAC_BB_PD
  369. esp_mac_bb_power_up();
  370. #endif
  371. }
  372. void IRAM_ATTR btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem)
  373. {
  374. #if CONFIG_MAC_BB_PD
  375. ets_backup_dma_copy(reg, mem_addr, num, to_mem);
  376. #endif
  377. }
  378. static inline void esp_bt_power_domain_on(void)
  379. {
  380. // Bluetooth module power up
  381. esp_wifi_bt_power_domain_on();
  382. }
  383. static inline void esp_bt_power_domain_off(void)
  384. {
  385. // Bluetooth module power down
  386. esp_wifi_bt_power_domain_off();
  387. }
  388. static void interrupt_set_wrapper(int32_t cpu_no, int32_t intr_source, int32_t intr_num, int32_t intr_prio)
  389. {
  390. intr_matrix_set(cpu_no, intr_source, intr_num);
  391. }
  392. static void interrupt_clear_wrapper(int32_t intr_source, int32_t intr_num)
  393. {
  394. }
  395. static void interrupt_handler_set_wrapper(int32_t n, void *fn, void *arg)
  396. {
  397. xt_set_interrupt_handler(n, (xt_handler)fn, arg);
  398. }
  399. static void interrupt_on_wrapper(int intr_num)
  400. {
  401. xt_ints_on(1 << intr_num);
  402. }
  403. static void interrupt_off_wrapper(int intr_num)
  404. {
  405. xt_ints_off(1 << intr_num);
  406. }
  407. static void IRAM_ATTR interrupt_disable(void)
  408. {
  409. if (xPortInIsrContext()) {
  410. portENTER_CRITICAL_ISR(&global_int_mux);
  411. } else {
  412. portENTER_CRITICAL(&global_int_mux);
  413. }
  414. }
  415. static void IRAM_ATTR interrupt_restore(void)
  416. {
  417. if (xPortInIsrContext()) {
  418. portEXIT_CRITICAL_ISR(&global_int_mux);
  419. } else {
  420. portEXIT_CRITICAL(&global_int_mux);
  421. }
  422. }
  423. static void IRAM_ATTR task_yield_from_isr(void)
  424. {
  425. portYIELD_FROM_ISR();
  426. }
  427. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  428. {
  429. return (void *)xSemaphoreCreateCounting(max, init);
  430. }
  431. static void semphr_delete_wrapper(void *semphr)
  432. {
  433. vSemaphoreDelete(semphr);
  434. }
  435. static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  436. {
  437. return (int)xSemaphoreTakeFromISR(semphr, hptw);
  438. }
  439. static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  440. {
  441. return (int)xSemaphoreGiveFromISR(semphr, hptw);
  442. }
  443. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  444. {
  445. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  446. return (int)xSemaphoreTake(semphr, portMAX_DELAY);
  447. } else {
  448. return (int)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  449. }
  450. }
  451. static int semphr_give_wrapper(void *semphr)
  452. {
  453. return (int)xSemaphoreGive(semphr);
  454. }
  455. static void *mutex_create_wrapper(void)
  456. {
  457. return (void *)xSemaphoreCreateMutex();
  458. }
  459. static void mutex_delete_wrapper(void *mutex)
  460. {
  461. vSemaphoreDelete(mutex);
  462. }
  463. static int mutex_lock_wrapper(void *mutex)
  464. {
  465. return (int)xSemaphoreTake(mutex, portMAX_DELAY);
  466. }
  467. static int mutex_unlock_wrapper(void *mutex)
  468. {
  469. return (int)xSemaphoreGive(mutex);
  470. }
  471. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  472. {
  473. return (void *)xQueueCreate(queue_len, item_size);
  474. }
  475. static void queue_delete_wrapper(void *queue)
  476. {
  477. vQueueDelete(queue);
  478. }
  479. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  480. {
  481. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  482. return (int)xQueueSend(queue, item, portMAX_DELAY);
  483. } else {
  484. return (int)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  485. }
  486. }
  487. static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  488. {
  489. return (int)xQueueSendFromISR(queue, item, hptw);
  490. }
  491. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  492. {
  493. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  494. return (int)xQueueReceive(queue, item, portMAX_DELAY);
  495. } else {
  496. return (int)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  497. }
  498. }
  499. static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  500. {
  501. return (int)xQueueReceiveFromISR(queue, item, hptw);
  502. }
  503. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  504. {
  505. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  506. }
  507. static void task_delete_wrapper(void *task_handle)
  508. {
  509. vTaskDelete(task_handle);
  510. }
  511. static bool IRAM_ATTR is_in_isr_wrapper(void)
  512. {
  513. return (bool)xPortInIsrContext();
  514. }
  515. static void *malloc_internal_wrapper(size_t size)
  516. {
  517. void *p = heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
  518. if(p == NULL) {
  519. ESP_LOGE(BT_LOG_TAG, "Malloc failed");
  520. }
  521. return p;
  522. }
  523. static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  524. {
  525. int ret = esp_read_mac(mac, ESP_MAC_BT);
  526. ESP_LOGI(BT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
  527. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  528. return ret;
  529. }
  530. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  531. {
  532. /* empty function */
  533. }
  534. static int IRAM_ATTR rand_wrapper(void)
  535. {
  536. return (int)esp_random();
  537. }
  538. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
  539. {
  540. uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
  541. uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
  542. local_error_corr += res;
  543. res = (local_error_corr >> btdm_lpcycle_us_frac);
  544. local_error_corr -= (res << btdm_lpcycle_us_frac);
  545. if (error_corr) {
  546. *error_corr = (uint32_t) local_error_corr;
  547. }
  548. return (uint32_t)res;
  549. }
  550. /*
  551. * @brief Converts a duration in half us into a number of low power clock cycles.
  552. */
  553. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
  554. {
  555. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  556. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  557. // clock measurement is conducted
  558. uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  559. cycles >>= 1;
  560. return (uint32_t)cycles;
  561. }
  562. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
  563. {
  564. if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  565. return false;
  566. }
  567. /* wake up in advance considering the delay in enabling PHY/RF */
  568. *half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  569. return true;
  570. }
  571. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  572. {
  573. if (s_lp_cntl.wakeup_timer_required == 0) {
  574. return;
  575. }
  576. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  577. uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
  578. #define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
  579. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  580. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  581. // and set the timer in advance
  582. uint32_t uncertainty = (us_to_sleep >> 11);
  583. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  584. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  585. }
  586. assert (s_lp_stat.wakeup_timer_started == 0);
  587. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
  588. s_lp_stat.wakeup_timer_started = 1;
  589. } else {
  590. ESP_LOGE(BT_LOG_TAG, "timer start failed");
  591. assert(0);
  592. }
  593. }
  594. static void btdm_sleep_enter_phase2_wrapper(void)
  595. {
  596. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  597. if (s_lp_stat.phy_enabled) {
  598. esp_phy_disable();
  599. s_lp_stat.phy_enabled = 0;
  600. } else {
  601. assert(0);
  602. }
  603. if (s_lp_stat.pm_lock_released == 0) {
  604. #ifdef CONFIG_PM_ENABLE
  605. esp_pm_lock_release(s_pm_lock);
  606. #endif
  607. s_lp_stat.pm_lock_released = 1;
  608. }
  609. }
  610. }
  611. static void btdm_sleep_exit_phase3_wrapper(void)
  612. {
  613. #ifdef CONFIG_PM_ENABLE
  614. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  615. // Then we will not run into `btdm_sleep_exit_phase0` and acquire PM lock,
  616. // Do it again here to fix this issue.
  617. if (s_lp_stat.pm_lock_released) {
  618. esp_pm_lock_acquire(s_pm_lock);
  619. s_lp_stat.pm_lock_released = 0;
  620. }
  621. #endif
  622. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  623. if (s_lp_stat.phy_enabled == 0) {
  624. esp_phy_enable();
  625. s_lp_stat.phy_enabled = 1;
  626. }
  627. }
  628. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  629. // Then we will not run into `btdm_sleep_exit_phase0` and stop esp timer,
  630. // Do it again here to fix this issue.
  631. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  632. esp_timer_stop(s_btdm_slp_tmr);
  633. s_lp_stat.wakeup_timer_started = 0;
  634. }
  635. // wait for the sleep state to change
  636. // the procedure duration is at micro-second level or less
  637. while (btdm_sleep_clock_sync()) {
  638. ;
  639. }
  640. }
  641. static void IRAM_ATTR btdm_sleep_exit_phase0(void *param)
  642. {
  643. assert(s_lp_cntl.enable == 1);
  644. #ifdef CONFIG_PM_ENABLE
  645. if (s_lp_stat.pm_lock_released) {
  646. esp_pm_lock_acquire(s_pm_lock);
  647. s_lp_stat.pm_lock_released = 0;
  648. }
  649. #endif
  650. int event = (int) param;
  651. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  652. btdm_wakeup_request();
  653. }
  654. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  655. esp_timer_stop(s_btdm_slp_tmr);
  656. s_lp_stat.wakeup_timer_started = 0;
  657. }
  658. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  659. semphr_give_wrapper(s_wakeup_req_sem);
  660. }
  661. }
  662. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  663. {
  664. #ifdef CONFIG_PM_ENABLE
  665. btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)BTDM_ASYNC_WAKEUP_SRC_TMR);
  666. #endif
  667. }
  668. static bool async_wakeup_request(int event)
  669. {
  670. if (s_lp_cntl.enable == 0) {
  671. return false;
  672. }
  673. bool do_wakeup_request = false;
  674. switch (event) {
  675. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  676. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  677. btdm_in_wakeup_requesting_set(true);
  678. if (!btdm_power_state_active()) {
  679. btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)event);
  680. do_wakeup_request = true;
  681. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  682. }
  683. break;
  684. default:
  685. break;
  686. }
  687. return do_wakeup_request;
  688. }
  689. static void async_wakeup_request_end(int event)
  690. {
  691. if (s_lp_cntl.enable == 0) {
  692. return;
  693. }
  694. bool allow_to_sleep;
  695. switch (event) {
  696. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  697. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  698. allow_to_sleep = true;
  699. break;
  700. default:
  701. allow_to_sleep = true;
  702. break;
  703. }
  704. if (allow_to_sleep) {
  705. btdm_in_wakeup_requesting_set(false);
  706. }
  707. return;
  708. }
  709. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  710. {
  711. #if CONFIG_SW_COEXIST_ENABLE
  712. coex_schm_status_bit_set(type, status);
  713. #endif
  714. }
  715. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  716. {
  717. #if CONFIG_SW_COEXIST_ENABLE
  718. coex_schm_status_bit_clear(type, status);
  719. #endif
  720. }
  721. bool esp_vhci_host_check_send_available(void)
  722. {
  723. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  724. return false;
  725. }
  726. return API_vhci_host_check_send_available();
  727. }
  728. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  729. {
  730. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  731. return;
  732. }
  733. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  734. API_vhci_host_send_packet(data, len);
  735. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  736. }
  737. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  738. {
  739. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  740. return ESP_FAIL;
  741. }
  742. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  743. }
  744. static void btdm_controller_mem_init(void)
  745. {
  746. extern void btdm_controller_rom_data_init(void );
  747. btdm_controller_rom_data_init();
  748. }
  749. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  750. {
  751. ESP_LOGW(BT_LOG_TAG, "%s not implemented, return OK", __func__);
  752. return ESP_OK;
  753. }
  754. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  755. {
  756. ESP_LOGW(BT_LOG_TAG, "%s not implemented, return OK", __func__);
  757. return ESP_OK;
  758. }
  759. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  760. static void IRAM_ATTR btdm_mac_bb_power_down_cb(void)
  761. {
  762. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd == 0) {
  763. #if (CONFIG_MAC_BB_PD)
  764. btdm_ble_power_down_dma_copy(true);
  765. #endif
  766. s_lp_stat.mac_bb_pd = 1;
  767. }
  768. }
  769. static void IRAM_ATTR btdm_mac_bb_power_up_cb(void)
  770. {
  771. #if (CONFIG_MAC_BB_PD)
  772. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd) {
  773. btdm_ble_power_down_dma_copy(false);
  774. s_lp_stat.mac_bb_pd = 0;
  775. }
  776. #endif
  777. }
  778. #endif
  779. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  780. {
  781. esp_err_t err = ESP_FAIL;
  782. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  783. return ESP_ERR_INVALID_STATE;
  784. }
  785. if (cfg == NULL) {
  786. return ESP_ERR_INVALID_ARG;
  787. }
  788. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  789. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  790. ESP_LOGE(BT_LOG_TAG, "Invalid controller task prioriy or stack size");
  791. return ESP_ERR_INVALID_ARG;
  792. }
  793. if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
  794. ESP_LOGE(BT_LOG_TAG, "%s controller only support BLE only mode", __func__);
  795. return ESP_ERR_NOT_SUPPORTED;
  796. }
  797. if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
  798. if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
  799. ESP_LOGE(BT_LOG_TAG, "Invalid value of ble_max_act");
  800. return ESP_ERR_INVALID_ARG;
  801. }
  802. }
  803. if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
  804. if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
  805. ESP_LOGE(BT_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
  806. return ESP_ERR_INVALID_ARG;
  807. }
  808. }
  809. // overwrite some parameters
  810. cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
  811. #if CONFIG_MAC_BB_PD
  812. esp_mac_bb_pd_mem_init();
  813. #endif
  814. esp_bt_power_domain_on();
  815. btdm_controller_mem_init();
  816. #if CONFIG_MAC_BB_PD
  817. if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
  818. err = ESP_ERR_INVALID_ARG;
  819. goto error;
  820. }
  821. if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
  822. err = ESP_ERR_INVALID_ARG;
  823. goto error;
  824. }
  825. #endif
  826. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  827. if (osi_funcs_p == NULL) {
  828. return ESP_ERR_NO_MEM;
  829. }
  830. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  831. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  832. return ESP_ERR_INVALID_ARG;
  833. }
  834. ESP_LOGI(BT_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  835. // init low-power control resources
  836. do {
  837. // set default values for global states or resources
  838. s_lp_stat.val = 0;
  839. s_lp_cntl.val = 0;
  840. s_wakeup_req_sem = NULL;
  841. s_btdm_slp_tmr = NULL;
  842. // configure and initialize resources
  843. s_lp_cntl.enable = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? 1 : 0;
  844. s_lp_cntl.no_light_sleep = 1;
  845. if (s_lp_cntl.enable) {
  846. #if (CONFIG_MAC_BB_PD)
  847. if (!btdm_deep_sleep_mem_init()) {
  848. err = ESP_ERR_NO_MEM;
  849. goto error;
  850. }
  851. s_lp_cntl.mac_bb_pd = 1;
  852. #endif
  853. #ifdef CONFIG_PM_ENABLE
  854. s_lp_cntl.wakeup_timer_required = 1;
  855. #endif
  856. // async wakeup semaphore for VHCI
  857. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  858. if (s_wakeup_req_sem == NULL) {
  859. err = ESP_ERR_NO_MEM;
  860. goto error;
  861. }
  862. btdm_vnd_offload_task_register(BTDM_VND_OL_SIG_WAKEUP_TMR, btdm_sleep_exit_phase0);
  863. }
  864. if (s_lp_cntl.wakeup_timer_required) {
  865. esp_timer_create_args_t create_args = {
  866. .callback = btdm_slp_tmr_callback,
  867. .arg = NULL,
  868. .name = "btSlp",
  869. };
  870. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  871. goto error;
  872. }
  873. }
  874. // set default bluetooth sleep clock cycle and its fractional bits
  875. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  876. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  877. // set default bluetooth sleep clock source
  878. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  879. #if CONFIG_BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
  880. // check whether or not EXT_CRYS is working
  881. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_32K_XTAL) {
  882. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // External 32 kHz XTAL
  883. s_lp_cntl.no_light_sleep = 0;
  884. } else {
  885. ESP_LOGW(BT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
  886. "light sleep mode will not be able to apply when bluetooth is enabled");
  887. }
  888. #elif (CONFIG_BT_CTRL_LPCLK_SEL_RTC_SLOW)
  889. // check whether or not EXT_CRYS is working
  890. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_RTC) {
  891. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_RTC_SLOW; // Internal 150 kHz RC oscillator
  892. ESP_LOGW(BTDM_LOG_TAG, "Internal 150kHz RC osciallator. The accuracy of this clock is a lot larger than 500ppm which is "
  893. "required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
  894. } else {
  895. ESP_LOGW(BT_LOG_TAG, "Internal 150kHz RC oscillator not detected.");
  896. assert(0);
  897. }
  898. #else
  899. s_lp_cntl.no_light_sleep = 1;
  900. #endif
  901. bool select_src_ret __attribute__((unused));
  902. bool set_div_ret __attribute__((unused));
  903. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  904. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  905. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2);
  906. assert(select_src_ret && set_div_ret);
  907. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  908. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  909. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL32K) {
  910. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  911. set_div_ret = btdm_lpclk_set_div(0);
  912. assert(select_src_ret && set_div_ret);
  913. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  914. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  915. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  916. assert(btdm_lpcycle_us != 0);
  917. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_RTC_SLOW) {
  918. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  919. set_div_ret = btdm_lpclk_set_div(0);
  920. assert(select_src_ret && set_div_ret);
  921. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  922. btdm_lpcycle_us = esp_clk_slowclk_cal_get();
  923. } else {
  924. err = ESP_ERR_INVALID_ARG;
  925. goto error;
  926. }
  927. #ifdef CONFIG_PM_ENABLE
  928. if (s_lp_cntl.no_light_sleep) {
  929. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  930. err = ESP_ERR_NO_MEM;
  931. goto error;
  932. }
  933. }
  934. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  935. err = ESP_ERR_NO_MEM;
  936. goto error;
  937. } else {
  938. s_lp_stat.pm_lock_released = 1;
  939. }
  940. #endif
  941. } while (0);
  942. #if CONFIG_SW_COEXIST_ENABLE
  943. coex_init();
  944. #endif
  945. periph_module_enable(PERIPH_BT_MODULE);
  946. esp_phy_enable();
  947. s_lp_stat.phy_enabled = 1;
  948. if (btdm_controller_init(cfg) != 0) {
  949. err = ESP_ERR_NO_MEM;
  950. goto error;
  951. }
  952. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  953. return ESP_OK;
  954. error:
  955. if (s_lp_stat.phy_enabled) {
  956. esp_phy_disable();
  957. s_lp_stat.phy_enabled = 0;
  958. }
  959. do {
  960. // deinit low power control resources
  961. #ifdef CONFIG_PM_ENABLE
  962. if (s_lp_cntl.no_light_sleep) {
  963. if (s_light_sleep_pm_lock != NULL) {
  964. esp_pm_lock_delete(s_light_sleep_pm_lock);
  965. s_light_sleep_pm_lock = NULL;
  966. }
  967. }
  968. if (s_pm_lock != NULL) {
  969. esp_pm_lock_delete(s_pm_lock);
  970. s_pm_lock = NULL;
  971. s_lp_stat.pm_lock_released = 0;
  972. }
  973. #endif
  974. if (s_lp_cntl.wakeup_timer_required && s_btdm_slp_tmr != NULL) {
  975. esp_timer_delete(s_btdm_slp_tmr);
  976. s_btdm_slp_tmr = NULL;
  977. }
  978. #if (CONFIG_MAC_BB_PD)
  979. if (s_lp_cntl.mac_bb_pd) {
  980. btdm_deep_sleep_mem_deinit();
  981. s_lp_cntl.mac_bb_pd = 0;
  982. }
  983. #endif
  984. if (s_lp_cntl.enable) {
  985. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  986. if (s_wakeup_req_sem != NULL) {
  987. semphr_delete_wrapper(s_wakeup_req_sem);
  988. s_wakeup_req_sem = NULL;
  989. }
  990. }
  991. } while (0);
  992. #if CONFIG_MAC_BB_PD
  993. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  994. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  995. #endif
  996. esp_bt_power_domain_off();
  997. if (osi_funcs_p != NULL) {
  998. free(osi_funcs_p);
  999. osi_funcs_p = NULL;
  1000. }
  1001. return err;
  1002. }
  1003. esp_err_t esp_bt_controller_deinit(void)
  1004. {
  1005. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1006. return ESP_ERR_INVALID_STATE;
  1007. }
  1008. btdm_controller_deinit();
  1009. periph_module_disable(PERIPH_BT_MODULE);
  1010. if (s_lp_stat.phy_enabled) {
  1011. esp_phy_disable();
  1012. s_lp_stat.phy_enabled = 0;
  1013. } else {
  1014. assert(0);
  1015. }
  1016. // deinit low power control resources
  1017. do {
  1018. #if (CONFIG_MAC_BB_PD)
  1019. btdm_deep_sleep_mem_deinit();
  1020. #endif
  1021. #ifdef CONFIG_PM_ENABLE
  1022. if (s_lp_cntl.no_light_sleep) {
  1023. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1024. s_light_sleep_pm_lock = NULL;
  1025. }
  1026. esp_pm_lock_delete(s_pm_lock);
  1027. s_pm_lock = NULL;
  1028. s_lp_stat.pm_lock_released = 0;
  1029. #endif
  1030. if (s_lp_cntl.wakeup_timer_required) {
  1031. if (s_lp_stat.wakeup_timer_started) {
  1032. esp_timer_stop(s_btdm_slp_tmr);
  1033. }
  1034. s_lp_stat.wakeup_timer_started = 0;
  1035. esp_timer_delete(s_btdm_slp_tmr);
  1036. s_btdm_slp_tmr = NULL;
  1037. }
  1038. if (s_lp_cntl.enable) {
  1039. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  1040. semphr_delete_wrapper(s_wakeup_req_sem);
  1041. s_wakeup_req_sem = NULL;
  1042. }
  1043. } while (0);
  1044. #if CONFIG_MAC_BB_PD
  1045. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  1046. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  1047. #endif
  1048. free(osi_funcs_p);
  1049. osi_funcs_p = NULL;
  1050. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1051. btdm_lpcycle_us = 0;
  1052. return ESP_OK;
  1053. }
  1054. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1055. {
  1056. int ret = ESP_OK;
  1057. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1058. return ESP_ERR_INVALID_STATE;
  1059. }
  1060. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1061. if (mode != btdm_controller_get_mode()) {
  1062. ESP_LOGE(BT_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
  1063. return ESP_ERR_INVALID_ARG;
  1064. }
  1065. #if CONFIG_SW_COEXIST_ENABLE
  1066. coex_enable();
  1067. #endif
  1068. // enable low power mode
  1069. do {
  1070. #ifdef CONFIG_PM_ENABLE
  1071. if (s_lp_cntl.no_light_sleep) {
  1072. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1073. }
  1074. esp_pm_lock_acquire(s_pm_lock);
  1075. s_lp_stat.pm_lock_released = 0;
  1076. #endif
  1077. if (s_lp_cntl.enable) {
  1078. btdm_controller_enable_sleep(true);
  1079. }
  1080. } while (0);
  1081. if (btdm_controller_enable(mode) != 0) {
  1082. ret = ESP_ERR_INVALID_STATE;
  1083. goto error;
  1084. }
  1085. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1086. return ret;
  1087. error:
  1088. // disable low power mode
  1089. do {
  1090. btdm_controller_enable_sleep(false);
  1091. #ifdef CONFIG_PM_ENABLE
  1092. if (s_lp_cntl.no_light_sleep) {
  1093. esp_pm_lock_release(s_light_sleep_pm_lock);
  1094. }
  1095. if (s_lp_stat.pm_lock_released == 0) {
  1096. esp_pm_lock_release(s_pm_lock);
  1097. s_lp_stat.pm_lock_released = 1;
  1098. }
  1099. #endif
  1100. } while (0);
  1101. return ret;
  1102. }
  1103. esp_err_t esp_bt_controller_disable(void)
  1104. {
  1105. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1106. return ESP_ERR_INVALID_STATE;
  1107. }
  1108. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1109. while (!btdm_power_state_active()){}
  1110. btdm_controller_disable();
  1111. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1112. #if CONFIG_SW_COEXIST_ENABLE
  1113. coex_disable();
  1114. #endif
  1115. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1116. // disable low power mode
  1117. do {
  1118. #ifdef CONFIG_PM_ENABLE
  1119. if (s_lp_cntl.no_light_sleep) {
  1120. esp_pm_lock_release(s_light_sleep_pm_lock);
  1121. }
  1122. if (s_lp_stat.pm_lock_released == 0) {
  1123. esp_pm_lock_release(s_pm_lock);
  1124. s_lp_stat.pm_lock_released = 1;
  1125. } else {
  1126. assert(0);
  1127. }
  1128. #endif
  1129. } while (0);
  1130. return ESP_OK;
  1131. }
  1132. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1133. {
  1134. return btdm_controller_status;
  1135. }
  1136. /* extra functions */
  1137. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1138. {
  1139. esp_err_t stat = ESP_FAIL;
  1140. switch (power_type) {
  1141. case ESP_BLE_PWR_TYPE_ADV:
  1142. case ESP_BLE_PWR_TYPE_SCAN:
  1143. case ESP_BLE_PWR_TYPE_DEFAULT:
  1144. if (ble_txpwr_set(power_type, power_level) == 0) {
  1145. stat = ESP_OK;
  1146. }
  1147. break;
  1148. default:
  1149. stat = ESP_ERR_NOT_SUPPORTED;
  1150. break;
  1151. }
  1152. return stat;
  1153. }
  1154. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1155. {
  1156. esp_power_level_t lvl;
  1157. switch (power_type) {
  1158. case ESP_BLE_PWR_TYPE_ADV:
  1159. case ESP_BLE_PWR_TYPE_SCAN:
  1160. lvl = (esp_power_level_t)ble_txpwr_get(power_type);
  1161. break;
  1162. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  1163. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  1164. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  1165. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  1166. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  1167. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  1168. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  1169. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  1170. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  1171. case ESP_BLE_PWR_TYPE_DEFAULT:
  1172. lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
  1173. break;
  1174. default:
  1175. lvl = ESP_PWR_LVL_INVALID;
  1176. break;
  1177. }
  1178. return lvl;
  1179. }
  1180. esp_err_t esp_bt_sleep_enable (void)
  1181. {
  1182. esp_err_t status;
  1183. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1184. return ESP_ERR_INVALID_STATE;
  1185. }
  1186. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1187. btdm_controller_enable_sleep (true);
  1188. status = ESP_OK;
  1189. } else {
  1190. status = ESP_ERR_NOT_SUPPORTED;
  1191. }
  1192. return status;
  1193. }
  1194. esp_err_t esp_bt_sleep_disable (void)
  1195. {
  1196. esp_err_t status;
  1197. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1198. return ESP_ERR_INVALID_STATE;
  1199. }
  1200. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1201. btdm_controller_enable_sleep (false);
  1202. status = ESP_OK;
  1203. } else {
  1204. status = ESP_ERR_NOT_SUPPORTED;
  1205. }
  1206. return status;
  1207. }
  1208. bool esp_bt_controller_is_sleeping(void)
  1209. {
  1210. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1211. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1212. return false;
  1213. }
  1214. return !btdm_power_state_active();
  1215. }
  1216. void esp_bt_controller_wakeup_request(void)
  1217. {
  1218. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1219. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1220. return;
  1221. }
  1222. btdm_wakeup_request();
  1223. }
  1224. int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
  1225. {
  1226. return btdm_hci_tl_io_event_post(event);
  1227. }
  1228. uint16_t esp_bt_get_tx_buf_num(void)
  1229. {
  1230. return l2c_ble_link_get_tx_buf_num();
  1231. }
  1232. static void coex_wifi_sleep_set_hook(bool sleep)
  1233. {
  1234. }
  1235. #endif /* CONFIG_BT_ENABLED */