adc.c 5.8 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stdlib.h>
  7. #include <ctype.h>
  8. #include "sdkconfig.h"
  9. #include "esp_types.h"
  10. #include "esp_log.h"
  11. #include "sys/lock.h"
  12. #include "soc/rtc.h"
  13. #include "soc/periph_defs.h"
  14. #include "freertos/FreeRTOS.h"
  15. #include "freertos/xtensa_api.h"
  16. #include "freertos/semphr.h"
  17. #include "freertos/timers.h"
  18. #include "esp_intr_alloc.h"
  19. #include "driver/rtc_io.h"
  20. #include "driver/rtc_cntl.h"
  21. #include "driver/gpio.h"
  22. #include "driver/adc.h"
  23. #ifndef NDEBUG
  24. // Enable built-in checks in queue.h in debug builds
  25. #define INVARIANTS
  26. #endif
  27. #include "sys/queue.h"
  28. #include "hal/adc_types.h"
  29. #include "hal/adc_hal.h"
  30. #define ADC_MAX_MEAS_NUM_DEFAULT (255)
  31. #define ADC_MEAS_NUM_LIM_DEFAULT (1)
  32. #define DIG_ADC_OUTPUT_FORMAT_DEFUALT (ADC_DIGI_FORMAT_12BIT)
  33. #define DIG_ADC_ATTEN_DEFUALT (ADC_ATTEN_DB_11)
  34. #define DIG_ADC_BIT_WIDTH_DEFUALT (ADC_WIDTH_BIT_12)
  35. #define ADC_CHECK_RET(fun_ret) ({ \
  36. if (fun_ret != ESP_OK) { \
  37. ESP_LOGE(ADC_TAG,"%s:%d\n",__FUNCTION__,__LINE__); \
  38. return ESP_FAIL; \
  39. } \
  40. })
  41. static const char *ADC_TAG = "ADC";
  42. #define ADC_CHECK(a, str, ret_val) ({ \
  43. if (!(a)) { \
  44. ESP_LOGE(ADC_TAG,"%s(%d): %s", __FUNCTION__, __LINE__, str); \
  45. return (ret_val); \
  46. } \
  47. })
  48. #define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel])
  49. #define ADC_CHANNEL_CHECK(periph, channel) ADC_CHECK(channel < SOC_ADC_CHANNEL_NUM(periph), "ADC"#periph" channel error", ESP_ERR_INVALID_ARG)
  50. extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
  51. #define ADC_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock)
  52. #define ADC_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock)
  53. /*---------------------------------------------------------------
  54. Digital controller setting
  55. ---------------------------------------------------------------*/
  56. esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src)
  57. {
  58. ADC_CHECK(src < ADC_I2S_DATA_SRC_MAX, "ADC i2s data source error", ESP_ERR_INVALID_ARG);
  59. ADC_ENTER_CRITICAL();
  60. adc_hal_digi_set_data_source(src);
  61. ADC_EXIT_CRITICAL();
  62. return ESP_OK;
  63. }
  64. esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel)
  65. {
  66. if (adc_unit & ADC_UNIT_1) {
  67. ADC_CHECK((SOC_ADC_SUPPORT_DMA_MODE(ADC_NUM_1)), "ADC1 not support DMA for now.", ESP_ERR_INVALID_ARG);
  68. ADC_CHANNEL_CHECK(ADC_NUM_1, channel);
  69. }
  70. if (adc_unit & ADC_UNIT_2) {
  71. ADC_CHECK((SOC_ADC_SUPPORT_DMA_MODE(ADC_NUM_2)), "ADC2 not support DMA for now.", ESP_ERR_INVALID_ARG);
  72. ADC_CHANNEL_CHECK(ADC_NUM_2, channel);
  73. }
  74. adc_digi_pattern_table_t adc1_pattern[1];
  75. adc_digi_pattern_table_t adc2_pattern[1];
  76. adc_digi_config_t dig_cfg = {
  77. .conv_limit_en = ADC_MEAS_NUM_LIM_DEFAULT,
  78. .conv_limit_num = ADC_MAX_MEAS_NUM_DEFAULT,
  79. .format = DIG_ADC_OUTPUT_FORMAT_DEFUALT,
  80. .conv_mode = (adc_digi_convert_mode_t)adc_unit,
  81. };
  82. if (adc_unit & ADC_UNIT_1) {
  83. adc1_pattern[0].atten = DIG_ADC_ATTEN_DEFUALT;
  84. adc1_pattern[0].bit_width = DIG_ADC_BIT_WIDTH_DEFUALT;
  85. adc1_pattern[0].channel = channel;
  86. dig_cfg.adc1_pattern_len = 1;
  87. dig_cfg.adc1_pattern = adc1_pattern;
  88. }
  89. if (adc_unit & ADC_UNIT_2) {
  90. adc2_pattern[0].atten = DIG_ADC_ATTEN_DEFUALT;
  91. adc2_pattern[0].bit_width = DIG_ADC_BIT_WIDTH_DEFUALT;
  92. adc2_pattern[0].channel = channel;
  93. dig_cfg.adc2_pattern_len = 1;
  94. dig_cfg.adc2_pattern = adc2_pattern;
  95. }
  96. adc_gpio_init(adc_unit, channel);
  97. ADC_ENTER_CRITICAL();
  98. adc_hal_init();
  99. adc_hal_digi_controller_config(&dig_cfg);
  100. ADC_EXIT_CRITICAL();
  101. return ESP_OK;
  102. }
  103. esp_err_t adc_digi_init(void)
  104. {
  105. ADC_ENTER_CRITICAL();
  106. adc_hal_init();
  107. ADC_EXIT_CRITICAL();
  108. return ESP_OK;
  109. }
  110. esp_err_t adc_digi_deinit(void)
  111. {
  112. adc_power_release();
  113. ADC_ENTER_CRITICAL();
  114. adc_hal_digi_deinit();
  115. ADC_EXIT_CRITICAL();
  116. return ESP_OK;
  117. }
  118. esp_err_t adc_digi_controller_config(const adc_digi_config_t *config)
  119. {
  120. /* If enable digital controller, adc xpd should always on. */
  121. adc_power_acquire();
  122. ADC_ENTER_CRITICAL();
  123. adc_hal_digi_controller_config(config);
  124. ADC_EXIT_CRITICAL();
  125. return ESP_OK;
  126. }
  127. /*---------------------------------------------------------------
  128. RTC controller setting
  129. ---------------------------------------------------------------*/
  130. /*---------------------------------------------------------------
  131. HALL SENSOR
  132. ---------------------------------------------------------------*/
  133. static int hall_sensor_get_value(void) //hall sensor without LNA
  134. {
  135. int hall_value;
  136. adc_power_acquire();
  137. ADC_ENTER_CRITICAL();
  138. /* disable other peripherals. */
  139. adc_hal_amp_disable();
  140. adc_hal_hall_enable();
  141. // set controller
  142. adc_hal_set_controller( ADC_NUM_1, ADC_CTRL_RTC );
  143. hall_value = adc_hal_hall_convert();
  144. adc_hal_hall_disable();
  145. ADC_EXIT_CRITICAL();
  146. adc_power_release();
  147. return hall_value;
  148. }
  149. int hall_sensor_read(void)
  150. {
  151. adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_0);
  152. adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_3);
  153. adc1_config_channel_atten(ADC1_CHANNEL_0, ADC_ATTEN_DB_0);
  154. adc1_config_channel_atten(ADC1_CHANNEL_3, ADC_ATTEN_DB_0);
  155. return hall_sensor_get_value();
  156. }