test_i2c.c 27 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. /**
  7. * test environment UT_T2_I2C:
  8. * please prepare two ESP32-WROVER-KIT board.
  9. * Then connect GPIO18 and GPIO18, GPIO19 and GPIO19 between these two boards.
  10. */
  11. #include <stdio.h>
  12. #include <string.h>
  13. #include "unity.h"
  14. #include "test_utils.h"
  15. #include "unity_config.h"
  16. #include "driver/i2c.h"
  17. #include "esp_attr.h"
  18. #include "esp_log.h"
  19. #include "soc/gpio_periph.h"
  20. #include "soc/i2c_periph.h"
  21. #include "esp_system.h"
  22. #include "soc/uart_struct.h"
  23. #include "driver/periph_ctrl.h"
  24. #include "esp_rom_gpio.h"
  25. #include "hal/gpio_hal.h"
  26. #include "hal/uart_ll.h"
  27. #define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
  28. #define RW_TEST_LENGTH 129 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
  29. #define DELAY_TIME_BETWEEN_ITEMS_MS 1234 /*!< delay time between different test items */
  30. #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
  31. #define I2C_SLAVE_SCL_IO 5 /*!<gpio number for i2c slave clock */
  32. #define I2C_SLAVE_SDA_IO 6 /*!<gpio number for i2c slave data */
  33. #else
  34. #define I2C_SLAVE_SCL_IO 19 /*!<gpio number for i2c slave clock */
  35. #define I2C_SLAVE_SDA_IO 18 /*!<gpio number for i2c slave data */
  36. #endif
  37. #define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
  38. #define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
  39. #define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
  40. #if CONFIG_IDF_TARGET_ESP32C3
  41. #define I2C_MASTER_SCL_IO 5 /*!<gpio number for i2c master clock */
  42. #define I2C_MASTER_SDA_IO 6 /*!<gpio number for i2c master data */
  43. #elif CONFIG_IDF_TARGET_ESP32S3
  44. #define I2C_MASTER_SCL_IO 2 /*!<gpio number for i2c master clock */
  45. #define I2C_MASTER_SDA_IO 1 /*!<gpio number for i2c master data */
  46. #else
  47. #define I2C_MASTER_SCL_IO 19 /*!< gpio number for I2C master clock */
  48. #define I2C_MASTER_SDA_IO 18 /*!< gpio number for I2C master data */
  49. #endif
  50. #define I2C_MASTER_NUM I2C_NUM_0 /*!< I2C port number for master dev */
  51. #define I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  52. #define I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  53. #define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */
  54. #define ESP_SLAVE_ADDR 0x28 /*!< ESP32 slave address, you can set any 7bit value */
  55. #define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
  56. #define READ_BIT I2C_MASTER_READ /*!< I2C master read */
  57. #define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
  58. #define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
  59. #define ACK_VAL 0x0 /*!< I2C ack value */
  60. #define NACK_VAL 0x1 /*!< I2C nack value */
  61. #define PULSE_IO 19
  62. #define PCNT_INPUT_IO 4
  63. #define PCNT_CTRL_FLOATING_IO 5
  64. #define HIGHEST_LIMIT 10000
  65. #define LOWEST_LIMIT -10000
  66. static DRAM_ATTR i2c_dev_t *const I2C[SOC_I2C_NUM] = { &I2C0,
  67. #if SOC_I2C_NUM > 1
  68. &I2C1,
  69. #endif
  70. };
  71. static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
  72. {
  73. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  74. i2c_master_start(cmd);
  75. TEST_ESP_OK(i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN));
  76. TEST_ESP_OK(i2c_master_write(cmd, data_wr, size, ACK_CHECK_EN));
  77. TEST_ESP_OK(i2c_master_stop(cmd));
  78. esp_err_t ret = i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
  79. i2c_cmd_link_delete(cmd);
  80. return ret;
  81. }
  82. static i2c_config_t i2c_master_init(void)
  83. {
  84. i2c_config_t conf_master = {
  85. .mode = I2C_MODE_MASTER,
  86. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  87. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  88. .master.clk_speed = I2C_MASTER_FREQ_HZ,
  89. .sda_io_num = I2C_MASTER_SDA_IO,
  90. .scl_io_num = I2C_MASTER_SCL_IO,
  91. .clk_flags = 0,
  92. };
  93. return conf_master;
  94. }
  95. static i2c_config_t i2c_slave_init(void)
  96. {
  97. i2c_config_t conf_slave = {
  98. .mode = I2C_MODE_SLAVE,
  99. .sda_io_num = I2C_SLAVE_SDA_IO,
  100. .scl_io_num = I2C_SLAVE_SCL_IO,
  101. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  102. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  103. .slave.addr_10bit_en = 0,
  104. .slave.slave_addr = ESP_SLAVE_ADDR,
  105. };
  106. return conf_slave;
  107. }
  108. TEST_CASE("I2C i2c_set_pin() fails if sda and scl gpios are same", "[i2c]")
  109. {
  110. TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, i2c_set_pin(0, 0, 0, true, true , I2C_MODE_SLAVE));
  111. }
  112. TEST_CASE("I2C config test", "[i2c]")
  113. {
  114. // master test
  115. i2c_config_t conf_master = i2c_master_init();
  116. gpio_pullup_t sda_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  117. gpio_pullup_t scl_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  118. for (int i = 0; i < 2; i++) {
  119. for (int j = 0; j < 2; j++) {
  120. conf_master.sda_pullup_en = sda_pull_up_en[i];
  121. conf_master.scl_pullup_en = scl_pull_up_en[j];
  122. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  123. I2C_MASTER_RX_BUF_DISABLE,
  124. I2C_MASTER_TX_BUF_DISABLE, 0));
  125. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  126. TEST_ASSERT_EQUAL_INT32(I2C[I2C_MASTER_NUM]->ctr.ms_mode, 1);
  127. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  128. }
  129. }
  130. // slave test
  131. i2c_config_t conf_slave = i2c_slave_init();
  132. for (int i = 0; i < 2; i++) {
  133. for (int j = 0; j < 2; j++) {
  134. conf_slave.sda_pullup_en = sda_pull_up_en[i];
  135. conf_slave.scl_pullup_en = scl_pull_up_en[j];
  136. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  137. I2C_SLAVE_RX_BUF_LEN,
  138. I2C_SLAVE_TX_BUF_LEN, 0));
  139. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  140. TEST_ASSERT_EQUAL_INT32(I2C[I2C_SLAVE_NUM] -> ctr.ms_mode, 0);
  141. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  142. }
  143. }
  144. }
  145. TEST_CASE("I2C set and get period test", "[i2c]")
  146. {
  147. int high_period, low_period;
  148. i2c_config_t conf_master = i2c_master_init();
  149. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  150. I2C_MASTER_RX_BUF_DISABLE,
  151. I2C_MASTER_TX_BUF_DISABLE, 0));
  152. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  153. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V, I2C_SCL_HIGH_PERIOD_V));
  154. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  155. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, high_period);
  156. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, low_period);
  157. TEST_ASSERT_NOT_NULL((void *)i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V + 1, I2C_SCL_HIGH_PERIOD_V + 1));
  158. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, 300, 400));
  159. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  160. TEST_ASSERT_EQUAL_INT(300, high_period);
  161. TEST_ASSERT_EQUAL_INT(400, low_period);
  162. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  163. }
  164. TEST_CASE("I2C config FIFO test", "[i2c]")
  165. {
  166. i2c_config_t conf_slave = i2c_slave_init();
  167. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  168. I2C_SLAVE_RX_BUF_LEN,
  169. I2C_SLAVE_TX_BUF_LEN, 0));
  170. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  171. TEST_ASSERT_BIT_LOW(1, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  172. TEST_ESP_OK(i2c_reset_tx_fifo(I2C_SLAVE_NUM));
  173. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  174. TEST_ESP_OK(i2c_reset_rx_fifo(I2C_SLAVE_NUM));
  175. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.rx_fifo_rst);
  176. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  177. }
  178. TEST_CASE("I2C timing test", "[i2c]")
  179. {
  180. int test_setup_time, test_data_time, test_stop_time, test_hold_time;
  181. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  182. i2c_config_t conf_master = i2c_master_init();
  183. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  184. I2C_MASTER_RX_BUF_DISABLE,
  185. I2C_MASTER_TX_BUF_DISABLE, 0));
  186. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  187. TEST_ESP_OK(i2c_set_start_timing(I2C_MASTER_NUM, 50, 60));
  188. TEST_ESP_OK(i2c_set_data_timing(I2C_MASTER_NUM, 80, 60));
  189. TEST_ESP_OK(i2c_set_stop_timing(I2C_MASTER_NUM, 100, 60));
  190. for (int i = 0; i < DATA_LENGTH; i++) {
  191. data_wr[i] = i;
  192. }
  193. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  194. TEST_ESP_OK(i2c_get_start_timing(I2C_MASTER_NUM, &test_setup_time, &test_hold_time));
  195. TEST_ESP_OK(i2c_get_data_timing(I2C_MASTER_NUM, &test_data_time, &test_hold_time));
  196. TEST_ESP_OK(i2c_get_stop_timing(I2C_MASTER_NUM, &test_stop_time, &test_hold_time));
  197. TEST_ASSERT_EQUAL_INT32(50, test_setup_time);
  198. TEST_ASSERT_EQUAL_INT32(80, test_data_time);
  199. TEST_ASSERT_EQUAL_INT32(100, test_stop_time);
  200. TEST_ASSERT_EQUAL_INT32(60, test_hold_time);
  201. free(data_wr);
  202. i2c_driver_delete(I2C_MASTER_NUM);
  203. }
  204. TEST_CASE("I2C data mode test", "[i2c]")
  205. {
  206. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  207. i2c_trans_mode_t test_tx_trans_mode, test_rx_trans_mode;
  208. i2c_config_t conf_master = i2c_master_init();
  209. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  210. I2C_MASTER_RX_BUF_DISABLE,
  211. I2C_MASTER_TX_BUF_DISABLE, 0));
  212. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  213. for (int i = 0; i < DATA_LENGTH; i++) {
  214. data_wr[i] = i;
  215. }
  216. TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_LSB_FIRST, I2C_DATA_MODE_LSB_FIRST));
  217. TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
  218. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_tx_trans_mode);
  219. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_rx_trans_mode);
  220. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  221. TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_MSB_FIRST, I2C_DATA_MODE_MSB_FIRST));
  222. TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
  223. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_tx_trans_mode);
  224. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_rx_trans_mode);
  225. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  226. free(data_wr);
  227. i2c_driver_delete(I2C_MASTER_NUM);
  228. }
  229. TEST_CASE("I2C driver memory leaking check", "[i2c]")
  230. {
  231. esp_err_t ret;
  232. int size = esp_get_free_heap_size();
  233. for (uint32_t i = 0; i <= 1000; i++) {
  234. ret = i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  235. I2C_SLAVE_RX_BUF_LEN,
  236. I2C_SLAVE_TX_BUF_LEN, 0);
  237. TEST_ASSERT(ret == ESP_OK);
  238. vTaskDelay(10 / portTICK_RATE_MS);
  239. i2c_driver_delete(I2C_SLAVE_NUM);
  240. TEST_ASSERT(ret == ESP_OK);
  241. }
  242. TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
  243. }
  244. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  245. // print the reading buffer
  246. static void disp_buf(uint8_t *buf, int len)
  247. {
  248. int i;
  249. for (i = 0; i < len; i++) {
  250. printf("%02x ", buf[i]);
  251. if (( i + 1 ) % 16 == 0) {
  252. printf("\n");
  253. }
  254. }
  255. printf("\n");
  256. }
  257. static void i2c_master_write_test(void)
  258. {
  259. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  260. int i;
  261. i2c_config_t conf_master = i2c_master_init();
  262. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  263. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  264. I2C_MASTER_RX_BUF_DISABLE,
  265. I2C_MASTER_TX_BUF_DISABLE, 0));
  266. unity_wait_for_signal("i2c slave init finish");
  267. unity_send_signal("master write");
  268. for (i = 0; i < DATA_LENGTH / 2; i++) {
  269. data_wr[i] = i;
  270. }
  271. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, DATA_LENGTH / 2);
  272. disp_buf(data_wr, i + 1);
  273. free(data_wr);
  274. unity_wait_for_signal("ready to delete");
  275. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  276. }
  277. static void i2c_slave_read_test(void)
  278. {
  279. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  280. int size_rd = 0;
  281. int len = 0;
  282. i2c_config_t conf_slave = i2c_slave_init();
  283. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  284. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  285. I2C_SLAVE_RX_BUF_LEN,
  286. I2C_SLAVE_TX_BUF_LEN, 0));
  287. unity_send_signal("i2c slave init finish");
  288. unity_wait_for_signal("master write");
  289. while (1) {
  290. len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, DATA_LENGTH, 10000 / portTICK_RATE_MS);
  291. if (len == 0) {
  292. break;
  293. }
  294. size_rd += len;
  295. }
  296. disp_buf(data_rd, size_rd);
  297. for (int i = 0; i < size_rd; i++) {
  298. TEST_ASSERT(data_rd[i] == i);
  299. }
  300. free(data_rd);
  301. unity_send_signal("ready to delete");
  302. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  303. }
  304. TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
  305. static void master_read_slave_test(void)
  306. {
  307. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  308. memset(data_rd, 0, DATA_LENGTH);
  309. i2c_config_t conf_master = i2c_master_init();
  310. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  311. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  312. I2C_MASTER_RX_BUF_DISABLE,
  313. I2C_MASTER_TX_BUF_DISABLE, 0));
  314. unity_wait_for_signal("i2c slave init finish");
  315. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  316. i2c_master_start(cmd);
  317. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  318. unity_send_signal("slave write");
  319. unity_wait_for_signal("master read");
  320. i2c_master_read(cmd, data_rd, RW_TEST_LENGTH-1, ACK_VAL);
  321. i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH-1, NACK_VAL);
  322. i2c_master_stop(cmd);
  323. i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
  324. i2c_cmd_link_delete(cmd);
  325. vTaskDelay(100 / portTICK_RATE_MS);
  326. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  327. printf("%d\n", data_rd[i]);
  328. TEST_ASSERT(data_rd[i]==i);
  329. }
  330. free(data_rd);
  331. unity_send_signal("ready to delete");
  332. i2c_driver_delete(I2C_MASTER_NUM);
  333. }
  334. static void slave_write_buffer_test(void)
  335. {
  336. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  337. int size_rd;
  338. i2c_config_t conf_slave = i2c_slave_init();
  339. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  340. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  341. I2C_SLAVE_RX_BUF_LEN,
  342. I2C_SLAVE_TX_BUF_LEN, 0));
  343. unity_send_signal("i2c slave init finish");
  344. unity_wait_for_signal("slave write");
  345. for (int i = 0; i < DATA_LENGTH / 2; i++) {
  346. data_wr[i] = i;
  347. }
  348. size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
  349. disp_buf(data_wr, size_rd);
  350. unity_send_signal("master read");
  351. unity_wait_for_signal("ready to delete");
  352. free(data_wr);
  353. i2c_driver_delete(I2C_SLAVE_NUM);
  354. }
  355. TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test);
  356. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32)
  357. static void i2c_master_write_read_test(void)
  358. {
  359. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  360. memset(data_rd, 0, DATA_LENGTH);
  361. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  362. i2c_config_t conf_master = i2c_master_init();
  363. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  364. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  365. I2C_MASTER_RX_BUF_DISABLE,
  366. I2C_MASTER_TX_BUF_DISABLE, 0));
  367. unity_wait_for_signal("i2c slave init finish");
  368. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  369. i2c_master_start(cmd);
  370. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  371. unity_send_signal("slave write");
  372. unity_wait_for_signal("master read and write");
  373. i2c_master_read(cmd, data_rd, RW_TEST_LENGTH, ACK_VAL);
  374. i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH, NACK_VAL);
  375. i2c_master_stop(cmd);
  376. i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
  377. i2c_cmd_link_delete(cmd);
  378. vTaskDelay(100 / portTICK_RATE_MS);
  379. disp_buf(data_rd, RW_TEST_LENGTH);
  380. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  381. TEST_ASSERT(data_rd[i] == i/2);
  382. }
  383. for (int i = 0; i < DATA_LENGTH; i++) {
  384. data_wr[i] = i % 3;
  385. }
  386. vTaskDelay(100 / portTICK_RATE_MS);
  387. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  388. free(data_wr);
  389. free(data_rd);
  390. unity_send_signal("slave read");
  391. unity_wait_for_signal("ready to delete");
  392. i2c_driver_delete(I2C_MASTER_NUM);
  393. }
  394. static void i2c_slave_read_write_test(void)
  395. {
  396. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  397. memset(data_rd, 0, DATA_LENGTH);
  398. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  399. int size_rd;
  400. i2c_config_t conf_slave = i2c_slave_init();
  401. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  402. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  403. I2C_SLAVE_RX_BUF_LEN,
  404. I2C_SLAVE_TX_BUF_LEN, 0));
  405. unity_send_signal("i2c slave init finish");
  406. unity_wait_for_signal("slave write");
  407. for (int i = 0; i < DATA_LENGTH / 2; i++) {
  408. data_wr[i] = i/2;
  409. }
  410. size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
  411. disp_buf(data_wr, size_rd);
  412. unity_send_signal("master read and write");
  413. unity_wait_for_signal("slave read");
  414. size_rd = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd, RW_TEST_LENGTH, 1000 / portTICK_RATE_MS);
  415. printf("slave read data is:\n");
  416. disp_buf(data_rd, size_rd);
  417. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  418. TEST_ASSERT(data_rd[i] == i % 3);
  419. }
  420. free(data_wr);
  421. free(data_rd);
  422. unity_send_signal("ready to delete");
  423. i2c_driver_delete(I2C_SLAVE_NUM);
  424. }
  425. TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
  426. static void i2c_master_repeat_write(void)
  427. {
  428. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  429. int times = 3;
  430. i2c_config_t conf_master = i2c_master_init();
  431. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  432. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  433. I2C_MASTER_RX_BUF_DISABLE,
  434. I2C_MASTER_TX_BUF_DISABLE, 0));
  435. unity_wait_for_signal("i2c slave init finish");
  436. for (int j = 0; j < times; j++) {
  437. for (int i = 0; i < DATA_LENGTH; i++) {
  438. data_wr[i] = j + i;
  439. }
  440. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  441. disp_buf(data_wr, RW_TEST_LENGTH);
  442. }
  443. free(data_wr);
  444. unity_send_signal("master write");
  445. unity_wait_for_signal("ready to delete");
  446. i2c_driver_delete(I2C_MASTER_NUM);
  447. }
  448. static void i2c_slave_repeat_read(void)
  449. {
  450. int size_rd = 0;
  451. int times = 3;
  452. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH * 3);
  453. i2c_config_t conf_slave = i2c_slave_init();
  454. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  455. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  456. I2C_SLAVE_RX_BUF_LEN,
  457. I2C_SLAVE_TX_BUF_LEN, 0));
  458. unity_send_signal("i2c slave init finish");
  459. unity_wait_for_signal("master write");
  460. while (1) {
  461. int len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, RW_TEST_LENGTH * 3, 10000 / portTICK_RATE_MS);
  462. if (len == 0) {
  463. break;
  464. }
  465. size_rd += len;
  466. }
  467. disp_buf(data_rd, size_rd);
  468. for (int j = 0; j < times; j++) {
  469. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  470. printf("data: %d, %d\n", data_rd[j * RW_TEST_LENGTH + i], (i % 129 + j));
  471. TEST_ASSERT(data_rd[j * RW_TEST_LENGTH + i] == (i % 129 + j));
  472. }
  473. }
  474. free(data_rd);
  475. unity_send_signal("ready to delete");
  476. i2c_driver_delete(I2C_SLAVE_NUM);
  477. }
  478. TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read);
  479. #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  480. #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  481. static volatile bool exit_flag;
  482. static bool test_read_func;
  483. static void test_task(void *pvParameters)
  484. {
  485. xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
  486. uint8_t *data = (uint8_t *) malloc(DATA_LENGTH);
  487. i2c_config_t conf_slave = i2c_slave_init();
  488. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  489. I2C_SLAVE_RX_BUF_LEN,
  490. I2C_SLAVE_TX_BUF_LEN, 0));
  491. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  492. while (exit_flag == false) {
  493. if (test_read_func) {
  494. i2c_slave_read_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  495. } else {
  496. i2c_slave_write_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  497. }
  498. vTaskDelay(10/portTICK_RATE_MS);
  499. }
  500. free(data);
  501. xSemaphoreGive(*sema);
  502. vTaskDelete(NULL);
  503. }
  504. TEST_CASE("test i2c_slave_read_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  505. {
  506. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  507. exit_flag = false;
  508. test_read_func = true;
  509. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  510. printf("Waiting for 5 sec\n");
  511. vTaskDelay(5000 / portTICK_PERIOD_MS);
  512. exit_flag = true;
  513. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  514. vSemaphoreDelete(exit_sema);
  515. } else {
  516. TEST_FAIL_MESSAGE("i2c_slave_read_buffer is blocked");
  517. }
  518. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  519. }
  520. TEST_CASE("test i2c_slave_write_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  521. {
  522. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  523. exit_flag = false;
  524. test_read_func = false;
  525. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  526. printf("Waiting for 5 sec\n");
  527. vTaskDelay(5000 / portTICK_PERIOD_MS);
  528. exit_flag = true;
  529. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  530. vSemaphoreDelete(exit_sema);
  531. } else {
  532. TEST_FAIL_MESSAGE("i2c_slave_write_buffer is blocked");
  533. }
  534. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  535. }
  536. TEST_CASE("I2C general API test", "[i2c]")
  537. {
  538. #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
  539. #define I2C_TEST_TIME 0x3ff
  540. #else
  541. #define I2C_TEST_TIME 0x1f
  542. #endif
  543. const int i2c_num = 0;
  544. i2c_config_t conf_master = {
  545. .mode = I2C_MODE_MASTER,
  546. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  547. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  548. .master.clk_speed = I2C_MASTER_FREQ_HZ,
  549. .sda_io_num = I2C_MASTER_SDA_IO,
  550. .scl_io_num = I2C_MASTER_SCL_IO,
  551. };
  552. TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
  553. int time_get0, time_get1;
  554. for(int i = 10; i < I2C_TEST_TIME; i++) {
  555. //set period test
  556. TEST_ESP_OK(i2c_set_period(i2c_num, i, i));
  557. TEST_ESP_OK(i2c_get_period(i2c_num, &time_get0, &time_get1));
  558. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  559. //set start timing test
  560. TEST_ESP_OK(i2c_set_start_timing(i2c_num, i, i));
  561. TEST_ESP_OK(i2c_get_start_timing(i2c_num, &time_get0, &time_get1));
  562. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  563. //set stop timing test
  564. TEST_ESP_OK(i2c_set_stop_timing(i2c_num, i, i));
  565. TEST_ESP_OK(i2c_get_stop_timing(i2c_num, &time_get0, &time_get1));
  566. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  567. //set data timing test
  568. TEST_ESP_OK(i2c_set_data_timing(i2c_num, i, i));
  569. TEST_ESP_OK(i2c_get_data_timing(i2c_num, &time_get0, &time_get1));
  570. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  571. //set time out test
  572. TEST_ESP_OK(i2c_set_timeout(i2c_num, i));
  573. TEST_ESP_OK(i2c_get_timeout(i2c_num, &time_get0));
  574. TEST_ASSERT(time_get0 == i);
  575. }
  576. }
  577. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
  578. //Init uart baud rate detection
  579. static void uart_aut_baud_det_init(int rxd_io_num)
  580. {
  581. gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[rxd_io_num], PIN_FUNC_GPIO);
  582. gpio_set_direction(rxd_io_num, GPIO_MODE_INPUT_OUTPUT);
  583. esp_rom_gpio_connect_out_signal(rxd_io_num, I2CEXT1_SCL_OUT_IDX, 0, 0);
  584. esp_rom_gpio_connect_in_signal(rxd_io_num, U1RXD_IN_IDX, 0);
  585. periph_module_enable(PERIPH_UART1_MODULE);
  586. /* Reset all the bits */
  587. uart_ll_disable_intr_mask(&UART1, ~0);
  588. uart_ll_clr_intsts_mask(&UART1, ~0);
  589. uart_ll_set_autobaud_en(&UART1, true);
  590. }
  591. //Calculate I2C scl freq
  592. static void i2c_scl_freq_cal(void)
  593. {
  594. const int i2c_source_clk_freq = 80000000;
  595. const float i2c_cource_clk_period = 0.0125;
  596. int edg_cnt = uart_ll_get_rxd_edge_cnt(&UART1);
  597. int pospulse_cnt = uart_ll_get_pos_pulse_cnt(&UART1);
  598. int negpulse_cnt = uart_ll_get_neg_pulse_cnt(&UART1);
  599. int high_period_cnt = uart_ll_get_high_pulse_cnt(&UART1);
  600. int low_period_cnt = uart_ll_get_low_pulse_cnt(&UART1);
  601. if(edg_cnt != 542) {
  602. printf("\nedg_cnt != 542, test fail\n");
  603. return;
  604. }
  605. printf("\nDetected SCL frequency: %d Hz\n", i2c_source_clk_freq / ((pospulse_cnt + negpulse_cnt) / 2) );
  606. printf("\nSCL high period %.3f (us), SCL low_period %.3f (us)\n\n", (float)(i2c_cource_clk_period * high_period_cnt), (float)(i2c_cource_clk_period * low_period_cnt));
  607. uart_ll_set_autobaud_en(&UART1, false);
  608. periph_module_disable(PERIPH_UART1_MODULE);
  609. }
  610. TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]")
  611. {
  612. //Use the UART baud rate detection function to detect the I2C SCL frequency.
  613. const int i2c_num = 1;
  614. const int uart1_rxd_io = 5;
  615. i2c_config_t conf_master = {
  616. .mode = I2C_MODE_MASTER,
  617. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  618. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  619. .master.clk_speed = 400000,
  620. .sda_io_num = I2C_MASTER_SDA_IO,
  621. .scl_io_num = I2C_MASTER_SCL_IO,
  622. };
  623. uint8_t *data = (uint8_t *)malloc(30);
  624. TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
  625. TEST_ESP_OK(i2c_driver_install(i2c_num, I2C_MODE_MASTER, 0, 0, 0));
  626. memset(data, 0, 0);
  627. uart_aut_baud_det_init(uart1_rxd_io);
  628. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  629. i2c_master_start(cmd);
  630. i2c_master_write(cmd, data, 30, ACK_CHECK_DIS);
  631. i2c_master_stop(cmd);
  632. i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
  633. i2c_cmd_link_delete(cmd);
  634. i2c_scl_freq_cal();
  635. free(data);
  636. TEST_ESP_OK(i2c_driver_delete(i2c_num));
  637. }
  638. #endif // TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)