test_uart.c 13 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <string.h>
  7. #include <sys/param.h>
  8. #include "unity.h"
  9. #include "test_utils.h" // unity_send_signal
  10. #include "driver/uart.h" // for the uart driver access
  11. #include "esp_log.h"
  12. #include "esp_system.h" // for uint32_t esp_random()
  13. #include "esp_rom_gpio.h"
  14. #include "soc/uart_periph.h"
  15. #define UART_TAG "Uart"
  16. #define UART_NUM1 (UART_NUM_1)
  17. #define BUF_SIZE (100)
  18. #define UART1_RX_PIN (22)
  19. #define UART1_TX_PIN (23)
  20. #define UART_BAUD_11520 (11520)
  21. #define UART_BAUD_115200 (115200)
  22. #define TOLERANCE (0.02) //baud rate error tolerance 2%.
  23. #define UART1_CTS_PIN (13)
  24. // RTS for RS485 Half-Duplex Mode manages DE/~RE
  25. #define UART1_RTS_PIN (18)
  26. // Number of packets to be send during test
  27. #define PACKETS_NUMBER (10)
  28. // Wait timeout for uart driver
  29. #define PACKET_READ_TICS (1000 / portTICK_RATE_MS)
  30. #define TEST_DEFAULT_CLK UART_SCLK_APB
  31. static void uart_config(uint32_t baud_rate, uart_sclk_t source_clk)
  32. {
  33. uart_config_t uart_config = {
  34. .baud_rate = baud_rate,
  35. .source_clk = source_clk,
  36. .data_bits = UART_DATA_8_BITS,
  37. .parity = UART_PARITY_DISABLE,
  38. .stop_bits = UART_STOP_BITS_1,
  39. .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
  40. };
  41. uart_driver_install(UART_NUM1, BUF_SIZE * 2, BUF_SIZE * 2, 20, NULL, 0);
  42. uart_param_config(UART_NUM1, &uart_config);
  43. TEST_ESP_OK(uart_set_loop_back(UART_NUM1, true));
  44. }
  45. static volatile bool exit_flag;
  46. static void test_task(void *pvParameters)
  47. {
  48. xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
  49. char* data = (char *) malloc(256);
  50. while (exit_flag == false) {
  51. uart_tx_chars(UART_NUM1, data, 256);
  52. // The uart_wait_tx_done() function does not block anything if ticks_to_wait = 0.
  53. uart_wait_tx_done(UART_NUM1, 0);
  54. }
  55. free(data);
  56. xSemaphoreGive(*sema);
  57. vTaskDelete(NULL);
  58. }
  59. static void test_task2(void *pvParameters)
  60. {
  61. while (exit_flag == false) {
  62. // This task obstruct a setting tx_done_sem semaphore in the UART interrupt.
  63. // It leads to waiting the ticks_to_wait time in uart_wait_tx_done() function.
  64. uart_disable_tx_intr(UART_NUM1);
  65. }
  66. vTaskDelete(NULL);
  67. }
  68. TEST_CASE("test uart_wait_tx_done is not blocked when ticks_to_wait=0", "[uart]")
  69. {
  70. uart_config(UART_BAUD_11520, TEST_DEFAULT_CLK);
  71. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  72. exit_flag = false;
  73. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  74. xTaskCreate(test_task2, "tsk2", 2048, NULL, 5, NULL);
  75. printf("Waiting for 5 sec\n");
  76. vTaskDelay(5000 / portTICK_PERIOD_MS);
  77. exit_flag = true;
  78. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  79. vSemaphoreDelete(exit_sema);
  80. } else {
  81. TEST_FAIL_MESSAGE("uart_wait_tx_done is blocked");
  82. }
  83. TEST_ESP_OK(uart_driver_delete(UART_NUM1));
  84. }
  85. TEST_CASE("test uart get baud-rate", "[uart]")
  86. {
  87. #if SOC_UART_SUPPORT_REF_TICK
  88. uint32_t baud_rate1 = 0;
  89. printf("init uart%d, use reftick, baud rate : %d\n", (int)UART_NUM1, (int)UART_BAUD_11520);
  90. uart_config(UART_BAUD_11520, UART_SCLK_REF_TICK);
  91. uart_get_baudrate(UART_NUM1, &baud_rate1);
  92. printf("get baud rate when use reftick: %d\n", (int)baud_rate1);
  93. TEST_ASSERT_UINT32_WITHIN(UART_BAUD_11520 * TOLERANCE, UART_BAUD_11520, baud_rate1);
  94. #endif
  95. uint32_t baud_rate2 = 0;
  96. printf("init uart%d, unuse reftick, baud rate : %d\n", (int)UART_NUM1, (int)UART_BAUD_115200);
  97. uart_config(UART_BAUD_115200, TEST_DEFAULT_CLK);
  98. uart_get_baudrate(UART_NUM1, &baud_rate2);
  99. printf("get baud rate when don't use reftick: %d\n", (int)baud_rate2);
  100. TEST_ASSERT_UINT32_WITHIN(UART_BAUD_115200 * TOLERANCE, UART_BAUD_115200, baud_rate2);
  101. uart_driver_delete(UART_NUM1);
  102. ESP_LOGI(UART_TAG, "get baud-rate test passed ....\n");
  103. }
  104. TEST_CASE("test uart tx data with break", "[uart]")
  105. {
  106. const int buf_len = 200;
  107. const int send_len = 128;
  108. const int brk_len = 10;
  109. char *psend = (char *)malloc(buf_len);
  110. TEST_ASSERT_NOT_NULL(psend);
  111. memset(psend, '0', buf_len);
  112. uart_config(UART_BAUD_115200, TEST_DEFAULT_CLK);
  113. printf("Uart%d send %d bytes with break\n", UART_NUM1, send_len);
  114. uart_write_bytes_with_break(UART_NUM1, (const char *)psend, send_len, brk_len);
  115. uart_wait_tx_done(UART_NUM1, (portTickType)portMAX_DELAY);
  116. //If the code is running here, it means the test passed, otherwise it will crash due to the interrupt wdt timeout.
  117. printf("Send data with break test passed\n");
  118. free(psend);
  119. uart_driver_delete(UART_NUM1);
  120. }
  121. static void uart_word_len_set_get_test(int uart_num)
  122. {
  123. printf("uart word len set and get test\n");
  124. uart_word_length_t word_length_set = 0;
  125. uart_word_length_t word_length_get = 0;
  126. for (int i = 0; i < UART_DATA_BITS_MAX; i++) {
  127. word_length_set = UART_DATA_5_BITS + i;
  128. TEST_ESP_OK(uart_set_word_length(uart_num, word_length_set));
  129. TEST_ESP_OK(uart_get_word_length(uart_num, &word_length_get));
  130. TEST_ASSERT_EQUAL(word_length_set, word_length_get);
  131. }
  132. }
  133. static void uart_stop_bit_set_get_test(int uart_num)
  134. {
  135. printf("uart stop bit set and get test\n");
  136. uart_stop_bits_t stop_bit_set = 0;
  137. uart_stop_bits_t stop_bit_get = 0;
  138. for (int i = UART_STOP_BITS_1; i < UART_STOP_BITS_MAX; i++) {
  139. stop_bit_set = i;
  140. TEST_ESP_OK(uart_set_stop_bits(uart_num, stop_bit_set));
  141. TEST_ESP_OK(uart_get_stop_bits(uart_num, &stop_bit_get));
  142. TEST_ASSERT_EQUAL(stop_bit_set, stop_bit_get);
  143. }
  144. }
  145. static void uart_parity_set_get_test(int uart_num)
  146. {
  147. printf("uart parity set and get test\n");
  148. uart_parity_t parity_set[3] = {
  149. UART_PARITY_DISABLE,
  150. UART_PARITY_EVEN,
  151. UART_PARITY_ODD,
  152. };
  153. uart_parity_t parity_get = 0;
  154. for (int i = 0; i < 3; i++) {
  155. TEST_ESP_OK(uart_set_parity(uart_num, parity_set[i]));
  156. TEST_ESP_OK(uart_get_parity(uart_num, &parity_get));
  157. TEST_ASSERT_EQUAL(parity_set[i], parity_get);
  158. }
  159. }
  160. static void uart_hw_flow_set_get_test(int uart_num)
  161. {
  162. printf("uart hw flow control set and get test\n");
  163. uart_hw_flowcontrol_t flowcontrol_set = 0;
  164. uart_hw_flowcontrol_t flowcontrol_get = 0;
  165. for (int i = 0; i < UART_HW_FLOWCTRL_DISABLE; i++) {
  166. TEST_ESP_OK(uart_set_hw_flow_ctrl(uart_num, flowcontrol_set, 20));
  167. TEST_ESP_OK(uart_get_hw_flow_ctrl(uart_num, &flowcontrol_get));
  168. TEST_ASSERT_EQUAL(flowcontrol_set, flowcontrol_get);
  169. }
  170. }
  171. static void uart_wakeup_set_get_test(int uart_num)
  172. {
  173. printf("uart wake up set and get test\n");
  174. int wake_up_set = 0;
  175. int wake_up_get = 0;
  176. for (int i = 3; i < 0x3ff; i++) {
  177. wake_up_set = i;
  178. TEST_ESP_OK(uart_set_wakeup_threshold(uart_num, wake_up_set));
  179. TEST_ESP_OK(uart_get_wakeup_threshold(uart_num, &wake_up_get));
  180. TEST_ASSERT_EQUAL(wake_up_set, wake_up_get);
  181. }
  182. }
  183. TEST_CASE("uart general API test", "[uart]")
  184. {
  185. const int uart_num = UART_NUM1;
  186. uart_config_t uart_config = {
  187. .baud_rate = 115200,
  188. .data_bits = UART_DATA_8_BITS,
  189. .parity = UART_PARITY_DISABLE,
  190. .stop_bits = UART_STOP_BITS_1,
  191. .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
  192. .source_clk = TEST_DEFAULT_CLK,
  193. };
  194. uart_param_config(uart_num, &uart_config);
  195. uart_word_len_set_get_test(uart_num);
  196. uart_stop_bit_set_get_test(uart_num);
  197. uart_parity_set_get_test(uart_num);
  198. uart_hw_flow_set_get_test(uart_num);
  199. uart_wakeup_set_get_test(uart_num);
  200. }
  201. static void uart_write_task(void *param)
  202. {
  203. int uart_num = (int)param;
  204. uint8_t *tx_buf = (uint8_t *)malloc(1024);
  205. if(tx_buf == NULL) {
  206. TEST_FAIL_MESSAGE("tx buffer malloc fail");
  207. }
  208. for(int i = 1; i < 1023; i++) {
  209. tx_buf[i] = (i & 0xff);
  210. }
  211. for(int i = 0; i < 1024; i++) {
  212. //d[0] and d[1023] are header
  213. tx_buf[0] = (i & 0xff);
  214. tx_buf[1023] = ((~i) & 0xff);
  215. uart_write_bytes(uart_num, (const char*)tx_buf, 1024);
  216. uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
  217. }
  218. free(tx_buf);
  219. vTaskDelete(NULL);
  220. }
  221. /**
  222. * The following tests use loop back
  223. *
  224. * NOTE: In the following tests, because the internal loopback is enabled, the CTS signal is connected to
  225. * the RTS signal internally. However, On ESP32S3, they are not, and the CTS keeps the default level (which
  226. * is a high level). So the workaround is to map the CTS in_signal to a GPIO pin (here IO13 is used) and connect
  227. * the RTS output_signal to this IO.
  228. */
  229. TEST_CASE("uart read write test", "[uart]")
  230. {
  231. const int uart_num = UART_NUM1;
  232. uint8_t *rd_data = (uint8_t *)malloc(1024);
  233. if(rd_data == NULL) {
  234. TEST_FAIL_MESSAGE("rx buffer malloc fail");
  235. }
  236. uart_config_t uart_config = {
  237. .baud_rate = 2000000,
  238. .data_bits = UART_DATA_8_BITS,
  239. .parity = UART_PARITY_DISABLE,
  240. .stop_bits = UART_STOP_BITS_1,
  241. .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
  242. .source_clk = TEST_DEFAULT_CLK,
  243. .rx_flow_ctrl_thresh = 120
  244. };
  245. TEST_ESP_OK(uart_driver_install(uart_num, BUF_SIZE * 2, 0, 20, NULL, 0));
  246. TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
  247. TEST_ESP_OK(uart_set_loop_back(uart_num, true));
  248. TEST_ESP_OK(uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART1_CTS_PIN));
  249. //Connect the RTS out_signal to the CTS pin (which is mapped to CTS in_signal)
  250. esp_rom_gpio_connect_out_signal(UART1_CTS_PIN, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RTS_PIN_IDX), 0, 0);
  251. TEST_ESP_OK(uart_wait_tx_done(uart_num, portMAX_DELAY));
  252. vTaskDelay(1 / portTICK_PERIOD_MS); // make sure last byte has flushed from TX FIFO
  253. TEST_ESP_OK(uart_flush_input(uart_num));
  254. xTaskCreate(uart_write_task, "uart_write_task", 2048 * 4, (void *)uart_num, UNITY_FREERTOS_PRIORITY - 1, NULL);
  255. for (int i = 0; i < 1024; i++) {
  256. int bytes_remaining = 1024;
  257. memset(rd_data, 0, 1024);
  258. while (bytes_remaining) {
  259. int bytes_received = uart_read_bytes(uart_num, rd_data + 1024 - bytes_remaining, bytes_remaining, (TickType_t)1000);
  260. if (bytes_received < 0) {
  261. TEST_FAIL_MESSAGE("read timeout, uart read write test fail");
  262. }
  263. bytes_remaining -= bytes_received;
  264. }
  265. int check_fail_cnt = 0;
  266. if (rd_data[0] != (i & 0xff)) {
  267. printf("packet %d index check error at offset 0, expected 0x%02x\n", i, i);
  268. ++check_fail_cnt;
  269. }
  270. if (rd_data[1023] != ((~i) & 0xff)) {
  271. printf("packet %d index check error at offset 1023, expected 0x%02x\n", i, ((~i) & 0xff));
  272. ++check_fail_cnt;
  273. }
  274. for (int j = 1; j < 1023; j++) {
  275. if (rd_data[j] != (j & 0xff)) {
  276. printf("data mismatch in packet %d offset %d, expected 0x%02x got 0x%02x\n", i, j, (j & 0xff), rd_data[j]);
  277. ++check_fail_cnt;
  278. }
  279. if (check_fail_cnt > 10) {
  280. printf("(further checks skipped)\n");
  281. break;
  282. }
  283. }
  284. if (check_fail_cnt > 0) {
  285. ESP_LOG_BUFFER_HEX("rd_data", rd_data, 1024);
  286. TEST_FAIL();
  287. }
  288. }
  289. uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
  290. uart_driver_delete(uart_num);
  291. free(rd_data);
  292. }
  293. TEST_CASE("uart tx with ringbuffer test", "[uart]")
  294. {
  295. const int uart_num = UART_NUM1;
  296. uint8_t *rd_data = (uint8_t *)malloc(1024);
  297. uint8_t *wr_data = (uint8_t *)malloc(1024);
  298. if(rd_data == NULL || wr_data == NULL) {
  299. TEST_FAIL_MESSAGE("buffer malloc fail");
  300. }
  301. uart_config_t uart_config = {
  302. .baud_rate = 2000000,
  303. .data_bits = UART_DATA_8_BITS,
  304. .parity = UART_PARITY_DISABLE,
  305. .stop_bits = UART_STOP_BITS_1,
  306. .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
  307. .rx_flow_ctrl_thresh = 120,
  308. .source_clk = TEST_DEFAULT_CLK,
  309. };
  310. uart_wait_tx_idle_polling(uart_num);
  311. TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
  312. TEST_ESP_OK(uart_driver_install(uart_num, 1024 * 2, 1024 *2, 20, NULL, 0));
  313. TEST_ESP_OK(uart_set_loop_back(uart_num, true));
  314. TEST_ESP_OK(uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART1_CTS_PIN));
  315. //Connect the RTS out_signal to the CTS pin (which is mapped to CTS in_signal)
  316. esp_rom_gpio_connect_out_signal(UART1_CTS_PIN, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RTS_PIN_IDX), 0, 0);
  317. for (int i = 0; i < 1024; i++) {
  318. wr_data[i] = i;
  319. rd_data[i] = 0;
  320. }
  321. uart_write_bytes(uart_num, (const char*)wr_data, 1024);
  322. uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
  323. uart_read_bytes(uart_num, rd_data, 1024, (TickType_t)1000);
  324. TEST_ASSERT_EQUAL_HEX8_ARRAY(wr_data, rd_data, 1024);
  325. TEST_ESP_OK(uart_driver_delete(uart_num));
  326. free(rd_data);
  327. free(wr_data);
  328. }