esp_efuse_table.c 29 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "sdkconfig.h"
  7. #include "esp_efuse.h"
  8. #include <assert.h>
  9. #include "esp_efuse_table.h"
  10. // md5_digest_table 614c862c2cfa8ccda3a79183ce767255
  11. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
  12. // If you want to change some fields, you need to change esp_efuse_table.csv file
  13. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
  14. // To show efuse_table run the command 'show_efuse_table'.
  15. static const esp_efuse_desc_t WR_DIS[] = {
  16. {EFUSE_BLK0, 0, 32}, // Write protection,
  17. };
  18. static const esp_efuse_desc_t WR_DIS_RD_DIS[] = {
  19. {EFUSE_BLK0, 0, 1}, // Write protection for RD_DIS.KEY0 RD_DIS.KEY1 RD_DIS.KEY2 RD_DIS.KEY3 RD_DIS.KEY4 RD_DIS.KEY5 RD_DIS.SYS_DATA_PART2,
  20. };
  21. static const esp_efuse_desc_t WR_DIS_DIS_RTC_RAM_BOOT[] = {
  22. {EFUSE_BLK0, 1, 1}, // Write protection for DIS_RTC_RAM_BOOT,
  23. };
  24. static const esp_efuse_desc_t WR_DIS_GROUP_1[] = {
  25. {EFUSE_BLK0, 2, 1}, // Write protection for DIS_ICACHE DIS_DCACHE DIS_DOWNLOAD_ICACHE DIS_DOWNLOAD_DCACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN DIS_BOOT_REMAP SOFT_DIS_JTAG HARD_DIS.JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT,
  26. };
  27. static const esp_efuse_desc_t WR_DIS_GROUP_2[] = {
  28. {EFUSE_BLK0, 3, 1}, // Write protection for VDD_SPI_XPD VDD_SPI_TIEH VDD_SPI_FORCE VDD_SPI_INIT VDD_SPI_DCAP WDT_DELAY_SEL,
  29. };
  30. static const esp_efuse_desc_t WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  31. {EFUSE_BLK0, 4, 1}, // Write protection for SPI_BOOT_CRYPT_CNT,
  32. };
  33. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  34. {EFUSE_BLK0, 5, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE0,
  35. };
  36. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  37. {EFUSE_BLK0, 6, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE1,
  38. };
  39. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  40. {EFUSE_BLK0, 7, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE2,
  41. };
  42. static const esp_efuse_desc_t WR_DIS_KEY0_PURPOSE[] = {
  43. {EFUSE_BLK0, 8, 1}, // Write protection for key_purpose. KEY0,
  44. };
  45. static const esp_efuse_desc_t WR_DIS_KEY1_PURPOSE[] = {
  46. {EFUSE_BLK0, 9, 1}, // Write protection for key_purpose. KEY1,
  47. };
  48. static const esp_efuse_desc_t WR_DIS_KEY2_PURPOSE[] = {
  49. {EFUSE_BLK0, 10, 1}, // Write protection for key_purpose. KEY2,
  50. };
  51. static const esp_efuse_desc_t WR_DIS_KEY3_PURPOSE[] = {
  52. {EFUSE_BLK0, 11, 1}, // Write protection for key_purpose. KEY3,
  53. };
  54. static const esp_efuse_desc_t WR_DIS_KEY4_PURPOSE[] = {
  55. {EFUSE_BLK0, 12, 1}, // Write protection for key_purpose. KEY4,
  56. };
  57. static const esp_efuse_desc_t WR_DIS_KEY5_PURPOSE[] = {
  58. {EFUSE_BLK0, 13, 1}, // Write protection for key_purpose. KEY5,
  59. };
  60. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_EN[] = {
  61. {EFUSE_BLK0, 15, 1}, // Write protection for SECURE_BOOT_EN,
  62. };
  63. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  64. {EFUSE_BLK0, 16, 1}, // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE,
  65. };
  66. static const esp_efuse_desc_t WR_DIS_GROUP_3[] = {
  67. {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION,
  68. };
  69. static const esp_efuse_desc_t WR_DIS_BLK1[] = {
  70. {EFUSE_BLK0, 20, 1}, // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS,
  71. };
  72. static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = {
  73. {EFUSE_BLK0, 21, 1}, // Write protection for EFUSE_BLK2. SYS_DATA_PART1,
  74. };
  75. static const esp_efuse_desc_t WR_DIS_USER_DATA[] = {
  76. {EFUSE_BLK0, 22, 1}, // Write protection for EFUSE_BLK3. USER_DATA,
  77. };
  78. static const esp_efuse_desc_t WR_DIS_KEY0[] = {
  79. {EFUSE_BLK0, 23, 1}, // Write protection for EFUSE_BLK4. KEY0,
  80. };
  81. static const esp_efuse_desc_t WR_DIS_KEY1[] = {
  82. {EFUSE_BLK0, 24, 1}, // Write protection for EFUSE_BLK5. KEY1,
  83. };
  84. static const esp_efuse_desc_t WR_DIS_KEY2[] = {
  85. {EFUSE_BLK0, 25, 1}, // Write protection for EFUSE_BLK6. KEY2,
  86. };
  87. static const esp_efuse_desc_t WR_DIS_KEY3[] = {
  88. {EFUSE_BLK0, 26, 1}, // Write protection for EFUSE_BLK7. KEY3,
  89. };
  90. static const esp_efuse_desc_t WR_DIS_KEY4[] = {
  91. {EFUSE_BLK0, 27, 1}, // Write protection for EFUSE_BLK8. KEY4,
  92. };
  93. static const esp_efuse_desc_t WR_DIS_KEY5[] = {
  94. {EFUSE_BLK0, 28, 1}, // Write protection for EFUSE_BLK9. KEY5,
  95. };
  96. static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART2[] = {
  97. {EFUSE_BLK0, 29, 1}, // Write protection for EFUSE_BLK10. SYS_DATA_PART2,
  98. };
  99. static const esp_efuse_desc_t WR_DIS_USB_EXCHG_PINS[] = {
  100. {EFUSE_BLK0, 30, 1}, // Write protection for USB_EXCHG_PINS,
  101. };
  102. static const esp_efuse_desc_t RD_DIS[] = {
  103. {EFUSE_BLK0, 32, 7}, // Read protection,
  104. };
  105. static const esp_efuse_desc_t RD_DIS_KEY0[] = {
  106. {EFUSE_BLK0, 32, 1}, // Read protection for EFUSE_BLK4. KEY0,
  107. };
  108. static const esp_efuse_desc_t RD_DIS_KEY1[] = {
  109. {EFUSE_BLK0, 33, 1}, // Read protection for EFUSE_BLK5. KEY1,
  110. };
  111. static const esp_efuse_desc_t RD_DIS_KEY2[] = {
  112. {EFUSE_BLK0, 34, 1}, // Read protection for EFUSE_BLK6. KEY2,
  113. };
  114. static const esp_efuse_desc_t RD_DIS_KEY3[] = {
  115. {EFUSE_BLK0, 35, 1}, // Read protection for EFUSE_BLK7. KEY3,
  116. };
  117. static const esp_efuse_desc_t RD_DIS_KEY4[] = {
  118. {EFUSE_BLK0, 36, 1}, // Read protection for EFUSE_BLK8. KEY4,
  119. };
  120. static const esp_efuse_desc_t RD_DIS_KEY5[] = {
  121. {EFUSE_BLK0, 37, 1}, // Read protection for EFUSE_BLK9. KEY5,
  122. };
  123. static const esp_efuse_desc_t RD_DIS_SYS_DATA_PART2[] = {
  124. {EFUSE_BLK0, 38, 1}, // Read protection for EFUSE_BLK10. SYS_DATA_PART2,
  125. };
  126. static const esp_efuse_desc_t DIS_RTC_RAM_BOOT[] = {
  127. {EFUSE_BLK0, 39, 1}, // Disable boot from RTC RAM,
  128. };
  129. static const esp_efuse_desc_t DIS_ICACHE[] = {
  130. {EFUSE_BLK0, 40, 1}, // Disable Icache,
  131. };
  132. static const esp_efuse_desc_t DIS_DCACHE[] = {
  133. {EFUSE_BLK0, 41, 1}, // Disable Dcace,
  134. };
  135. static const esp_efuse_desc_t DIS_DOWNLOAD_ICACHE[] = {
  136. {EFUSE_BLK0, 42, 1}, // Disable Icache in download mode include boot_mode 0 1 2 3 6 7,
  137. };
  138. static const esp_efuse_desc_t DIS_DOWNLOAD_DCACHE[] = {
  139. {EFUSE_BLK0, 43, 1}, // Disable Dcache in download mode include boot_mode 0 1 2 3 6 7,
  140. };
  141. static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
  142. {EFUSE_BLK0, 44, 1}, // Disable force chip go to download mode function,
  143. };
  144. static const esp_efuse_desc_t DIS_USB[] = {
  145. {EFUSE_BLK0, 45, 1}, // Disable USB function,
  146. };
  147. static const esp_efuse_desc_t DIS_CAN[] = {
  148. {EFUSE_BLK0, 46, 1}, // Disable CAN function,
  149. };
  150. static const esp_efuse_desc_t DIS_BOOT_REMAP[] = {
  151. {EFUSE_BLK0, 47, 1}, // Disable boot from RAM. REMAP means RAM space can be mapped to ROM space. this signal will disable this function,
  152. };
  153. static const esp_efuse_desc_t SOFT_DIS_JTAG[] = {
  154. {EFUSE_BLK0, 49, 1}, // Software disable jtag jtag can be activated again by hmac module,
  155. };
  156. static const esp_efuse_desc_t HARD_DIS_JTAG[] = {
  157. {EFUSE_BLK0, 50, 1}, // Hardware disable jtag permanently disable jtag function,
  158. };
  159. static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  160. {EFUSE_BLK0, 51, 1}, // Disable flash encrypt function,
  161. };
  162. static const esp_efuse_desc_t USB_EXCHG_PINS[] = {
  163. {EFUSE_BLK0, 56, 1}, // Exchange D+ D- pins,
  164. };
  165. static const esp_efuse_desc_t USB_EXT_PHY_ENABLE[] = {
  166. {EFUSE_BLK0, 57, 1}, // Enable external PHY,
  167. };
  168. static const esp_efuse_desc_t BLOCK0_VERSION[] = {
  169. {EFUSE_BLK0, 59, 2}, // BLOCK0 efuse version,
  170. };
  171. static const esp_efuse_desc_t VDD_SPI_XPD[] = {
  172. {EFUSE_BLK0, 68, 1}, // VDD_SPI regulator power up,
  173. };
  174. static const esp_efuse_desc_t VDD_SPI_TIEH[] = {
  175. {EFUSE_BLK0, 69, 1}, // VDD_SPI regulator tie high to vdda,
  176. };
  177. static const esp_efuse_desc_t VDD_SPI_FORCE[] = {
  178. {EFUSE_BLK0, 70, 1}, // Force using eFuse configuration of VDD_SPI,
  179. };
  180. static const esp_efuse_desc_t WDT_DELAY_SEL[] = {
  181. {EFUSE_BLK0, 80, 2}, // Select RTC WDT time out threshold,
  182. };
  183. static const esp_efuse_desc_t SPI_BOOT_CRYPT_CNT[] = {
  184. {EFUSE_BLK0, 82, 3}, // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable,
  185. };
  186. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE0[] = {
  187. {EFUSE_BLK0, 85, 1}, // Enable revoke first secure boot key,
  188. };
  189. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE1[] = {
  190. {EFUSE_BLK0, 86, 1}, // Enable revoke second secure boot key,
  191. };
  192. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE2[] = {
  193. {EFUSE_BLK0, 87, 1}, // Enable revoke third secure boot key,
  194. };
  195. static const esp_efuse_desc_t KEY_PURPOSE_0[] = {
  196. {EFUSE_BLK0, 88, 4}, // Key0 purpose,
  197. };
  198. static const esp_efuse_desc_t KEY_PURPOSE_1[] = {
  199. {EFUSE_BLK0, 92, 4}, // Key1 purpose,
  200. };
  201. static const esp_efuse_desc_t KEY_PURPOSE_2[] = {
  202. {EFUSE_BLK0, 96, 4}, // Key2 purpose,
  203. };
  204. static const esp_efuse_desc_t KEY_PURPOSE_3[] = {
  205. {EFUSE_BLK0, 100, 4}, // Key3 purpose,
  206. };
  207. static const esp_efuse_desc_t KEY_PURPOSE_4[] = {
  208. {EFUSE_BLK0, 104, 4}, // Key4 purpose,
  209. };
  210. static const esp_efuse_desc_t KEY_PURPOSE_5[] = {
  211. {EFUSE_BLK0, 108, 4}, // Key5 purpose,
  212. };
  213. static const esp_efuse_desc_t SECURE_BOOT_EN[] = {
  214. {EFUSE_BLK0, 116, 1}, // Secure boot enable,
  215. };
  216. static const esp_efuse_desc_t SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  217. {EFUSE_BLK0, 117, 1}, // Enable aggressive secure boot revoke,
  218. };
  219. static const esp_efuse_desc_t FLASH_TPUW[] = {
  220. {EFUSE_BLK0, 124, 4}, // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms,
  221. };
  222. static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = {
  223. {EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7,
  224. };
  225. static const esp_efuse_desc_t DIS_LEGACY_SPI_BOOT[] = {
  226. {EFUSE_BLK0, 129, 1}, // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4,
  227. };
  228. static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = {
  229. {EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1,
  230. };
  231. static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = {
  232. {EFUSE_BLK0, 132, 1}, // Disable download through USB,
  233. };
  234. static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
  235. {EFUSE_BLK0, 133, 1}, // Enable security download mode,
  236. };
  237. static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
  238. {EFUSE_BLK0, 134, 2}, // b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print.,
  239. };
  240. static const esp_efuse_desc_t PIN_POWER_SELECTION[] = {
  241. {EFUSE_BLK0, 136, 1}, // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.,
  242. };
  243. static const esp_efuse_desc_t FLASH_TYPE[] = {
  244. {EFUSE_BLK0, 137, 1}, // Connected Flash interface type. 0: 4 data line. 1: 8 data line,
  245. };
  246. static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
  247. {EFUSE_BLK0, 138, 1}, // Force ROM code to send a resume command during SPI boot,
  248. };
  249. static const esp_efuse_desc_t SECURE_VERSION[] = {
  250. {EFUSE_BLK0, 139, 16}, // Secure version for anti-rollback,
  251. };
  252. static const esp_efuse_desc_t MAC_FACTORY[] = {
  253. {EFUSE_BLK1, 40, 8}, // Factory MAC addr [0],
  254. {EFUSE_BLK1, 32, 8}, // Factory MAC addr [1],
  255. {EFUSE_BLK1, 24, 8}, // Factory MAC addr [2],
  256. {EFUSE_BLK1, 16, 8}, // Factory MAC addr [3],
  257. {EFUSE_BLK1, 8, 8}, // Factory MAC addr [4],
  258. {EFUSE_BLK1, 0, 8}, // Factory MAC addr [5],
  259. };
  260. static const esp_efuse_desc_t SPI_PAD_CONFIG_CLK[] = {
  261. {EFUSE_BLK1, 48, 6}, // SPI_PAD_configure CLK,
  262. };
  263. static const esp_efuse_desc_t SPI_PAD_CONFIG_Q_D1[] = {
  264. {EFUSE_BLK1, 54, 6}, // SPI_PAD_configure Q(D1),
  265. };
  266. static const esp_efuse_desc_t SPI_PAD_CONFIG_D_D0[] = {
  267. {EFUSE_BLK1, 60, 6}, // SPI_PAD_configure D(D0),
  268. };
  269. static const esp_efuse_desc_t SPI_PAD_CONFIG_CS[] = {
  270. {EFUSE_BLK1, 66, 6}, // SPI_PAD_configure CS,
  271. };
  272. static const esp_efuse_desc_t SPI_PAD_CONFIG_HD_D3[] = {
  273. {EFUSE_BLK1, 72, 6}, // SPI_PAD_configure HD(D3),
  274. };
  275. static const esp_efuse_desc_t SPI_PAD_CONFIG_WP_D2[] = {
  276. {EFUSE_BLK1, 78, 6}, // SPI_PAD_configure WP(D2),
  277. };
  278. static const esp_efuse_desc_t SPI_PAD_CONFIG_DQS[] = {
  279. {EFUSE_BLK1, 84, 6}, // SPI_PAD_configure DQS,
  280. };
  281. static const esp_efuse_desc_t SPI_PAD_CONFIG_D4[] = {
  282. {EFUSE_BLK1, 90, 6}, // SPI_PAD_configure D4,
  283. };
  284. static const esp_efuse_desc_t SPI_PAD_CONFIG_D5[] = {
  285. {EFUSE_BLK1, 96, 6}, // SPI_PAD_configure D5,
  286. };
  287. static const esp_efuse_desc_t SPI_PAD_CONFIG_D6[] = {
  288. {EFUSE_BLK1, 102, 6}, // SPI_PAD_configure D6,
  289. };
  290. static const esp_efuse_desc_t SPI_PAD_CONFIG_D7[] = {
  291. {EFUSE_BLK1, 108, 6}, // SPI_PAD_configure D7,
  292. };
  293. static const esp_efuse_desc_t WAFER_VERSION[] = {
  294. {EFUSE_BLK1, 114, 3}, // WAFER version 0:A,
  295. };
  296. static const esp_efuse_desc_t FLASH_VERSION[] = {
  297. {EFUSE_BLK1, 117, 4}, // Flash_version,
  298. };
  299. static const esp_efuse_desc_t BLOCK1_VERSION[] = {
  300. {EFUSE_BLK1, 121, 3}, // BLOCK1 efuse version,
  301. };
  302. static const esp_efuse_desc_t PSRAM_VERSION[] = {
  303. {EFUSE_BLK1, 124, 4}, // PSRAM version,
  304. };
  305. static const esp_efuse_desc_t PKG_VERSION[] = {
  306. {EFUSE_BLK1, 128, 4}, // Package version,
  307. };
  308. static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
  309. {EFUSE_BLK2, 0, 128}, // Optional unique 128-bit ID,
  310. };
  311. static const esp_efuse_desc_t BLOCK2_VERSION[] = {
  312. {EFUSE_BLK2, 132, 3}, // Version of BLOCK2: 0-No ADC calib; 1-ADC calib V1; 2-ADC calib V2,
  313. };
  314. static const esp_efuse_desc_t USER_DATA[] = {
  315. {EFUSE_BLK3, 0, 256}, // User data,
  316. };
  317. static const esp_efuse_desc_t USER_DATA_MAC_CUSTOM[] = {
  318. {EFUSE_BLK3, 200, 48}, // Custom MAC,
  319. };
  320. static const esp_efuse_desc_t KEY0[] = {
  321. {EFUSE_BLK4, 0, 256}, // Key0 or user data,
  322. };
  323. static const esp_efuse_desc_t KEY1[] = {
  324. {EFUSE_BLK5, 0, 256}, // Key1 or user data,
  325. };
  326. static const esp_efuse_desc_t KEY2[] = {
  327. {EFUSE_BLK6, 0, 256}, // Key2 or user data,
  328. };
  329. static const esp_efuse_desc_t KEY3[] = {
  330. {EFUSE_BLK7, 0, 256}, // Key3 or user data,
  331. };
  332. static const esp_efuse_desc_t KEY4[] = {
  333. {EFUSE_BLK8, 0, 256}, // Key4 or user data,
  334. };
  335. static const esp_efuse_desc_t KEY5[] = {
  336. {EFUSE_BLK9, 0, 256}, // Key5 or user data,
  337. };
  338. static const esp_efuse_desc_t SYS_DATA_PART2[] = {
  339. {EFUSE_BLK10, 0, 256}, // System configuration,
  340. };
  341. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS[] = {
  342. &WR_DIS[0], // Write protection
  343. NULL
  344. };
  345. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[] = {
  346. &WR_DIS_RD_DIS[0], // Write protection for RD_DIS.KEY0 RD_DIS.KEY1 RD_DIS.KEY2 RD_DIS.KEY3 RD_DIS.KEY4 RD_DIS.KEY5 RD_DIS.SYS_DATA_PART2
  347. NULL
  348. };
  349. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_RTC_RAM_BOOT[] = {
  350. &WR_DIS_DIS_RTC_RAM_BOOT[0], // Write protection for DIS_RTC_RAM_BOOT
  351. NULL
  352. };
  353. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_1[] = {
  354. &WR_DIS_GROUP_1[0], // Write protection for DIS_ICACHE DIS_DCACHE DIS_DOWNLOAD_ICACHE DIS_DOWNLOAD_DCACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN DIS_BOOT_REMAP SOFT_DIS_JTAG HARD_DIS.JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT
  355. NULL
  356. };
  357. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_2[] = {
  358. &WR_DIS_GROUP_2[0], // Write protection for VDD_SPI_XPD VDD_SPI_TIEH VDD_SPI_FORCE VDD_SPI_INIT VDD_SPI_DCAP WDT_DELAY_SEL
  359. NULL
  360. };
  361. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  362. &WR_DIS_SPI_BOOT_CRYPT_CNT[0], // Write protection for SPI_BOOT_CRYPT_CNT
  363. NULL
  364. };
  365. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  366. &WR_DIS_SECURE_BOOT_KEY_REVOKE0[0], // Write protection for SECURE_BOOT_KEY_REVOKE0
  367. NULL
  368. };
  369. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  370. &WR_DIS_SECURE_BOOT_KEY_REVOKE1[0], // Write protection for SECURE_BOOT_KEY_REVOKE1
  371. NULL
  372. };
  373. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  374. &WR_DIS_SECURE_BOOT_KEY_REVOKE2[0], // Write protection for SECURE_BOOT_KEY_REVOKE2
  375. NULL
  376. };
  377. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0_PURPOSE[] = {
  378. &WR_DIS_KEY0_PURPOSE[0], // Write protection for key_purpose. KEY0
  379. NULL
  380. };
  381. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1_PURPOSE[] = {
  382. &WR_DIS_KEY1_PURPOSE[0], // Write protection for key_purpose. KEY1
  383. NULL
  384. };
  385. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2_PURPOSE[] = {
  386. &WR_DIS_KEY2_PURPOSE[0], // Write protection for key_purpose. KEY2
  387. NULL
  388. };
  389. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3_PURPOSE[] = {
  390. &WR_DIS_KEY3_PURPOSE[0], // Write protection for key_purpose. KEY3
  391. NULL
  392. };
  393. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4_PURPOSE[] = {
  394. &WR_DIS_KEY4_PURPOSE[0], // Write protection for key_purpose. KEY4
  395. NULL
  396. };
  397. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5_PURPOSE[] = {
  398. &WR_DIS_KEY5_PURPOSE[0], // Write protection for key_purpose. KEY5
  399. NULL
  400. };
  401. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[] = {
  402. &WR_DIS_SECURE_BOOT_EN[0], // Write protection for SECURE_BOOT_EN
  403. NULL
  404. };
  405. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  406. &WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE
  407. NULL
  408. };
  409. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = {
  410. &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
  411. NULL
  412. };
  413. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[] = {
  414. &WR_DIS_BLK1[0], // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS
  415. NULL
  416. };
  417. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = {
  418. &WR_DIS_SYS_DATA_PART1[0], // Write protection for EFUSE_BLK2. SYS_DATA_PART1
  419. NULL
  420. };
  421. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USER_DATA[] = {
  422. &WR_DIS_USER_DATA[0], // Write protection for EFUSE_BLK3. USER_DATA
  423. NULL
  424. };
  425. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0[] = {
  426. &WR_DIS_KEY0[0], // Write protection for EFUSE_BLK4. KEY0
  427. NULL
  428. };
  429. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1[] = {
  430. &WR_DIS_KEY1[0], // Write protection for EFUSE_BLK5. KEY1
  431. NULL
  432. };
  433. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2[] = {
  434. &WR_DIS_KEY2[0], // Write protection for EFUSE_BLK6. KEY2
  435. NULL
  436. };
  437. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3[] = {
  438. &WR_DIS_KEY3[0], // Write protection for EFUSE_BLK7. KEY3
  439. NULL
  440. };
  441. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4[] = {
  442. &WR_DIS_KEY4[0], // Write protection for EFUSE_BLK8. KEY4
  443. NULL
  444. };
  445. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5[] = {
  446. &WR_DIS_KEY5[0], // Write protection for EFUSE_BLK9. KEY5
  447. NULL
  448. };
  449. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART2[] = {
  450. &WR_DIS_SYS_DATA_PART2[0], // Write protection for EFUSE_BLK10. SYS_DATA_PART2
  451. NULL
  452. };
  453. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USB_EXCHG_PINS[] = {
  454. &WR_DIS_USB_EXCHG_PINS[0], // Write protection for USB_EXCHG_PINS
  455. NULL
  456. };
  457. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[] = {
  458. &RD_DIS[0], // Read protection
  459. NULL
  460. };
  461. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY0[] = {
  462. &RD_DIS_KEY0[0], // Read protection for EFUSE_BLK4. KEY0
  463. NULL
  464. };
  465. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY1[] = {
  466. &RD_DIS_KEY1[0], // Read protection for EFUSE_BLK5. KEY1
  467. NULL
  468. };
  469. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY2[] = {
  470. &RD_DIS_KEY2[0], // Read protection for EFUSE_BLK6. KEY2
  471. NULL
  472. };
  473. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY3[] = {
  474. &RD_DIS_KEY3[0], // Read protection for EFUSE_BLK7. KEY3
  475. NULL
  476. };
  477. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY4[] = {
  478. &RD_DIS_KEY4[0], // Read protection for EFUSE_BLK8. KEY4
  479. NULL
  480. };
  481. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY5[] = {
  482. &RD_DIS_KEY5[0], // Read protection for EFUSE_BLK9. KEY5
  483. NULL
  484. };
  485. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_SYS_DATA_PART2[] = {
  486. &RD_DIS_SYS_DATA_PART2[0], // Read protection for EFUSE_BLK10. SYS_DATA_PART2
  487. NULL
  488. };
  489. const esp_efuse_desc_t* ESP_EFUSE_DIS_RTC_RAM_BOOT[] = {
  490. &DIS_RTC_RAM_BOOT[0], // Disable boot from RTC RAM
  491. NULL
  492. };
  493. const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[] = {
  494. &DIS_ICACHE[0], // Disable Icache
  495. NULL
  496. };
  497. const esp_efuse_desc_t* ESP_EFUSE_DIS_DCACHE[] = {
  498. &DIS_DCACHE[0], // Disable Dcace
  499. NULL
  500. };
  501. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[] = {
  502. &DIS_DOWNLOAD_ICACHE[0], // Disable Icache in download mode include boot_mode 0 1 2 3 6 7
  503. NULL
  504. };
  505. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_DCACHE[] = {
  506. &DIS_DOWNLOAD_DCACHE[0], // Disable Dcache in download mode include boot_mode 0 1 2 3 6 7
  507. NULL
  508. };
  509. const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
  510. &DIS_FORCE_DOWNLOAD[0], // Disable force chip go to download mode function
  511. NULL
  512. };
  513. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[] = {
  514. &DIS_USB[0], // Disable USB function
  515. NULL
  516. };
  517. const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[] = {
  518. &DIS_CAN[0], // Disable CAN function
  519. NULL
  520. };
  521. const esp_efuse_desc_t* ESP_EFUSE_DIS_BOOT_REMAP[] = {
  522. &DIS_BOOT_REMAP[0], // Disable boot from RAM. REMAP means RAM space can be mapped to ROM space. this signal will disable this function
  523. NULL
  524. };
  525. const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = {
  526. &SOFT_DIS_JTAG[0], // Software disable jtag jtag can be activated again by hmac module
  527. NULL
  528. };
  529. const esp_efuse_desc_t* ESP_EFUSE_HARD_DIS_JTAG[] = {
  530. &HARD_DIS_JTAG[0], // Hardware disable jtag permanently disable jtag function
  531. NULL
  532. };
  533. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  534. &DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // Disable flash encrypt function
  535. NULL
  536. };
  537. const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[] = {
  538. &USB_EXCHG_PINS[0], // Exchange D+ D- pins
  539. NULL
  540. };
  541. const esp_efuse_desc_t* ESP_EFUSE_USB_EXT_PHY_ENABLE[] = {
  542. &USB_EXT_PHY_ENABLE[0], // Enable external PHY
  543. NULL
  544. };
  545. const esp_efuse_desc_t* ESP_EFUSE_BLOCK0_VERSION[] = {
  546. &BLOCK0_VERSION[0], // BLOCK0 efuse version
  547. NULL
  548. };
  549. const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_XPD[] = {
  550. &VDD_SPI_XPD[0], // VDD_SPI regulator power up
  551. NULL
  552. };
  553. const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_TIEH[] = {
  554. &VDD_SPI_TIEH[0], // VDD_SPI regulator tie high to vdda
  555. NULL
  556. };
  557. const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_FORCE[] = {
  558. &VDD_SPI_FORCE[0], // Force using eFuse configuration of VDD_SPI
  559. NULL
  560. };
  561. const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[] = {
  562. &WDT_DELAY_SEL[0], // Select RTC WDT time out threshold
  563. NULL
  564. };
  565. const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[] = {
  566. &SPI_BOOT_CRYPT_CNT[0], // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable
  567. NULL
  568. };
  569. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[] = {
  570. &SECURE_BOOT_KEY_REVOKE0[0], // Enable revoke first secure boot key
  571. NULL
  572. };
  573. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[] = {
  574. &SECURE_BOOT_KEY_REVOKE1[0], // Enable revoke second secure boot key
  575. NULL
  576. };
  577. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[] = {
  578. &SECURE_BOOT_KEY_REVOKE2[0], // Enable revoke third secure boot key
  579. NULL
  580. };
  581. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[] = {
  582. &KEY_PURPOSE_0[0], // Key0 purpose
  583. NULL
  584. };
  585. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[] = {
  586. &KEY_PURPOSE_1[0], // Key1 purpose
  587. NULL
  588. };
  589. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[] = {
  590. &KEY_PURPOSE_2[0], // Key2 purpose
  591. NULL
  592. };
  593. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[] = {
  594. &KEY_PURPOSE_3[0], // Key3 purpose
  595. NULL
  596. };
  597. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[] = {
  598. &KEY_PURPOSE_4[0], // Key4 purpose
  599. NULL
  600. };
  601. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = {
  602. &KEY_PURPOSE_5[0], // Key5 purpose
  603. NULL
  604. };
  605. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[] = {
  606. &SECURE_BOOT_EN[0], // Secure boot enable
  607. NULL
  608. };
  609. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  610. &SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Enable aggressive secure boot revoke
  611. NULL
  612. };
  613. const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[] = {
  614. &FLASH_TPUW[0], // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms
  615. NULL
  616. };
  617. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = {
  618. &DIS_DOWNLOAD_MODE[0], // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
  619. NULL
  620. };
  621. const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[] = {
  622. &DIS_LEGACY_SPI_BOOT[0], // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
  623. NULL
  624. };
  625. const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = {
  626. &UART_PRINT_CHANNEL[0], // 0: UART0. 1: UART1
  627. NULL
  628. };
  629. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = {
  630. &DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB
  631. NULL
  632. };
  633. const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = {
  634. &ENABLE_SECURITY_DOWNLOAD[0], // Enable security download mode
  635. NULL
  636. };
  637. const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
  638. &UART_PRINT_CONTROL[0], // b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print.
  639. NULL
  640. };
  641. const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[] = {
  642. &PIN_POWER_SELECTION[0], // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
  643. NULL
  644. };
  645. const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[] = {
  646. &FLASH_TYPE[0], // Connected Flash interface type. 0: 4 data line. 1: 8 data line
  647. NULL
  648. };
  649. const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
  650. &FORCE_SEND_RESUME[0], // Force ROM code to send a resume command during SPI boot
  651. NULL
  652. };
  653. const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = {
  654. &SECURE_VERSION[0], // Secure version for anti-rollback
  655. NULL
  656. };
  657. const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[] = {
  658. &MAC_FACTORY[0], // Factory MAC addr [0]
  659. &MAC_FACTORY[1], // Factory MAC addr [1]
  660. &MAC_FACTORY[2], // Factory MAC addr [2]
  661. &MAC_FACTORY[3], // Factory MAC addr [3]
  662. &MAC_FACTORY[4], // Factory MAC addr [4]
  663. &MAC_FACTORY[5], // Factory MAC addr [5]
  664. NULL
  665. };
  666. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[] = {
  667. &SPI_PAD_CONFIG_CLK[0], // SPI_PAD_configure CLK
  668. NULL
  669. };
  670. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[] = {
  671. &SPI_PAD_CONFIG_Q_D1[0], // SPI_PAD_configure Q(D1)
  672. NULL
  673. };
  674. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D_D0[] = {
  675. &SPI_PAD_CONFIG_D_D0[0], // SPI_PAD_configure D(D0)
  676. NULL
  677. };
  678. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CS[] = {
  679. &SPI_PAD_CONFIG_CS[0], // SPI_PAD_configure CS
  680. NULL
  681. };
  682. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_HD_D3[] = {
  683. &SPI_PAD_CONFIG_HD_D3[0], // SPI_PAD_configure HD(D3)
  684. NULL
  685. };
  686. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_WP_D2[] = {
  687. &SPI_PAD_CONFIG_WP_D2[0], // SPI_PAD_configure WP(D2)
  688. NULL
  689. };
  690. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_DQS[] = {
  691. &SPI_PAD_CONFIG_DQS[0], // SPI_PAD_configure DQS
  692. NULL
  693. };
  694. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[] = {
  695. &SPI_PAD_CONFIG_D4[0], // SPI_PAD_configure D4
  696. NULL
  697. };
  698. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[] = {
  699. &SPI_PAD_CONFIG_D5[0], // SPI_PAD_configure D5
  700. NULL
  701. };
  702. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[] = {
  703. &SPI_PAD_CONFIG_D6[0], // SPI_PAD_configure D6
  704. NULL
  705. };
  706. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[] = {
  707. &SPI_PAD_CONFIG_D7[0], // SPI_PAD_configure D7
  708. NULL
  709. };
  710. const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[] = {
  711. &WAFER_VERSION[0], // WAFER version 0:A
  712. NULL
  713. };
  714. const esp_efuse_desc_t* ESP_EFUSE_FLASH_VERSION[] = {
  715. &FLASH_VERSION[0], // Flash_version
  716. NULL
  717. };
  718. const esp_efuse_desc_t* ESP_EFUSE_BLOCK1_VERSION[] = {
  719. &BLOCK1_VERSION[0], // BLOCK1 efuse version
  720. NULL
  721. };
  722. const esp_efuse_desc_t* ESP_EFUSE_PSRAM_VERSION[] = {
  723. &PSRAM_VERSION[0], // PSRAM version
  724. NULL
  725. };
  726. const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = {
  727. &PKG_VERSION[0], // Package version
  728. NULL
  729. };
  730. const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
  731. &OPTIONAL_UNIQUE_ID[0], // Optional unique 128-bit ID
  732. NULL
  733. };
  734. const esp_efuse_desc_t* ESP_EFUSE_BLOCK2_VERSION[] = {
  735. &BLOCK2_VERSION[0], // Version of BLOCK2: 0-No ADC calib; 1-ADC calib V1; 2-ADC calib V2
  736. NULL
  737. };
  738. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[] = {
  739. &USER_DATA[0], // User data
  740. NULL
  741. };
  742. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[] = {
  743. &USER_DATA_MAC_CUSTOM[0], // Custom MAC
  744. NULL
  745. };
  746. const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = {
  747. &KEY0[0], // Key0 or user data
  748. NULL
  749. };
  750. const esp_efuse_desc_t* ESP_EFUSE_KEY1[] = {
  751. &KEY1[0], // Key1 or user data
  752. NULL
  753. };
  754. const esp_efuse_desc_t* ESP_EFUSE_KEY2[] = {
  755. &KEY2[0], // Key2 or user data
  756. NULL
  757. };
  758. const esp_efuse_desc_t* ESP_EFUSE_KEY3[] = {
  759. &KEY3[0], // Key3 or user data
  760. NULL
  761. };
  762. const esp_efuse_desc_t* ESP_EFUSE_KEY4[] = {
  763. &KEY4[0], // Key4 or user data
  764. NULL
  765. };
  766. const esp_efuse_desc_t* ESP_EFUSE_KEY5[] = {
  767. &KEY5[0], // Key5 or user data
  768. NULL
  769. };
  770. const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[] = {
  771. &SYS_DATA_PART2[0], // System configuration
  772. NULL
  773. };