esp_efuse_table.c 35 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182
  1. /*
  2. * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "sdkconfig.h"
  7. #include "esp_efuse.h"
  8. #include <assert.h>
  9. #include "esp_efuse_table.h"
  10. // md5_digest_table ee5142bc489eee22230a49b5c7cafe00
  11. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
  12. // If you want to change some fields, you need to change esp_efuse_table.csv file
  13. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
  14. // To show efuse_table run the command 'show_efuse_table'.
  15. static const esp_efuse_desc_t WR_DIS[] = {
  16. {EFUSE_BLK0, 0, 32}, // Write protection,
  17. };
  18. static const esp_efuse_desc_t WR_DIS_RD_DIS[] = {
  19. {EFUSE_BLK0, 0, 1}, // Write protection for RD_DIS_KEY0 RD_DIS_KEY1 RD_DIS_KEY2 RD_DIS_KEY3 RD_DIS_KEY4 RD_DIS_KEY5 RD_DIS_SYS_DATA_PART2,
  20. };
  21. static const esp_efuse_desc_t WR_DIS_GROUP_1[] = {
  22. {EFUSE_BLK0, 2, 1}, // Write protection for DIS_ICACHE DIS_DCACHE DIS_DOWNLOAD_ICACHE DIS_DOWNLOAD_DCACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN SOFT_DIS_JTAG HARD_DIS_JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT,
  23. };
  24. static const esp_efuse_desc_t WR_DIS_GROUP_2[] = {
  25. {EFUSE_BLK0, 3, 1}, // Write protection for VDD_SPI_XPD VDD_SPI_TIEH VDD_SPI_FORCE VDD_SPI_INIT VDD_SPI_DCAP WDT_DELAY_SEL,
  26. };
  27. static const esp_efuse_desc_t WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  28. {EFUSE_BLK0, 4, 1}, // Write protection for SPI_BOOT_CRYPT_CNT,
  29. };
  30. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  31. {EFUSE_BLK0, 5, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE0,
  32. };
  33. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  34. {EFUSE_BLK0, 6, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE1,
  35. };
  36. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  37. {EFUSE_BLK0, 7, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE2,
  38. };
  39. static const esp_efuse_desc_t WR_DIS_KEY0_PURPOSE[] = {
  40. {EFUSE_BLK0, 8, 1}, // Write protection for key_purpose. KEY0,
  41. };
  42. static const esp_efuse_desc_t WR_DIS_KEY1_PURPOSE[] = {
  43. {EFUSE_BLK0, 9, 1}, // Write protection for key_purpose. KEY1,
  44. };
  45. static const esp_efuse_desc_t WR_DIS_KEY2_PURPOSE[] = {
  46. {EFUSE_BLK0, 10, 1}, // Write protection for key_purpose. KEY2,
  47. };
  48. static const esp_efuse_desc_t WR_DIS_KEY3_PURPOSE[] = {
  49. {EFUSE_BLK0, 11, 1}, // Write protection for key_purpose. KEY3,
  50. };
  51. static const esp_efuse_desc_t WR_DIS_KEY4_PURPOSE[] = {
  52. {EFUSE_BLK0, 12, 1}, // Write protection for key_purpose. KEY4,
  53. };
  54. static const esp_efuse_desc_t WR_DIS_KEY5_PURPOSE[] = {
  55. {EFUSE_BLK0, 13, 1}, // Write protection for key_purpose. KEY5,
  56. };
  57. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_EN[] = {
  58. {EFUSE_BLK0, 15, 1}, // Write protection for SECURE_BOOT_EN,
  59. };
  60. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  61. {EFUSE_BLK0, 16, 1}, // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE,
  62. };
  63. static const esp_efuse_desc_t WR_DIS_GROUP_3[] = {
  64. {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION,
  65. };
  66. static const esp_efuse_desc_t WR_DIS_BLK1[] = {
  67. {EFUSE_BLK0, 20, 1}, // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS,
  68. };
  69. static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = {
  70. {EFUSE_BLK0, 21, 1}, // Write protection for EFUSE_BLK2. SYS_DATA_PART1,
  71. };
  72. static const esp_efuse_desc_t WR_DIS_USER_DATA[] = {
  73. {EFUSE_BLK0, 22, 1}, // Write protection for EFUSE_BLK3. USER_DATA,
  74. };
  75. static const esp_efuse_desc_t WR_DIS_KEY0[] = {
  76. {EFUSE_BLK0, 23, 1}, // Write protection for EFUSE_BLK4. KEY0,
  77. };
  78. static const esp_efuse_desc_t WR_DIS_KEY1[] = {
  79. {EFUSE_BLK0, 24, 1}, // Write protection for EFUSE_BLK5. KEY1,
  80. };
  81. static const esp_efuse_desc_t WR_DIS_KEY2[] = {
  82. {EFUSE_BLK0, 25, 1}, // Write protection for EFUSE_BLK6. KEY2,
  83. };
  84. static const esp_efuse_desc_t WR_DIS_KEY3[] = {
  85. {EFUSE_BLK0, 26, 1}, // Write protection for EFUSE_BLK7. KEY3,
  86. };
  87. static const esp_efuse_desc_t WR_DIS_KEY4[] = {
  88. {EFUSE_BLK0, 27, 1}, // Write protection for EFUSE_BLK8. KEY4,
  89. };
  90. static const esp_efuse_desc_t WR_DIS_KEY5[] = {
  91. {EFUSE_BLK0, 28, 1}, // Write protection for EFUSE_BLK9. KEY5,
  92. };
  93. static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART2[] = {
  94. {EFUSE_BLK0, 29, 1}, // Write protection for EFUSE_BLK10. SYS_DATA_PART2,
  95. };
  96. static const esp_efuse_desc_t WR_DIS_USB_EXCHG_PINS[] = {
  97. {EFUSE_BLK0, 30, 1}, // Write protection for USB_EXCHG_PINS,
  98. };
  99. static const esp_efuse_desc_t RD_DIS[] = {
  100. {EFUSE_BLK0, 32, 7}, // Read protection,
  101. };
  102. static const esp_efuse_desc_t RD_DIS_KEY0[] = {
  103. {EFUSE_BLK0, 32, 1}, // Read protection for EFUSE_BLK4. KEY0,
  104. };
  105. static const esp_efuse_desc_t RD_DIS_KEY1[] = {
  106. {EFUSE_BLK0, 33, 1}, // Read protection for EFUSE_BLK5. KEY1,
  107. };
  108. static const esp_efuse_desc_t RD_DIS_KEY2[] = {
  109. {EFUSE_BLK0, 34, 1}, // Read protection for EFUSE_BLK6. KEY2,
  110. };
  111. static const esp_efuse_desc_t RD_DIS_KEY3[] = {
  112. {EFUSE_BLK0, 35, 1}, // Read protection for EFUSE_BLK7. KEY3,
  113. };
  114. static const esp_efuse_desc_t RD_DIS_KEY4[] = {
  115. {EFUSE_BLK0, 36, 1}, // Read protection for EFUSE_BLK8. KEY4,
  116. };
  117. static const esp_efuse_desc_t RD_DIS_KEY5[] = {
  118. {EFUSE_BLK0, 37, 1}, // Read protection for EFUSE_BLK9. KEY5,
  119. };
  120. static const esp_efuse_desc_t RD_DIS_SYS_DATA_PART2[] = {
  121. {EFUSE_BLK0, 38, 1}, // Read protection for EFUSE_BLK10. SYS_DATA_PART2,
  122. };
  123. static const esp_efuse_desc_t DIS_ICACHE[] = {
  124. {EFUSE_BLK0, 40, 1}, // Disable Icache,
  125. };
  126. static const esp_efuse_desc_t DIS_DCACHE[] = {
  127. {EFUSE_BLK0, 41, 1}, // Disable Dcace,
  128. };
  129. static const esp_efuse_desc_t DIS_DOWNLOAD_ICACHE[] = {
  130. {EFUSE_BLK0, 42, 1}, // Disable Icache in download mode include boot_mode 0 1 2 3 6 7,
  131. };
  132. static const esp_efuse_desc_t DIS_DOWNLOAD_DCACHE[] = {
  133. {EFUSE_BLK0, 43, 1}, // Disable Dcache in download mode include boot_mode 0 1 2 3 6 7,
  134. };
  135. static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
  136. {EFUSE_BLK0, 44, 1}, // Disable force chip go to download mode function,
  137. };
  138. static const esp_efuse_desc_t DIS_USB[] = {
  139. {EFUSE_BLK0, 45, 1}, // Disable USB function,
  140. };
  141. static const esp_efuse_desc_t DIS_CAN[] = {
  142. {EFUSE_BLK0, 46, 1}, // Disable CAN function,
  143. };
  144. static const esp_efuse_desc_t DIS_APP_CPU[] = {
  145. {EFUSE_BLK0, 47, 1}, // Disables APP CPU,
  146. };
  147. static const esp_efuse_desc_t SOFT_DIS_JTAG[] = {
  148. {EFUSE_BLK0, 48, 3}, // Software disables JTAG by programming odd number of 1 bit(s). JTAG can be re-enabled via HMAC peripheral,
  149. };
  150. static const esp_efuse_desc_t HARD_DIS_JTAG[] = {
  151. {EFUSE_BLK0, 51, 1}, // Hardware disable jtag permanently disable jtag function,
  152. };
  153. static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  154. {EFUSE_BLK0, 52, 1}, // Disable flash encrypt function,
  155. };
  156. static const esp_efuse_desc_t USB_EXCHG_PINS[] = {
  157. {EFUSE_BLK0, 57, 1}, // Exchange D+ D- pins,
  158. };
  159. static const esp_efuse_desc_t USB_EXT_PHY_ENABLE[] = {
  160. {EFUSE_BLK0, 58, 1}, // Enable external PHY,
  161. };
  162. static const esp_efuse_desc_t BTLC_GPIO_ENABLE[] = {
  163. {EFUSE_BLK0, 59, 2}, // Enables BTLC GPIO,
  164. };
  165. static const esp_efuse_desc_t VDD_SPI_XPD[] = {
  166. {EFUSE_BLK0, 68, 1}, // VDD_SPI regulator power up,
  167. };
  168. static const esp_efuse_desc_t VDD_SPI_TIEH[] = {
  169. {EFUSE_BLK0, 69, 1}, // VDD_SPI regulator tie high to vdda,
  170. };
  171. static const esp_efuse_desc_t VDD_SPI_FORCE[] = {
  172. {EFUSE_BLK0, 70, 1}, // Force using eFuse configuration of VDD_SPI,
  173. };
  174. static const esp_efuse_desc_t WDT_DELAY_SEL[] = {
  175. {EFUSE_BLK0, 80, 2}, // Select RTC WDT time out threshold,
  176. };
  177. static const esp_efuse_desc_t SPI_BOOT_CRYPT_CNT[] = {
  178. {EFUSE_BLK0, 82, 3}, // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable,
  179. };
  180. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE0[] = {
  181. {EFUSE_BLK0, 85, 1}, // Enable revoke first secure boot key,
  182. };
  183. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE1[] = {
  184. {EFUSE_BLK0, 86, 1}, // Enable revoke second secure boot key,
  185. };
  186. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE2[] = {
  187. {EFUSE_BLK0, 87, 1}, // Enable revoke third secure boot key,
  188. };
  189. static const esp_efuse_desc_t KEY_PURPOSE_0[] = {
  190. {EFUSE_BLK0, 88, 4}, // Key0 purpose,
  191. };
  192. static const esp_efuse_desc_t KEY_PURPOSE_1[] = {
  193. {EFUSE_BLK0, 92, 4}, // Key1 purpose,
  194. };
  195. static const esp_efuse_desc_t KEY_PURPOSE_2[] = {
  196. {EFUSE_BLK0, 96, 4}, // Key2 purpose,
  197. };
  198. static const esp_efuse_desc_t KEY_PURPOSE_3[] = {
  199. {EFUSE_BLK0, 100, 4}, // Key3 purpose,
  200. };
  201. static const esp_efuse_desc_t KEY_PURPOSE_4[] = {
  202. {EFUSE_BLK0, 104, 4}, // Key4 purpose,
  203. };
  204. static const esp_efuse_desc_t KEY_PURPOSE_5[] = {
  205. {EFUSE_BLK0, 108, 4}, // Key5 purpose,
  206. };
  207. static const esp_efuse_desc_t SECURE_BOOT_EN[] = {
  208. {EFUSE_BLK0, 116, 1}, // Secure boot enable,
  209. };
  210. static const esp_efuse_desc_t SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  211. {EFUSE_BLK0, 117, 1}, // Enable aggressive secure boot revoke,
  212. };
  213. static const esp_efuse_desc_t DIS_USB_JTAG[] = {
  214. {EFUSE_BLK0, 118, 1}, // Set to disable usb_serial_jtag-to-jtag function,
  215. };
  216. static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG[] = {
  217. {EFUSE_BLK0, 119, 1}, // Set to disable usb_serial_jtag module,
  218. };
  219. static const esp_efuse_desc_t STRAP_JTAG_SEL[] = {
  220. {EFUSE_BLK0, 120, 1}, // Enable selection between usb_to_jtag or pad_to_jtag through gpio10,
  221. };
  222. static const esp_efuse_desc_t USB_PHY_SEL[] = {
  223. {EFUSE_BLK0, 121, 1}, // Select internal/external PHY for USB OTG and usb_serial_jtag,
  224. };
  225. static const esp_efuse_desc_t FLASH_TPUW[] = {
  226. {EFUSE_BLK0, 124, 4}, // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms,
  227. };
  228. static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = {
  229. {EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7,
  230. };
  231. static const esp_efuse_desc_t DIS_LEGACY_SPI_BOOT[] = {
  232. {EFUSE_BLK0, 129, 1}, // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4,
  233. };
  234. static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = {
  235. {EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1,
  236. };
  237. static const esp_efuse_desc_t FLASH_ECC_MODE[] = {
  238. {EFUSE_BLK0, 131, 1}, // Configures the ECC mode for SPI flash. 0:16-byte to 18-byte mode. 1:16-byte to 17-byte mode,
  239. };
  240. static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = {
  241. {EFUSE_BLK0, 132, 1}, // Disable download through USB,
  242. };
  243. static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
  244. {EFUSE_BLK0, 133, 1}, // Enable security download mode,
  245. };
  246. static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
  247. {EFUSE_BLK0, 134, 2}, // b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print.,
  248. };
  249. static const esp_efuse_desc_t PIN_POWER_SELECTION[] = {
  250. {EFUSE_BLK0, 136, 1}, // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.,
  251. };
  252. static const esp_efuse_desc_t FLASH_TYPE[] = {
  253. {EFUSE_BLK0, 137, 1}, // Connected Flash interface type. 0: 4 data line. 1: 8 data line,
  254. };
  255. static const esp_efuse_desc_t FLASH_PAGE_SIZE[] = {
  256. {EFUSE_BLK0, 138, 2}, // Sets the size of flash page,
  257. };
  258. static const esp_efuse_desc_t FLASH_ECC_EN[] = {
  259. {EFUSE_BLK0, 140, 1}, // Enables ECC in Flash boot mode,
  260. };
  261. static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
  262. {EFUSE_BLK0, 141, 1}, // Force ROM code to send a resume command during SPI boot,
  263. };
  264. static const esp_efuse_desc_t SECURE_VERSION[] = {
  265. {EFUSE_BLK0, 142, 16}, // Secure version for anti-rollback,
  266. };
  267. static const esp_efuse_desc_t MAC_FACTORY[] = {
  268. {EFUSE_BLK1, 40, 8}, // Factory MAC addr [0],
  269. {EFUSE_BLK1, 32, 8}, // Factory MAC addr [1],
  270. {EFUSE_BLK1, 24, 8}, // Factory MAC addr [2],
  271. {EFUSE_BLK1, 16, 8}, // Factory MAC addr [3],
  272. {EFUSE_BLK1, 8, 8}, // Factory MAC addr [4],
  273. {EFUSE_BLK1, 0, 8}, // Factory MAC addr [5],
  274. };
  275. static const esp_efuse_desc_t SPI_PAD_CONFIG_CLK[] = {
  276. {EFUSE_BLK1, 48, 6}, // SPI_PAD_configure CLK,
  277. };
  278. static const esp_efuse_desc_t SPI_PAD_CONFIG_Q_D1[] = {
  279. {EFUSE_BLK1, 54, 6}, // SPI_PAD_configure Q(D1),
  280. };
  281. static const esp_efuse_desc_t SPI_PAD_CONFIG_D_D0[] = {
  282. {EFUSE_BLK1, 60, 6}, // SPI_PAD_configure D(D0),
  283. };
  284. static const esp_efuse_desc_t SPI_PAD_CONFIG_CS[] = {
  285. {EFUSE_BLK1, 66, 6}, // SPI_PAD_configure CS,
  286. };
  287. static const esp_efuse_desc_t SPI_PAD_CONFIG_HD_D3[] = {
  288. {EFUSE_BLK1, 72, 6}, // SPI_PAD_configure HD(D3),
  289. };
  290. static const esp_efuse_desc_t SPI_PAD_CONFIG_WP_D2[] = {
  291. {EFUSE_BLK1, 78, 6}, // SPI_PAD_configure WP(D2),
  292. };
  293. static const esp_efuse_desc_t SPI_PAD_CONFIG_DQS[] = {
  294. {EFUSE_BLK1, 84, 6}, // SPI_PAD_configure DQS,
  295. };
  296. static const esp_efuse_desc_t SPI_PAD_CONFIG_D4[] = {
  297. {EFUSE_BLK1, 90, 6}, // SPI_PAD_configure D4,
  298. };
  299. static const esp_efuse_desc_t SPI_PAD_CONFIG_D5[] = {
  300. {EFUSE_BLK1, 96, 6}, // SPI_PAD_configure D5,
  301. };
  302. static const esp_efuse_desc_t SPI_PAD_CONFIG_D6[] = {
  303. {EFUSE_BLK1, 102, 6}, // SPI_PAD_configure D6,
  304. };
  305. static const esp_efuse_desc_t SPI_PAD_CONFIG_D7[] = {
  306. {EFUSE_BLK1, 108, 6}, // SPI_PAD_configure D7,
  307. };
  308. static const esp_efuse_desc_t WAFER_VERSION[] = {
  309. {EFUSE_BLK1, 114, 3}, // WAFER version 0:A,
  310. };
  311. static const esp_efuse_desc_t PKG_VERSION[] = {
  312. {EFUSE_BLK1, 117, 3}, // Package version,
  313. };
  314. static const esp_efuse_desc_t BLOCK1_VERSION[] = {
  315. {EFUSE_BLK1, 120, 3}, // BLOCK1 efuse version 0:No calibration 1:With calibration,
  316. };
  317. static const esp_efuse_desc_t ADC2_CAL_VOL_ATTEN3[] = {
  318. {EFUSE_BLK1, 186, 6}, // ADC2 calibration voltage at atten3,
  319. };
  320. static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
  321. {EFUSE_BLK2, 0, 128}, // Optional unique 128-bit ID,
  322. };
  323. static const esp_efuse_desc_t BLOCK2_VERSION[] = {
  324. {EFUSE_BLK2, 128, 4}, // Version of BLOCK2,
  325. };
  326. static const esp_efuse_desc_t TEMP_CALIB[] = {
  327. {EFUSE_BLK2, 132, 9}, // Temperature calibration data,
  328. };
  329. static const esp_efuse_desc_t OCODE[] = {
  330. {EFUSE_BLK2, 141, 8}, // ADC OCode,
  331. };
  332. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0[] = {
  333. {EFUSE_BLK2, 149, 8}, // ADC1 init code at atten0,
  334. };
  335. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN1[] = {
  336. {EFUSE_BLK2, 157, 6}, // ADC1 init code at atten1,
  337. };
  338. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN2[] = {
  339. {EFUSE_BLK2, 163, 6}, // ADC1 init code at atten2,
  340. };
  341. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN3[] = {
  342. {EFUSE_BLK2, 169, 6}, // ADC1 init code at atten3,
  343. };
  344. static const esp_efuse_desc_t ADC2_INIT_CODE_ATTEN0[] = {
  345. {EFUSE_BLK2, 175, 8}, // ADC2 init code at atten0,
  346. };
  347. static const esp_efuse_desc_t ADC2_INIT_CODE_ATTEN1[] = {
  348. {EFUSE_BLK2, 183, 6}, // ADC2 init code at atten1,
  349. };
  350. static const esp_efuse_desc_t ADC2_INIT_CODE_ATTEN2[] = {
  351. {EFUSE_BLK2, 189, 6}, // ADC2 init code at atten2,
  352. };
  353. static const esp_efuse_desc_t ADC2_INIT_CODE_ATTEN3[] = {
  354. {EFUSE_BLK2, 195, 6}, // ADC2 init code at atten3,
  355. };
  356. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN0[] = {
  357. {EFUSE_BLK2, 201, 8}, // ADC1 calibration voltage at atten0,
  358. };
  359. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN1[] = {
  360. {EFUSE_BLK2, 209, 8}, // ADC1 calibration voltage at atten1,
  361. };
  362. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN2[] = {
  363. {EFUSE_BLK2, 217, 8}, // ADC1 calibration voltage at atten2,
  364. };
  365. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN3[] = {
  366. {EFUSE_BLK2, 225, 8}, // ADC1 calibration voltage at atten3,
  367. };
  368. static const esp_efuse_desc_t ADC2_CAL_VOL_ATTEN0[] = {
  369. {EFUSE_BLK2, 233, 8}, // ADC2 calibration voltage at atten0,
  370. };
  371. static const esp_efuse_desc_t ADC2_CAL_VOL_ATTEN1[] = {
  372. {EFUSE_BLK2, 241, 7}, // ADC2 calibration voltage at atten1,
  373. };
  374. static const esp_efuse_desc_t ADC2_CAL_VOL_ATTEN2[] = {
  375. {EFUSE_BLK2, 248, 7}, // ADC2 calibration voltage at atten2,
  376. };
  377. static const esp_efuse_desc_t USER_DATA[] = {
  378. {EFUSE_BLK3, 0, 256}, // User data,
  379. };
  380. static const esp_efuse_desc_t USER_DATA_MAC_CUSTOM[] = {
  381. {EFUSE_BLK3, 200, 48}, // Custom MAC,
  382. };
  383. static const esp_efuse_desc_t KEY0[] = {
  384. {EFUSE_BLK4, 0, 256}, // Key0 or user data,
  385. };
  386. static const esp_efuse_desc_t KEY1[] = {
  387. {EFUSE_BLK5, 0, 256}, // Key1 or user data,
  388. };
  389. static const esp_efuse_desc_t KEY2[] = {
  390. {EFUSE_BLK6, 0, 256}, // Key2 or user data,
  391. };
  392. static const esp_efuse_desc_t KEY3[] = {
  393. {EFUSE_BLK7, 0, 256}, // Key3 or user data,
  394. };
  395. static const esp_efuse_desc_t KEY4[] = {
  396. {EFUSE_BLK8, 0, 256}, // Key4 or user data,
  397. };
  398. static const esp_efuse_desc_t KEY5[] = {
  399. {EFUSE_BLK9, 0, 256}, // Key5 or user data,
  400. };
  401. static const esp_efuse_desc_t SYS_DATA_PART2[] = {
  402. {EFUSE_BLK10, 0, 256}, // System configuration,
  403. };
  404. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS[] = {
  405. &WR_DIS[0], // Write protection
  406. NULL
  407. };
  408. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[] = {
  409. &WR_DIS_RD_DIS[0], // Write protection for RD_DIS_KEY0 RD_DIS_KEY1 RD_DIS_KEY2 RD_DIS_KEY3 RD_DIS_KEY4 RD_DIS_KEY5 RD_DIS_SYS_DATA_PART2
  410. NULL
  411. };
  412. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_1[] = {
  413. &WR_DIS_GROUP_1[0], // Write protection for DIS_ICACHE DIS_DCACHE DIS_DOWNLOAD_ICACHE DIS_DOWNLOAD_DCACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN SOFT_DIS_JTAG HARD_DIS_JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT
  414. NULL
  415. };
  416. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_2[] = {
  417. &WR_DIS_GROUP_2[0], // Write protection for VDD_SPI_XPD VDD_SPI_TIEH VDD_SPI_FORCE VDD_SPI_INIT VDD_SPI_DCAP WDT_DELAY_SEL
  418. NULL
  419. };
  420. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  421. &WR_DIS_SPI_BOOT_CRYPT_CNT[0], // Write protection for SPI_BOOT_CRYPT_CNT
  422. NULL
  423. };
  424. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  425. &WR_DIS_SECURE_BOOT_KEY_REVOKE0[0], // Write protection for SECURE_BOOT_KEY_REVOKE0
  426. NULL
  427. };
  428. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  429. &WR_DIS_SECURE_BOOT_KEY_REVOKE1[0], // Write protection for SECURE_BOOT_KEY_REVOKE1
  430. NULL
  431. };
  432. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  433. &WR_DIS_SECURE_BOOT_KEY_REVOKE2[0], // Write protection for SECURE_BOOT_KEY_REVOKE2
  434. NULL
  435. };
  436. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0_PURPOSE[] = {
  437. &WR_DIS_KEY0_PURPOSE[0], // Write protection for key_purpose. KEY0
  438. NULL
  439. };
  440. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1_PURPOSE[] = {
  441. &WR_DIS_KEY1_PURPOSE[0], // Write protection for key_purpose. KEY1
  442. NULL
  443. };
  444. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2_PURPOSE[] = {
  445. &WR_DIS_KEY2_PURPOSE[0], // Write protection for key_purpose. KEY2
  446. NULL
  447. };
  448. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3_PURPOSE[] = {
  449. &WR_DIS_KEY3_PURPOSE[0], // Write protection for key_purpose. KEY3
  450. NULL
  451. };
  452. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4_PURPOSE[] = {
  453. &WR_DIS_KEY4_PURPOSE[0], // Write protection for key_purpose. KEY4
  454. NULL
  455. };
  456. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5_PURPOSE[] = {
  457. &WR_DIS_KEY5_PURPOSE[0], // Write protection for key_purpose. KEY5
  458. NULL
  459. };
  460. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[] = {
  461. &WR_DIS_SECURE_BOOT_EN[0], // Write protection for SECURE_BOOT_EN
  462. NULL
  463. };
  464. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  465. &WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE
  466. NULL
  467. };
  468. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = {
  469. &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
  470. NULL
  471. };
  472. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[] = {
  473. &WR_DIS_BLK1[0], // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS
  474. NULL
  475. };
  476. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = {
  477. &WR_DIS_SYS_DATA_PART1[0], // Write protection for EFUSE_BLK2. SYS_DATA_PART1
  478. NULL
  479. };
  480. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USER_DATA[] = {
  481. &WR_DIS_USER_DATA[0], // Write protection for EFUSE_BLK3. USER_DATA
  482. NULL
  483. };
  484. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0[] = {
  485. &WR_DIS_KEY0[0], // Write protection for EFUSE_BLK4. KEY0
  486. NULL
  487. };
  488. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1[] = {
  489. &WR_DIS_KEY1[0], // Write protection for EFUSE_BLK5. KEY1
  490. NULL
  491. };
  492. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2[] = {
  493. &WR_DIS_KEY2[0], // Write protection for EFUSE_BLK6. KEY2
  494. NULL
  495. };
  496. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3[] = {
  497. &WR_DIS_KEY3[0], // Write protection for EFUSE_BLK7. KEY3
  498. NULL
  499. };
  500. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4[] = {
  501. &WR_DIS_KEY4[0], // Write protection for EFUSE_BLK8. KEY4
  502. NULL
  503. };
  504. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5[] = {
  505. &WR_DIS_KEY5[0], // Write protection for EFUSE_BLK9. KEY5
  506. NULL
  507. };
  508. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART2[] = {
  509. &WR_DIS_SYS_DATA_PART2[0], // Write protection for EFUSE_BLK10. SYS_DATA_PART2
  510. NULL
  511. };
  512. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USB_EXCHG_PINS[] = {
  513. &WR_DIS_USB_EXCHG_PINS[0], // Write protection for USB_EXCHG_PINS
  514. NULL
  515. };
  516. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[] = {
  517. &RD_DIS[0], // Read protection
  518. NULL
  519. };
  520. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY0[] = {
  521. &RD_DIS_KEY0[0], // Read protection for EFUSE_BLK4. KEY0
  522. NULL
  523. };
  524. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY1[] = {
  525. &RD_DIS_KEY1[0], // Read protection for EFUSE_BLK5. KEY1
  526. NULL
  527. };
  528. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY2[] = {
  529. &RD_DIS_KEY2[0], // Read protection for EFUSE_BLK6. KEY2
  530. NULL
  531. };
  532. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY3[] = {
  533. &RD_DIS_KEY3[0], // Read protection for EFUSE_BLK7. KEY3
  534. NULL
  535. };
  536. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY4[] = {
  537. &RD_DIS_KEY4[0], // Read protection for EFUSE_BLK8. KEY4
  538. NULL
  539. };
  540. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY5[] = {
  541. &RD_DIS_KEY5[0], // Read protection for EFUSE_BLK9. KEY5
  542. NULL
  543. };
  544. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_SYS_DATA_PART2[] = {
  545. &RD_DIS_SYS_DATA_PART2[0], // Read protection for EFUSE_BLK10. SYS_DATA_PART2
  546. NULL
  547. };
  548. const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[] = {
  549. &DIS_ICACHE[0], // Disable Icache
  550. NULL
  551. };
  552. const esp_efuse_desc_t* ESP_EFUSE_DIS_DCACHE[] = {
  553. &DIS_DCACHE[0], // Disable Dcace
  554. NULL
  555. };
  556. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[] = {
  557. &DIS_DOWNLOAD_ICACHE[0], // Disable Icache in download mode include boot_mode 0 1 2 3 6 7
  558. NULL
  559. };
  560. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_DCACHE[] = {
  561. &DIS_DOWNLOAD_DCACHE[0], // Disable Dcache in download mode include boot_mode 0 1 2 3 6 7
  562. NULL
  563. };
  564. const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
  565. &DIS_FORCE_DOWNLOAD[0], // Disable force chip go to download mode function
  566. NULL
  567. };
  568. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[] = {
  569. &DIS_USB[0], // Disable USB function
  570. NULL
  571. };
  572. const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[] = {
  573. &DIS_CAN[0], // Disable CAN function
  574. NULL
  575. };
  576. const esp_efuse_desc_t* ESP_EFUSE_DIS_APP_CPU[] = {
  577. &DIS_APP_CPU[0], // Disables APP CPU
  578. NULL
  579. };
  580. const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = {
  581. &SOFT_DIS_JTAG[0], // Software disables JTAG by programming odd number of 1 bit(s). JTAG can be re-enabled via HMAC peripheral
  582. NULL
  583. };
  584. const esp_efuse_desc_t* ESP_EFUSE_HARD_DIS_JTAG[] = {
  585. &HARD_DIS_JTAG[0], // Hardware disable jtag permanently disable jtag function
  586. NULL
  587. };
  588. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  589. &DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // Disable flash encrypt function
  590. NULL
  591. };
  592. const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[] = {
  593. &USB_EXCHG_PINS[0], // Exchange D+ D- pins
  594. NULL
  595. };
  596. const esp_efuse_desc_t* ESP_EFUSE_USB_EXT_PHY_ENABLE[] = {
  597. &USB_EXT_PHY_ENABLE[0], // Enable external PHY
  598. NULL
  599. };
  600. const esp_efuse_desc_t* ESP_EFUSE_BTLC_GPIO_ENABLE[] = {
  601. &BTLC_GPIO_ENABLE[0], // Enables BTLC GPIO
  602. NULL
  603. };
  604. const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_XPD[] = {
  605. &VDD_SPI_XPD[0], // VDD_SPI regulator power up
  606. NULL
  607. };
  608. const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_TIEH[] = {
  609. &VDD_SPI_TIEH[0], // VDD_SPI regulator tie high to vdda
  610. NULL
  611. };
  612. const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_FORCE[] = {
  613. &VDD_SPI_FORCE[0], // Force using eFuse configuration of VDD_SPI
  614. NULL
  615. };
  616. const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[] = {
  617. &WDT_DELAY_SEL[0], // Select RTC WDT time out threshold
  618. NULL
  619. };
  620. const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[] = {
  621. &SPI_BOOT_CRYPT_CNT[0], // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable
  622. NULL
  623. };
  624. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[] = {
  625. &SECURE_BOOT_KEY_REVOKE0[0], // Enable revoke first secure boot key
  626. NULL
  627. };
  628. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[] = {
  629. &SECURE_BOOT_KEY_REVOKE1[0], // Enable revoke second secure boot key
  630. NULL
  631. };
  632. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[] = {
  633. &SECURE_BOOT_KEY_REVOKE2[0], // Enable revoke third secure boot key
  634. NULL
  635. };
  636. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[] = {
  637. &KEY_PURPOSE_0[0], // Key0 purpose
  638. NULL
  639. };
  640. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[] = {
  641. &KEY_PURPOSE_1[0], // Key1 purpose
  642. NULL
  643. };
  644. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[] = {
  645. &KEY_PURPOSE_2[0], // Key2 purpose
  646. NULL
  647. };
  648. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[] = {
  649. &KEY_PURPOSE_3[0], // Key3 purpose
  650. NULL
  651. };
  652. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[] = {
  653. &KEY_PURPOSE_4[0], // Key4 purpose
  654. NULL
  655. };
  656. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = {
  657. &KEY_PURPOSE_5[0], // Key5 purpose
  658. NULL
  659. };
  660. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[] = {
  661. &SECURE_BOOT_EN[0], // Secure boot enable
  662. NULL
  663. };
  664. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  665. &SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Enable aggressive secure boot revoke
  666. NULL
  667. };
  668. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[] = {
  669. &DIS_USB_JTAG[0], // Set to disable usb_serial_jtag-to-jtag function
  670. NULL
  671. };
  672. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG[] = {
  673. &DIS_USB_SERIAL_JTAG[0], // Set to disable usb_serial_jtag module
  674. NULL
  675. };
  676. const esp_efuse_desc_t* ESP_EFUSE_STRAP_JTAG_SEL[] = {
  677. &STRAP_JTAG_SEL[0], // Enable selection between usb_to_jtag or pad_to_jtag through gpio10
  678. NULL
  679. };
  680. const esp_efuse_desc_t* ESP_EFUSE_USB_PHY_SEL[] = {
  681. &USB_PHY_SEL[0], // Select internal/external PHY for USB OTG and usb_serial_jtag
  682. NULL
  683. };
  684. const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[] = {
  685. &FLASH_TPUW[0], // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms
  686. NULL
  687. };
  688. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = {
  689. &DIS_DOWNLOAD_MODE[0], // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
  690. NULL
  691. };
  692. const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[] = {
  693. &DIS_LEGACY_SPI_BOOT[0], // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
  694. NULL
  695. };
  696. const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = {
  697. &UART_PRINT_CHANNEL[0], // 0: UART0. 1: UART1
  698. NULL
  699. };
  700. const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[] = {
  701. &FLASH_ECC_MODE[0], // Configures the ECC mode for SPI flash. 0:16-byte to 18-byte mode. 1:16-byte to 17-byte mode
  702. NULL
  703. };
  704. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = {
  705. &DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB
  706. NULL
  707. };
  708. const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = {
  709. &ENABLE_SECURITY_DOWNLOAD[0], // Enable security download mode
  710. NULL
  711. };
  712. const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
  713. &UART_PRINT_CONTROL[0], // b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print.
  714. NULL
  715. };
  716. const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[] = {
  717. &PIN_POWER_SELECTION[0], // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
  718. NULL
  719. };
  720. const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[] = {
  721. &FLASH_TYPE[0], // Connected Flash interface type. 0: 4 data line. 1: 8 data line
  722. NULL
  723. };
  724. const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[] = {
  725. &FLASH_PAGE_SIZE[0], // Sets the size of flash page
  726. NULL
  727. };
  728. const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[] = {
  729. &FLASH_ECC_EN[0], // Enables ECC in Flash boot mode
  730. NULL
  731. };
  732. const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
  733. &FORCE_SEND_RESUME[0], // Force ROM code to send a resume command during SPI boot
  734. NULL
  735. };
  736. const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = {
  737. &SECURE_VERSION[0], // Secure version for anti-rollback
  738. NULL
  739. };
  740. const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[] = {
  741. &MAC_FACTORY[0], // Factory MAC addr [0]
  742. &MAC_FACTORY[1], // Factory MAC addr [1]
  743. &MAC_FACTORY[2], // Factory MAC addr [2]
  744. &MAC_FACTORY[3], // Factory MAC addr [3]
  745. &MAC_FACTORY[4], // Factory MAC addr [4]
  746. &MAC_FACTORY[5], // Factory MAC addr [5]
  747. NULL
  748. };
  749. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[] = {
  750. &SPI_PAD_CONFIG_CLK[0], // SPI_PAD_configure CLK
  751. NULL
  752. };
  753. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[] = {
  754. &SPI_PAD_CONFIG_Q_D1[0], // SPI_PAD_configure Q(D1)
  755. NULL
  756. };
  757. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D_D0[] = {
  758. &SPI_PAD_CONFIG_D_D0[0], // SPI_PAD_configure D(D0)
  759. NULL
  760. };
  761. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CS[] = {
  762. &SPI_PAD_CONFIG_CS[0], // SPI_PAD_configure CS
  763. NULL
  764. };
  765. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_HD_D3[] = {
  766. &SPI_PAD_CONFIG_HD_D3[0], // SPI_PAD_configure HD(D3)
  767. NULL
  768. };
  769. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_WP_D2[] = {
  770. &SPI_PAD_CONFIG_WP_D2[0], // SPI_PAD_configure WP(D2)
  771. NULL
  772. };
  773. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_DQS[] = {
  774. &SPI_PAD_CONFIG_DQS[0], // SPI_PAD_configure DQS
  775. NULL
  776. };
  777. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[] = {
  778. &SPI_PAD_CONFIG_D4[0], // SPI_PAD_configure D4
  779. NULL
  780. };
  781. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[] = {
  782. &SPI_PAD_CONFIG_D5[0], // SPI_PAD_configure D5
  783. NULL
  784. };
  785. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[] = {
  786. &SPI_PAD_CONFIG_D6[0], // SPI_PAD_configure D6
  787. NULL
  788. };
  789. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[] = {
  790. &SPI_PAD_CONFIG_D7[0], // SPI_PAD_configure D7
  791. NULL
  792. };
  793. const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[] = {
  794. &WAFER_VERSION[0], // WAFER version 0:A
  795. NULL
  796. };
  797. const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = {
  798. &PKG_VERSION[0], // Package version
  799. NULL
  800. };
  801. const esp_efuse_desc_t* ESP_EFUSE_BLOCK1_VERSION[] = {
  802. &BLOCK1_VERSION[0], // BLOCK1 efuse version 0:No calibration 1:With calibration
  803. NULL
  804. };
  805. const esp_efuse_desc_t* ESP_EFUSE_ADC2_CAL_VOL_ATTEN3[] = {
  806. &ADC2_CAL_VOL_ATTEN3[0], // ADC2 calibration voltage at atten3
  807. NULL
  808. };
  809. const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
  810. &OPTIONAL_UNIQUE_ID[0], // Optional unique 128-bit ID
  811. NULL
  812. };
  813. const esp_efuse_desc_t* ESP_EFUSE_BLOCK2_VERSION[] = {
  814. &BLOCK2_VERSION[0], // Version of BLOCK2
  815. NULL
  816. };
  817. const esp_efuse_desc_t* ESP_EFUSE_TEMP_CALIB[] = {
  818. &TEMP_CALIB[0], // Temperature calibration data
  819. NULL
  820. };
  821. const esp_efuse_desc_t* ESP_EFUSE_OCODE[] = {
  822. &OCODE[0], // ADC OCode
  823. NULL
  824. };
  825. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0[] = {
  826. &ADC1_INIT_CODE_ATTEN0[0], // ADC1 init code at atten0
  827. NULL
  828. };
  829. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN1[] = {
  830. &ADC1_INIT_CODE_ATTEN1[0], // ADC1 init code at atten1
  831. NULL
  832. };
  833. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN2[] = {
  834. &ADC1_INIT_CODE_ATTEN2[0], // ADC1 init code at atten2
  835. NULL
  836. };
  837. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN3[] = {
  838. &ADC1_INIT_CODE_ATTEN3[0], // ADC1 init code at atten3
  839. NULL
  840. };
  841. const esp_efuse_desc_t* ESP_EFUSE_ADC2_INIT_CODE_ATTEN0[] = {
  842. &ADC2_INIT_CODE_ATTEN0[0], // ADC2 init code at atten0
  843. NULL
  844. };
  845. const esp_efuse_desc_t* ESP_EFUSE_ADC2_INIT_CODE_ATTEN1[] = {
  846. &ADC2_INIT_CODE_ATTEN1[0], // ADC2 init code at atten1
  847. NULL
  848. };
  849. const esp_efuse_desc_t* ESP_EFUSE_ADC2_INIT_CODE_ATTEN2[] = {
  850. &ADC2_INIT_CODE_ATTEN2[0], // ADC2 init code at atten2
  851. NULL
  852. };
  853. const esp_efuse_desc_t* ESP_EFUSE_ADC2_INIT_CODE_ATTEN3[] = {
  854. &ADC2_INIT_CODE_ATTEN3[0], // ADC2 init code at atten3
  855. NULL
  856. };
  857. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN0[] = {
  858. &ADC1_CAL_VOL_ATTEN0[0], // ADC1 calibration voltage at atten0
  859. NULL
  860. };
  861. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN1[] = {
  862. &ADC1_CAL_VOL_ATTEN1[0], // ADC1 calibration voltage at atten1
  863. NULL
  864. };
  865. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN2[] = {
  866. &ADC1_CAL_VOL_ATTEN2[0], // ADC1 calibration voltage at atten2
  867. NULL
  868. };
  869. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN3[] = {
  870. &ADC1_CAL_VOL_ATTEN3[0], // ADC1 calibration voltage at atten3
  871. NULL
  872. };
  873. const esp_efuse_desc_t* ESP_EFUSE_ADC2_CAL_VOL_ATTEN0[] = {
  874. &ADC2_CAL_VOL_ATTEN0[0], // ADC2 calibration voltage at atten0
  875. NULL
  876. };
  877. const esp_efuse_desc_t* ESP_EFUSE_ADC2_CAL_VOL_ATTEN1[] = {
  878. &ADC2_CAL_VOL_ATTEN1[0], // ADC2 calibration voltage at atten1
  879. NULL
  880. };
  881. const esp_efuse_desc_t* ESP_EFUSE_ADC2_CAL_VOL_ATTEN2[] = {
  882. &ADC2_CAL_VOL_ATTEN2[0], // ADC2 calibration voltage at atten2
  883. NULL
  884. };
  885. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[] = {
  886. &USER_DATA[0], // User data
  887. NULL
  888. };
  889. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[] = {
  890. &USER_DATA_MAC_CUSTOM[0], // Custom MAC
  891. NULL
  892. };
  893. const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = {
  894. &KEY0[0], // Key0 or user data
  895. NULL
  896. };
  897. const esp_efuse_desc_t* ESP_EFUSE_KEY1[] = {
  898. &KEY1[0], // Key1 or user data
  899. NULL
  900. };
  901. const esp_efuse_desc_t* ESP_EFUSE_KEY2[] = {
  902. &KEY2[0], // Key2 or user data
  903. NULL
  904. };
  905. const esp_efuse_desc_t* ESP_EFUSE_KEY3[] = {
  906. &KEY3[0], // Key3 or user data
  907. NULL
  908. };
  909. const esp_efuse_desc_t* ESP_EFUSE_KEY4[] = {
  910. &KEY4[0], // Key4 or user data
  911. NULL
  912. };
  913. const esp_efuse_desc_t* ESP_EFUSE_KEY5[] = {
  914. &KEY5[0], // Key5 or user data
  915. NULL
  916. };
  917. const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[] = {
  918. &SYS_DATA_PART2[0], // System configuration
  919. NULL
  920. };