esp_cpu.h 2.4 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #ifndef _ESP_CPU_H
  7. #define _ESP_CPU_H
  8. #include <stdint.h>
  9. #include <stdbool.h>
  10. #include <stddef.h>
  11. #include "hal/cpu_hal.h"
  12. #ifdef __cplusplus
  13. extern "C" {
  14. #endif
  15. #define ESP_WATCHPOINT_LOAD 0x40000000
  16. #define ESP_WATCHPOINT_STORE 0x80000000
  17. #define ESP_WATCHPOINT_ACCESS 0xC0000000
  18. typedef uint32_t esp_cpu_ccount_t;
  19. /** @brief Read current stack pointer address
  20. *
  21. */
  22. static inline void *esp_cpu_get_sp(void)
  23. {
  24. return cpu_hal_get_sp();
  25. }
  26. /**
  27. * @brief Stall CPU using RTC controller
  28. * @param cpu_id ID of the CPU to stall (0 = PRO, 1 = APP)
  29. */
  30. void esp_cpu_stall(int cpu_id);
  31. /**
  32. * @brief Un-stall CPU using RTC controller
  33. * @param cpu_id ID of the CPU to un-stall (0 = PRO, 1 = APP)
  34. */
  35. void esp_cpu_unstall(int cpu_id);
  36. /**
  37. * @brief Reset CPU using RTC controller
  38. * @param cpu_id ID of the CPU to reset (0 = PRO, 1 = APP)
  39. */
  40. void esp_cpu_reset(int cpu_id);
  41. /**
  42. * @brief Returns true if a JTAG debugger is attached to CPU
  43. * OCD (on chip debug) port.
  44. *
  45. * @note If "Make exception and panic handlers JTAG/OCD aware"
  46. * is disabled, this function always returns false.
  47. */
  48. bool esp_cpu_in_ocd_debug_mode(void);
  49. static inline esp_cpu_ccount_t esp_cpu_get_ccount(void)
  50. {
  51. return cpu_hal_get_cycle_count();
  52. }
  53. static inline void esp_cpu_set_ccount(esp_cpu_ccount_t val)
  54. {
  55. cpu_hal_set_cycle_count(val);
  56. }
  57. /**
  58. * @brief Set a watchpoint to break/panic when a certain memory range is accessed.
  59. *
  60. * @param no Watchpoint number. On the ESP32, this can be 0 or 1.
  61. * @param adr Base address to watch
  62. * @param size Size of the region, starting at the base address, to watch. Must
  63. * be one of 2^n, with n in [0..6].
  64. * @param flags One of ESP_WATCHPOINT_* flags
  65. *
  66. * @return ESP_ERR_INVALID_ARG on invalid arg, ESP_OK otherwise
  67. *
  68. * @warning The ESP32 watchpoint hardware watches a region of bytes by effectively
  69. * masking away the lower n bits for a region with size 2^n. If adr does
  70. * not have zero for these lower n bits, you may not be watching the
  71. * region you intended.
  72. */
  73. esp_err_t esp_cpu_set_watchpoint(int no, void *adr, int size, int flags);
  74. /**
  75. * @brief Clear a watchpoint
  76. *
  77. * @param no Watchpoint to clear
  78. *
  79. */
  80. void esp_cpu_clear_watchpoint(int no);
  81. #ifdef __cplusplus
  82. }
  83. #endif
  84. #endif // _ESP_CPU_H