test_phy_rtc.c 3.7 KB

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  1. /*
  2. Tests for the Wi-Fi
  3. */
  4. #include "string.h"
  5. #include "esp_system.h"
  6. #include "unity.h"
  7. #include "esp_log.h"
  8. #include "nvs_flash.h"
  9. #include "test_utils.h"
  10. #include "esp_phy_init.h"
  11. #include <freertos/FreeRTOS.h>
  12. #include <freertos/task.h>
  13. #include <freertos/semphr.h>
  14. #include "soc/soc_caps.h"
  15. #include "esp_private/wifi.h"
  16. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
  17. //Function just extern, need not test
  18. #if SOC_BT_SUPPORTED
  19. extern void bt_bb_init_cmplx(void);
  20. #endif
  21. extern void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu(void);
  22. extern void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu(void);
  23. //Functions in librtc.a called by WIFI or Blutooth directly in ISR
  24. #if SOC_BT_SUPPORTED
  25. extern void bt_track_pll_cap(void);
  26. #endif
  27. static const char* TAG = "test_phy_rtc";
  28. static SemaphoreHandle_t semphr_done;
  29. //Functions in libphy.a called by WIFI or Blutooth directly in ISR
  30. static void test_phy_rtc_init(void)
  31. {
  32. esp_err_t ret = nvs_flash_init();
  33. if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
  34. ESP_LOGI(TAG, "no free pages or nvs version mismatch, erase..");
  35. TEST_ESP_OK(nvs_flash_erase());
  36. ret = nvs_flash_init();
  37. }
  38. TEST_ESP_OK(ret);
  39. esp_phy_enable();
  40. //must run here, not blocking in above code
  41. TEST_ASSERT(1);
  42. nvs_flash_deinit();
  43. }
  44. static IRAM_ATTR void test_phy_rtc_cache_task(void *arg)
  45. {
  46. //power up wifi and bt mac bb power domain
  47. esp_wifi_power_domain_on();
  48. test_phy_rtc_init();
  49. #if CONFIG_IDF_TARGET_ESP32
  50. extern void force_wifi_mode(int);
  51. extern void unforce_wifi_mode(void);
  52. for (int i = 0; i < 2; i++) {
  53. ESP_LOGI(TAG, "Test force_wifi_mode(%d)...", i);
  54. spi_flash_disable_interrupts_caches_and_other_cpu();
  55. force_wifi_mode(i);
  56. spi_flash_enable_interrupts_caches_and_other_cpu();
  57. ESP_LOGI(TAG, "Test unforce_wifi_mode()...");
  58. spi_flash_disable_interrupts_caches_and_other_cpu();
  59. unforce_wifi_mode();
  60. spi_flash_enable_interrupts_caches_and_other_cpu();
  61. }
  62. #endif //CONFIG_IDF_TARGET_ESP32
  63. #if SOC_BT_SUPPORTED
  64. ESP_LOGI(TAG, "Test bt_track_pll_cap()...");
  65. spi_flash_disable_interrupts_caches_and_other_cpu();
  66. bt_track_pll_cap();
  67. spi_flash_enable_interrupts_caches_and_other_cpu();
  68. #if CONFIG_IDF_TARGET_ESP32
  69. extern void bt_bb_init_cmplx_reg(void);
  70. ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()...");
  71. spi_flash_disable_interrupts_caches_and_other_cpu();
  72. bt_bb_init_cmplx_reg();
  73. spi_flash_enable_interrupts_caches_and_other_cpu();
  74. #endif //CONFIG_IDF_TARGET_ESP32
  75. #if CONFIG_IDF_TARGET_ESP32C3
  76. extern void bt_bb_v2_init_cmplx(int print_version);
  77. ESP_LOGI(TAG, "Test bt_bb_v2_init_cmplx()...");
  78. spi_flash_disable_interrupts_caches_and_other_cpu();
  79. bt_bb_v2_init_cmplx(0);
  80. spi_flash_enable_interrupts_caches_and_other_cpu();
  81. extern void coex_pti_v2(void);
  82. ESP_LOGI(TAG, "Test coex_pti_v2()...");
  83. spi_flash_disable_interrupts_caches_and_other_cpu();
  84. coex_pti_v2();
  85. spi_flash_enable_interrupts_caches_and_other_cpu();
  86. #endif //CONFIG_IDF_TARGET_ESP32C3
  87. #endif //SOC_BT_SUPPORTED
  88. //power down wifi and bt mac bb power domain
  89. esp_wifi_power_domain_off();
  90. TEST_ASSERT( xSemaphoreGive(semphr_done) );
  91. vTaskDelete(NULL);
  92. }
  93. TEST_CASE("Test PHY/RTC functions called when cache is disabled", "[phy_rtc][cache_disabled]")
  94. {
  95. semphr_done = xSemaphoreCreateCounting(1, 0);
  96. xTaskCreatePinnedToCore(test_phy_rtc_cache_task, "phy_rtc_test_task", 3072,
  97. NULL, configMAX_PRIORITIES-1, NULL, 0);
  98. TEST_ASSERT( xSemaphoreTake(semphr_done, portMAX_DELAY) );
  99. vSemaphoreDelete(semphr_done);
  100. }
  101. #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)