Kconfig 5.7 KB

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  1. menu "Power Management"
  2. config PM_ENABLE
  3. bool "Support for power management"
  4. default n
  5. help
  6. If enabled, application is compiled with support for power management.
  7. This option has run-time overhead (increased interrupt latency,
  8. longer time to enter idle state), and it also reduces accuracy of
  9. RTOS ticks and timers used for timekeeping.
  10. Enable this option if application uses power management APIs.
  11. config PM_DFS_INIT_AUTO
  12. bool "Enable dynamic frequency scaling (DFS) at startup"
  13. depends on PM_ENABLE
  14. default n
  15. help
  16. If enabled, startup code configures dynamic frequency scaling.
  17. Max CPU frequency is set to DEFAULT_CPU_FREQ_MHZ setting,
  18. min frequency is set to XTAL frequency.
  19. If disabled, DFS will not be active until the application
  20. configures it using esp_pm_configure function.
  21. config PM_USE_RTC_TIMER_REF
  22. bool "Use RTC timer to prevent time drift (EXPERIMENTAL)"
  23. depends on (PM_ENABLE && ESP_TIMER_IMPL_FRC2 && ESP_TIME_FUNCS_USE_RTC_TIMER)
  24. default n
  25. help
  26. When APB clock frequency changes, high-resolution timer (esp_timer)
  27. scale and base value need to be adjusted. Each adjustment may cause
  28. small error, and over time such small errors may cause time drift.
  29. If this option is enabled, RTC timer will be used as a reference to
  30. compensate for the drift.
  31. It is recommended that this option is only used if 32k XTAL is selected
  32. as RTC clock source.
  33. config PM_PROFILING
  34. bool "Enable profiling counters for PM locks"
  35. depends on PM_ENABLE
  36. default n
  37. help
  38. If enabled, esp_pm_* functions will keep track of the amount of time
  39. each of the power management locks has been held, and esp_pm_dump_locks
  40. function will print this information.
  41. This feature can be used to analyze which locks are preventing the chip
  42. from going into a lower power state, and see what time the chip spends
  43. in each power saving mode. This feature does incur some run-time
  44. overhead, so should typically be disabled in production builds.
  45. config PM_TRACE
  46. bool "Enable debug tracing of PM using GPIOs"
  47. depends on PM_ENABLE
  48. default n
  49. help
  50. If enabled, some GPIOs will be used to signal events such as RTOS ticks,
  51. frequency switching, entry/exit from idle state. Refer to pm_trace.c
  52. file for the list of GPIOs.
  53. This feature is intended to be used when analyzing/debugging behavior
  54. of power management implementation, and should be kept disabled in
  55. applications.
  56. config PM_SLP_IRAM_OPT
  57. bool "Put lightsleep related codes in internal RAM"
  58. depends on FREERTOS_USE_TICKLESS_IDLE
  59. help
  60. If enabled, about 1.8KB of lightsleep related source code would be in IRAM and chip would sleep
  61. longer for 760us at most each time.
  62. This feature is intended to be used when lower power consumption is needed
  63. while there is enough place in IRAM to place source code.
  64. config PM_RTOS_IDLE_OPT
  65. bool "Put RTOS IDLE related codes in internal RAM"
  66. depends on FREERTOS_USE_TICKLESS_IDLE
  67. help
  68. If enabled, about 260B of RTOS_IDLE related source code would be in IRAM and chip would sleep
  69. longer for 40us at most each time.
  70. This feature is intended to be used when lower power consumption is needed
  71. while there is enough place in IRAM to place source code.
  72. config PM_SLP_DISABLE_GPIO
  73. bool "Disable all GPIO when chip at sleep"
  74. depends on FREERTOS_USE_TICKLESS_IDLE
  75. help
  76. This feature is intended to disable all GPIO pins at automantic sleep to get a lower power mode.
  77. If enabled, chips will disable all GPIO pins at automantic sleep to reduce about 200~300 uA current.
  78. If you want to specifically use some pins normally as chip wakes when chip sleeps,
  79. you can call 'gpio_sleep_sel_dis' to disable this feature on those pins.
  80. You can also keep this feature on and call 'gpio_sleep_set_direction' and 'gpio_sleep_set_pull_mode'
  81. to have a different GPIO configuration at sleep.
  82. Waring: If you want to enable this option on ESP32, you should enable `GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL`
  83. at first, otherwise you will not be able to switch pullup/pulldown mode.
  84. config PM_SLP_DEFAULT_PARAMS_OPT
  85. bool
  86. default n
  87. config PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
  88. bool "Power down CPU in light sleep"
  89. depends on IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
  90. select PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP if ESP32S3_DATA_CACHE_16KB
  91. default y
  92. help
  93. If enabled, the CPU will be powered down in light sleep. On esp32c3 soc, enabling this
  94. option will consume 1.68 KB of internal RAM and will reduce sleep current consumption
  95. by about 100 uA. On esp32s3 soc, enabling this option will consume 8.58 KB of internal
  96. RAM and will reduce sleep current consumption by about 650 uA.
  97. config PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP
  98. bool "Power down I/D-cache tag memory in light sleep"
  99. depends on IDF_TARGET_ESP32S3 && PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
  100. default y
  101. help
  102. If enabled, the I/D-cache tag memory will be retained in light sleep. Depending on the the
  103. cache configuration, if this option is enabled, it will consume up to 9 KB of internal RAM.
  104. endmenu # "Power Management"