esp_spi_slave_protocol.rst 8.8 KB

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  1. ESP SPI Slave HD (Half Duplex) Mode Protocol
  2. ============================================
  3. .. only:: esp32
  4. .. warning::
  5. The driver for ESP32 hasn't been developed yet.
  6. .. _esp_spi_slave_caps:
  7. SPI Slave Capabilities of Espressif chips
  8. -----------------------------------------
  9. +--------------------+-------+----------+----------+
  10. | | ESP32 | ESP32-S2 | ESP32-C3 |
  11. +====================+=======+==========+==========+
  12. | SPI Slave HD | N | Y (v2) | Y (v2) |
  13. +--------------------+-------+----------+----------+
  14. | Tohost intr | | N | N |
  15. +--------------------+-------+----------+----------+
  16. | Frhost intr | | 2 \* | 2 \* |
  17. +--------------------+-------+----------+----------+
  18. | TX DMA | | Y | Y |
  19. +--------------------+-------+----------+----------+
  20. | RX DMA | | Y | Y |
  21. +--------------------+-------+----------+----------+
  22. | Shared registers | | 72 | 64 |
  23. +--------------------+-------+----------+----------+
  24. Introduction
  25. ------------
  26. In the half duplex mode, the master has to use the protocol defined by the slave to communicate
  27. with the slave. Each transaction may consist of the following phases (list by the order they
  28. should exist):
  29. - Command: 8-bit, master to slave
  30. This phase determines the rest phases of the transactions. See :ref:`spi_slave_hd_supported_cmds`.
  31. - Address: 8-bit, master to slave, optional
  32. For some commands (WRBUF, RDBUF), this phase specifies the address of shared buffer to write
  33. to/read from. For other commands with this phase, they are meaningless, but still have to
  34. exist in the transaction.
  35. - Dummy: 8-bit, floating, optional
  36. This phase is the turn around time between the master and the slave on the bus, and also
  37. provides enough time for the slave to prepare the data to send to master.
  38. - Data: variable length, the direction is also determined by the command.
  39. This may be a data OUT phase, in which the direction is slave to master, or a data IN phase,
  40. in which the direction is master to slave.
  41. The *direction* means which side (master or slave) controls the MOSI, MISO, WP and HD pins.
  42. Data IO Modes
  43. -------------
  44. In some IO modes, more data wires can be use to send the data. As a result, the SPI clock cycles
  45. required for the same amount of data will be less than in 1-bit mode. For example, in QIO mode,
  46. address and data (IN and OUT) should be sent on all 4 data wires (MOSI, MISO, WP, and HD). Here's
  47. the modes supported by ESP32-S2 SPI slave and the wire number used in corresponding modes.
  48. +-------+------------+------------+--------------+---------+
  49. | Mode | command WN | address WN | dummy cycles | data WN |
  50. +=======+============+============+==============+=========+
  51. | 1-bit | 1 | 1 | 1 | 1 |
  52. +-------+------------+------------+--------------+---------+
  53. | DOUT | 1 | 1 | 4 | 2 |
  54. +-------+------------+------------+--------------+---------+
  55. | DIO | 1 | 2 | 4 | 2 |
  56. +-------+------------+------------+--------------+---------+
  57. | QOUT | 1 | 1 | 4 | 4 |
  58. +-------+------------+------------+--------------+---------+
  59. | QIO | 1 | 4 | 4 | 4 |
  60. +-------+------------+------------+--------------+---------+
  61. | QPI | 4 | 4 | 4 | 4 |
  62. +-------+------------+------------+--------------+---------+
  63. Normally, which mode is used is determined is determined by the command sent by the master (See
  64. :ref:`spi_slave_hd_supported_cmds`), except from the QPI mode.
  65. QPI Mode
  66. ^^^^^^^^
  67. The QPI mode is a special state of the SPI Slave. The master can send ENQPI command to put the
  68. slave into the QPI mode state. In the QPI mode, the command is also sent in 4-bit, thus it's not
  69. compatible with the normal modes. The master should only send QPI commands when the slave is in
  70. the QPI mode. To exit form the QPI mode, master can send EXQPI command.
  71. .. _spi_slave_hd_supported_cmds:
  72. Supported Commands
  73. ------------------
  74. .. note::
  75. The command name are in a master-oriented direction. For example, WRBUF means master writes
  76. the buffer of slave.
  77. +----------+---------------------+---------+----------+----------------------------------------------------------+
  78. | Name | Description | Command | Address | Data |
  79. +==========+=====================+=========+==========+==========================================================+
  80. | WRBUF | Write buffer | 0x01 | Buf addr | master to slave, no longer than buffer size |
  81. +----------+---------------------+---------+----------+----------------------------------------------------------+
  82. | RDBUF | Read buffer | 0x02 | Buf addr | slave to master, no longer than buffer size |
  83. +----------+---------------------+---------+----------+----------------------------------------------------------+
  84. | WRDMA | Write DMA | 0x03 | 8 bits | master to slave, no longer than length provided by slave |
  85. +----------+---------------------+---------+----------+----------------------------------------------------------+
  86. | RDDMA | Read DMA | 0x04 | 8 bits | slave to master, no longer than length provided by slave |
  87. +----------+---------------------+---------+----------+----------------------------------------------------------+
  88. | SEG_DONE | Segments done | 0x05 | - | - |
  89. +----------+---------------------+---------+----------+----------------------------------------------------------+
  90. | ENQPI | Enter QPI mode | 0x06 | - | - |
  91. +----------+---------------------+---------+----------+----------------------------------------------------------+
  92. | WR_DONE | Write segments done | 0x07 | - | - |
  93. +----------+---------------------+---------+----------+----------------------------------------------------------+
  94. | CMD8 | Interrupt | 0x08 | - | - |
  95. +----------+---------------------+---------+----------+----------------------------------------------------------+
  96. | CMD9 | Interrupt | 0x09 | - | - |
  97. +----------+---------------------+---------+----------+----------------------------------------------------------+
  98. | CMDA | Interrupt | 0x0A | - | - |
  99. +----------+---------------------+---------+----------+----------------------------------------------------------+
  100. | EXQPI | Exit QPI mode | 0xDD | - | - |
  101. +----------+---------------------+---------+----------+----------------------------------------------------------+
  102. Moreover, WRBUF, RDBUF, WRDMA, RDDMA commands have their 2-bit and 4-bit version. To do
  103. transactions in 2-bit or 4-bit mode, send the original command ORed by the corresponding command
  104. mask below. For example, command 0xA1 means WRBUF in QIO mode.
  105. +-------+------+
  106. | Mode | Mask |
  107. +=======+======+
  108. | 1-bit | 0x00 |
  109. +-------+------+
  110. | DOUT | 0x10 |
  111. +-------+------+
  112. | DIO | 0x50 |
  113. +-------+------+
  114. | QOUT | 0x20 |
  115. +-------+------+
  116. | QIO | 0xA0 |
  117. +-------+------+
  118. | QPI | 0xA0 |
  119. +-------+------+
  120. Segment Transaction Mode
  121. ------------------------
  122. Segment transaction mode is the only mode supported by the SPI Slave HD driver for now. In this
  123. mode, for a transaction the slave load onto the DMA, the master is allowed to read or write in
  124. segments. This way the master doesn't have to prepare large buffer as the size of data provided
  125. by the slave. After the master finish reading/writing a buffer, it has to send corresponding
  126. termination command to the slave as a synchronization signal. The slave driver will update new
  127. data (if exist) onto the DMA upon seeing the termination command.
  128. The termination command is WR_DONE (0x07) for the WRDMA, and CMD8 (0x08) for the RDDMA.
  129. Here's an example for the flow the master read data from the slave DMA:
  130. 1. The slave loads 4092 bytes of data onto the RDDMA
  131. 2. The master do seven RDDMA transactions, each of them are 512 bytes long, and reads the first
  132. 3584 bytes from the slave
  133. 3. The master do the last RDDMA transaction of 512 bytes (equal, longer or shorter than the total
  134. length loaded by the slave are all allowed). The first 508 bytes are valid data from the
  135. slave, while the last 4 bytes are meaningless bytes.
  136. 4. The master sends CMD8 to the slave
  137. 5. The slave loads another 4092 bytes of data onto the RDDMA
  138. 6. The master can start new reading transactions after it sends the CMD8