chip-series-comparison.rst 7.1 KB

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  1. ***********************
  2. Chip Series Comparison
  3. ***********************
  4. :link_to_translation:`zh_CN:[中文]`
  5. The comparison below covers key features of chips supported by ESP-IDF. For the full list of features please refer to respective datasheets in Section `Related Documents`_.
  6. .. list-table:: Chip Series Comparison
  7. :widths: 20 40 40 40
  8. :header-rows: 1
  9. * - Feature
  10. - ESP32 Series
  11. - ESP32-S2 Series
  12. - ESP32-C3 Series
  13. * - Launch year
  14. - 2016
  15. - 2020
  16. - 2020
  17. * - Variants
  18. - See `ESP32 Datasheet (PDF) <https://espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf>`_
  19. - See `ESP32-S2 Datasheet (PDF) <https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf>`_
  20. - See `ESP32-C3 Datasheet (PDF) <https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf>`_
  21. * - Core
  22. - Xtensa® dual-core 32-bit LX6 with 600 MIPS (in total); 200 MIPS for ESP32-U4WDH/ESP32-S0WD (single-core variants); 400 MIPS for ESP32-D2WD
  23. - Xtensa® single-core 32-bit LX7 with 300 MIPS
  24. - 32-bit single-core RISC-V
  25. * - Wi-Fi protocols
  26. - 802.11 b/g/n, 2.4 GHz
  27. - 802.11 b/g/n, 2.4 GHz
  28. - 802.11 b/g/n, 2.4 GHz
  29. * - Bluetooth®
  30. - Bluetooth v4.2 BR/EDR and Bluetooth Low Energy
  31. - ✖️
  32. - Bluetooth 5.0
  33. * - Typical frequency
  34. - 240 MHz (160 MHz for ESP32-S0WD, ESP32-D2WD, and ESP32-U4WDH)
  35. - 240 MHz
  36. - 160 MHz
  37. * - SRAM
  38. - 520 KB
  39. - 320 KB
  40. - 400 KB
  41. * - ROM
  42. - 448 KB for booting and core functions
  43. - 128 KB for booting and core functions
  44. - 384 KB for booting and core functions
  45. * - Embedded flash
  46. - 2 MB, 4 MB, or none, depending on variants
  47. - 2 MB, 4 MB, or none, depending on variants
  48. - 4 MB or none, depending on variants
  49. * - External flash
  50. - Up to 16 MB device, address 11 MB + 248 KB each time
  51. - Up to 1 GB device, address 11.5 MB each time
  52. - Up to 16 MB device, address 8 MB each time
  53. * - External RAM
  54. - Up to 8 MB device, address 4 MB each time
  55. - Up to 1 GB device, address 11.5 MB each time
  56. - ✖️
  57. * - Cache
  58. - ✔️ Two-way set associative
  59. - ✔️ Four-way set associative, independent instruction cache and data cache
  60. - ✔️ Eight-way set associative, 32-bit data/instruction bus width
  61. * - **Peripherals**
  62. -
  63. -
  64. -
  65. * - ADC
  66. - Two 12-bit, 18 channels
  67. - Two 13-bit, 20 channels
  68. - Two 12-bit SAR ADCs, at most 6 channels
  69. * - DAC
  70. - Two 8-bit channels
  71. - Two 8-bit channels
  72. - ✖️
  73. * - Timers
  74. - Four 64-bit general-purpose timers, and three watchdog timers
  75. - Four 64-bit general-purpose timers, and three watchdog timers
  76. - Two 54-bit general-purpose timers, and three watchdog timers
  77. * - Temperature sensor
  78. - ✖️
  79. - 1
  80. - 1
  81. * - Touch sensor
  82. - 10
  83. - 14
  84. - ✖️
  85. * - Hall sensor
  86. - 1
  87. - ✖️
  88. - ✖️
  89. * - GPIO
  90. - 34
  91. - 43
  92. - 22
  93. * - SPI
  94. - 4
  95. - 4 with more modes, compared with ESP32
  96. - 3
  97. * - LCD interface
  98. - 1
  99. - 1
  100. - ✖️
  101. * - UART
  102. - 3
  103. - 2 :sup:`1`
  104. - 2 :sup:`1`
  105. * - I2C
  106. - 2
  107. - 2
  108. - 1
  109. * - I2S
  110. - 2, can be configured to operate with 8/16/32/40/48-bit resolution as an input or output channel.
  111. - 1, can be configured to operate with 8/16/24/32/48/64-bit resolution as an input or output channel.
  112. - 1, can be configured to operate with 8/16/24/32-bit resolution as an input or output channel.
  113. * - Camera interface
  114. - 1
  115. - 1
  116. - ✖️
  117. * - DMA
  118. - Dedicated DMA to UART, SPI, I2S, SDIO slave, SD/MMC host, EMAC, BT, and Wi-Fi
  119. - Dedicated DMA to UART, SPI, AES, SHA, I2S, and ADC Controller
  120. - General-purpose, 3 TX channels, 3 RX channels
  121. * - RMT
  122. - 8 channels
  123. - 4 channels :sup:`1`, can be configured to TX/RX channels
  124. - 4 channels :sup:`2`, 2 TX channels, 2 RX channels
  125. * - Pulse counter
  126. - 8 channels
  127. - 4 channels :sup:`1`
  128. - ✖️
  129. * - LED PWM
  130. - 16 channels
  131. - 8 channels :sup:`1`
  132. - 6 channels :sup:`2`
  133. * - MCPWM
  134. - 2, six PWM outputs
  135. - ✖️
  136. - ✖️
  137. * - USB OTG
  138. - ✖️
  139. - 1
  140. - ✖️
  141. * - TWAI® controller (compatible with ISO 11898-1)
  142. - 1
  143. - 1
  144. - 1
  145. * - SD/SDIO/MMC host controller
  146. - 1
  147. - ✖️
  148. - ✖️
  149. * - SDIO slave controller
  150. - 1
  151. - ✖️
  152. - ✖️
  153. * - Ethernet MAC
  154. - 1
  155. - ✖️
  156. - ✖️
  157. * - ULP
  158. - ULP FSM
  159. - PicoRV32 core with 8 KB SRAM, ULP FSM with more instructions
  160. - ✖️
  161. * - Debug Assist
  162. - ✖️
  163. - ✖️
  164. - 1
  165. * - **Security**
  166. -
  167. -
  168. -
  169. * - Secure boot
  170. - ✔️
  171. - ✔️ Faster and safer, compared with ESP32
  172. - ✔️ Faster and safer, compared with ESP32
  173. * - Flash encryption
  174. - ✔️
  175. - ✔️ Support for PSRAM encryption. Safer, compared with ESP32
  176. - ✔️ Safer, compared with ESP32
  177. * - OTP
  178. - 1024-bit
  179. - 4096-bit
  180. - 4096-bit
  181. * - AES
  182. - ✔️ AES-128, AES-192, AES-256 (FIPS PUB 197)
  183. - ✔️ AES-128, AES-192, AES-256 (FIPS PUB 197)
  184. - ✔️ AES-128, AES-256 (FIPS PUB 197)
  185. * - HASH
  186. - SHA-1, SHA-256, SHA-384, SHA-512 (FIPS PUB 180-4)
  187. - SHA-1, SHA-224, SHA-256, SHA-384, SHA-512, SHA-512/224, SHA-512/256, SHA-512/t (FIPS PUB 180-4); DMA support
  188. - SHA-1, SHA-224, SHA-256 (FIPS PUB 180-4)
  189. * - RSA
  190. - Up to 4096 bits
  191. - Up to 4096 bits, improved acceleration options compared with ESP32
  192. - Up to 3072 bits
  193. * - RNG
  194. - ✔️
  195. - ✔️
  196. - ✔️
  197. * - HMAC
  198. - ✖️
  199. - ✔️
  200. - ✔️
  201. * - Digital signature
  202. - ✖️
  203. - ✔️
  204. - ✔️
  205. * - XTS
  206. - ✖️
  207. - ✔️ XTS-AES-128, XTS-AES-256
  208. - ✔️ XTS-AES-128
  209. * - **Other**
  210. -
  211. -
  212. -
  213. * - Deep-sleep (ULP sensor-monitored pattern)
  214. - 100 μA (when ADC work with a duty cycle of 1%)
  215. - 22 μA (when touch sensors work with a duty cycle of 1%)
  216. - No such pattern
  217. * - Size
  218. - QFN48 5*5, 6*6, depending on variants
  219. - QFN56 7*7
  220. - QFN32 5*5
  221. **Note** 1: Reduced chip area compared with ESP32
  222. **Note** 2: Reduced chip area compared with ESP32 and ESP32-S2
  223. **Note** 3: Die size: ESP32-C3 < ESP32-S2 < ESP32
  224. Related Documents
  225. =================
  226. - `ESP32 Datasheet (PDF) <https://espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf>`_
  227. - ESP32-PICO Datasheets (PDF)
  228. - `ESP32-PICO-D4 <https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf>`_
  229. - `ESP32-PICO-V3 <https://www.espressif.com/sites/default/files/documentation/esp32-pico-v3_datasheet_en.pdf>`_
  230. - `ESP32-PICO-V3-02 <https://www.espressif.com/sites/default/files/documentation/esp32-pico-v3-02_datasheet_en.pdf>`_
  231. - `ESP32-S2 Datasheet (PDF) <https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf>`_
  232. - `ESP32-C3 Datasheet (PDF) <https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf>`_
  233. - `ESP Product Selector <http://products.espressif.com:8000/#/>`_