ccomp_timer_test_data.c 4.7 KB

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  1. #include <stdlib.h>
  2. #include <stdint.h>
  3. #include "esp_timer.h"
  4. #include "esp_log.h"
  5. #include "esp_attr.h"
  6. #include "ccomp_timer.h"
  7. #include "freertos/FreeRTOS.h"
  8. #include "freertos/task.h"
  9. #if CONFIG_IDF_TARGET_ESP32
  10. #include "esp32/clk.h"
  11. #elif CONFIG_IDF_TARGET_ESP32S2
  12. #include "esp32s2/clk.h"
  13. #elif CONFIG_IDF_TARTGET_ESP32S3
  14. #include "esp32s3/clk.h"
  15. #elif CONFIG_IDF_TARGET_ESP32C3
  16. #include "esp32c3/clk.h"
  17. #endif
  18. #include "unity.h"
  19. #include "sdkconfig.h"
  20. /* No performance monitor in RISCV for now
  21. */
  22. #if !DISABLED_FOR_TARGETS(ESP32C3)
  23. static const char* TAG = "test_ccomp_timer";
  24. #if CONFIG_IDF_TARGET_ESP32
  25. #define CACHE_WAYS 2
  26. #define CACHE_LINE_SIZE 32
  27. #define CACHE_SIZE (1 << 15)
  28. // Only test half due to lack of memory
  29. #define TEST_SIZE (CACHE_SIZE / 2)
  30. #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
  31. // Default cache configuration - no override specified on
  32. // test_utils config
  33. #define CACHE_WAYS 8
  34. #define CACHE_LINE_SIZE 32
  35. #define CACHE_SIZE (1 << 13)
  36. #define TEST_SIZE (CACHE_SIZE)
  37. #elif CONFIG_IDF_TARGET_ESP32C3
  38. #define CACHE_WAYS 8
  39. #define CACHE_LINE_SIZE 32
  40. #define CACHE_SIZE (1 << 14)
  41. #define TEST_SIZE (CACHE_SIZE)
  42. #endif
  43. typedef struct {
  44. uint8_t **accesses;
  45. size_t len;
  46. } ccomp_test_access_t;
  47. typedef struct {
  48. int64_t wall;
  49. int64_t ccomp;
  50. } ccomp_test_time_t;
  51. #if CONFIG_ESP32_SPIRAM_SUPPORT
  52. static uint8_t *flash_mem;
  53. #else
  54. static const uint8_t flash_mem[2 * CACHE_SIZE] = {0};
  55. #endif
  56. static IRAM_ATTR void perform_accesses(ccomp_test_access_t *access)
  57. {
  58. volatile int a = 0;
  59. for (int i = 0; i < access->len; i++) {
  60. a += (int)(*(access->accesses[i]));
  61. }
  62. }
  63. static void prepare_cache(const uint8_t *to_cache)
  64. {
  65. volatile int a = 0;
  66. for (int i = 0; i < CACHE_SIZE; i++) {
  67. a += to_cache[i];
  68. }
  69. }
  70. static void prepare_access_pattern(int hit_rate, const uint8_t *cached, ccomp_test_access_t *out)
  71. {
  72. assert(hit_rate <= 100);
  73. assert(hit_rate >= 0);
  74. int misses = (100 - hit_rate) * CACHE_LINE_SIZE;
  75. int hits = hit_rate * CACHE_LINE_SIZE;
  76. uint8_t **accesses = calloc(TEST_SIZE, sizeof(uint8_t *));
  77. for (int i = 0, h = 0, i_h = 1, m = -1, i_m = 0; i < TEST_SIZE; i++, h += i_h, m += i_m) {
  78. if (i_m) {
  79. accesses[i] = (uint8_t*) (cached + CACHE_SIZE + i);
  80. }
  81. else {
  82. accesses[i] = (uint8_t*) (cached + i);
  83. }
  84. if (h >= hits) {
  85. h = -1;
  86. i_h = 0;
  87. m = 0;
  88. i_m = 1;
  89. }
  90. if (m >= misses) {
  91. m = -1;
  92. i_m = 0;
  93. h = 0;
  94. i_h = 1;
  95. }
  96. }
  97. out->accesses = accesses;
  98. out->len = TEST_SIZE;
  99. }
  100. static ccomp_test_time_t perform_test_at_hit_rate(int hit_rate, const uint8_t *mem)
  101. {
  102. ccomp_test_access_t access;
  103. prepare_access_pattern(hit_rate, mem, &access);
  104. prepare_cache(mem);
  105. int64_t start = esp_timer_get_time();
  106. ccomp_timer_start();
  107. perform_accesses(&access);
  108. ccomp_test_time_t t = {
  109. .ccomp = ccomp_timer_stop(),
  110. .wall = esp_timer_get_time() - start
  111. };
  112. free(access.accesses);
  113. return t;
  114. }
  115. static ccomp_test_time_t ccomp_test_ref_time(void)
  116. {
  117. #if CONFIG_ESP32_SPIRAM_SUPPORT
  118. uint8_t *mem = heap_caps_malloc(2 * CACHE_SIZE, MALLOC_CAP_INTERNAL | MALLOC_CAP_DEFAULT);
  119. #else
  120. uint8_t *mem = heap_caps_malloc(sizeof(flash_mem), MALLOC_CAP_INTERNAL | MALLOC_CAP_DEFAULT);
  121. #endif
  122. ccomp_test_time_t t = perform_test_at_hit_rate(0, mem);
  123. free(mem);
  124. return t;
  125. }
  126. TEST_CASE("data cache hit rate sweep", "[test_utils][ccomp_timer]")
  127. {
  128. ccomp_test_time_t t_ref;
  129. ccomp_test_time_t t_hr;
  130. #if CONFIG_ESP32_SPIRAM_SUPPORT
  131. flash_mem = heap_caps_malloc(2 * CACHE_SIZE, MALLOC_CAP_8BIT | MALLOC_CAP_SPIRAM);
  132. #endif
  133. // Perform accesses on RAM. The time recorded here serves as
  134. // reference.
  135. t_ref = ccomp_test_ref_time();
  136. ESP_LOGI(TAG, "Reference Time(us): %lld", (long long)t_ref.ccomp);
  137. // Measure time at particular hit rates
  138. for (int i = 0; i <= 100; i += 5)
  139. {
  140. t_hr = perform_test_at_hit_rate(i, flash_mem);
  141. float error = (abs(t_ref.ccomp - t_hr.ccomp) / (float)t_ref.ccomp) * 100.0f;
  142. ESP_LOGI(TAG, "Hit Rate(%%): %d Wall Time(us): %lld Compensated Time(us): %lld Error(%%): %f", i, (long long)t_hr.wall, (long long)t_hr.ccomp, error);
  143. // Check if the measured time is at least within some percent of the
  144. // reference.
  145. TEST_ASSERT(error <= 5.0f);
  146. }
  147. #if CONFIG_ESP32_SPIRAM_SUPPORT
  148. free(flash_mem);
  149. #endif
  150. }
  151. #endif // !DISABLED_FOR_TARGETS(ESP32C3)