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@@ -8,39 +8,39 @@
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#include "mbutils.h"
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/* -----------------------Slave Defines -------------------------------------*/
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-#define S_DISCRETE_INPUT_START 0
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-#define S_DISCRETE_INPUT_NDISCRETES 16
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-#define S_COIL_START 0
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-#define S_COIL_NCOILS 64
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-#define S_REG_INPUT_START 0
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-#define S_REG_INPUT_NREGS 100
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-#define S_REG_HOLDING_START 0
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-#define S_REG_HOLDING_NREGS 100
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+#define S_DISCRETE_INPUT_START RT_S_DISCRETE_INPUT_START
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+#define S_DISCRETE_INPUT_NDISCRETES RT_S_DISCRETE_INPUT_NDISCRETES
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+#define S_COIL_START RT_S_COIL_START
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+#define S_COIL_NCOILS RT_S_COIL_NCOILS
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+#define S_REG_INPUT_START RT_S_REG_INPUT_START
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+#define S_REG_INPUT_NREGS RT_S_REG_INPUT_NREGS
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+#define S_REG_HOLDING_START RT_S_REG_HOLDING_START
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+#define S_REG_HOLDING_NREGS RT_S_REG_HOLDING_NREGS
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/* salve mode: holding register's all address */
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-#define S_HD_RESERVE 0
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+#define S_HD_RESERVE RT_S_HD_RESERVE
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/* salve mode: input register's all address */
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-#define S_IN_RESERVE 0
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+#define S_IN_RESERVE RT_S_IN_RESERVE
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/* salve mode: coil's all address */
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-#define S_CO_RESERVE 0
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+#define S_CO_RESERVE RT_S_CO_RESERVE
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/* salve mode: discrete's all address */
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-#define S_DI_RESERVE 0
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+#define S_DI_RESERVE RT_S_DI_RESERVE
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/* -----------------------Master Defines -------------------------------------*/
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-#define M_DISCRETE_INPUT_START 0
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-#define M_DISCRETE_INPUT_NDISCRETES 16
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-#define M_COIL_START 0
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-#define M_COIL_NCOILS 64
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-#define M_REG_INPUT_START 0
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-#define M_REG_INPUT_NREGS 100
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-#define M_REG_HOLDING_START 0
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-#define M_REG_HOLDING_NREGS 100
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+#define M_DISCRETE_INPUT_START RT_M_DISCRETE_INPUT_START
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+#define M_DISCRETE_INPUT_NDISCRETES RT_M_DISCRETE_INPUT_NDISCRETES
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+#define M_COIL_START RT_M_COIL_START
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+#define M_COIL_NCOILS RT_M_COIL_NCOILS
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+#define M_REG_INPUT_START RT_M_REG_INPUT_START
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+#define M_REG_INPUT_NREGS RT_M_REG_INPUT_NREGS
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+#define M_REG_HOLDING_START RT_M_REG_HOLDING_START
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+#define M_REG_HOLDING_NREGS RT_M_REG_HOLDING_NREGS
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/* master mode: holding register's all address */
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-#define M_HD_RESERVE 0
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+#define M_HD_RESERVE RT_M_HD_RESERVE
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/* master mode: input register's all address */
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-#define M_IN_RESERVE 0
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+#define M_IN_RESERVE RT_M_IN_RESERVE
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/* master mode: coil's all address */
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-#define M_CO_RESERVE 0
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+#define M_CO_RESERVE RT_M_CO_RESERVE
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/* master mode: discrete's all address */
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-#define M_DI_RESERVE 0
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+#define M_DI_RESERVE RT_M_DI_RESERVE
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#endif
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