uart.h 13 KB

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  1. /* Copyright 2018 Canaan Inc.
  2. *
  3. * Licensed under the Apache License, Version 2.0 (the "License");
  4. * you may not use this file except in compliance with the License.
  5. * You may obtain a copy of the License at
  6. *
  7. * http://www.apache.org/licenses/LICENSE-2.0
  8. *
  9. * Unless required by applicable law or agreed to in writing, software
  10. * distributed under the License is distributed on an "AS IS" BASIS,
  11. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. * See the License for the specific language governing permissions and
  13. * limitations under the License.
  14. */
  15. /**
  16. * @file
  17. * @brief Universal Asynchronous Receiver/Transmitter (UART)
  18. *
  19. * The UART peripheral supports the following features:
  20. *
  21. * - 8-N-1 and 8-N-2 formats: 8 data bits, no parity bit, 1 start
  22. * bit, 1 or 2 stop bits
  23. *
  24. * - 8-entry transmit and receive FIFO buffers with programmable
  25. * watermark interrupts
  26. *
  27. * - 16× Rx oversampling with 2/3 majority voting per bit
  28. *
  29. * The UART peripheral does not support hardware flow control or
  30. * other modem control signals, or synchronous serial data
  31. * tranfesrs.
  32. *
  33. *
  34. */
  35. #ifndef _DRIVER_APBUART_H
  36. #define _DRIVER_APBUART_H
  37. #include <stdint.h>
  38. #include "dmac.h"
  39. #include "platform.h"
  40. #include "plic.h"
  41. #ifdef __cplusplus
  42. extern "C" {
  43. #endif
  44. typedef enum _uart_dev
  45. {
  46. UART_DEV1 = 0,
  47. UART_DEV2,
  48. UART_DEV3,
  49. } uart_dev_t;
  50. typedef struct _uart
  51. {
  52. union
  53. {
  54. volatile uint32_t RBR;
  55. volatile uint32_t DLL;
  56. volatile uint32_t THR;
  57. };
  58. union
  59. {
  60. volatile uint32_t DLH;
  61. volatile uint32_t IER;
  62. };
  63. union
  64. {
  65. volatile uint32_t FCR;
  66. volatile uint32_t IIR;
  67. };
  68. volatile uint32_t LCR;
  69. volatile uint32_t MCR;
  70. volatile uint32_t LSR;
  71. volatile uint32_t MSR;
  72. volatile uint32_t SCR;
  73. volatile uint32_t LPDLL;
  74. volatile uint32_t LPDLH;
  75. volatile uint32_t reserved1[2];
  76. union
  77. {
  78. volatile uint32_t SRBR[16];
  79. volatile uint32_t STHR[16];
  80. };
  81. volatile uint32_t FAR;
  82. volatile uint32_t TFR;
  83. volatile uint32_t RFW;
  84. volatile uint32_t USR;
  85. volatile uint32_t TFL;
  86. volatile uint32_t RFL;
  87. volatile uint32_t SRR;
  88. volatile uint32_t SRTS;
  89. volatile uint32_t SBCR;
  90. volatile uint32_t SDMAM;
  91. volatile uint32_t SFE;
  92. volatile uint32_t SRT;
  93. volatile uint32_t STET;
  94. volatile uint32_t HTX;
  95. volatile uint32_t DMASA;
  96. volatile uint32_t TCR;
  97. volatile uint32_t DE_EN;
  98. volatile uint32_t RE_EN;
  99. volatile uint32_t DET;
  100. volatile uint32_t TAT;
  101. volatile uint32_t DLF;
  102. volatile uint32_t RAR;
  103. volatile uint32_t TAR;
  104. volatile uint32_t LCR_EXT;
  105. volatile uint32_t reserved2[9];
  106. volatile uint32_t CPR;
  107. volatile uint32_t UCV;
  108. volatile uint32_t CTR;
  109. } uart_t;
  110. typedef enum _uart_device_number
  111. {
  112. UART_DEVICE_1,
  113. UART_DEVICE_2,
  114. UART_DEVICE_3,
  115. UART_DEVICE_MAX,
  116. } uart_device_number_t;
  117. typedef enum _uart_bitwidth
  118. {
  119. UART_BITWIDTH_5BIT = 5,
  120. UART_BITWIDTH_6BIT,
  121. UART_BITWIDTH_7BIT,
  122. UART_BITWIDTH_8BIT,
  123. } uart_bitwidth_t;
  124. typedef enum _uart_stopbit
  125. {
  126. UART_STOP_1,
  127. UART_STOP_1_5,
  128. UART_STOP_2
  129. } uart_stopbit_t;
  130. typedef enum _uart_rede_sel
  131. {
  132. DISABLE = 0,
  133. ENABLE,
  134. } uart_rede_sel_t;
  135. typedef enum _uart_parity
  136. {
  137. UART_PARITY_NONE,
  138. UART_PARITY_ODD,
  139. UART_PARITY_EVEN
  140. } uart_parity_t;
  141. typedef enum _uart_interrupt_mode
  142. {
  143. UART_SEND = 1,
  144. UART_RECEIVE = 2,
  145. } uart_interrupt_mode_t;
  146. typedef enum _uart_send_trigger
  147. {
  148. UART_SEND_FIFO_0,
  149. UART_SEND_FIFO_2,
  150. UART_SEND_FIFO_4,
  151. UART_SEND_FIFO_8,
  152. } uart_send_trigger_t;
  153. typedef enum _uart_receive_trigger
  154. {
  155. UART_RECEIVE_FIFO_1,
  156. UART_RECEIVE_FIFO_4,
  157. UART_RECEIVE_FIFO_8,
  158. UART_RECEIVE_FIFO_14,
  159. } uart_receive_trigger_t;
  160. typedef struct _uart_data_t
  161. {
  162. dmac_channel_number_t tx_channel;
  163. dmac_channel_number_t rx_channel;
  164. uint32_t *tx_buf;
  165. size_t tx_len;
  166. uint32_t *rx_buf;
  167. size_t rx_len;
  168. uart_interrupt_mode_t transfer_mode;
  169. } uart_data_t;
  170. typedef struct _uart_tcr
  171. {
  172. uint32_t rs485_en : 1;
  173. uint32_t re_pol : 1;
  174. uint32_t de_pol : 1;
  175. uint32_t xfer_mode : 2;
  176. uint32_t reserve : 27;
  177. } uart_tcr_t;
  178. typedef enum _uart_work_mode
  179. {
  180. UART_NORMAL,
  181. UART_IRDA,
  182. UART_RS485_FULL_DUPLEX,
  183. UART_RS485_HALF_DUPLEX,
  184. } uart_work_mode_t;
  185. typedef enum _uart_rs485_rede
  186. {
  187. UART_RS485_DE,
  188. UART_RS485_RE,
  189. UART_RS485_REDE,
  190. } uart_rs485_rede_t;
  191. typedef enum _uart_polarity
  192. {
  193. UART_LOW,
  194. UART_HIGH,
  195. } uart_polarity_t;
  196. typedef enum _uart_det_mode
  197. {
  198. UART_DE_ASSERTION,
  199. UART_DE_DE_ASSERTION,
  200. UART_DE_ALL,
  201. } uart_det_mode_t;
  202. typedef struct _uart_det
  203. {
  204. uint32_t de_assertion_time : 8;
  205. uint32_t reserve0 : 8;
  206. uint32_t de_de_assertion_time : 8;
  207. uint32_t reserve1 : 8;
  208. } uart_det_t;
  209. typedef enum _uart_tat_mode
  210. {
  211. UART_DE_TO_RE,
  212. UART_RE_TO_DE,
  213. UART_TAT_ALL,
  214. } uart_tat_mode_t;
  215. typedef struct _uart_tat
  216. {
  217. uint32_t de_to_re : 16;
  218. uint32_t re_to_de : 16;
  219. } uart_tat_t;
  220. /**
  221. * @brief Send data from uart
  222. *
  223. * @param[in] channel Uart index
  224. * @param[in] buffer The data be transfer
  225. * @param[in] len The data length
  226. *
  227. * @return Transfer length
  228. */
  229. int uart_send_data(uart_device_number_t channel, const char *buffer, size_t buf_len);
  230. /**
  231. * @brief Read data from uart
  232. *
  233. * @param[in] channel Uart index
  234. * @param[in] buffer The Data received
  235. * @param[in] len Receive length
  236. *
  237. * @return Receive length
  238. */
  239. int uart_receive_data(uart_device_number_t channel, char *buffer, size_t buf_len);
  240. /**
  241. * @brief Init uart
  242. *
  243. * @param[in] channel Uart index
  244. *
  245. */
  246. void uart_init(uart_device_number_t channel);
  247. /**
  248. * @brief Set uart param
  249. *
  250. * @param[in] channel Uart index
  251. * @param[in] baud_rate Baudrate
  252. * @param[in] data_width Data width
  253. * @param[in] stopbit Stop bit
  254. * @param[in] parity Odd Even parity
  255. *
  256. */
  257. void uart_config(uart_device_number_t channel, uint32_t baud_rate, uart_bitwidth_t data_width, uart_stopbit_t stopbit, uart_parity_t parity);
  258. /**
  259. * @brief Set uart param
  260. *
  261. * @param[in] channel Uart index
  262. * @param[in] baud_rate Baudrate
  263. * @param[in] data_width Data width
  264. * @param[in] stopbit Stop bit
  265. * @param[in] parity Odd Even parity
  266. *
  267. */
  268. void uart_configure(uart_device_number_t channel, uint32_t baud_rate, uart_bitwidth_t data_width, uart_stopbit_t stopbit, uart_parity_t parity);
  269. /**
  270. * @brief Register uart interrupt
  271. *
  272. * @param[in] channel Uart index
  273. * @param[in] interrupt_mode Interrupt Mode receive or send
  274. * @param[in] uart_callback Call back
  275. * @param[in] ctx Param of call back
  276. * @param[in] priority Interrupt priority
  277. *
  278. */
  279. void uart_irq_register(uart_device_number_t channel, uart_interrupt_mode_t interrupt_mode, plic_irq_callback_t uart_callback, void *ctx, uint32_t priority);
  280. /**
  281. * @brief Deregister uart interrupt
  282. *
  283. * @param[in] channel Uart index
  284. * @param[in] interrupt_mode Interrupt Mode receive or send
  285. *
  286. */
  287. void uart_irq_unregister(uart_device_number_t channel, uart_interrupt_mode_t interrupt_mode);
  288. /**
  289. * @brief Set send interrupt threshold
  290. *
  291. * @param[in] channel Uart index
  292. * @param[in] trigger Threshold of send interrupt
  293. *
  294. */
  295. void uart_set_send_trigger(uart_device_number_t channel, uart_send_trigger_t trigger);
  296. /**
  297. * @brief Set receive interrupt threshold
  298. *
  299. * @param[in] channel Uart index
  300. * @param[in] trigger Threshold of receive interrupt
  301. *
  302. */
  303. void uart_set_receive_trigger(uart_device_number_t channel, uart_receive_trigger_t trigger);
  304. /**
  305. * @brief Send data by dma
  306. *
  307. * @param[in] channel Uart index
  308. * @param[in] dmac_channel Dmac channel
  309. * @param[in] buffer Send data
  310. * @param[in] buf_len Data length
  311. *
  312. */
  313. void uart_send_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, const uint8_t *buffer, size_t buf_len);
  314. /**
  315. * @brief Receive data by dma
  316. *
  317. * @param[in] channel Uart index
  318. * @param[in] dmac_channel Dmac channel
  319. * @param[in] buffer Receive data
  320. * @param[in] buf_len Data length
  321. *
  322. */
  323. void uart_receive_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, uint8_t *buffer, size_t buf_len);
  324. /**
  325. * @brief Send data by dma
  326. *
  327. * @param[in] uart_channel Uart index
  328. * @param[in] dmac_channel Dmac channel
  329. * @param[in] buffer Send data
  330. * @param[in] buf_len Data length
  331. * @param[in] uart_callback Call back
  332. * @param[in] ctx Param of call back
  333. * @param[in] priority Interrupt priority
  334. *
  335. */
  336. void uart_send_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel,
  337. const uint8_t *buffer, size_t buf_len, plic_irq_callback_t uart_callback,
  338. void *ctx, uint32_t priority);
  339. /**
  340. * @brief Receive data by dma
  341. *
  342. * @param[in] uart_channel Uart index
  343. * @param[in] dmac_channel Dmac channel
  344. * @param[in] buffer Receive data
  345. * @param[in] buf_len Data length
  346. * @param[in] uart_callback Call back
  347. * @param[in] ctx Param of call back
  348. * @param[in] priority Interrupt priority
  349. *
  350. */
  351. void uart_receive_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel,
  352. uint8_t *buffer, size_t buf_len, plic_irq_callback_t uart_callback,
  353. void *ctx, uint32_t priority);
  354. /**
  355. * @brief Uart handle transfer data operations
  356. *
  357. * @param[in] uart_channel Uart index
  358. * @param[in] data Uart data information
  359. * @param[in] buffer Uart DMA callback
  360. *
  361. */
  362. void uart_handle_data_dma(uart_device_number_t uart_channel, uart_data_t data, plic_interrupt_t *cb);
  363. /**
  364. * @brief Set uart work mode
  365. *
  366. * @param[in] uart_channel Uart index
  367. * @param[in] work_mode Work mode
  368. 0:uart
  369. 1: infrared
  370. 2:full duplex rs485, control re and de manually
  371. 3:half duplex rs485, control re and de automatically
  372. *
  373. */
  374. void uart_set_work_mode(uart_device_number_t uart_channel, uart_work_mode_t work_mode);
  375. /**
  376. * @brief Set re or de driver enable polarity
  377. *
  378. * @param[in] uart_channel Uart index
  379. * @param[in] rede re or de
  380. 0:de
  381. 1:re
  382. 2:de and re
  383. * @param[in] polarity Polarity
  384. 0:signal is active low
  385. 1:signal is active high
  386. *
  387. */
  388. void uart_set_rede_polarity(uart_device_number_t uart_channel, uart_rs485_rede_t rede, uart_polarity_t polarity);
  389. /**
  390. * @brief Set rs485 de and re signal driver output enable
  391. *
  392. * @param[in] uart_channel Uart index
  393. * @param[in] rede 0:de
  394. 1:re
  395. 2:de and re
  396. * @param[in] enable 0:de-assert signal
  397. 1:assert signal
  398. *
  399. */
  400. void uart_set_rede_enable(uart_device_number_t uart_channel, uart_rs485_rede_t rede, bool enable);
  401. /**
  402. * @brief Set turn around time between switch of 're' and 'de' signals
  403. *
  404. * @param[in] uart_channel Uart index
  405. * @param[in] tat_mode 0:de to re
  406. 1:re to de
  407. * @param[in] time turn around time nanosecond
  408. *
  409. */
  410. void uart_set_tat(uart_device_number_t uart_channel, uart_tat_mode_t tat_mode, size_t time);
  411. /**
  412. * @brief Set driver output enable time used to control de assertion and de-assertion timeing of 'de' signal
  413. *
  414. * @param[in] uart_channel Uart index
  415. * @param[in] det_mode 0:de assertion
  416. 1:de de-assertion
  417. * @param[in] time driver output enable time nanosecond
  418. *
  419. */
  420. void uart_set_det(uart_device_number_t uart_channel, uart_det_mode_t det_mode, size_t time);
  421. /**
  422. * @brief Set the default debug serial port
  423. *
  424. * @param[in] uart_channel Uart index
  425. *
  426. */
  427. void uart_debug_init(uart_device_number_t uart_channel);
  428. #ifdef __cplusplus
  429. }
  430. #endif
  431. #endif /* _DRIVER_APBUART_H */