add support for rttthread (#1)

SConscript

@@ -0,0 +1,21 @@
+from building import *
+import rtconfig
+
+# get current directory
+cwd     = GetCurrentDir()
+# The set of source files associated with this SConscript file.
+src     = []
+#src += Glob(cwd+"/common/src/*.c")
+if GetDepend(['PKG_USING_LEVEL_NOR']):
+    src += Glob(cwd+"/common/src/lx_nor*.c")
+if GetDepend(['PKG_USING_LEVEL_NAND']):
+    src += Glob(cwd+"/common/src/lx_nand*.c")
+
+CPPDEFINES = ['LX_INCLUDE_USER_DEFINE_FILE']
+
+
+path    = [cwd + '/common/inc']
+path += [cwd + '/levelx/']
+group = DefineGroup('Levelx', src, depend = ['PKG_USING_LEVELX'], CPPDEFINES = CPPDEFINES,CPPPATH = path)
+
+Return('group')

levelx/Kconfig

@@ -0,0 +1,42 @@
+
+# Kconfig file for package levelx
+menuconfig PKG_USING_LEVELX
+    bool "levelx:Threadx's wear-leveling component for rtthread."
+    default n
+
+if PKG_USING_LEVELX
+
+    config PKG_LEVELX_PATH
+        string
+        default "/packages/system/levelx"
+
+    menuconfig PKG_USING_LEVEL_NOR
+        bool
+        prompt "Enable levelx support for nor flash"
+        default y
+    if PKG_USING_LEVEL_NOR
+        config PKG_USING_LEVEL_DEMO_MEM
+            bool
+            prompt "Enable levelx nor demo"
+            default n
+    endif
+
+    menuconfig PKG_USING_LEVEL_NAND
+        bool
+        prompt "Enable levelx support for nand flash"
+        default y    
+    choice
+        prompt "Version"
+        default PKG_USING_LEVELX_LATEST_VERSION
+        help
+            Select the package version
+        config PKG_USING_LEVELX_LATEST_VERSION
+            bool "latest"
+    endchoice
+
+    config PKG_LEVELX_VER
+       string
+       default "latest"    if PKG_USING_LEVELX_LATEST_VERSION
+
+endif
+

levelx/lx_user.h

@@ -0,0 +1,156 @@
+/***************************************************************************
+ * Copyright (c) 2024 Microsoft Corporation 
+ * 
+ * This program and the accompanying materials are made available under the
+ * terms of the MIT License which is available at
+ * https://opensource.org/licenses/MIT.
+ * 
+ * SPDX-License-Identifier: MIT
+ **************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** LevelX Component                                                      */
+/**                                                                       */
+/**   User Specific                                                       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  PORT SPECIFIC C INFORMATION                            RELEASE        */
+/*                                                                        */
+/*    lx_user.h                                           PORTABLE C      */
+/*                                                           6.3.0        */
+/*                                                                        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    William E. Lamie, Microsoft Corporation                             */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This file contains user defines for configuring LevelX in specific  */
+/*    ways. This file will have an effect only if the application and     */
+/*    LevelX library are built with LX_INCLUDE_USER_DEFINE_FILE defined.  */
+/*    Note that all the defines in this file may also be made on the      */
+/*    command line when building LevelX library and application objects.  */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  11-09-2020     William E. Lamie         Initial Version 6.1.2         */
+/*  06-02-2021     Bhupendra Naphade        Modified comment(s), and      */
+/*                                            added standalone support,   */
+/*                                            resulting in version 6.1.7  */
+/*  03-08-2023     Xiuwen Cai               Modified comment(s), and      */
+/*                                            added new NAND options,     */
+/*                                            resulting in version 6.2.1  */
+/*  10-31-2023     Xiuwen Cai               Modified comment(s),          */
+/*                                            added options for mapping , */
+/*                                            bitmap cache and obsolete   */
+/*                                            count cache,                */
+/*                                            resulting in version 6.3.0  */
+/*                                                                        */
+/**************************************************************************/
+
+#ifndef LX_USER_H
+#define LX_USER_H
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <rtconfig.h>
+/* Defined, this option bypasses the NOR flash driver read routine in favor or reading 
+   the NOR memory directly, resulting in a significant performance increase. 
+*/
+/*
+#define LX_DIRECT_READ
+*/
+
+
+/* Defined, this causes the LevelX NOR instance open logic to verify free NOR 
+   sectors are all ones.
+*/
+/*
+#define LX_FREE_SECTOR_DATA_VERIFY 
+*/
+
+/* By default this value is 4, which represents a maximum of 4 blocks that 
+   can be allocated for metadata.
+*/
+/*
+#define LX_NAND_FLASH_MAX_METADATA_BLOCKS 4
+*/
+
+/* Defined, this disabled the extended NOR cache.  */
+/*
+#define LX_NOR_DISABLE_EXTENDED_CACHE
+*/
+
+/* By default this value is 8, which represents a maximum of 8 sectors that 
+   can be cached in a NOR instance.
+*/
+/*
+#define LX_NOR_EXTENDED_CACHE_SIZE   8 
+*/
+
+
+/* By default this value is 16 and defines the logical sector mapping cache size. 
+   Large values improve performance, but cost memory. The minimum size is 8 and all 
+   values must be a power of 2.
+*/
+/*
+#define LX_NOR_SECTOR_MAPPING_CACHE_SIZE   16
+*/
+
+/* Defined, this makes LevelX thread-safe by using a ThreadX mutex object 
+   throughout the API.
+*/
+/*
+#define LX_THREAD_SAFE_ENABLE
+*/
+
+/* Defined, LevelX will be used in standalone mode (without Azure RTOS ThreadX) */
+
+#define LX_STANDALONE_ENABLE 
+
+/* Define user extension for NOR flash control block. User extension is placed at the end of flash control block and it is not cleared on opening flash. */
+/* 
+#define LX_NOR_FLASH_USER_EXTENSION    ????
+*/
+
+/* Define user extension for NAND flash control block. User extension is placed at the end of flash control block and it is not cleared on opening flash.  */
+/* 
+#define LX_NAND_FLASH_USER_EXTENSION   ????
+*/
+
+/* Determine if logical sector mapping bitmap should be enabled in extended cache. 
+   Cache memory will be allocated to sector mapping bitmap first. One bit can be allocated for each physical sector.  */
+/* 
+#define LX_NOR_ENABLE_MAPPING_BITMAP
+*/
+
+/* Determine if obsolete count cache should be enabled in extended cache.  
+   Cache memory will be allocated to obsolete count cache after the mapping bitmap if enabled, 
+   and the rest of the cache memory is allocated to sector cache.  */
+/* 
+#define LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE
+*/
+
+/* Defines obsolete count cache element size. If number of sectors per block is greater than 256, use USHORT instead of UCHAR.  */
+/* 
+#define LX_NOR_OBSOLETE_COUNT_CACHE_TYPE            UCHAR
+*/
+
+/* Define the logical sector size for NOR flash. The sector size is in units of 32-bit words. 
+   This sector size should match the sector size used in file system.  */
+
+#define LX_NOR_SECTOR_SIZE                          (512/sizeof(ULONG))
+
+
+#endif
+

levelx/package.json

@@ -0,0 +1,29 @@
+{
+  "name": "levelx",
+  "description": "levelx:Threadx's wear-leveling component.",
+  "description_zh": "Threadx生态组件，磨损均衡组件 ",
+  "enable": "PKG_USING_LEVELX",
+  "keywords": [
+    "levelx"
+  ],
+  "category": "system",
+  "author": {
+    "name": "Dyyt587",
+    "email": "805207319@qq.com",
+    "github": "Dyyt587"
+  },
+  "license": "MIT",
+  "repository": "https://github.com/Dyyt587/levelx.git",
+  "icon": "unknown",
+  "homepage": "https://github.com/Dyyt587/levelx.git#readme_zh",
+  "doc": "unknown",
+  "site": [
+
+    {
+      "version": "latest",
+      "URL": "https://github.com/Dyyt587/levelx.git",
+      "filename": "",
+      "VER_SHA": "master"
+    }
+  ]
+}

readme_zh.md

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+# Azure RTOS LevelX FOR RTThread
+
+这是threadx rtos 的磨损均衡组件在rtthread rtos 上面的移植,代码仅供学习使用
+
+提供一个基于mtd设备的norflash移植demo
+
+下面是官方仓库介绍
+
+# Azure RTOS LevelX
+
+LevelX provides NAND and NOR flash wear leveling facilities to embedded applications. Since both NAND and NOR flash memory can only be erased a finite number of times, it’s critical to distribute the flash memory use evenly. This is typically called **wear leveling** and is the purpose behind LevelX. LevelX presents to the user an array of logical sectors that are mapped to physical flash memory inside of LevelX. Applications may use LevelX in conjunction with FileX or may read/write logical sectors directly. LevelX is designed for fault tolerance. Flash updates are performed in a multiple-step process that can be interrupted in each step. LevelX automatically recovers to the optimal state during the next operation.
+
+## Getting Started
+
+Azure RTOS LevelX as part of Azure RTOS has been integrated to the semiconductor's SDKs and development environment. You can develop using the tools of choice from [STMicroelectronics](https://www.st.com/content/st_com/en/campaigns/x-cube-azrtos-azure-rtos-stm32.html), [NXP](https://www.nxp.com/design/software/embedded-software/azure-rtos-for-nxp-microcontrollers:AZURE-RTOS), [Renesas](https://github.com/renesas/azure-rtos) and [Microchip](https://mu.microchip.com/get-started-simplifying-your-iot-design-with-azure-rtos).
+
+See [Overview of Azure RTOS LevelX](https://learn.microsoft.com/azure/rtos/levelx/overview-levelx) for the high-level overview, and all documentation and APIs can be found in: [Azure RTOS LevelX documentation](https://learn.microsoft.com/azure/rtos/levelx/).
+
+## Repository Structure and Usage
+
+### Directory layout
+
+.
+├── cmake                   # CMakeList files for building the project
+├── common                  # Core LevelX files
+├── samples                 # Sample codes
+├── LICENSE.txt             # License terms
+├── LICENSE-HARDWARE.txt    # Licensed hardware from semiconductors
+├── CONTRIBUTING.md         # Contribution guidance
+└── SECURITY.md             # Microsoft repo security guidance
+
+### Branches & Releases
+
+The master branch has the most recent code with all new features and bug fixes. It does not represent the latest General Availability (GA) release of the library. Each official release (preview or GA) will be tagged to mark the commit and push it into the Github releases tab, e.g. `v6.2-rel`.
+
+> When you see xx-xx-xxxx, 6.x or x.x in function header, this means the file is not officially released yet. They will be updated in the next release. See example below.
+
+```
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_initialize_low_level                          Cortex-M23/GNU    */
+/*                                                           6.x          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for any low-level processor            */
+/*    initialization, including setting up interrupt vectors, setting     */
+/*    up a periodic timer interrupt source, saving the system stack       */
+/*    pointer for use in ISR processing later, and finding the first      */
+/*    available RAM memory address for tx_application_define.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter           ThreadX entry function        */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  xx-xx-xxxx      Scott Larson            Include tx_user.h,            */
+/*                                            resulting in version 6.x    */
+/*                                                                        */
+/**************************************************************************/ 
+```
+
+## Component dependencies
+
+The main components of Azure RTOS are each provided in their own repository, but there are dependencies between them, as shown in the following graph. This is important to understand when setting up your builds.
+
+![dependency graph](docs/deps.png)
+
+> You will have to take the dependency graph above into account when building anything other than ThreadX itself.
+
+### Building and using the library
+
+Instruction for building the LevelX as static library using Arm GNU Toolchain and CMake. If you are using toolchain and IDE from semiconductor, you might follow its own instructions to use Azure RTOS components as explained in the [Getting Started](#getting-started) section.
+
+1. Install the following tools:
+
+   * [CMake](https://cmake.org/download/) version 3.0 or later
+   * [Arm GNU Toolchain for arm-none-eabi](https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads)
+   * [Ninja](https://ninja-build.org/)
+2. Build the [ThreadX library](https://github.com/azure-rtos/threadx#building-and-using-the-library) as the dependency.
+3. Cloning the repo.
+
+   ```bash
+   $ git clone --recursive https://github.com/azure-rtos/levelx.git
+   ```
+4. Define the features and addons you need in `lx_user.h` and build together with the component source code. You can refer to [`lx_user_sample.h`](https://github.com/azure-rtos/levelx/blob/master/common/inc/lx_user_sample.h) as an example.
+5. Building as a static library
+
+   Each component of Azure RTOS comes with a composable CMake-based build system that supports many different MCUs and host systems. Integrating any of these components into your device app code is as simple as adding a git submodule and then including it in your build using the CMake `add_subdirectory()`.
+
+   While the typical usage pattern is to include LevelX into your device code source tree to be built & linked with your code, you can compile this project as a standalone static library to confirm your build is set up correctly.
+
+   An example of building the library for Cortex-M4:
+
+   ```bash
+   $ cmake -Bbuild -GNinja -DCMAKE_TOOLCHAIN_FILE=cmake/cortex_m4.cmake .
+
+   $ cmake --build ./build
+   ```
+
+## Professional support
+
+[Professional support plans](https://azure.microsoft.com/support/options/) are available from Microsoft. For community support and others, see the [Resources](#resources) section below.
+
+## Licensing
+
+License terms for using Azure RTOS are defined in the LICENSE.txt file of this repo. Please refer to this file for all definitive licensing information. No additional license fees are required for deploying Azure RTOS on hardware defined in the [LICENSED-HARDWARE.txt](./LICENSED-HARDWARE.txt) file. If you are using hardware not listed in the file or having licensing questions in general, please contact Microsoft directly at https://aka.ms/azrtos-license.
+
+## Resources
+
+The following are references to additional Azure RTOS resources:
+
+- **Product introduction and white papers**: https://azure.com/rtos
+- **General technical questions**: https://aka.ms/QnA/azure-rtos
+- **Product issues and bugs, or feature requests**: https://github.com/azure-rtos/levelx/issues
+- **Licensing and sales questions**: https://aka.ms/azrtos-license
+- **Product roadmap and support policy**: https://aka.ms/azrtos/lts
+- **Blogs and videos**: http://msiotblog.com and https://aka.ms/iotshow
+- **Azure RTOS TraceX Installer**: https://aka.ms/azrtos-tracex-installer
+
+You can also check [previous questions](https://stackoverflow.com/questions/tagged/azure-rtos+levelx) or ask new ones on StackOverflow using the `azure-rtos` and `levelx` tags.
+
+## Security
+
+Azure RTOS provides OEMs with components to secure communication and to create code and data isolation using underlying MCU/MPU hardware protection mechanisms. It is ultimately the responsibility of the device builder to ensure the device fully meets the evolving security requirements associated with its specific use case.
+
+## Contribution
+
+Please follow the instructions provided in the [CONTRIBUTING.md](./CONTRIBUTING.md) for the corresponding repository.