stm32_sdio.c 17 KB

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  1. /*
  2. * File : stm32_sdio.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2018-6-22 tyx first
  23. */
  24. #include <rthw.h>
  25. #include <rtthread.h>
  26. #include <rtdevice.h>
  27. #include <string.h>
  28. #include <stm32_sdio.h>
  29. #define DBG_SECTION_NAME "SDIO"
  30. #define DBG_LEVEL DBG_ERROR
  31. #include <rtdbg.h>
  32. #define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS (100000)
  33. #define RTHW_SDIO_LOCK(_sdio) rt_mutex_take(&_sdio->mutex, RT_WAITING_FOREVER)
  34. #define RTHW_SDIO_UNLOCK(_sdio) rt_mutex_release(&_sdio->mutex);
  35. struct sdio_pkg
  36. {
  37. struct rt_mmcsd_cmd *cmd;
  38. void *buff;
  39. rt_uint32_t flag;
  40. };
  41. struct rthw_sdio
  42. {
  43. struct rt_mmcsd_host *host;
  44. struct stm32_sdio_des sdio_des;
  45. struct rt_event event;
  46. struct rt_mutex mutex;
  47. struct sdio_pkg *pkg;
  48. };
  49. #if (RTTHREAD_VERSION >= RT_VERSION_CHECK(5, 0, 1))
  50. rt_align(SDIO_ALIGN)
  51. #else
  52. ALIGN(SDIO_ALIGN)
  53. #endif
  54. static rt_uint8_t cache_buf[SDIO_BUFF_SIZE];
  55. static rt_uint32_t stm32_sdio_clk_get(struct stm32_sdio *hw_sdio)
  56. {
  57. return SDIO_CLOCK_FREQ;
  58. }
  59. static int get_order(rt_uint32_t data)
  60. {
  61. int order = 0;
  62. switch (data)
  63. {
  64. case 1:
  65. order = 0;
  66. break;
  67. case 2:
  68. order = 1;
  69. break;
  70. case 4:
  71. order = 2;
  72. break;
  73. case 8:
  74. order = 3;
  75. break;
  76. case 16:
  77. order = 4;
  78. break;
  79. case 32:
  80. order = 5;
  81. break;
  82. case 64:
  83. order = 6;
  84. break;
  85. case 128:
  86. order = 7;
  87. break;
  88. case 256:
  89. order = 8;
  90. break;
  91. case 512:
  92. order = 9;
  93. break;
  94. case 1024:
  95. order = 10;
  96. break;
  97. case 2048:
  98. order = 11;
  99. break;
  100. case 4096:
  101. order = 12;
  102. break;
  103. case 8192:
  104. order = 13;
  105. break;
  106. case 16384:
  107. order = 14;
  108. break;
  109. default :
  110. order = 0;
  111. break;
  112. }
  113. return order;
  114. }
  115. static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
  116. {
  117. rt_uint32_t status;
  118. struct rt_mmcsd_cmd *cmd = sdio->pkg->cmd;
  119. struct rt_mmcsd_data *data = cmd->data;
  120. struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
  121. if (rt_event_recv(&sdio->event, 0xffffffff, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
  122. rt_tick_from_millisecond(5000), &status) != RT_EOK)
  123. {
  124. LOG_E("wait completed timeout!!");
  125. cmd->err = -RT_ETIMEOUT;
  126. return;
  127. }
  128. if (sdio->pkg == RT_NULL)
  129. {
  130. return;
  131. }
  132. cmd->resp[0] = hw_sdio->resp1;
  133. cmd->resp[1] = hw_sdio->resp2;
  134. cmd->resp[2] = hw_sdio->resp3;
  135. cmd->resp[3] = hw_sdio->resp4;
  136. if (status & HW_SDIO_ERRORS)
  137. {
  138. if ((status & HW_SDIO_IT_CCRCFAIL) && (resp_type(cmd) & (RESP_R3 | RESP_R4)))
  139. {
  140. cmd->err = RT_EOK;
  141. }
  142. else
  143. {
  144. cmd->err = -RT_ERROR;
  145. }
  146. if (status & HW_SDIO_IT_CTIMEOUT)
  147. {
  148. cmd->err = -RT_ETIMEOUT;
  149. }
  150. if (status & HW_SDIO_IT_DCRCFAIL)
  151. {
  152. data->err = -RT_ERROR;
  153. }
  154. if (status & HW_SDIO_IT_DTIMEOUT)
  155. {
  156. data->err = -RT_ETIMEOUT;
  157. }
  158. if (cmd->err == RT_EOK)
  159. {
  160. LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
  161. }
  162. else
  163. {
  164. if ((cmd->cmd_code == 5) || (cmd->cmd_code == 8))
  165. {
  166. LOG_W("warr:0x%08x, %s%s%s%s%s%s%s cmd:%d arg:0x%08x",
  167. status,
  168. status & HW_SDIO_IT_CCRCFAIL ? "CCRCFAIL " : "",
  169. status & HW_SDIO_IT_DCRCFAIL ? "DCRCFAIL " : "",
  170. status & HW_SDIO_IT_CTIMEOUT ? "CTIMEOUT " : "",
  171. status & HW_SDIO_IT_DTIMEOUT ? "DTIMEOUT " : "",
  172. status & HW_SDIO_IT_TXUNDERR ? "TXUNDERR " : "",
  173. status & HW_SDIO_IT_RXOVERR ? "RXOVERR " : "",
  174. status == 0 ? "NULL" : "",
  175. cmd->cmd_code,
  176. cmd->arg,
  177. );
  178. }
  179. else
  180. {
  181. LOG_E("err:0x%08x, %s%s%s%s%s%s%s cmd:%d arg:0x%08x rw:%c len:%d blksize:%d",
  182. status,
  183. status & HW_SDIO_IT_CCRCFAIL ? "CCRCFAIL " : "",
  184. status & HW_SDIO_IT_DCRCFAIL ? "DCRCFAIL " : "",
  185. status & HW_SDIO_IT_CTIMEOUT ? "CTIMEOUT " : "",
  186. status & HW_SDIO_IT_DTIMEOUT ? "DTIMEOUT " : "",
  187. status & HW_SDIO_IT_TXUNDERR ? "TXUNDERR " : "",
  188. status & HW_SDIO_IT_RXOVERR ? "RXOVERR " : "",
  189. status == 0 ? "NULL" : "",
  190. cmd->cmd_code,
  191. cmd->arg,
  192. data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
  193. data ? data->blks * data->blksize : 0,
  194. data ? data->blksize : 0
  195. );
  196. }
  197. }
  198. }
  199. else
  200. {
  201. cmd->err = RT_EOK;
  202. LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
  203. }
  204. }
  205. #if 0
  206. static void rthw_sdio_transfer_by_cpu(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
  207. {
  208. }
  209. #endif
  210. static void rthw_sdio_transfer_by_dma(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
  211. {
  212. struct rt_mmcsd_data *data;
  213. int size;
  214. void *buff;
  215. struct stm32_sdio *hw_sdio;
  216. if ((RT_NULL == pkg) || (RT_NULL == sdio))
  217. {
  218. LOG_E("rthw_sdio_transfer_by_dma invalid args");
  219. return;
  220. }
  221. data = pkg->cmd->data;
  222. if(RT_NULL == data)
  223. {
  224. LOG_E("rthw_sdio_transfer_by_dma invalid args");
  225. return;
  226. }
  227. buff = pkg->buff;
  228. if(RT_NULL == buff)
  229. {
  230. LOG_E("rthw_sdio_transfer_by_dma invalid args");
  231. return;
  232. }
  233. hw_sdio = sdio->sdio_des.hw_sdio;
  234. size = data->blks * data->blksize;
  235. if (data->flags & DATA_DIR_WRITE)
  236. {
  237. sdio->sdio_des.txconfig((rt_uint32_t *)buff, (rt_uint32_t *)&hw_sdio->fifo, size);
  238. hw_sdio->dctrl |= HW_SDIO_DMA_ENABLE;
  239. }
  240. else if (data->flags & DATA_DIR_READ)
  241. {
  242. sdio->sdio_des.rxconfig((rt_uint32_t *)&hw_sdio->fifo, (rt_uint32_t *)buff, size);
  243. hw_sdio->dctrl |= HW_SDIO_DMA_ENABLE | HW_SDIO_DPSM_ENABLE;
  244. }
  245. }
  246. static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
  247. {
  248. struct rt_mmcsd_cmd *cmd = pkg->cmd;
  249. struct rt_mmcsd_data *data = cmd->data;
  250. struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
  251. rt_uint32_t reg_cmd;
  252. //save pkg
  253. sdio->pkg = pkg;
  254. LOG_D("CMD:%d ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d",
  255. cmd->cmd_code,
  256. cmd->arg,
  257. resp_type(cmd) == RESP_NONE ? "NONE" : "",
  258. resp_type(cmd) == RESP_R1 ? "R1" : "",
  259. resp_type(cmd) == RESP_R1B ? "R1B" : "",
  260. resp_type(cmd) == RESP_R2 ? "R2" : "",
  261. resp_type(cmd) == RESP_R3 ? "R3" : "",
  262. resp_type(cmd) == RESP_R4 ? "R4" : "",
  263. resp_type(cmd) == RESP_R5 ? "R5" : "",
  264. resp_type(cmd) == RESP_R6 ? "R6" : "",
  265. resp_type(cmd) == RESP_R7 ? "R7" : "",
  266. data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
  267. data ? data->blks * data->blksize : 0,
  268. data ? data->blksize : 0
  269. );
  270. //config cmd reg
  271. reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE;
  272. if (resp_type(cmd) == RESP_NONE)
  273. reg_cmd |= HW_SDIO_RESPONSE_NO;
  274. else if (resp_type(cmd) == RESP_R2)
  275. reg_cmd |= HW_SDIO_RESPONSE_LONG;
  276. else
  277. reg_cmd |= HW_SDIO_RESPONSE_SHORT;
  278. //config data reg
  279. if (data != RT_NULL)
  280. {
  281. rt_uint32_t dir = 0;
  282. rt_uint32_t size = data->blks * data->blksize;
  283. int order;
  284. hw_sdio->dctrl = 0;
  285. hw_sdio->dtimer = HW_SDIO_DATATIMEOUT;
  286. hw_sdio->dlen = size;
  287. order = get_order(data->blksize);
  288. dir = (data->flags & DATA_DIR_READ) ? HW_SDIO_TO_HOST : 0;
  289. hw_sdio->dctrl = HW_SDIO_IO_ENABLE | (order << 4) | dir;
  290. }
  291. //transfer config
  292. if (data != RT_NULL)
  293. {
  294. #if 1
  295. rthw_sdio_transfer_by_dma(sdio, pkg);
  296. #else
  297. rthw_sdio_transfer_by_cpu(sdio, pkg);
  298. #endif
  299. }
  300. //open irq
  301. hw_sdio->mask |= HW_SDIO_IT_CMDSENT | HW_SDIO_IT_CMDREND | HW_SDIO_ERRORS;
  302. if (data != RT_NULL)
  303. {
  304. hw_sdio->mask |= HW_SDIO_IT_DATAEND;
  305. }
  306. //send cmd
  307. hw_sdio->arg = cmd->arg;
  308. hw_sdio->cmd = reg_cmd;
  309. //wait completed
  310. rthw_sdio_wait_completed(sdio);
  311. //Waiting for data to be sent to completion
  312. if (data != RT_NULL)
  313. {
  314. volatile rt_uint32_t count = SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS;
  315. while (count && (hw_sdio->sta & (HW_SDIO_IT_TXACT | HW_SDIO_IT_RXACT)))
  316. {
  317. count--;
  318. }
  319. if ((count == 0) || (hw_sdio->sta & HW_SDIO_ERRORS))
  320. {
  321. cmd->err = -RT_ERROR;
  322. }
  323. }
  324. //close irq, keep sdio irq
  325. hw_sdio->mask = hw_sdio->mask & HW_SDIO_IT_SDIOIT ? HW_SDIO_IT_SDIOIT : 0x00;
  326. //clear pkg
  327. sdio->pkg = RT_NULL;
  328. }
  329. static void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
  330. {
  331. struct sdio_pkg pkg;
  332. struct rthw_sdio *sdio = host->private_data;
  333. struct rt_mmcsd_data *data;
  334. RTHW_SDIO_LOCK(sdio);
  335. #ifdef RT_USING_PM
  336. rt_pm_request(PM_SLEEP_MODE_NONE);
  337. #endif
  338. if (req->cmd != RT_NULL)
  339. {
  340. memset(&pkg, 0, sizeof(pkg));
  341. data = req->cmd->data;
  342. pkg.cmd = req->cmd;
  343. if (data != RT_NULL)
  344. {
  345. rt_uint32_t size = data->blks * data->blksize;
  346. RT_ASSERT(size <= SDIO_BUFF_SIZE);
  347. pkg.buff = data->buf;
  348. if ((rt_uint32_t)data->buf & (SDIO_ALIGN - 1))
  349. {
  350. pkg.buff = cache_buf;
  351. if (data->flags & DATA_DIR_WRITE)
  352. {
  353. memcpy(cache_buf, data->buf, size);
  354. }
  355. }
  356. }
  357. rthw_sdio_send_command(sdio, &pkg);
  358. if ((data != RT_NULL) && (data->flags & DATA_DIR_READ) && ((rt_uint32_t)data->buf & (SDIO_ALIGN - 1)))
  359. {
  360. memcpy(data->buf, cache_buf, data->blksize * data->blks);
  361. }
  362. }
  363. if (req->stop != RT_NULL)
  364. {
  365. memset(&pkg, 0, sizeof(pkg));
  366. pkg.cmd = req->stop;
  367. rthw_sdio_send_command(sdio, &pkg);
  368. }
  369. #ifdef RT_USING_PM
  370. rt_pm_release(PM_SLEEP_MODE_NONE);
  371. #endif
  372. RTHW_SDIO_UNLOCK(sdio);
  373. mmcsd_req_complete(sdio->host);
  374. }
  375. /*
  376. * Set the IOCFG
  377. */
  378. static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
  379. {
  380. rt_uint32_t clkcr, div, clk_src;
  381. rt_uint32_t clk = io_cfg->clock;
  382. struct rthw_sdio *sdio = host->private_data;
  383. struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
  384. clk_src = sdio->sdio_des.clk_get(sdio->sdio_des.hw_sdio);
  385. if (clk_src < 400 * 1000)
  386. {
  387. LOG_E("The clock rate is too low! rata:%d", clk_src);
  388. return;
  389. }
  390. if (clk > host->freq_max) clk = host->freq_max;
  391. if (clk > clk_src)
  392. {
  393. LOG_W("Setting rate is greater than clock source rate.");
  394. clk = clk_src;
  395. }
  396. LOG_D("clk:%d width:%s%s%s power:%s%s%s",
  397. clk,
  398. io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
  399. io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
  400. io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
  401. io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "",
  402. io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "",
  403. io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : ""
  404. );
  405. RTHW_SDIO_LOCK(sdio);
  406. div = clk_src / clk;
  407. if ((clk == 0) || (div == 0))
  408. {
  409. clkcr = 0;
  410. }
  411. else
  412. {
  413. if (div < 2)
  414. {
  415. div = 2;
  416. }
  417. else if (div > 0xFF)
  418. {
  419. div = 0xFF;
  420. }
  421. div -= 2;
  422. clkcr = div | HW_SDIO_CLK_ENABLE;
  423. }
  424. if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8)
  425. {
  426. clkcr |= HW_SDIO_BUSWIDE_8B;
  427. }
  428. else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4)
  429. {
  430. clkcr |= HW_SDIO_BUSWIDE_4B;
  431. }
  432. else
  433. {
  434. clkcr |= HW_SDIO_BUSWIDE_1B;
  435. }
  436. hw_sdio->clkcr = clkcr | HW_SDIO_IDLE_ENABLE;
  437. switch (io_cfg->power_mode)
  438. {
  439. case MMCSD_POWER_OFF:
  440. hw_sdio->power = HW_SDIO_POWER_OFF;
  441. break;
  442. case MMCSD_POWER_UP:
  443. hw_sdio->power = HW_SDIO_POWER_UP;
  444. break;
  445. case MMCSD_POWER_ON:
  446. hw_sdio->power = HW_SDIO_POWER_ON;
  447. break;
  448. default:
  449. rt_kprintf("unknown power_mode %d\n", io_cfg->power_mode);
  450. break;
  451. }
  452. RTHW_SDIO_UNLOCK(sdio);
  453. }
  454. void rthw_sdio_irq_update(struct rt_mmcsd_host *host, rt_int32_t enable)
  455. {
  456. struct rthw_sdio *sdio = host->private_data;
  457. struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
  458. if (enable)
  459. {
  460. LOG_D("enable sdio irq");
  461. hw_sdio->mask |= HW_SDIO_IT_SDIOIT;
  462. }
  463. else
  464. {
  465. LOG_D("disable sdio irq");
  466. hw_sdio->mask &= ~HW_SDIO_IT_SDIOIT;
  467. }
  468. }
  469. static rt_int32_t rthw_sd_delect(struct rt_mmcsd_host *host)
  470. {
  471. rt_kprintf("try to detect device\n");
  472. return 0x01;
  473. }
  474. void rthw_sdio_irq_process(struct rt_mmcsd_host *host)
  475. {
  476. int complete = 0;
  477. struct rthw_sdio *sdio = host->private_data;
  478. struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
  479. rt_uint32_t intstatus = hw_sdio->sta;
  480. if (intstatus & HW_SDIO_ERRORS)
  481. {
  482. hw_sdio->icr = HW_SDIO_ERRORS;
  483. complete = 1;
  484. }
  485. else
  486. {
  487. if (intstatus & HW_SDIO_IT_CMDREND)
  488. {
  489. hw_sdio->icr = HW_SDIO_IT_CMDREND;
  490. if (sdio->pkg != RT_NULL)
  491. {
  492. if (!sdio->pkg->cmd->data)
  493. {
  494. complete = 1;
  495. }
  496. else if ((sdio->pkg->cmd->data->flags & DATA_DIR_WRITE))
  497. {
  498. hw_sdio->dctrl |= HW_SDIO_DPSM_ENABLE;
  499. }
  500. }
  501. }
  502. if (intstatus & HW_SDIO_IT_CMDSENT)
  503. {
  504. hw_sdio->icr = HW_SDIO_IT_CMDSENT;
  505. if ((sdio->pkg != RT_NULL) && (resp_type(sdio->pkg->cmd) == RESP_NONE))
  506. {
  507. complete = 1;
  508. }
  509. }
  510. if (intstatus & HW_SDIO_IT_DATAEND)
  511. {
  512. hw_sdio->icr = HW_SDIO_IT_DATAEND;
  513. complete = 1;
  514. }
  515. }
  516. if ((intstatus & HW_SDIO_IT_SDIOIT) && (hw_sdio->mask & HW_SDIO_IT_SDIOIT))
  517. {
  518. hw_sdio->icr = HW_SDIO_IT_SDIOIT;
  519. sdio_irq_wakeup(host);
  520. }
  521. if (complete)
  522. {
  523. hw_sdio->mask &= ~HW_SDIO_ERRORS;
  524. rt_event_send(&sdio->event, intstatus);
  525. }
  526. }
  527. static const struct rt_mmcsd_host_ops ops =
  528. {
  529. rthw_sdio_request,
  530. rthw_sdio_iocfg,
  531. rthw_sd_delect,
  532. rthw_sdio_irq_update,
  533. };
  534. struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
  535. {
  536. struct rt_mmcsd_host *host;
  537. struct rthw_sdio *sdio = RT_NULL;
  538. if ((sdio_des == RT_NULL) ||
  539. (sdio_des->txconfig == RT_NULL) ||
  540. (sdio_des->rxconfig == RT_NULL))
  541. {
  542. rt_kprintf("L:%d F:%s %s %s %s\n",
  543. (sdio_des == RT_NULL ? "sdio_des is NULL" : ""),
  544. (sdio_des ? (sdio_des->txconfig ? "txconfig is NULL" : "") : ""),
  545. (sdio_des ? (sdio_des->rxconfig ? "rxconfig is NULL" : "") : "")
  546. );
  547. return RT_NULL;
  548. }
  549. sdio = rt_malloc(sizeof(struct rthw_sdio));
  550. if (sdio == RT_NULL)
  551. {
  552. rt_kprintf("L:%d F:%s malloc rthw_sdio fail\n");
  553. return RT_NULL;
  554. }
  555. rt_memset(sdio, 0, sizeof(struct rthw_sdio));
  556. host = mmcsd_alloc_host();
  557. if (host == RT_NULL)
  558. {
  559. rt_kprintf("L:%d F:%s mmcsd alloc host fail\n");
  560. rt_free(sdio);
  561. return RT_NULL;
  562. }
  563. rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct stm32_sdio_des));
  564. sdio->sdio_des.hw_sdio = (sdio_des->hw_sdio == RT_NULL ? (struct stm32_sdio *)SDIO_BASE_ADDRESS : sdio_des->hw_sdio);
  565. sdio->sdio_des.clk_get = (sdio_des->clk_get == RT_NULL ? stm32_sdio_clk_get : sdio_des->clk_get);
  566. rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO);
  567. rt_mutex_init(&sdio->mutex, "sdio", RT_IPC_FLAG_FIFO);
  568. // set host defautl attributes
  569. host->ops = &ops;
  570. host->freq_min = 400 * 1000;
  571. host->freq_max = SDIO_MAX_FREQ;
  572. host->valid_ocr = VDD_32_33 | VDD_33_34;
  573. #ifndef SDIO_USING_1_BIT
  574. host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ;
  575. #else
  576. host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ;
  577. #endif
  578. host->max_seg_size = SDIO_BUFF_SIZE;
  579. host->max_dma_segs = 1;
  580. host->max_blk_size = 512;
  581. host->max_blk_count = 512;
  582. // link up host and sdio
  583. sdio->host = host;
  584. host->private_data = sdio;
  585. rthw_sdio_irq_update(host, 1);
  586. // ready to change
  587. mmcsd_change(host);
  588. return host;
  589. }