replacing hcd_pipe_xfer by usbh_edpt_xfer

hw/bsp/ea4088qs/ea4088qs.c

@@ -98,6 +98,11 @@ void SystemInit(void)
 
   Chip_IOCON_Init(LPC_IOCON);
   Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
+
+	/* CPU clock source starts with IRC */
+	/* Enable PBOOST for CPU clock over 100MHz */
+	Chip_SYSCTL_EnableBoost();
+
   Chip_SetupXtalClocking();
 }
 
@@ -130,13 +135,15 @@ void board_init(void)
   Chip_USB_Init();
 
   enum {
-    USBCLK  = 0x1B // Host + Device + OTG + AHB
+    USBCLK_DEVCIE = 0x12, // AHB + Device
+    USBCLK_HOST = 0x19 ,  // AHB + OTG + Host
+    USBCLK_ALL  = 0x1B    // Host + Device + OTG + AHB
   };
 
-  LPC_USB->OTGClkCtrl = USBCLK;
-  while ( (LPC_USB->OTGClkSt & USBCLK) != USBCLK ) {}
+  LPC_USB->OTGClkCtrl = USBCLK_ALL;
+  while ( (LPC_USB->OTGClkSt & USBCLK_ALL) != USBCLK_ALL ) {}
 
-  // USB1 = host, USB2 = device
+  // set portfunc: USB1 = host, USB2 = device
   LPC_USB->StCtrl = 0x3;
 }
 

src/class/hid/hid_host.c

@@ -71,7 +71,7 @@ tusb_error_t hidh_interface_get_report(uint8_t dev_addr, void * report, hidh_int
   TU_VERIFY(report, TUSB_ERROR_INVALID_PARA);
   TU_ASSERT(!hcd_edpt_busy(dev_addr, p_hid->ep_in), TUSB_ERROR_INTERFACE_IS_BUSY);
 
-  TU_ASSERT( hcd_pipe_xfer(dev_addr, p_hid->ep_in, report, p_hid->report_size, true) ) ;
+  TU_ASSERT( usbh_edpt_xfer(dev_addr, p_hid->ep_in, report, p_hid->report_size) ) ;
 
   return TUSB_ERROR_NONE;
 }

src/host/ehci/ehci.c

@@ -328,7 +328,20 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
     qhd->qtd_overlay.next.address = (uint32_t) qtd;
   }else
   {
-    // TODO implement later
+    ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
+    ehci_qtd_t *p_qtd = qtd_find_free();
+    TU_ASSERT(p_qtd);
+
+    qtd_init(p_qtd, buffer, buflen);
+    p_qtd->pid = p_qhd->pid;
+
+    // Insert TD to QH
+    qtd_insert_to_qhd(p_qhd, p_qtd);
+
+    p_qhd->p_qtd_list_tail->int_on_complete = 1;
+
+    // attach head QTD to QHD start transferring
+    p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head;
   }
 
   return true;

src/host/hub.c

@@ -167,8 +167,8 @@ bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf
     TU_ASSERT( usbh_control_xfer( dev_addr, &request, NULL ) );
   }
 
-  //------------- Queue the initial Status endpoint transfer -------------//
-  TU_ASSERT( hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].ep_status, &hub_data[dev_addr-1].status_change, 1, true) );
+  // Queue notification status endpoint
+  TU_ASSERT( usbh_edpt_xfer(dev_addr, hub_data[dev_addr-1].ep_status, &hub_data[dev_addr-1].status_change, 1) );
 
   return true;
 }

src/host/ohci/ohci.c

@@ -306,6 +306,11 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   return true;
 }
 
+// TODO move around
+static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr);
+static ohci_gtd_t * gtd_find_free(void);
+static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd);
+
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
 {
   (void) rhport;
@@ -329,6 +334,21 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
     p_ed->td_head.address = (uint32_t) p_data;
 
     OHCI_REG->command_status_bit.control_list_filled = 1;
+  }else
+  {
+    ohci_ed_t * p_ed = ed_from_addr(dev_addr, ep_addr);
+    ohci_gtd_t* p_gtd = gtd_find_free();
+
+    TU_ASSERT(p_gtd);
+
+    gtd_init(p_gtd, buffer, buflen);
+    p_gtd->index = p_ed-ohci_data.ed_pool;
+    p_gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
+
+    td_insert_to_ed(p_ed, p_gtd);
+
+    tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) );
+    if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1;
   }
 
   return true;
@@ -337,7 +357,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 //--------------------------------------------------------------------+
 // BULK/INT/ISO PIPE API
 //--------------------------------------------------------------------+
-static inline ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr)
+static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr)
 {
   if ( tu_edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed;
 
@@ -355,7 +375,7 @@ static inline ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr)
   return NULL;
 }
 
-static inline ohci_ed_t * ed_find_free(void)
+static ohci_ed_t * ed_find_free(void)
 {
   ohci_ed_t* ed_pool = ohci_data.ed_pool;
 

src/host/usbh.c

@@ -208,6 +208,12 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8
   return true;
 }
 
+bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
+{
+  usbh_device_t* dev = &_usbh_devices[dev_addr];
+  return hcd_edpt_xfer(dev->rhport, dev_addr, ep_addr, buffer, total_bytes);
+}
+
 bool usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
 {
   osal_semaphore_reset( _usbh_devices[dev_addr].control.sem_hdl );

src/host/usbh.h

@@ -105,6 +105,8 @@ TU_ATTR_WEAK void tuh_umount_cb(uint8_t dev_addr);
 bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data);
 bool usbh_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
 
+bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
+
 #ifdef __cplusplus
  }
 #endif