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@@ -0,0 +1,9587 @@
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+<!DOCTYPE Register_Definition_File>
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+<Processor name="ATSAMD21G18A" description="Atmel ATSAMD21G18A device: Cortex-M0+ Microcontroller with 256KB Flash, 32KB SRAM, 48-pin package (refer to http://www.atmel.com/devices/SAMD21G18A.aspx for more)">
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+ <RegisterGroup name="AC" start="0x42004400" description="Analog Comparators">
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+ <Register start="+0x10+0" size="4" name="AC_COMPCTRL0" access="Read/Write" description="Comparator Control n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="ENABLE" description="Enable" />
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+ <BitField start="1" size="1" name="SINGLE" description="Single-Shot Mode" />
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+ <BitField start="2" size="2" name="SPEED" description="Speed Selection">
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+ <Enum name="LOW" start="0x0" description="Low speed" />
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+ <Enum name="HIGH" start="0x1" description="High speed" />
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+ </BitField>
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+ <BitField start="5" size="2" name="INTSEL" description="Interrupt Selection">
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+ <Enum name="TOGGLE" start="0x0" description="Interrupt on comparator output toggle" />
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+ <Enum name="RISING" start="0x1" description="Interrupt on comparator output rising" />
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+ <Enum name="FALLING" start="0x2" description="Interrupt on comparator output falling" />
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+ <Enum name="EOC" start="0x3" description="Interrupt on end of comparison (single-shot mode only)" />
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+ </BitField>
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+ <BitField start="8" size="3" name="MUXNEG" description="Negative Input Mux Selection">
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+ <Enum name="PIN0" start="0x0" description="I/O pin 0" />
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+ <Enum name="PIN1" start="0x1" description="I/O pin 1" />
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+ <Enum name="PIN2" start="0x2" description="I/O pin 2" />
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+ <Enum name="PIN3" start="0x3" description="I/O pin 3" />
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+ <Enum name="GND" start="0x4" description="Ground" />
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+ <Enum name="VSCALE" start="0x5" description="VDD scaler" />
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+ <Enum name="BANDGAP" start="0x6" description="Internal bandgap voltage" />
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+ <Enum name="DAC" start="0x7" description="DAC output" />
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+ </BitField>
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+ <BitField start="12" size="2" name="MUXPOS" description="Positive Input Mux Selection">
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+ <Enum name="PIN0" start="0x0" description="I/O pin 0" />
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+ <Enum name="PIN1" start="0x1" description="I/O pin 1" />
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+ <Enum name="PIN2" start="0x2" description="I/O pin 2" />
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+ <Enum name="PIN3" start="0x3" description="I/O pin 3" />
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+ </BitField>
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+ <BitField start="15" size="1" name="SWAP" description="Swap Inputs and Invert" />
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+ <BitField start="16" size="2" name="OUT" description="Output">
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+ <Enum name="OFF" start="0x0" description="The output of COMPn is not routed to the COMPn I/O port" />
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+ <Enum name="ASYNC" start="0x1" description="The asynchronous output of COMPn is routed to the COMPn I/O port" />
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+ <Enum name="SYNC" start="0x2" description="The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port" />
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+ </BitField>
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+ <BitField start="19" size="1" name="HYST" description="Hysteresis Enable" />
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+ <BitField start="24" size="3" name="FLEN" description="Filter Length">
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+ <Enum name="OFF" start="0x0" description="No filtering" />
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+ <Enum name="MAJ3" start="0x1" description="3-bit majority function (2 of 3)" />
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+ <Enum name="MAJ5" start="0x2" description="5-bit majority function (3 of 5)" />
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+ </BitField>
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+ </Register>
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+ <Register start="+0x10+4" size="4" name="AC_COMPCTRL1" access="Read/Write" description="Comparator Control n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="ENABLE" description="Enable" />
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+ <BitField start="1" size="1" name="SINGLE" description="Single-Shot Mode" />
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+ <BitField start="2" size="2" name="SPEED" description="Speed Selection">
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+ <Enum name="LOW" start="0x0" description="Low speed" />
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+ <Enum name="HIGH" start="0x1" description="High speed" />
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+ </BitField>
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+ <BitField start="5" size="2" name="INTSEL" description="Interrupt Selection">
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+ <Enum name="TOGGLE" start="0x0" description="Interrupt on comparator output toggle" />
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+ <Enum name="RISING" start="0x1" description="Interrupt on comparator output rising" />
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+ <Enum name="FALLING" start="0x2" description="Interrupt on comparator output falling" />
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+ <Enum name="EOC" start="0x3" description="Interrupt on end of comparison (single-shot mode only)" />
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+ </BitField>
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+ <BitField start="8" size="3" name="MUXNEG" description="Negative Input Mux Selection">
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+ <Enum name="PIN0" start="0x0" description="I/O pin 0" />
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+ <Enum name="PIN1" start="0x1" description="I/O pin 1" />
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+ <Enum name="PIN2" start="0x2" description="I/O pin 2" />
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+ <Enum name="PIN3" start="0x3" description="I/O pin 3" />
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+ <Enum name="GND" start="0x4" description="Ground" />
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+ <Enum name="VSCALE" start="0x5" description="VDD scaler" />
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+ <Enum name="BANDGAP" start="0x6" description="Internal bandgap voltage" />
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+ <Enum name="DAC" start="0x7" description="DAC output" />
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+ </BitField>
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+ <BitField start="12" size="2" name="MUXPOS" description="Positive Input Mux Selection">
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+ <Enum name="PIN0" start="0x0" description="I/O pin 0" />
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+ <Enum name="PIN1" start="0x1" description="I/O pin 1" />
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+ <Enum name="PIN2" start="0x2" description="I/O pin 2" />
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+ <Enum name="PIN3" start="0x3" description="I/O pin 3" />
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+ </BitField>
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+ <BitField start="15" size="1" name="SWAP" description="Swap Inputs and Invert" />
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+ <BitField start="16" size="2" name="OUT" description="Output">
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+ <Enum name="OFF" start="0x0" description="The output of COMPn is not routed to the COMPn I/O port" />
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+ <Enum name="ASYNC" start="0x1" description="The asynchronous output of COMPn is routed to the COMPn I/O port" />
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+ <Enum name="SYNC" start="0x2" description="The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port" />
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+ </BitField>
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+ <BitField start="19" size="1" name="HYST" description="Hysteresis Enable" />
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+ <BitField start="24" size="3" name="FLEN" description="Filter Length">
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+ <Enum name="OFF" start="0x0" description="No filtering" />
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+ <Enum name="MAJ3" start="0x1" description="3-bit majority function (2 of 3)" />
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+ <Enum name="MAJ5" start="0x2" description="5-bit majority function (3 of 5)" />
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+ </BitField>
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+ </Register>
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+ <Register start="+0x00" size="1" name="AC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
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+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
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+ <BitField start="2" size="1" name="RUNSTDBY" description="Run in Standby" />
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+ <BitField start="7" size="1" name="LPMUX" description="Low-Power Mux" />
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+ </Register>
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+ <Register start="+0x01" size="1" name="AC_CTRLB" access="WriteOnly" description="Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="START0" description="Comparator 0 Start Comparison" />
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+ <BitField start="1" size="1" name="START1" description="Comparator 1 Start Comparison" />
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+ </Register>
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+ <Register start="+0x02" size="2" name="AC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="COMPEO0" description="Comparator 0 Event Output Enable" />
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+ <BitField start="1" size="1" name="COMPEO1" description="Comparator 1 Event Output Enable" />
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+ <BitField start="4" size="1" name="WINEO0" description="Window 0 Event Output Enable" />
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+ <BitField start="8" size="1" name="COMPEI0" description="Comparator 0 Event Input" />
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+ <BitField start="9" size="1" name="COMPEI1" description="Comparator 1 Event Input" />
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+ </Register>
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+ <Register start="+0x04" size="1" name="AC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="COMP0" description="Comparator 0 Interrupt Enable" />
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+ <BitField start="1" size="1" name="COMP1" description="Comparator 1 Interrupt Enable" />
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+ <BitField start="4" size="1" name="WIN0" description="Window 0 Interrupt Enable" />
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+ </Register>
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+ <Register start="+0x05" size="1" name="AC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="COMP0" description="Comparator 0 Interrupt Enable" />
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+ <BitField start="1" size="1" name="COMP1" description="Comparator 1 Interrupt Enable" />
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+ <BitField start="4" size="1" name="WIN0" description="Window 0 Interrupt Enable" />
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+ </Register>
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+ <Register start="+0x06" size="1" name="AC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="COMP0" description="Comparator 0" />
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+ <BitField start="1" size="1" name="COMP1" description="Comparator 1" />
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+ <BitField start="4" size="1" name="WIN0" description="Window 0" />
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+ </Register>
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+ <Register start="+0x20+0" size="1" name="AC_SCALER0" access="Read/Write" description="Scaler n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="6" name="VALUE" description="Scaler Value" />
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+ </Register>
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+ <Register start="+0x20+1" size="1" name="AC_SCALER1" access="Read/Write" description="Scaler n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="6" name="VALUE" description="Scaler Value" />
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+ </Register>
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+ <Register start="+0x08" size="1" name="AC_STATUSA" access="ReadOnly" description="Status A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="STATE0" description="Comparator 0 Current State" />
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+ <BitField start="1" size="1" name="STATE1" description="Comparator 1 Current State" />
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+ <BitField start="4" size="2" name="WSTATE0" description="Window 0 Current State">
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+ <Enum name="ABOVE" start="0x0" description="Signal is above window" />
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+ <Enum name="INSIDE" start="0x1" description="Signal is inside window" />
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+ <Enum name="BELOW" start="0x2" description="Signal is below window" />
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+ </BitField>
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+ </Register>
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+ <Register start="+0x09" size="1" name="AC_STATUSB" access="ReadOnly" description="Status B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="READY0" description="Comparator 0 Ready" />
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+ <BitField start="1" size="1" name="READY1" description="Comparator 1 Ready" />
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+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
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+ </Register>
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+ <Register start="+0x0A" size="1" name="AC_STATUSC" access="ReadOnly" description="Status C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="STATE0" description="Comparator 0 Current State" />
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+ <BitField start="1" size="1" name="STATE1" description="Comparator 1 Current State" />
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+ <BitField start="4" size="2" name="WSTATE0" description="Window 0 Current State">
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+ <Enum name="ABOVE" start="0x0" description="Signal is above window" />
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+ <Enum name="INSIDE" start="0x1" description="Signal is inside window" />
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+ <Enum name="BELOW" start="0x2" description="Signal is below window" />
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+ </BitField>
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+ </Register>
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+ <Register start="+0x0C" size="1" name="AC_WINCTRL" access="Read/Write" description="Window Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="WEN0" description="Window 0 Mode Enable" />
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+ <BitField start="1" size="2" name="WINTSEL0" description="Window 0 Interrupt Selection">
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+ <Enum name="ABOVE" start="0x0" description="Interrupt on signal above window" />
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+ <Enum name="INSIDE" start="0x1" description="Interrupt on signal inside window" />
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+ <Enum name="BELOW" start="0x2" description="Interrupt on signal below window" />
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+ <Enum name="OUTSIDE" start="0x3" description="Interrupt on signal outside window" />
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+ </BitField>
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+ </Register>
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+ </RegisterGroup>
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+ <RegisterGroup name="ADC" start="0x42004000" description="Analog Digital Converter">
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+ <Register start="+0x02" size="1" name="ADC_AVGCTRL" access="Read/Write" description="Average Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="4" name="SAMPLENUM" description="Number of Samples to be Collected">
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+ <Enum name="1" start="0x0" description="1 sample" />
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+ <Enum name="2" start="0x1" description="2 samples" />
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+ <Enum name="4" start="0x2" description="4 samples" />
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+ <Enum name="8" start="0x3" description="8 samples" />
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+ <Enum name="16" start="0x4" description="16 samples" />
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+ <Enum name="32" start="0x5" description="32 samples" />
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+ <Enum name="64" start="0x6" description="64 samples" />
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+ <Enum name="128" start="0x7" description="128 samples" />
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+ <Enum name="256" start="0x8" description="256 samples" />
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+ <Enum name="512" start="0x9" description="512 samples" />
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+ <Enum name="1024" start="0xa" description="1024 samples" />
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+ </BitField>
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+ <BitField start="4" size="3" name="ADJRES" description="Adjusting Result / Division Coefficient" />
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+ </Register>
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+ <Register start="+0x28" size="2" name="ADC_CALIB" access="Read/Write" description="Calibration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="8" name="LINEARITY_CAL" description="Linearity Calibration Value" />
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+ <BitField start="8" size="3" name="BIAS_CAL" description="Bias Calibration Value" />
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+ </Register>
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+ <Register start="+0x00" size="1" name="ADC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
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+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
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+ <BitField start="2" size="1" name="RUNSTDBY" description="Run in Standby" />
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+ </Register>
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+ <Register start="+0x04" size="2" name="ADC_CTRLB" access="Read/Write" description="Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="DIFFMODE" description="Differential Mode" />
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+ <BitField start="1" size="1" name="LEFTADJ" description="Left-Adjusted Result" />
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+ <BitField start="2" size="1" name="FREERUN" description="Free Running Mode" />
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+ <BitField start="3" size="1" name="CORREN" description="Digital Correction Logic Enabled" />
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+ <BitField start="4" size="2" name="RESSEL" description="Conversion Result Resolution">
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+ <Enum name="12BIT" start="0x0" description="12-bit result" />
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+ <Enum name="16BIT" start="0x1" description="For averaging mode output" />
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+ <Enum name="10BIT" start="0x2" description="10-bit result" />
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+ <Enum name="8BIT" start="0x3" description="8-bit result" />
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+ </BitField>
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+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler Configuration">
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+ <Enum name="DIV4" start="0x0" description="Peripheral clock divided by 4" />
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+ <Enum name="DIV8" start="0x1" description="Peripheral clock divided by 8" />
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+ <Enum name="DIV16" start="0x2" description="Peripheral clock divided by 16" />
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+ <Enum name="DIV32" start="0x3" description="Peripheral clock divided by 32" />
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+ <Enum name="DIV64" start="0x4" description="Peripheral clock divided by 64" />
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+ <Enum name="DIV128" start="0x5" description="Peripheral clock divided by 128" />
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+ <Enum name="DIV256" start="0x6" description="Peripheral clock divided by 256" />
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+ <Enum name="DIV512" start="0x7" description="Peripheral clock divided by 512" />
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+ </BitField>
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+ </Register>
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+ <Register start="+0x2A" size="1" name="ADC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run" />
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+ </Register>
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+ <Register start="+0x14" size="1" name="ADC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="1" name="STARTEI" description="Start Conversion Event In" />
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+ <BitField start="1" size="1" name="SYNCEI" description="Synchronization Event In" />
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+ <BitField start="4" size="1" name="RESRDYEO" description="Result Ready Event Out" />
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+ <BitField start="5" size="1" name="WINMONEO" description="Window Monitor Event Out" />
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+ </Register>
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+ <Register start="+0x24" size="2" name="ADC_GAINCORR" access="Read/Write" description="Gain Correction" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="12" name="GAINCORR" description="Gain Correction Value" />
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+ </Register>
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+ <Register start="+0x10" size="4" name="ADC_INPUTCTRL" access="Read/Write" description="Input Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
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+ <BitField start="0" size="5" name="MUXPOS" description="Positive Mux Input Selection">
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+ <Enum name="PIN0" start="0x0" description="ADC AIN0 Pin" />
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+ <Enum name="PIN1" start="0x1" description="ADC AIN1 Pin" />
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+ <Enum name="PIN2" start="0x2" description="ADC AIN2 Pin" />
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+ <Enum name="PIN3" start="0x3" description="ADC AIN3 Pin" />
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+ <Enum name="PIN4" start="0x4" description="ADC AIN4 Pin" />
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+ <Enum name="PIN5" start="0x5" description="ADC AIN5 Pin" />
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+ <Enum name="PIN6" start="0x6" description="ADC AIN6 Pin" />
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+ <Enum name="PIN7" start="0x7" description="ADC AIN7 Pin" />
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+ <Enum name="PIN8" start="0x8" description="ADC AIN8 Pin" />
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+ <Enum name="PIN9" start="0x9" description="ADC AIN9 Pin" />
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+ <Enum name="PIN10" start="0xa" description="ADC AIN10 Pin" />
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+ <Enum name="PIN11" start="0xb" description="ADC AIN11 Pin" />
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+ <Enum name="PIN12" start="0xc" description="ADC AIN12 Pin" />
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+ <Enum name="PIN13" start="0xd" description="ADC AIN13 Pin" />
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+ <Enum name="PIN14" start="0xe" description="ADC AIN14 Pin" />
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+ <Enum name="PIN15" start="0xf" description="ADC AIN15 Pin" />
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+ <Enum name="PIN16" start="0x10" description="ADC AIN16 Pin" />
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+ <Enum name="PIN17" start="0x11" description="ADC AIN17 Pin" />
|
|
|
+ <Enum name="PIN18" start="0x12" description="ADC AIN18 Pin" />
|
|
|
+ <Enum name="PIN19" start="0x13" description="ADC AIN19 Pin" />
|
|
|
+ <Enum name="TEMP" start="0x18" description="Temperature Reference" />
|
|
|
+ <Enum name="BANDGAP" start="0x19" description="Bandgap Voltage" />
|
|
|
+ <Enum name="SCALEDCOREVCC" start="0x1a" description="1/4 Scaled Core Supply" />
|
|
|
+ <Enum name="SCALEDIOVCC" start="0x1b" description="1/4 Scaled I/O Supply" />
|
|
|
+ <Enum name="DAC" start="0x1c" description="DAC Output" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="5" name="MUXNEG" description="Negative Mux Input Selection">
|
|
|
+ <Enum name="PIN0" start="0x0" description="ADC AIN0 Pin" />
|
|
|
+ <Enum name="PIN1" start="0x1" description="ADC AIN1 Pin" />
|
|
|
+ <Enum name="PIN2" start="0x2" description="ADC AIN2 Pin" />
|
|
|
+ <Enum name="PIN3" start="0x3" description="ADC AIN3 Pin" />
|
|
|
+ <Enum name="PIN4" start="0x4" description="ADC AIN4 Pin" />
|
|
|
+ <Enum name="PIN5" start="0x5" description="ADC AIN5 Pin" />
|
|
|
+ <Enum name="PIN6" start="0x6" description="ADC AIN6 Pin" />
|
|
|
+ <Enum name="PIN7" start="0x7" description="ADC AIN7 Pin" />
|
|
|
+ <Enum name="GND" start="0x18" description="Internal Ground" />
|
|
|
+ <Enum name="IOGND" start="0x19" description="I/O Ground" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="4" name="INPUTSCAN" description="Number of Input Channels Included in Scan" />
|
|
|
+ <BitField start="20" size="4" name="INPUTOFFSET" description="Positive Mux Setting Offset" />
|
|
|
+ <BitField start="24" size="4" name="GAIN" description="Gain Factor Selection">
|
|
|
+ <Enum name="1X" start="0x0" description="1x" />
|
|
|
+ <Enum name="2X" start="0x1" description="2x" />
|
|
|
+ <Enum name="4X" start="0x2" description="4x" />
|
|
|
+ <Enum name="8X" start="0x3" description="8x" />
|
|
|
+ <Enum name="16X" start="0x4" description="16x" />
|
|
|
+ <Enum name="DIV2" start="0xf" description="1/2x" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="ADC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="RESRDY" description="Result Ready Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="OVERRUN" description="Overrun Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="WINMON" description="Window Monitor Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x17" size="1" name="ADC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="RESRDY" description="Result Ready Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="OVERRUN" description="Overrun Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="WINMON" description="Window Monitor Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="ADC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="RESRDY" description="Result Ready" />
|
|
|
+ <BitField start="1" size="1" name="OVERRUN" description="Overrun" />
|
|
|
+ <BitField start="2" size="1" name="WINMON" description="Window Monitor" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x26" size="2" name="ADC_OFFSETCORR" access="Read/Write" description="Offset Correction" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="12" name="OFFSETCORR" description="Offset Correction Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x01" size="1" name="ADC_REFCTRL" access="Read/Write" description="Reference Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="REFSEL" description="Reference Selection">
|
|
|
+ <Enum name="INT1V" start="0x0" description="1.0V voltage reference" />
|
|
|
+ <Enum name="INTVCC0" start="0x1" description="1/1.48 VDDANA" />
|
|
|
+ <Enum name="INTVCC1" start="0x2" description="1/2 VDDANA (only for VDDANA > 2.0V)" />
|
|
|
+ <Enum name="AREFA" start="0x3" description="External reference" />
|
|
|
+ <Enum name="AREFB" start="0x4" description="External reference" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="REFCOMP" description="Reference Buffer Offset Compensation Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="ADC_RESULT" access="ReadOnly" description="Result" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="RESULT" description="Result Conversion Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x03" size="1" name="ADC_SAMPCTRL" access="Read/Write" description="Sampling Time Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="SAMPLEN" description="Sampling Time Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x19" size="1" name="ADC_STATUS" access="ReadOnly" description="Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="ADC_SWTRIG" access="Read/Write" description="Software Trigger" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="FLUSH" description="ADC Conversion Flush" />
|
|
|
+ <BitField start="1" size="1" name="START" description="ADC Start Conversion" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="ADC_WINCTRL" access="Read/Write" description="Window Monitor Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="WINMODE" description="Window Monitor Mode">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="No window mode (default)" />
|
|
|
+ <Enum name="MODE1" start="0x1" description="Mode 1: RESULT > WINLT" />
|
|
|
+ <Enum name="MODE2" start="0x2" description="Mode 2: RESULT < WINUT" />
|
|
|
+ <Enum name="MODE3" start="0x3" description="Mode 3: WINLT < RESULT < WINUT" />
|
|
|
+ <Enum name="MODE4" start="0x4" description="Mode 4: !(WINLT < RESULT < WINUT)" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="2" name="ADC_WINLT" access="Read/Write" description="Window Monitor Lower Threshold" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="WINLT" description="Window Lower Threshold" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20" size="2" name="ADC_WINUT" access="Read/Write" description="Window Monitor Upper Threshold" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="WINUT" description="Window Upper Threshold" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="DAC" start="0x42004800" description="Digital Analog Converter">
|
|
|
+ <Register start="+0x0" size="1" name="DAC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1" size="1" name="DAC_CTRLB" access="Read/Write" description="Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EOEN" description="External Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="IOEN" description="Internal Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="LEFTADJ" description="Left Adjusted Data" />
|
|
|
+ <BitField start="3" size="1" name="VPD" description="Voltage Pump Disable" />
|
|
|
+ <BitField start="4" size="1" name="BDWP" description="Bypass DATABUF Write Protection" />
|
|
|
+ <BitField start="6" size="2" name="REFSEL" description="Reference Selection">
|
|
|
+ <Enum name="INT1V" start="0x0" description="Internal 1.0V reference" />
|
|
|
+ <Enum name="AVCC" start="0x1" description="AVCC" />
|
|
|
+ <Enum name="VREFP" start="0x2" description="External reference" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x8" size="2" name="DAC_DATA" access="Read/Write" description="Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="DATA" description="Data value to be converted" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xC" size="2" name="DAC_DATABUF" access="Read/Write" description="Data Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="DATABUF" description="Data Buffer" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x2" size="1" name="DAC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="STARTEI" description="Start Conversion Event Input" />
|
|
|
+ <BitField start="1" size="1" name="EMPTYEO" description="Data Buffer Empty Event Output" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4" size="1" name="DAC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="UNDERRUN" description="Underrun Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="EMPTY" description="Data Buffer Empty Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x5" size="1" name="DAC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="UNDERRUN" description="Underrun Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="EMPTY" description="Data Buffer Empty Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6" size="1" name="DAC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="UNDERRUN" description="Underrun" />
|
|
|
+ <BitField start="1" size="1" name="EMPTY" description="Data Buffer Empty" />
|
|
|
+ <BitField start="2" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x7" size="1" name="DAC_STATUS" access="ReadOnly" description="Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy Status" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="DMAC" start="0x41004800" description="Direct Memory Access Controller">
|
|
|
+ <Register start="+0x30" size="4" name="DMAC_ACTIVE" access="ReadOnly" description="Active Channel and Levels" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="LVLEX0" description="Level 0 Channel Trigger Request Executing" />
|
|
|
+ <BitField start="1" size="1" name="LVLEX1" description="Level 1 Channel Trigger Request Executing" />
|
|
|
+ <BitField start="2" size="1" name="LVLEX2" description="Level 2 Channel Trigger Request Executing" />
|
|
|
+ <BitField start="3" size="1" name="LVLEX3" description="Level 3 Channel Trigger Request Executing" />
|
|
|
+ <BitField start="8" size="5" name="ID" description="Active Channel ID" />
|
|
|
+ <BitField start="15" size="1" name="ABUSY" description="Active Channel Busy" />
|
|
|
+ <BitField start="16" size="16" name="BTCNT" description="Active Channel Block Transfer Count" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="DMAC_BASEADDR" access="Read/Write" description="Descriptor Memory Section Base Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="BASEADDR" description="Descriptor Memory Base Address" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="DMAC_BUSYCH" access="ReadOnly" description="Busy Channels" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSYCH0" description="Busy Channel 0" />
|
|
|
+ <BitField start="1" size="1" name="BUSYCH1" description="Busy Channel 1" />
|
|
|
+ <BitField start="2" size="1" name="BUSYCH2" description="Busy Channel 2" />
|
|
|
+ <BitField start="3" size="1" name="BUSYCH3" description="Busy Channel 3" />
|
|
|
+ <BitField start="4" size="1" name="BUSYCH4" description="Busy Channel 4" />
|
|
|
+ <BitField start="5" size="1" name="BUSYCH5" description="Busy Channel 5" />
|
|
|
+ <BitField start="6" size="1" name="BUSYCH6" description="Busy Channel 6" />
|
|
|
+ <BitField start="7" size="1" name="BUSYCH7" description="Busy Channel 7" />
|
|
|
+ <BitField start="8" size="1" name="BUSYCH8" description="Busy Channel 8" />
|
|
|
+ <BitField start="9" size="1" name="BUSYCH9" description="Busy Channel 9" />
|
|
|
+ <BitField start="10" size="1" name="BUSYCH10" description="Busy Channel 10" />
|
|
|
+ <BitField start="11" size="1" name="BUSYCH11" description="Busy Channel 11" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="1" name="DMAC_CHCTRLA" access="Read/Write" description="Channel Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Channel Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Channel Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44" size="4" name="DMAC_CHCTRLB" access="Read/Write" description="Channel Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Input Action">
|
|
|
+ <Enum name="NOACT" start="0x0" description="No action" />
|
|
|
+ <Enum name="TRIG" start="0x1" description="Transfer and periodic transfer trigger" />
|
|
|
+ <Enum name="CTRIG" start="0x2" description="Conditional transfer trigger" />
|
|
|
+ <Enum name="CBLOCK" start="0x3" description="Conditional block transfer" />
|
|
|
+ <Enum name="SUSPEND" start="0x4" description="Channel suspend operation" />
|
|
|
+ <Enum name="RESUME" start="0x5" description="Channel resume operation" />
|
|
|
+ <Enum name="SSKIP" start="0x6" description="Skip next block suspend action" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="EVIE" description="Channel Event Input Enable" />
|
|
|
+ <BitField start="4" size="1" name="EVOE" description="Channel Event Output Enable" />
|
|
|
+ <BitField start="5" size="2" name="LVL" description="Channel Arbitration Level">
|
|
|
+ <Enum name="LVL0" start="0x0" description="Channel Priority Level 0" />
|
|
|
+ <Enum name="LVL1" start="0x1" description="Channel Priority Level 1" />
|
|
|
+ <Enum name="LVL2" start="0x2" description="Channel Priority Level 2" />
|
|
|
+ <Enum name="LVL3" start="0x3" description="Channel Priority Level 3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="6" name="TRIGSRC" description="Trigger Source">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Only software/event triggers" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="22" size="2" name="TRIGACT" description="Trigger Action">
|
|
|
+ <Enum name="BLOCK" start="0x0" description="One trigger required for each block transfer" />
|
|
|
+ <Enum name="BEAT" start="0x2" description="One trigger required for each beat transfer" />
|
|
|
+ <Enum name="TRANSACTION" start="0x3" description="One trigger required for each transaction" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="24" size="2" name="CMD" description="Software Command">
|
|
|
+ <Enum name="NOACT" start="0x0" description="No action" />
|
|
|
+ <Enum name="SUSPEND" start="0x1" description="Channel suspend operation" />
|
|
|
+ <Enum name="RESUME" start="0x2" description="Channel resume operation" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x3F" size="1" name="DMAC_CHID" access="Read/Write" description="Channel ID" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="ID" description="Channel ID" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4C" size="1" name="DMAC_CHINTENCLR" access="Read/Write" description="Channel Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TERR" description="Channel Transfer Error Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TCMPL" description="Channel Transfer Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="SUSP" description="Channel Suspend Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4D" size="1" name="DMAC_CHINTENSET" access="Read/Write" description="Channel Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TERR" description="Channel Transfer Error Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TCMPL" description="Channel Transfer Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="SUSP" description="Channel Suspend Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4E" size="1" name="DMAC_CHINTFLAG" access="Read/Write" description="Channel Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TERR" description="Channel Transfer Error" />
|
|
|
+ <BitField start="1" size="1" name="TCMPL" description="Channel Transfer Complete" />
|
|
|
+ <BitField start="2" size="1" name="SUSP" description="Channel Suspend" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4F" size="1" name="DMAC_CHSTATUS" access="ReadOnly" description="Channel Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PEND" description="Channel Pending" />
|
|
|
+ <BitField start="1" size="1" name="BUSY" description="Channel Busy" />
|
|
|
+ <BitField start="2" size="1" name="FERR" description="Channel Fetch Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="4" name="DMAC_CRCCHKSUM" access="Read/Write" description="CRC Checksum" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="CRCCHKSUM" description="CRC Checksum" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="DMAC_CRCCTRL" access="Read/Write" description="CRC Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="CRCBEATSIZE" description="CRC Beat Size">
|
|
|
+ <Enum name="BYTE" start="0x0" description="8-bit bus transfer" />
|
|
|
+ <Enum name="HWORD" start="0x1" description="16-bit bus transfer" />
|
|
|
+ <Enum name="WORD" start="0x2" description="32-bit bus transfer" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="2" size="2" name="CRCPOLY" description="CRC Polynomial Type">
|
|
|
+ <Enum name="CRC16" start="0x0" description="CRC-16 (CRC-CCITT)" />
|
|
|
+ <Enum name="CRC32" start="0x1" description="CRC32 (IEEE 802.3)" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="6" name="CRCSRC" description="CRC Input Source">
|
|
|
+ <Enum name="NOACT" start="0x0" description="No action" />
|
|
|
+ <Enum name="IO" start="0x1" description="I/O interface" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="DMAC_CRCDATAIN" access="Read/Write" description="CRC Data Input" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="CRCDATAIN" description="CRC Data Input" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="DMAC_CRCSTATUS" access="Read/Write" description="CRC Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CRCBUSY" description="CRC Module Busy" />
|
|
|
+ <BitField start="1" size="1" name="CRCZERO" description="CRC Zero" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="DMAC_CTRL" access="Read/Write" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="DMAENABLE" description="DMA Enable" />
|
|
|
+ <BitField start="2" size="1" name="CRCENABLE" description="CRC Enable" />
|
|
|
+ <BitField start="8" size="1" name="LVLEN0" description="Priority Level 0 Enable" />
|
|
|
+ <BitField start="9" size="1" name="LVLEN1" description="Priority Level 1 Enable" />
|
|
|
+ <BitField start="10" size="1" name="LVLEN2" description="Priority Level 2 Enable" />
|
|
|
+ <BitField start="11" size="1" name="LVLEN3" description="Priority Level 3 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="DMAC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20" size="2" name="DMAC_INTPEND" access="Read/Write" description="Interrupt Pending" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="ID" description="Channel ID" />
|
|
|
+ <BitField start="8" size="1" name="TERR" description="Transfer Error" />
|
|
|
+ <BitField start="9" size="1" name="TCMPL" description="Transfer Complete" />
|
|
|
+ <BitField start="10" size="1" name="SUSP" description="Channel Suspend" />
|
|
|
+ <BitField start="13" size="1" name="FERR" description="Fetch Error" />
|
|
|
+ <BitField start="14" size="1" name="BUSY" description="Busy" />
|
|
|
+ <BitField start="15" size="1" name="PEND" description="Pending" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x24" size="4" name="DMAC_INTSTATUS" access="ReadOnly" description="Interrupt Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CHINT0" description="Channel 0 Pending Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="CHINT1" description="Channel 1 Pending Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="CHINT2" description="Channel 2 Pending Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="CHINT3" description="Channel 3 Pending Interrupt" />
|
|
|
+ <BitField start="4" size="1" name="CHINT4" description="Channel 4 Pending Interrupt" />
|
|
|
+ <BitField start="5" size="1" name="CHINT5" description="Channel 5 Pending Interrupt" />
|
|
|
+ <BitField start="6" size="1" name="CHINT6" description="Channel 6 Pending Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="CHINT7" description="Channel 7 Pending Interrupt" />
|
|
|
+ <BitField start="8" size="1" name="CHINT8" description="Channel 8 Pending Interrupt" />
|
|
|
+ <BitField start="9" size="1" name="CHINT9" description="Channel 9 Pending Interrupt" />
|
|
|
+ <BitField start="10" size="1" name="CHINT10" description="Channel 10 Pending Interrupt" />
|
|
|
+ <BitField start="11" size="1" name="CHINT11" description="Channel 11 Pending Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x2C" size="4" name="DMAC_PENDCH" access="ReadOnly" description="Pending Channels" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PENDCH0" description="Pending Channel 0" />
|
|
|
+ <BitField start="1" size="1" name="PENDCH1" description="Pending Channel 1" />
|
|
|
+ <BitField start="2" size="1" name="PENDCH2" description="Pending Channel 2" />
|
|
|
+ <BitField start="3" size="1" name="PENDCH3" description="Pending Channel 3" />
|
|
|
+ <BitField start="4" size="1" name="PENDCH4" description="Pending Channel 4" />
|
|
|
+ <BitField start="5" size="1" name="PENDCH5" description="Pending Channel 5" />
|
|
|
+ <BitField start="6" size="1" name="PENDCH6" description="Pending Channel 6" />
|
|
|
+ <BitField start="7" size="1" name="PENDCH7" description="Pending Channel 7" />
|
|
|
+ <BitField start="8" size="1" name="PENDCH8" description="Pending Channel 8" />
|
|
|
+ <BitField start="9" size="1" name="PENDCH9" description="Pending Channel 9" />
|
|
|
+ <BitField start="10" size="1" name="PENDCH10" description="Pending Channel 10" />
|
|
|
+ <BitField start="11" size="1" name="PENDCH11" description="Pending Channel 11" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="4" name="DMAC_PRICTRL0" access="Read/Write" description="Priority Control 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="LVLPRI0" description="Level 0 Channel Priority Number" />
|
|
|
+ <BitField start="7" size="1" name="RRLVLEN0" description="Level 0 Round-Robin Scheduling Enable" />
|
|
|
+ <BitField start="8" size="4" name="LVLPRI1" description="Level 1 Channel Priority Number" />
|
|
|
+ <BitField start="15" size="1" name="RRLVLEN1" description="Level 1 Round-Robin Scheduling Enable" />
|
|
|
+ <BitField start="16" size="4" name="LVLPRI2" description="Level 2 Channel Priority Number" />
|
|
|
+ <BitField start="23" size="1" name="RRLVLEN2" description="Level 2 Round-Robin Scheduling Enable" />
|
|
|
+ <BitField start="24" size="4" name="LVLPRI3" description="Level 3 Channel Priority Number" />
|
|
|
+ <BitField start="31" size="1" name="RRLVLEN3" description="Level 3 Round-Robin Scheduling Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="DMAC_QOSCTRL" access="Read/Write" description="QOS Control" reset_value="0x15" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="WRBQOS" description="Write-Back Quality of Service">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Background (no sensitive operation)" />
|
|
|
+ <Enum name="LOW" start="0x1" description="Sensitive Bandwidth" />
|
|
|
+ <Enum name="MEDIUM" start="0x2" description="Sensitive Latency" />
|
|
|
+ <Enum name="HIGH" start="0x3" description="Critical Latency" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="2" size="2" name="FQOS" description="Fetch Quality of Service">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Background (no sensitive operation)" />
|
|
|
+ <Enum name="LOW" start="0x1" description="Sensitive Bandwidth" />
|
|
|
+ <Enum name="MEDIUM" start="0x2" description="Sensitive Latency" />
|
|
|
+ <Enum name="HIGH" start="0x3" description="Critical Latency" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="2" name="DQOS" description="Data Transfer Quality of Service">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Background (no sensitive operation)" />
|
|
|
+ <Enum name="LOW" start="0x1" description="Sensitive Bandwidth" />
|
|
|
+ <Enum name="MEDIUM" start="0x2" description="Sensitive Latency" />
|
|
|
+ <Enum name="HIGH" start="0x3" description="Critical Latency" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="DMAC_SWTRIGCTRL" access="Read/Write" description="Software Trigger Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWTRIG0" description="Channel 0 Software Trigger" />
|
|
|
+ <BitField start="1" size="1" name="SWTRIG1" description="Channel 1 Software Trigger" />
|
|
|
+ <BitField start="2" size="1" name="SWTRIG2" description="Channel 2 Software Trigger" />
|
|
|
+ <BitField start="3" size="1" name="SWTRIG3" description="Channel 3 Software Trigger" />
|
|
|
+ <BitField start="4" size="1" name="SWTRIG4" description="Channel 4 Software Trigger" />
|
|
|
+ <BitField start="5" size="1" name="SWTRIG5" description="Channel 5 Software Trigger" />
|
|
|
+ <BitField start="6" size="1" name="SWTRIG6" description="Channel 6 Software Trigger" />
|
|
|
+ <BitField start="7" size="1" name="SWTRIG7" description="Channel 7 Software Trigger" />
|
|
|
+ <BitField start="8" size="1" name="SWTRIG8" description="Channel 8 Software Trigger" />
|
|
|
+ <BitField start="9" size="1" name="SWTRIG9" description="Channel 9 Software Trigger" />
|
|
|
+ <BitField start="10" size="1" name="SWTRIG10" description="Channel 10 Software Trigger" />
|
|
|
+ <BitField start="11" size="1" name="SWTRIG11" description="Channel 11 Software Trigger" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x38" size="4" name="DMAC_WRBADDR" access="Read/Write" description="Write-Back Memory Section Base Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="WRBADDR" description="Write-Back Memory Base Address" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="DSU" start="0x41002000" description="Device Service Unit">
|
|
|
+ <Register start="+0x0004" size="4" name="DSU_ADDR" access="Read/Write" description="Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="30" name="ADDR" description="Address" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FF0" size="4" name="DSU_CID0" access="ReadOnly" description="Component Identification 0" reset_value="0x0000000D" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="PREAMBLEB0" description="Preamble Byte 0" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FF4" size="4" name="DSU_CID1" access="ReadOnly" description="Component Identification 1" reset_value="0x00000010" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PREAMBLE" description="Preamble" />
|
|
|
+ <BitField start="4" size="4" name="CCLASS" description="Component Class" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FF8" size="4" name="DSU_CID2" access="ReadOnly" description="Component Identification 2" reset_value="0x00000005" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="PREAMBLEB2" description="Preamble Byte 2" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FFC" size="4" name="DSU_CID3" access="ReadOnly" description="Component Identification 3" reset_value="0x000000B1" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="PREAMBLEB3" description="Preamble Byte 3" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0000" size="1" name="DSU_CTRL" access="WriteOnly" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="2" size="1" name="CRC" description="32-bit Cyclic Redundancy Check" />
|
|
|
+ <BitField start="3" size="1" name="MBIST" description="Memory Built-In Self-Test" />
|
|
|
+ <BitField start="4" size="1" name="CE" description="Chip Erase" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x000C" size="4" name="DSU_DATA" access="Read/Write" description="Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DATA" description="Data" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0010+0" size="4" name="DSU_DCC0" access="Read/Write" description="Debug Communication Channel n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DATA" description="Data" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0010+4" size="4" name="DSU_DCC1" access="Read/Write" description="Debug Communication Channel n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DATA" description="Data" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0018" size="4" name="DSU_DID" access="ReadOnly" description="Device Identification" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DEVSEL" description="Device Select" />
|
|
|
+ <BitField start="8" size="4" name="REVISION" description="Revision" />
|
|
|
+ <BitField start="12" size="4" name="DIE" description="Die Identification" />
|
|
|
+ <BitField start="16" size="6" name="SERIES" description="Product Series" />
|
|
|
+ <BitField start="23" size="5" name="FAMILY" description="Product Family" />
|
|
|
+ <BitField start="28" size="4" name="PROCESSOR" description="Processor" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1008" size="4" name="DSU_END" access="ReadOnly" description="Coresight ROM Table End" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="END" description="End Marker" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1000+0" size="4" name="DSU_ENTRY0" access="ReadOnly" description="Coresight ROM Table Entry n" reset_value="0x00000002" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EPRES" description="Entry Present" />
|
|
|
+ <BitField start="1" size="1" name="FMT" description="Format" />
|
|
|
+ <BitField start="12" size="20" name="ADDOFF" description="Address Offset" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1000+4" size="4" name="DSU_ENTRY1" access="ReadOnly" description="Coresight ROM Table Entry n" reset_value="0x00000002" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EPRES" description="Entry Present" />
|
|
|
+ <BitField start="1" size="1" name="FMT" description="Format" />
|
|
|
+ <BitField start="12" size="20" name="ADDOFF" description="Address Offset" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0008" size="4" name="DSU_LENGTH" access="Read/Write" description="Length" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="30" name="LENGTH" description="Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FCC" size="4" name="DSU_MEMTYPE" access="ReadOnly" description="Coresight ROM Table Memory Type" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SMEMP" description="System Memory Present" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FE0" size="4" name="DSU_PID0" access="ReadOnly" description="Peripheral Identification 0" reset_value="0x000000D0" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="PARTNBL" description="Part Number Low" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FE4" size="4" name="DSU_PID1" access="ReadOnly" description="Peripheral Identification 1" reset_value="0x000000FC" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PARTNBH" description="Part Number High" />
|
|
|
+ <BitField start="4" size="4" name="JEPIDCL" description="Low part of the JEP-106 Identity Code" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FE8" size="4" name="DSU_PID2" access="ReadOnly" description="Peripheral Identification 2" reset_value="0x00000009" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="JEPIDCH" description="JEP-106 Identity Code High" />
|
|
|
+ <BitField start="3" size="1" name="JEPU" description="JEP-106 Identity Code is used" />
|
|
|
+ <BitField start="4" size="4" name="REVISION" description="Revision Number" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FEC" size="4" name="DSU_PID3" access="ReadOnly" description="Peripheral Identification 3" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="CUSMOD" description="ARM CUSMOD" />
|
|
|
+ <BitField start="4" size="4" name="REVAND" description="Revision Number" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1FD0" size="4" name="DSU_PID4" access="ReadOnly" description="Peripheral Identification 4" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="JEPCC" description="JEP-106 Continuation Code" />
|
|
|
+ <BitField start="4" size="4" name="FKBC" description="4KB Count" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0001" size="1" name="DSU_STATUSA" access="Read/Write" description="Status A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DONE" description="Done" />
|
|
|
+ <BitField start="1" size="1" name="CRSTEXT" description="CPU Reset Phase Extension" />
|
|
|
+ <BitField start="2" size="1" name="BERR" description="Bus Error" />
|
|
|
+ <BitField start="3" size="1" name="FAIL" description="Failure" />
|
|
|
+ <BitField start="4" size="1" name="PERR" description="Protection Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0002" size="1" name="DSU_STATUSB" access="ReadOnly" description="Status B" reset_value="0x10" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PROT" description="Protected" />
|
|
|
+ <BitField start="1" size="1" name="DBGPRES" description="Debugger Present" />
|
|
|
+ <BitField start="2" size="1" name="DCCD0" description="Debug Communication Channel 0 Dirty" />
|
|
|
+ <BitField start="3" size="1" name="DCCD1" description="Debug Communication Channel 1 Dirty" />
|
|
|
+ <BitField start="4" size="1" name="HPE" description="Hot-Plugging Enable" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="EIC" start="0x40001800" description="External Interrupt Controller">
|
|
|
+ <Register start="+0x18+0" size="4" name="EIC_CONFIG0" access="Read/Write" description="Configuration n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="SENSE0" description="Input Sense 0 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising-edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling-edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both-edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High-level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low-level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="FILTEN0" description="Filter 0 Enable" />
|
|
|
+ <BitField start="4" size="3" name="SENSE1" description="Input Sense 1 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="FILTEN1" description="Filter 1 Enable" />
|
|
|
+ <BitField start="8" size="3" name="SENSE2" description="Input Sense 2 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="FILTEN2" description="Filter 2 Enable" />
|
|
|
+ <BitField start="12" size="3" name="SENSE3" description="Input Sense 3 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="15" size="1" name="FILTEN3" description="Filter 3 Enable" />
|
|
|
+ <BitField start="16" size="3" name="SENSE4" description="Input Sense 4 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="19" size="1" name="FILTEN4" description="Filter 4 Enable" />
|
|
|
+ <BitField start="20" size="3" name="SENSE5" description="Input Sense 5 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="23" size="1" name="FILTEN5" description="Filter 5 Enable" />
|
|
|
+ <BitField start="24" size="3" name="SENSE6" description="Input Sense 6 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="27" size="1" name="FILTEN6" description="Filter 6 Enable" />
|
|
|
+ <BitField start="28" size="3" name="SENSE7" description="Input Sense 7 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="31" size="1" name="FILTEN7" description="Filter 7 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+4" size="4" name="EIC_CONFIG1" access="Read/Write" description="Configuration n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="SENSE0" description="Input Sense 0 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising-edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling-edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both-edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High-level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low-level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="FILTEN0" description="Filter 0 Enable" />
|
|
|
+ <BitField start="4" size="3" name="SENSE1" description="Input Sense 1 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="FILTEN1" description="Filter 1 Enable" />
|
|
|
+ <BitField start="8" size="3" name="SENSE2" description="Input Sense 2 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="FILTEN2" description="Filter 2 Enable" />
|
|
|
+ <BitField start="12" size="3" name="SENSE3" description="Input Sense 3 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="15" size="1" name="FILTEN3" description="Filter 3 Enable" />
|
|
|
+ <BitField start="16" size="3" name="SENSE4" description="Input Sense 4 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="19" size="1" name="FILTEN4" description="Filter 4 Enable" />
|
|
|
+ <BitField start="20" size="3" name="SENSE5" description="Input Sense 5 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="23" size="1" name="FILTEN5" description="Filter 5 Enable" />
|
|
|
+ <BitField start="24" size="3" name="SENSE6" description="Input Sense 6 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="27" size="1" name="FILTEN6" description="Filter 6 Enable" />
|
|
|
+ <BitField start="28" size="3" name="SENSE7" description="Input Sense 7 Configuration">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="31" size="1" name="FILTEN7" description="Filter 7 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="1" name="EIC_CTRL" access="Read/Write" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="EIC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EXTINTEO0" description="External Interrupt 0 Event Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="EXTINTEO1" description="External Interrupt 1 Event Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="EXTINTEO2" description="External Interrupt 2 Event Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="EXTINTEO3" description="External Interrupt 3 Event Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="EXTINTEO4" description="External Interrupt 4 Event Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="EXTINTEO5" description="External Interrupt 5 Event Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="EXTINTEO6" description="External Interrupt 6 Event Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="EXTINTEO7" description="External Interrupt 7 Event Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="EXTINTEO8" description="External Interrupt 8 Event Output Enable" />
|
|
|
+ <BitField start="9" size="1" name="EXTINTEO9" description="External Interrupt 9 Event Output Enable" />
|
|
|
+ <BitField start="10" size="1" name="EXTINTEO10" description="External Interrupt 10 Event Output Enable" />
|
|
|
+ <BitField start="11" size="1" name="EXTINTEO11" description="External Interrupt 11 Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="EXTINTEO12" description="External Interrupt 12 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="EXTINTEO13" description="External Interrupt 13 Event Output Enable" />
|
|
|
+ <BitField start="14" size="1" name="EXTINTEO14" description="External Interrupt 14 Event Output Enable" />
|
|
|
+ <BitField start="15" size="1" name="EXTINTEO15" description="External Interrupt 15 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="4" name="EIC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EXTINT0" description="External Interrupt 0 Enable" />
|
|
|
+ <BitField start="1" size="1" name="EXTINT1" description="External Interrupt 1 Enable" />
|
|
|
+ <BitField start="2" size="1" name="EXTINT2" description="External Interrupt 2 Enable" />
|
|
|
+ <BitField start="3" size="1" name="EXTINT3" description="External Interrupt 3 Enable" />
|
|
|
+ <BitField start="4" size="1" name="EXTINT4" description="External Interrupt 4 Enable" />
|
|
|
+ <BitField start="5" size="1" name="EXTINT5" description="External Interrupt 5 Enable" />
|
|
|
+ <BitField start="6" size="1" name="EXTINT6" description="External Interrupt 6 Enable" />
|
|
|
+ <BitField start="7" size="1" name="EXTINT7" description="External Interrupt 7 Enable" />
|
|
|
+ <BitField start="8" size="1" name="EXTINT8" description="External Interrupt 8 Enable" />
|
|
|
+ <BitField start="9" size="1" name="EXTINT9" description="External Interrupt 9 Enable" />
|
|
|
+ <BitField start="10" size="1" name="EXTINT10" description="External Interrupt 10 Enable" />
|
|
|
+ <BitField start="11" size="1" name="EXTINT11" description="External Interrupt 11 Enable" />
|
|
|
+ <BitField start="12" size="1" name="EXTINT12" description="External Interrupt 12 Enable" />
|
|
|
+ <BitField start="13" size="1" name="EXTINT13" description="External Interrupt 13 Enable" />
|
|
|
+ <BitField start="14" size="1" name="EXTINT14" description="External Interrupt 14 Enable" />
|
|
|
+ <BitField start="15" size="1" name="EXTINT15" description="External Interrupt 15 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="EIC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EXTINT0" description="External Interrupt 0 Enable" />
|
|
|
+ <BitField start="1" size="1" name="EXTINT1" description="External Interrupt 1 Enable" />
|
|
|
+ <BitField start="2" size="1" name="EXTINT2" description="External Interrupt 2 Enable" />
|
|
|
+ <BitField start="3" size="1" name="EXTINT3" description="External Interrupt 3 Enable" />
|
|
|
+ <BitField start="4" size="1" name="EXTINT4" description="External Interrupt 4 Enable" />
|
|
|
+ <BitField start="5" size="1" name="EXTINT5" description="External Interrupt 5 Enable" />
|
|
|
+ <BitField start="6" size="1" name="EXTINT6" description="External Interrupt 6 Enable" />
|
|
|
+ <BitField start="7" size="1" name="EXTINT7" description="External Interrupt 7 Enable" />
|
|
|
+ <BitField start="8" size="1" name="EXTINT8" description="External Interrupt 8 Enable" />
|
|
|
+ <BitField start="9" size="1" name="EXTINT9" description="External Interrupt 9 Enable" />
|
|
|
+ <BitField start="10" size="1" name="EXTINT10" description="External Interrupt 10 Enable" />
|
|
|
+ <BitField start="11" size="1" name="EXTINT11" description="External Interrupt 11 Enable" />
|
|
|
+ <BitField start="12" size="1" name="EXTINT12" description="External Interrupt 12 Enable" />
|
|
|
+ <BitField start="13" size="1" name="EXTINT13" description="External Interrupt 13 Enable" />
|
|
|
+ <BitField start="14" size="1" name="EXTINT14" description="External Interrupt 14 Enable" />
|
|
|
+ <BitField start="15" size="1" name="EXTINT15" description="External Interrupt 15 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="EIC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EXTINT0" description="External Interrupt 0" />
|
|
|
+ <BitField start="1" size="1" name="EXTINT1" description="External Interrupt 1" />
|
|
|
+ <BitField start="2" size="1" name="EXTINT2" description="External Interrupt 2" />
|
|
|
+ <BitField start="3" size="1" name="EXTINT3" description="External Interrupt 3" />
|
|
|
+ <BitField start="4" size="1" name="EXTINT4" description="External Interrupt 4" />
|
|
|
+ <BitField start="5" size="1" name="EXTINT5" description="External Interrupt 5" />
|
|
|
+ <BitField start="6" size="1" name="EXTINT6" description="External Interrupt 6" />
|
|
|
+ <BitField start="7" size="1" name="EXTINT7" description="External Interrupt 7" />
|
|
|
+ <BitField start="8" size="1" name="EXTINT8" description="External Interrupt 8" />
|
|
|
+ <BitField start="9" size="1" name="EXTINT9" description="External Interrupt 9" />
|
|
|
+ <BitField start="10" size="1" name="EXTINT10" description="External Interrupt 10" />
|
|
|
+ <BitField start="11" size="1" name="EXTINT11" description="External Interrupt 11" />
|
|
|
+ <BitField start="12" size="1" name="EXTINT12" description="External Interrupt 12" />
|
|
|
+ <BitField start="13" size="1" name="EXTINT13" description="External Interrupt 13" />
|
|
|
+ <BitField start="14" size="1" name="EXTINT14" description="External Interrupt 14" />
|
|
|
+ <BitField start="15" size="1" name="EXTINT15" description="External Interrupt 15" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="1" name="EIC_NMICTRL" access="Read/Write" description="Non-Maskable Interrupt Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="NMISENSE" description="Non-Maskable Interrupt Sense">
|
|
|
+ <Enum name="NONE" start="0x0" description="No detection" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Rising-edge detection" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Falling-edge detection" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Both-edges detection" />
|
|
|
+ <Enum name="HIGH" start="0x4" description="High-level detection" />
|
|
|
+ <Enum name="LOW" start="0x5" description="Low-level detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="NMIFILTEN" description="Non-Maskable Interrupt Filter Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x03" size="1" name="EIC_NMIFLAG" access="Read/Write" description="Non-Maskable Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="NMI" description="Non-Maskable Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x01" size="1" name="EIC_STATUS" access="ReadOnly" description="Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="4" name="EIC_WAKEUP" access="Read/Write" description="Wake-Up Enable" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="WAKEUPEN0" description="External Interrupt 0 Wake-up Enable" />
|
|
|
+ <BitField start="1" size="1" name="WAKEUPEN1" description="External Interrupt 1 Wake-up Enable" />
|
|
|
+ <BitField start="2" size="1" name="WAKEUPEN2" description="External Interrupt 2 Wake-up Enable" />
|
|
|
+ <BitField start="3" size="1" name="WAKEUPEN3" description="External Interrupt 3 Wake-up Enable" />
|
|
|
+ <BitField start="4" size="1" name="WAKEUPEN4" description="External Interrupt 4 Wake-up Enable" />
|
|
|
+ <BitField start="5" size="1" name="WAKEUPEN5" description="External Interrupt 5 Wake-up Enable" />
|
|
|
+ <BitField start="6" size="1" name="WAKEUPEN6" description="External Interrupt 6 Wake-up Enable" />
|
|
|
+ <BitField start="7" size="1" name="WAKEUPEN7" description="External Interrupt 7 Wake-up Enable" />
|
|
|
+ <BitField start="8" size="1" name="WAKEUPEN8" description="External Interrupt 8 Wake-up Enable" />
|
|
|
+ <BitField start="9" size="1" name="WAKEUPEN9" description="External Interrupt 9 Wake-up Enable" />
|
|
|
+ <BitField start="10" size="1" name="WAKEUPEN10" description="External Interrupt 10 Wake-up Enable" />
|
|
|
+ <BitField start="11" size="1" name="WAKEUPEN11" description="External Interrupt 11 Wake-up Enable" />
|
|
|
+ <BitField start="12" size="1" name="WAKEUPEN12" description="External Interrupt 12 Wake-up Enable" />
|
|
|
+ <BitField start="13" size="1" name="WAKEUPEN13" description="External Interrupt 13 Wake-up Enable" />
|
|
|
+ <BitField start="14" size="1" name="WAKEUPEN14" description="External Interrupt 14 Wake-up Enable" />
|
|
|
+ <BitField start="15" size="1" name="WAKEUPEN15" description="External Interrupt 15 Wake-up Enable" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="EVSYS" start="0x42000400" description="Event System Interface">
|
|
|
+ <Register start="+0x04" size="4" name="EVSYS_CHANNEL" access="Read/Write" description="Channel" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="CHANNEL" description="Channel Selection" />
|
|
|
+ <BitField start="8" size="1" name="SWEVT" description="Software Event" />
|
|
|
+ <BitField start="16" size="7" name="EVGEN" description="Event Generator Selection" />
|
|
|
+ <BitField start="24" size="2" name="PATH" description="Path Selection">
|
|
|
+ <Enum name="SYNCHRONOUS" start="0x0" description="Synchronous path" />
|
|
|
+ <Enum name="RESYNCHRONIZED" start="0x1" description="Resynchronized path" />
|
|
|
+ <Enum name="ASYNCHRONOUS" start="0x2" description="Asynchronous path" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="26" size="2" name="EDGSEL" description="Edge Detection Selection">
|
|
|
+ <Enum name="NO_EVT_OUTPUT" start="0x0" description="No event output when using the resynchronized or synchronous path" />
|
|
|
+ <Enum name="RISING_EDGE" start="0x1" description="Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path" />
|
|
|
+ <Enum name="FALLING_EDGE" start="0x2" description="Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path" />
|
|
|
+ <Enum name="BOTH_EDGES" start="0x3" description="Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="EVSYS_CHSTATUS" access="ReadOnly" description="Channel Status" reset_value="0x000F00FF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="USRRDY0" description="Channel 0 User Ready" />
|
|
|
+ <BitField start="1" size="1" name="USRRDY1" description="Channel 1 User Ready" />
|
|
|
+ <BitField start="2" size="1" name="USRRDY2" description="Channel 2 User Ready" />
|
|
|
+ <BitField start="3" size="1" name="USRRDY3" description="Channel 3 User Ready" />
|
|
|
+ <BitField start="4" size="1" name="USRRDY4" description="Channel 4 User Ready" />
|
|
|
+ <BitField start="5" size="1" name="USRRDY5" description="Channel 5 User Ready" />
|
|
|
+ <BitField start="6" size="1" name="USRRDY6" description="Channel 6 User Ready" />
|
|
|
+ <BitField start="7" size="1" name="USRRDY7" description="Channel 7 User Ready" />
|
|
|
+ <BitField start="8" size="1" name="CHBUSY0" description="Channel 0 Busy" />
|
|
|
+ <BitField start="9" size="1" name="CHBUSY1" description="Channel 1 Busy" />
|
|
|
+ <BitField start="10" size="1" name="CHBUSY2" description="Channel 2 Busy" />
|
|
|
+ <BitField start="11" size="1" name="CHBUSY3" description="Channel 3 Busy" />
|
|
|
+ <BitField start="12" size="1" name="CHBUSY4" description="Channel 4 Busy" />
|
|
|
+ <BitField start="13" size="1" name="CHBUSY5" description="Channel 5 Busy" />
|
|
|
+ <BitField start="14" size="1" name="CHBUSY6" description="Channel 6 Busy" />
|
|
|
+ <BitField start="15" size="1" name="CHBUSY7" description="Channel 7 Busy" />
|
|
|
+ <BitField start="16" size="1" name="USRRDY8" description="Channel 8 User Ready" />
|
|
|
+ <BitField start="17" size="1" name="USRRDY9" description="Channel 9 User Ready" />
|
|
|
+ <BitField start="18" size="1" name="USRRDY10" description="Channel 10 User Ready" />
|
|
|
+ <BitField start="19" size="1" name="USRRDY11" description="Channel 11 User Ready" />
|
|
|
+ <BitField start="24" size="1" name="CHBUSY8" description="Channel 8 Busy" />
|
|
|
+ <BitField start="25" size="1" name="CHBUSY9" description="Channel 9 Busy" />
|
|
|
+ <BitField start="26" size="1" name="CHBUSY10" description="Channel 10 Busy" />
|
|
|
+ <BitField start="27" size="1" name="CHBUSY11" description="Channel 11 Busy" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="1" name="EVSYS_CTRL" access="WriteOnly" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="4" size="1" name="GCLKREQ" description="Generic Clock Requests" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="EVSYS_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVR0" description="Channel 0 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="OVR1" description="Channel 1 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="OVR2" description="Channel 2 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="OVR3" description="Channel 3 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="OVR4" description="Channel 4 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="OVR5" description="Channel 5 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="OVR6" description="Channel 6 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="OVR7" description="Channel 7 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="8" size="1" name="EVD0" description="Channel 0 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="9" size="1" name="EVD1" description="Channel 1 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="10" size="1" name="EVD2" description="Channel 2 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="EVD3" description="Channel 3 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="EVD4" description="Channel 4 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="EVD5" description="Channel 5 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="14" size="1" name="EVD6" description="Channel 6 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="EVD7" description="Channel 7 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="OVR8" description="Channel 8 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="OVR9" description="Channel 9 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="18" size="1" name="OVR10" description="Channel 10 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="19" size="1" name="OVR11" description="Channel 11 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="24" size="1" name="EVD8" description="Channel 8 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="25" size="1" name="EVD9" description="Channel 9 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="26" size="1" name="EVD10" description="Channel 10 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="27" size="1" name="EVD11" description="Channel 11 Event Detection Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="4" name="EVSYS_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVR0" description="Channel 0 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="OVR1" description="Channel 1 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="OVR2" description="Channel 2 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="OVR3" description="Channel 3 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="OVR4" description="Channel 4 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="OVR5" description="Channel 5 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="OVR6" description="Channel 6 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="OVR7" description="Channel 7 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="8" size="1" name="EVD0" description="Channel 0 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="9" size="1" name="EVD1" description="Channel 1 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="10" size="1" name="EVD2" description="Channel 2 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="EVD3" description="Channel 3 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="EVD4" description="Channel 4 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="EVD5" description="Channel 5 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="14" size="1" name="EVD6" description="Channel 6 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="EVD7" description="Channel 7 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="OVR8" description="Channel 8 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="OVR9" description="Channel 9 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="18" size="1" name="OVR10" description="Channel 10 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="19" size="1" name="OVR11" description="Channel 11 Overrun Interrupt Enable" />
|
|
|
+ <BitField start="24" size="1" name="EVD8" description="Channel 8 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="25" size="1" name="EVD9" description="Channel 9 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="26" size="1" name="EVD10" description="Channel 10 Event Detection Interrupt Enable" />
|
|
|
+ <BitField start="27" size="1" name="EVD11" description="Channel 11 Event Detection Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="4" name="EVSYS_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVR0" description="Channel 0 Overrun" />
|
|
|
+ <BitField start="1" size="1" name="OVR1" description="Channel 1 Overrun" />
|
|
|
+ <BitField start="2" size="1" name="OVR2" description="Channel 2 Overrun" />
|
|
|
+ <BitField start="3" size="1" name="OVR3" description="Channel 3 Overrun" />
|
|
|
+ <BitField start="4" size="1" name="OVR4" description="Channel 4 Overrun" />
|
|
|
+ <BitField start="5" size="1" name="OVR5" description="Channel 5 Overrun" />
|
|
|
+ <BitField start="6" size="1" name="OVR6" description="Channel 6 Overrun" />
|
|
|
+ <BitField start="7" size="1" name="OVR7" description="Channel 7 Overrun" />
|
|
|
+ <BitField start="8" size="1" name="EVD0" description="Channel 0 Event Detection" />
|
|
|
+ <BitField start="9" size="1" name="EVD1" description="Channel 1 Event Detection" />
|
|
|
+ <BitField start="10" size="1" name="EVD2" description="Channel 2 Event Detection" />
|
|
|
+ <BitField start="11" size="1" name="EVD3" description="Channel 3 Event Detection" />
|
|
|
+ <BitField start="12" size="1" name="EVD4" description="Channel 4 Event Detection" />
|
|
|
+ <BitField start="13" size="1" name="EVD5" description="Channel 5 Event Detection" />
|
|
|
+ <BitField start="14" size="1" name="EVD6" description="Channel 6 Event Detection" />
|
|
|
+ <BitField start="15" size="1" name="EVD7" description="Channel 7 Event Detection" />
|
|
|
+ <BitField start="16" size="1" name="OVR8" description="Channel 8 Overrun" />
|
|
|
+ <BitField start="17" size="1" name="OVR9" description="Channel 9 Overrun" />
|
|
|
+ <BitField start="18" size="1" name="OVR10" description="Channel 10 Overrun" />
|
|
|
+ <BitField start="19" size="1" name="OVR11" description="Channel 11 Overrun" />
|
|
|
+ <BitField start="24" size="1" name="EVD8" description="Channel 8 Event Detection" />
|
|
|
+ <BitField start="25" size="1" name="EVD9" description="Channel 9 Event Detection" />
|
|
|
+ <BitField start="26" size="1" name="EVD10" description="Channel 10 Event Detection" />
|
|
|
+ <BitField start="27" size="1" name="EVD11" description="Channel 11 Event Detection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="2" name="EVSYS_USER" access="Read/Write" description="User Multiplexer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="USER" description="User Multiplexer Selection" />
|
|
|
+ <BitField start="8" size="5" name="CHANNEL" description="Channel Event Selection">
|
|
|
+ <Enum name="0" start="0x0" description="No Channel Output Selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="GCLK" start="0x40000C00" description="Generic Clock Generator">
|
|
|
+ <Register start="+0x2" size="2" name="GCLK_CLKCTRL" access="Read/Write" description="Generic Clock Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="ID" description="Generic Clock Selection ID">
|
|
|
+ <Enum name="DFLL48" start="0x0" description="DFLL48" />
|
|
|
+ <Enum name="FDPLL" start="0x1" description="FDPLL" />
|
|
|
+ <Enum name="FDPLL32K" start="0x2" description="FDPLL32K" />
|
|
|
+ <Enum name="WDT" start="0x3" description="WDT" />
|
|
|
+ <Enum name="RTC" start="0x4" description="RTC" />
|
|
|
+ <Enum name="EIC" start="0x5" description="EIC" />
|
|
|
+ <Enum name="USB" start="0x6" description="USB" />
|
|
|
+ <Enum name="EVSYS_0" start="0x7" description="EVSYS_0" />
|
|
|
+ <Enum name="EVSYS_1" start="0x8" description="EVSYS_1" />
|
|
|
+ <Enum name="EVSYS_2" start="0x9" description="EVSYS_2" />
|
|
|
+ <Enum name="EVSYS_3" start="0xa" description="EVSYS_3" />
|
|
|
+ <Enum name="EVSYS_4" start="0xb" description="EVSYS_4" />
|
|
|
+ <Enum name="EVSYS_5" start="0xc" description="EVSYS_5" />
|
|
|
+ <Enum name="EVSYS_6" start="0xd" description="EVSYS_6" />
|
|
|
+ <Enum name="EVSYS_7" start="0xe" description="EVSYS_7" />
|
|
|
+ <Enum name="EVSYS_8" start="0xf" description="EVSYS_8" />
|
|
|
+ <Enum name="EVSYS_9" start="0x10" description="EVSYS_9" />
|
|
|
+ <Enum name="EVSYS_10" start="0x11" description="EVSYS_10" />
|
|
|
+ <Enum name="EVSYS_11" start="0x12" description="EVSYS_11" />
|
|
|
+ <Enum name="SERCOMX_SLOW" start="0x13" description="SERCOMX_SLOW" />
|
|
|
+ <Enum name="SERCOM0_CORE" start="0x14" description="SERCOM0_CORE" />
|
|
|
+ <Enum name="SERCOM1_CORE" start="0x15" description="SERCOM1_CORE" />
|
|
|
+ <Enum name="SERCOM2_CORE" start="0x16" description="SERCOM2_CORE" />
|
|
|
+ <Enum name="SERCOM3_CORE" start="0x17" description="SERCOM3_CORE" />
|
|
|
+ <Enum name="SERCOM4_CORE" start="0x18" description="SERCOM4_CORE" />
|
|
|
+ <Enum name="SERCOM5_CORE" start="0x19" description="SERCOM5_CORE" />
|
|
|
+ <Enum name="TCC0_TCC1" start="0x1a" description="TCC0_TCC1" />
|
|
|
+ <Enum name="TCC2_TC3" start="0x1b" description="TCC2_TC3" />
|
|
|
+ <Enum name="TC4_TC5" start="0x1c" description="TC4_TC5" />
|
|
|
+ <Enum name="TC6_TC7" start="0x1d" description="TC6_TC7" />
|
|
|
+ <Enum name="ADC" start="0x1e" description="ADC" />
|
|
|
+ <Enum name="AC_DIG" start="0x1f" description="AC_DIG" />
|
|
|
+ <Enum name="AC_ANA" start="0x20" description="AC_ANA" />
|
|
|
+ <Enum name="DAC" start="0x21" description="DAC" />
|
|
|
+ <Enum name="PTC" start="0x22" description="PTC" />
|
|
|
+ <Enum name="I2S_0" start="0x23" description="I2S_0" />
|
|
|
+ <Enum name="I2S_1" start="0x24" description="I2S_1" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="4" name="GEN" description="Generic Clock Generator">
|
|
|
+ <Enum name="GCLK0" start="0x0" description="Generic clock generator 0" />
|
|
|
+ <Enum name="GCLK1" start="0x1" description="Generic clock generator 1" />
|
|
|
+ <Enum name="GCLK2" start="0x2" description="Generic clock generator 2" />
|
|
|
+ <Enum name="GCLK3" start="0x3" description="Generic clock generator 3" />
|
|
|
+ <Enum name="GCLK4" start="0x4" description="Generic clock generator 4" />
|
|
|
+ <Enum name="GCLK5" start="0x5" description="Generic clock generator 5" />
|
|
|
+ <Enum name="GCLK6" start="0x6" description="Generic clock generator 6" />
|
|
|
+ <Enum name="GCLK7" start="0x7" description="Generic clock generator 7" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="14" size="1" name="CLKEN" description="Clock Enable" />
|
|
|
+ <BitField start="15" size="1" name="WRTLOCK" description="Write Lock" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0" size="1" name="GCLK_CTRL" access="Read/Write" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4" size="4" name="GCLK_GENCTRL" access="Read/Write" description="Generic Clock Generator Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="ID" description="Generic Clock Generator Selection" />
|
|
|
+ <BitField start="8" size="5" name="SRC" description="Source Select">
|
|
|
+ <Enum name="XOSC" start="0x0" description="XOSC oscillator output" />
|
|
|
+ <Enum name="GCLKIN" start="0x1" description="Generator input pad" />
|
|
|
+ <Enum name="GCLKGEN1" start="0x2" description="Generic clock generator 1 output" />
|
|
|
+ <Enum name="OSCULP32K" start="0x3" description="OSCULP32K oscillator output" />
|
|
|
+ <Enum name="OSC32K" start="0x4" description="OSC32K oscillator output" />
|
|
|
+ <Enum name="XOSC32K" start="0x5" description="XOSC32K oscillator output" />
|
|
|
+ <Enum name="OSC8M" start="0x6" description="OSC8M oscillator output" />
|
|
|
+ <Enum name="DFLL48M" start="0x7" description="DFLL48M output" />
|
|
|
+ <Enum name="FDPLL" start="0x8" description="FDPLL output" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="1" name="GENEN" description="Generic Clock Generator Enable" />
|
|
|
+ <BitField start="17" size="1" name="IDC" description="Improve Duty Cycle" />
|
|
|
+ <BitField start="18" size="1" name="OOV" description="Output Off Value" />
|
|
|
+ <BitField start="19" size="1" name="OE" description="Output Enable" />
|
|
|
+ <BitField start="20" size="1" name="DIVSEL" description="Divide Selection" />
|
|
|
+ <BitField start="21" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x8" size="4" name="GCLK_GENDIV" access="Read/Write" description="Generic Clock Generator Division" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="ID" description="Generic Clock Generator Selection" />
|
|
|
+ <BitField start="8" size="16" name="DIV" description="Division Factor" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1" size="1" name="GCLK_STATUS" access="ReadOnly" description="Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy Status" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="HMATRIX" start="0x41007000" description="HSB Matrix">
|
|
|
+ <Register start="+0x080+0" size="4" name="HMATRIXB_PRAS0" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+8" size="4" name="HMATRIXB_PRAS1" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+16" size="4" name="HMATRIXB_PRAS2" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+24" size="4" name="HMATRIXB_PRAS3" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+32" size="4" name="HMATRIXB_PRAS4" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+40" size="4" name="HMATRIXB_PRAS5" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+48" size="4" name="HMATRIXB_PRAS6" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+56" size="4" name="HMATRIXB_PRAS7" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+64" size="4" name="HMATRIXB_PRAS8" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+72" size="4" name="HMATRIXB_PRAS9" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+80" size="4" name="HMATRIXB_PRAS10" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+88" size="4" name="HMATRIXB_PRAS11" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+96" size="4" name="HMATRIXB_PRAS12" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+104" size="4" name="HMATRIXB_PRAS13" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+112" size="4" name="HMATRIXB_PRAS14" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x080+120" size="4" name="HMATRIXB_PRAS15" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+0" size="4" name="HMATRIXB_PRBS0" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+8" size="4" name="HMATRIXB_PRBS1" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+16" size="4" name="HMATRIXB_PRBS2" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+24" size="4" name="HMATRIXB_PRBS3" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+32" size="4" name="HMATRIXB_PRBS4" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+40" size="4" name="HMATRIXB_PRBS5" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+48" size="4" name="HMATRIXB_PRBS6" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+56" size="4" name="HMATRIXB_PRBS7" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+64" size="4" name="HMATRIXB_PRBS8" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+72" size="4" name="HMATRIXB_PRBS9" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+80" size="4" name="HMATRIXB_PRBS10" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+88" size="4" name="HMATRIXB_PRBS11" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+96" size="4" name="HMATRIXB_PRBS12" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+104" size="4" name="HMATRIXB_PRBS13" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+112" size="4" name="HMATRIXB_PRBS14" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x084+120" size="4" name="HMATRIXB_PRBS15" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x110+0" size="4" name="HMATRIXB_SFR0" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+4" size="4" name="HMATRIXB_SFR1" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+8" size="4" name="HMATRIXB_SFR2" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+12" size="4" name="HMATRIXB_SFR3" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+16" size="4" name="HMATRIXB_SFR4" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+20" size="4" name="HMATRIXB_SFR5" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+24" size="4" name="HMATRIXB_SFR6" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+28" size="4" name="HMATRIXB_SFR7" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+32" size="4" name="HMATRIXB_SFR8" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+36" size="4" name="HMATRIXB_SFR9" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+40" size="4" name="HMATRIXB_SFR10" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+44" size="4" name="HMATRIXB_SFR11" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+48" size="4" name="HMATRIXB_SFR12" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+52" size="4" name="HMATRIXB_SFR13" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+56" size="4" name="HMATRIXB_SFR14" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x110+60" size="4" name="HMATRIXB_SFR15" access="Read/Write" description="Special Function" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SFR" description="Special Function Register" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="I2S" start="0x42005000" description="Inter-IC Sound Interface">
|
|
|
+ <Register start="+0x04+0" size="4" name="I2S_CLKCTRL0" access="Read/Write" description="Clock Unit n Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SLOTSIZE" description="Slot Size">
|
|
|
+ <Enum name="8" start="0x0" description="8-bit Slot for Clock Unit n" />
|
|
|
+ <Enum name="16" start="0x1" description="16-bit Slot for Clock Unit n" />
|
|
|
+ <Enum name="24" start="0x2" description="24-bit Slot for Clock Unit n" />
|
|
|
+ <Enum name="32" start="0x3" description="32-bit Slot for Clock Unit n" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="2" size="3" name="NBSLOTS" description="Number of Slots in Frame" />
|
|
|
+ <BitField start="5" size="2" name="FSWIDTH" description="Frame Sync Width">
|
|
|
+ <Enum name="SLOT" start="0x0" description="Frame Sync Pulse is 1 Slot wide (default for I2S protocol)" />
|
|
|
+ <Enum name="HALF" start="0x1" description="Frame Sync Pulse is half a Frame wide" />
|
|
|
+ <Enum name="BIT" start="0x2" description="Frame Sync Pulse is 1 Bit wide" />
|
|
|
+ <Enum name="BURST" start="0x3" description="Clock Unit n operates in Burst mode, with a 1-bit wide Frame Sync pulse per Data sample, only when Data transfer is requested" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="BITDELAY" description="Data Delay from Frame Sync">
|
|
|
+ <Enum name="LJ" start="0x0" description="Left Justified (0 Bit Delay)" />
|
|
|
+ <Enum name="I2S" start="0x1" description="I2S (1 Bit Delay)" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="1" name="FSSEL" description="Frame Sync Select">
|
|
|
+ <Enum name="SCKDIV" start="0x0" description="Divided Serial Clock n is used as Frame Sync n source" />
|
|
|
+ <Enum name="FSPIN" start="0x1" description="FSn input pin is used as Frame Sync n source" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="FSINV" description="Frame Sync Invert" />
|
|
|
+ <BitField start="12" size="1" name="SCKSEL" description="Serial Clock Select">
|
|
|
+ <Enum name="MCKDIV" start="0x0" description="Divided Master Clock n is used as Serial Clock n source" />
|
|
|
+ <Enum name="SCKPIN" start="0x1" description="SCKn input pin is used as Serial Clock n source" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="1" name="MCKSEL" description="Master Clock Select">
|
|
|
+ <Enum name="GCLK" start="0x0" description="GCLK_I2S_n is used as Master Clock n source" />
|
|
|
+ <Enum name="MCKPIN" start="0x1" description="MCKn input pin is used as Master Clock n source" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="18" size="1" name="MCKEN" description="Master Clock Enable" />
|
|
|
+ <BitField start="19" size="5" name="MCKDIV" description="Master Clock Division Factor" />
|
|
|
+ <BitField start="24" size="5" name="MCKOUTDIV" description="Master Clock Output Division Factor" />
|
|
|
+ <BitField start="29" size="1" name="FSOUTINV" description="Frame Sync Output Invert" />
|
|
|
+ <BitField start="30" size="1" name="SCKOUTINV" description="Serial Clock Output Invert" />
|
|
|
+ <BitField start="31" size="1" name="MCKOUTINV" description="Master Clock Output Invert" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04+4" size="4" name="I2S_CLKCTRL1" access="Read/Write" description="Clock Unit n Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SLOTSIZE" description="Slot Size">
|
|
|
+ <Enum name="8" start="0x0" description="8-bit Slot for Clock Unit n" />
|
|
|
+ <Enum name="16" start="0x1" description="16-bit Slot for Clock Unit n" />
|
|
|
+ <Enum name="24" start="0x2" description="24-bit Slot for Clock Unit n" />
|
|
|
+ <Enum name="32" start="0x3" description="32-bit Slot for Clock Unit n" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="2" size="3" name="NBSLOTS" description="Number of Slots in Frame" />
|
|
|
+ <BitField start="5" size="2" name="FSWIDTH" description="Frame Sync Width">
|
|
|
+ <Enum name="SLOT" start="0x0" description="Frame Sync Pulse is 1 Slot wide (default for I2S protocol)" />
|
|
|
+ <Enum name="HALF" start="0x1" description="Frame Sync Pulse is half a Frame wide" />
|
|
|
+ <Enum name="BIT" start="0x2" description="Frame Sync Pulse is 1 Bit wide" />
|
|
|
+ <Enum name="BURST" start="0x3" description="Clock Unit n operates in Burst mode, with a 1-bit wide Frame Sync pulse per Data sample, only when Data transfer is requested" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="BITDELAY" description="Data Delay from Frame Sync">
|
|
|
+ <Enum name="LJ" start="0x0" description="Left Justified (0 Bit Delay)" />
|
|
|
+ <Enum name="I2S" start="0x1" description="I2S (1 Bit Delay)" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="1" name="FSSEL" description="Frame Sync Select">
|
|
|
+ <Enum name="SCKDIV" start="0x0" description="Divided Serial Clock n is used as Frame Sync n source" />
|
|
|
+ <Enum name="FSPIN" start="0x1" description="FSn input pin is used as Frame Sync n source" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="FSINV" description="Frame Sync Invert" />
|
|
|
+ <BitField start="12" size="1" name="SCKSEL" description="Serial Clock Select">
|
|
|
+ <Enum name="MCKDIV" start="0x0" description="Divided Master Clock n is used as Serial Clock n source" />
|
|
|
+ <Enum name="SCKPIN" start="0x1" description="SCKn input pin is used as Serial Clock n source" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="1" name="MCKSEL" description="Master Clock Select">
|
|
|
+ <Enum name="GCLK" start="0x0" description="GCLK_I2S_n is used as Master Clock n source" />
|
|
|
+ <Enum name="MCKPIN" start="0x1" description="MCKn input pin is used as Master Clock n source" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="18" size="1" name="MCKEN" description="Master Clock Enable" />
|
|
|
+ <BitField start="19" size="5" name="MCKDIV" description="Master Clock Division Factor" />
|
|
|
+ <BitField start="24" size="5" name="MCKOUTDIV" description="Master Clock Output Division Factor" />
|
|
|
+ <BitField start="29" size="1" name="FSOUTINV" description="Frame Sync Output Invert" />
|
|
|
+ <BitField start="30" size="1" name="SCKOUTINV" description="Serial Clock Output Invert" />
|
|
|
+ <BitField start="31" size="1" name="MCKOUTINV" description="Master Clock Output Invert" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="1" name="I2S_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="1" name="CKEN0" description="Clock Unit 0 Enable" />
|
|
|
+ <BitField start="3" size="1" name="CKEN1" description="Clock Unit 1 Enable" />
|
|
|
+ <BitField start="4" size="1" name="SEREN0" description="Serializer 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="SEREN1" description="Serializer 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+0" size="4" name="I2S_DATA0" access="Read/Write" description="Data n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DATA" description="Sample Data" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+4" size="4" name="I2S_DATA1" access="Read/Write" description="Data n" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DATA" description="Sample Data" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="I2S_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="RXRDY0" description="Receive Ready 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="RXRDY1" description="Receive Ready 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXOR0" description="Receive Overrun 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="RXOR1" description="Receive Overrun 1 Interrupt Enable" />
|
|
|
+ <BitField start="8" size="1" name="TXRDY0" description="Transmit Ready 0 Interrupt Enable" />
|
|
|
+ <BitField start="9" size="1" name="TXRDY1" description="Transmit Ready 1 Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="TXUR0" description="Transmit Underrun 0 Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="TXUR1" description="Transmit Underrun 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="2" name="I2S_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="RXRDY0" description="Receive Ready 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="RXRDY1" description="Receive Ready 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXOR0" description="Receive Overrun 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="RXOR1" description="Receive Overrun 1 Interrupt Enable" />
|
|
|
+ <BitField start="8" size="1" name="TXRDY0" description="Transmit Ready 0 Interrupt Enable" />
|
|
|
+ <BitField start="9" size="1" name="TXRDY1" description="Transmit Ready 1 Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="TXUR0" description="Transmit Underrun 0 Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="TXUR1" description="Transmit Underrun 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="2" name="I2S_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="RXRDY0" description="Receive Ready 0" />
|
|
|
+ <BitField start="1" size="1" name="RXRDY1" description="Receive Ready 1" />
|
|
|
+ <BitField start="4" size="1" name="RXOR0" description="Receive Overrun 0" />
|
|
|
+ <BitField start="5" size="1" name="RXOR1" description="Receive Overrun 1" />
|
|
|
+ <BitField start="8" size="1" name="TXRDY0" description="Transmit Ready 0" />
|
|
|
+ <BitField start="9" size="1" name="TXRDY1" description="Transmit Ready 1" />
|
|
|
+ <BitField start="12" size="1" name="TXUR0" description="Transmit Underrun 0" />
|
|
|
+ <BitField start="13" size="1" name="TXUR1" description="Transmit Underrun 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20+0" size="4" name="I2S_SERCTRL0" access="Read/Write" description="Serializer n Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SERMODE" description="Serializer Mode">
|
|
|
+ <Enum name="RX" start="0x0" description="Receive" />
|
|
|
+ <Enum name="TX" start="0x1" description="Transmit" />
|
|
|
+ <Enum name="PDM2" start="0x2" description="Receive one PDM data on each serial clock edge" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="2" size="2" name="TXDEFAULT" description="Line Default Line when Slot Disabled">
|
|
|
+ <Enum name="ZERO" start="0x0" description="Output Default Value is 0" />
|
|
|
+ <Enum name="ONE" start="0x1" description="Output Default Value is 1" />
|
|
|
+ <Enum name="HIZ" start="0x3" description="Output Default Value is high impedance" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TXSAME" description="Transmit Data when Underrun">
|
|
|
+ <Enum name="ZERO" start="0x0" description="Zero data transmitted in case of underrun" />
|
|
|
+ <Enum name="SAME" start="0x1" description="Last data transmitted in case of underrun" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="1" name="CLKSEL" description="Clock Unit Selection">
|
|
|
+ <Enum name="CLK0" start="0x0" description="Use Clock Unit 0" />
|
|
|
+ <Enum name="CLK1" start="0x1" description="Use Clock Unit 1" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="SLOTADJ" description="Data Slot Formatting Adjust">
|
|
|
+ <Enum name="RIGHT" start="0x0" description="Data is right adjusted in slot" />
|
|
|
+ <Enum name="LEFT" start="0x1" description="Data is left adjusted in slot" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="DATASIZE" description="Data Word Size">
|
|
|
+ <Enum name="32" start="0x0" description="32 bits" />
|
|
|
+ <Enum name="24" start="0x1" description="24 bits" />
|
|
|
+ <Enum name="20" start="0x2" description="20 bits" />
|
|
|
+ <Enum name="18" start="0x3" description="18 bits" />
|
|
|
+ <Enum name="16" start="0x4" description="16 bits" />
|
|
|
+ <Enum name="16C" start="0x5" description="16 bits compact stereo" />
|
|
|
+ <Enum name="8" start="0x6" description="8 bits" />
|
|
|
+ <Enum name="8C" start="0x7" description="8 bits compact stereo" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="12" size="1" name="WORDADJ" description="Data Word Formatting Adjust">
|
|
|
+ <Enum name="RIGHT" start="0x0" description="Data is right adjusted in word" />
|
|
|
+ <Enum name="LEFT" start="0x1" description="Data is left adjusted in word" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="13" size="2" name="EXTEND" description="Data Formatting Bit Extension">
|
|
|
+ <Enum name="ZERO" start="0x0" description="Extend with zeroes" />
|
|
|
+ <Enum name="ONE" start="0x1" description="Extend with ones" />
|
|
|
+ <Enum name="MSBIT" start="0x2" description="Extend with Most Significant Bit" />
|
|
|
+ <Enum name="LSBIT" start="0x3" description="Extend with Least Significant Bit" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="15" size="1" name="BITREV" description="Data Formatting Bit Reverse">
|
|
|
+ <Enum name="MSBIT" start="0x0" description="Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)" />
|
|
|
+ <Enum name="LSBIT" start="0x1" description="Transfer Data Least Significant Bit (LSB) first" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="1" name="SLOTDIS0" description="Slot 0 Disabled for this Serializer" />
|
|
|
+ <BitField start="17" size="1" name="SLOTDIS1" description="Slot 1 Disabled for this Serializer" />
|
|
|
+ <BitField start="18" size="1" name="SLOTDIS2" description="Slot 2 Disabled for this Serializer" />
|
|
|
+ <BitField start="19" size="1" name="SLOTDIS3" description="Slot 3 Disabled for this Serializer" />
|
|
|
+ <BitField start="20" size="1" name="SLOTDIS4" description="Slot 4 Disabled for this Serializer" />
|
|
|
+ <BitField start="21" size="1" name="SLOTDIS5" description="Slot 5 Disabled for this Serializer" />
|
|
|
+ <BitField start="22" size="1" name="SLOTDIS6" description="Slot 6 Disabled for this Serializer" />
|
|
|
+ <BitField start="23" size="1" name="SLOTDIS7" description="Slot 7 Disabled for this Serializer" />
|
|
|
+ <BitField start="24" size="1" name="MONO" description="Mono Mode">
|
|
|
+ <Enum name="STEREO" start="0x0" description="Normal mode" />
|
|
|
+ <Enum name="MONO" start="0x1" description="Left channel data is duplicated to right channel" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="25" size="1" name="DMA" description="Single or Multiple DMA Channels">
|
|
|
+ <Enum name="SINGLE" start="0x0" description="Single DMA channel" />
|
|
|
+ <Enum name="MULTIPLE" start="0x1" description="One DMA channel per data channel" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="26" size="1" name="RXLOOP" description="Loop-back Test Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20+4" size="4" name="I2S_SERCTRL1" access="Read/Write" description="Serializer n Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SERMODE" description="Serializer Mode">
|
|
|
+ <Enum name="RX" start="0x0" description="Receive" />
|
|
|
+ <Enum name="TX" start="0x1" description="Transmit" />
|
|
|
+ <Enum name="PDM2" start="0x2" description="Receive one PDM data on each serial clock edge" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="2" size="2" name="TXDEFAULT" description="Line Default Line when Slot Disabled">
|
|
|
+ <Enum name="ZERO" start="0x0" description="Output Default Value is 0" />
|
|
|
+ <Enum name="ONE" start="0x1" description="Output Default Value is 1" />
|
|
|
+ <Enum name="HIZ" start="0x3" description="Output Default Value is high impedance" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TXSAME" description="Transmit Data when Underrun">
|
|
|
+ <Enum name="ZERO" start="0x0" description="Zero data transmitted in case of underrun" />
|
|
|
+ <Enum name="SAME" start="0x1" description="Last data transmitted in case of underrun" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="1" name="CLKSEL" description="Clock Unit Selection">
|
|
|
+ <Enum name="CLK0" start="0x0" description="Use Clock Unit 0" />
|
|
|
+ <Enum name="CLK1" start="0x1" description="Use Clock Unit 1" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="SLOTADJ" description="Data Slot Formatting Adjust">
|
|
|
+ <Enum name="RIGHT" start="0x0" description="Data is right adjusted in slot" />
|
|
|
+ <Enum name="LEFT" start="0x1" description="Data is left adjusted in slot" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="DATASIZE" description="Data Word Size">
|
|
|
+ <Enum name="32" start="0x0" description="32 bits" />
|
|
|
+ <Enum name="24" start="0x1" description="24 bits" />
|
|
|
+ <Enum name="20" start="0x2" description="20 bits" />
|
|
|
+ <Enum name="18" start="0x3" description="18 bits" />
|
|
|
+ <Enum name="16" start="0x4" description="16 bits" />
|
|
|
+ <Enum name="16C" start="0x5" description="16 bits compact stereo" />
|
|
|
+ <Enum name="8" start="0x6" description="8 bits" />
|
|
|
+ <Enum name="8C" start="0x7" description="8 bits compact stereo" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="12" size="1" name="WORDADJ" description="Data Word Formatting Adjust">
|
|
|
+ <Enum name="RIGHT" start="0x0" description="Data is right adjusted in word" />
|
|
|
+ <Enum name="LEFT" start="0x1" description="Data is left adjusted in word" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="13" size="2" name="EXTEND" description="Data Formatting Bit Extension">
|
|
|
+ <Enum name="ZERO" start="0x0" description="Extend with zeroes" />
|
|
|
+ <Enum name="ONE" start="0x1" description="Extend with ones" />
|
|
|
+ <Enum name="MSBIT" start="0x2" description="Extend with Most Significant Bit" />
|
|
|
+ <Enum name="LSBIT" start="0x3" description="Extend with Least Significant Bit" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="15" size="1" name="BITREV" description="Data Formatting Bit Reverse">
|
|
|
+ <Enum name="MSBIT" start="0x0" description="Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)" />
|
|
|
+ <Enum name="LSBIT" start="0x1" description="Transfer Data Least Significant Bit (LSB) first" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="1" name="SLOTDIS0" description="Slot 0 Disabled for this Serializer" />
|
|
|
+ <BitField start="17" size="1" name="SLOTDIS1" description="Slot 1 Disabled for this Serializer" />
|
|
|
+ <BitField start="18" size="1" name="SLOTDIS2" description="Slot 2 Disabled for this Serializer" />
|
|
|
+ <BitField start="19" size="1" name="SLOTDIS3" description="Slot 3 Disabled for this Serializer" />
|
|
|
+ <BitField start="20" size="1" name="SLOTDIS4" description="Slot 4 Disabled for this Serializer" />
|
|
|
+ <BitField start="21" size="1" name="SLOTDIS5" description="Slot 5 Disabled for this Serializer" />
|
|
|
+ <BitField start="22" size="1" name="SLOTDIS6" description="Slot 6 Disabled for this Serializer" />
|
|
|
+ <BitField start="23" size="1" name="SLOTDIS7" description="Slot 7 Disabled for this Serializer" />
|
|
|
+ <BitField start="24" size="1" name="MONO" description="Mono Mode">
|
|
|
+ <Enum name="STEREO" start="0x0" description="Normal mode" />
|
|
|
+ <Enum name="MONO" start="0x1" description="Left channel data is duplicated to right channel" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="25" size="1" name="DMA" description="Single or Multiple DMA Channels">
|
|
|
+ <Enum name="SINGLE" start="0x0" description="Single DMA channel" />
|
|
|
+ <Enum name="MULTIPLE" start="0x1" description="One DMA channel per data channel" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="26" size="1" name="RXLOOP" description="Loop-back Test Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="2" name="I2S_SYNCBUSY" access="ReadOnly" description="Synchronization Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Status" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable Synchronization Status" />
|
|
|
+ <BitField start="2" size="1" name="CKEN0" description="Clock Unit 0 Enable Synchronization Status" />
|
|
|
+ <BitField start="3" size="1" name="CKEN1" description="Clock Unit 1 Enable Synchronization Status" />
|
|
|
+ <BitField start="4" size="1" name="SEREN0" description="Serializer 0 Enable Synchronization Status" />
|
|
|
+ <BitField start="5" size="1" name="SEREN1" description="Serializer 1 Enable Synchronization Status" />
|
|
|
+ <BitField start="8" size="1" name="DATA0" description="Data 0 Synchronization Status" />
|
|
|
+ <BitField start="9" size="1" name="DATA1" description="Data 1 Synchronization Status" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="MTB" start="0x41006000" description="Cortex-M0+ Micro-Trace Buffer">
|
|
|
+ <Register start="+0xFB8" size="4" name="MTB_AUTHSTATUS" access="ReadOnly" description="MTB Authentication Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x00C" size="4" name="MTB_BASE" access="ReadOnly" description="MTB Base" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFF0" size="4" name="MTB_CID0" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFF4" size="4" name="MTB_CID1" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFF8" size="4" name="MTB_CID2" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFFC" size="4" name="MTB_CID3" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFA4" size="4" name="MTB_CLAIMCLR" access="Read/Write" description="MTB Claim Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFA0" size="4" name="MTB_CLAIMSET" access="Read/Write" description="MTB Claim Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFBC" size="4" name="MTB_DEVARCH" access="ReadOnly" description="MTB Device Architecture" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFC8" size="4" name="MTB_DEVID" access="ReadOnly" description="MTB Device Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFCC" size="4" name="MTB_DEVTYPE" access="ReadOnly" description="MTB Device Type" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x008" size="4" name="MTB_FLOW" access="Read/Write" description="MTB Flow" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="AUTOSTOP" description="Auto Stop Tracing" />
|
|
|
+ <BitField start="1" size="1" name="AUTOHALT" description="Auto Halt Request" />
|
|
|
+ <BitField start="3" size="29" name="WATERMARK" description="Watermark value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xF00" size="4" name="MTB_ITCTRL" access="Read/Write" description="MTB Integration Mode Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFB0" size="4" name="MTB_LOCKACCESS" access="Read/Write" description="MTB Lock Access" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFB4" size="4" name="MTB_LOCKSTATUS" access="ReadOnly" description="MTB Lock Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x004" size="4" name="MTB_MASTER" access="Read/Write" description="MTB Master" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="MASK" description="Maximum Value of the Trace Buffer in SRAM" />
|
|
|
+ <BitField start="5" size="1" name="TSTARTEN" description="Trace Start Input Enable" />
|
|
|
+ <BitField start="6" size="1" name="TSTOPEN" description="Trace Stop Input Enable" />
|
|
|
+ <BitField start="7" size="1" name="SFRWPRIV" description="Special Function Register Write Privilege" />
|
|
|
+ <BitField start="8" size="1" name="RAMPRIV" description="SRAM Privilege" />
|
|
|
+ <BitField start="9" size="1" name="HALTREQ" description="Halt Request" />
|
|
|
+ <BitField start="31" size="1" name="EN" description="Main Trace Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xFE0" size="4" name="MTB_PID0" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFE4" size="4" name="MTB_PID1" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFE8" size="4" name="MTB_PID2" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFEC" size="4" name="MTB_PID3" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFD0" size="4" name="MTB_PID4" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFD4" size="4" name="MTB_PID5" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFD8" size="4" name="MTB_PID6" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0xFDC" size="4" name="MTB_PID7" access="ReadOnly" description="CoreSight" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x000" size="4" name="MTB_POSITION" access="Read/Write" description="MTB Position" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="WRAP" description="Pointer Value Wraps" />
|
|
|
+ <BitField start="3" size="29" name="POINTER" description="Trace Packet Location Pointer" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="NVMCTRL" start="0x41004000" description="Non-Volatile Memory Controller">
|
|
|
+ <Register start="+0x1C" size="4" name="NVMCTRL_ADDR" access="Read/Write" description="Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="22" name="ADDR" description="NVM Address" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="NVMCTRL_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="7" name="CMD" description="Command">
|
|
|
+ <Enum name="ER" start="0x2" description="Erase Row - Erases the row addressed by the ADDR register." />
|
|
|
+ <Enum name="WP" start="0x4" description="Write Page - Writes the contents of the page buffer to the page addressed by the ADDR register." />
|
|
|
+ <Enum name="EAR" start="0x5" description="Erase Auxiliary Row - Erases the auxiliary row addressed by the ADDR register. This command can be given only when the security bit is not set and only to the user configuration row." />
|
|
|
+ <Enum name="WAP" start="0x6" description="Write Auxiliary Page - Writes the contents of the page buffer to the page addressed by the ADDR register. This command can be given only when the security bit is not set and only to the user configuration row." />
|
|
|
+ <Enum name="SF" start="0xa" description="Security Flow Command" />
|
|
|
+ <Enum name="WL" start="0xf" description="Write lockbits" />
|
|
|
+ <Enum name="LR" start="0x40" description="Lock Region - Locks the region containing the address location in the ADDR register." />
|
|
|
+ <Enum name="UR" start="0x41" description="Unlock Region - Unlocks the region containing the address location in the ADDR register." />
|
|
|
+ <Enum name="SPRM" start="0x42" description="Sets the power reduction mode." />
|
|
|
+ <Enum name="CPRM" start="0x43" description="Clears the power reduction mode." />
|
|
|
+ <Enum name="PBC" start="0x44" description="Page Buffer Clear - Clears the page buffer." />
|
|
|
+ <Enum name="SSB" start="0x45" description="Set Security Bit - Sets the security bit by writing 0x00 to the first byte in the lockbit row." />
|
|
|
+ <Enum name="INVALL" start="0x46" description="Invalidates all cache lines." />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="8" name="CMDEX" description="Command Execution">
|
|
|
+ <Enum name="KEY" start="0xa5" description="Execution Key" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="NVMCTRL_CTRLB" access="Read/Write" description="Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="4" name="RWS" description="NVM Read Wait States">
|
|
|
+ <Enum name="SINGLE" start="0x0" description="Single Auto Wait State" />
|
|
|
+ <Enum name="HALF" start="0x1" description="Half Auto Wait State" />
|
|
|
+ <Enum name="DUAL" start="0x2" description="Dual Auto Wait State" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="MANW" description="Manual Write" />
|
|
|
+ <BitField start="8" size="2" name="SLEEPPRM" description="Power Reduction Mode during Sleep">
|
|
|
+ <Enum name="WAKEONACCESS" start="0x0" description="NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access." />
|
|
|
+ <Enum name="WAKEUPINSTANT" start="0x1" description="NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep." />
|
|
|
+ <Enum name="DISABLED" start="0x3" description="Auto power reduction disabled." />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="2" name="READMODE" description="NVMCTRL Read Mode">
|
|
|
+ <Enum name="NO_MISS_PENALTY" start="0x0" description="The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance." />
|
|
|
+ <Enum name="LOW_POWER" start="0x1" description="Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time." />
|
|
|
+ <Enum name="DETERMINISTIC" start="0x2" description="The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings." />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="18" size="1" name="CACHEDIS" description="Cache Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="NVMCTRL_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="READY" description="NVM Ready Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERROR" description="Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="1" name="NVMCTRL_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="READY" description="NVM Ready Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERROR" description="Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="NVMCTRL_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="READY" description="NVM Ready" />
|
|
|
+ <BitField start="1" size="1" name="ERROR" description="Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20" size="2" name="NVMCTRL_LOCK" access="Read/Write" description="Lock Section" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="LOCK" description="Region Lock Bits" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="4" name="NVMCTRL_PARAM" access="Read/Write" description="NVM Parameter" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="NVMP" description="NVM Pages" />
|
|
|
+ <BitField start="16" size="3" name="PSZ" description="Page Size">
|
|
|
+ <Enum name="8" start="0x0" description="8 bytes" />
|
|
|
+ <Enum name="16" start="0x1" description="16 bytes" />
|
|
|
+ <Enum name="32" start="0x2" description="32 bytes" />
|
|
|
+ <Enum name="64" start="0x3" description="64 bytes" />
|
|
|
+ <Enum name="128" start="0x4" description="128 bytes" />
|
|
|
+ <Enum name="256" start="0x5" description="256 bytes" />
|
|
|
+ <Enum name="512" start="0x6" description="512 bytes" />
|
|
|
+ <Enum name="1024" start="0x7" description="1024 bytes" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="2" name="NVMCTRL_STATUS" access="Read/Write" description="Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PRM" description="Power Reduction Mode" />
|
|
|
+ <BitField start="1" size="1" name="LOAD" description="NVM Page Buffer Active Loading" />
|
|
|
+ <BitField start="2" size="1" name="PROGE" description="Programming Error Status" />
|
|
|
+ <BitField start="3" size="1" name="LOCKE" description="Lock Error Status" />
|
|
|
+ <BitField start="4" size="1" name="NVME" description="NVM Error" />
|
|
|
+ <BitField start="8" size="1" name="SB" description="Security Bit Status" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="PAC0" start="0x40000000" description="Peripheral Access Controller 0">
|
|
|
+ <Register start="+0x0" size="4" name="PAC_WPCLR" access="Read/Write" description="Write Protection Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="31" name="WP" description="Write Protection Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4" size="4" name="PAC_WPSET" access="Read/Write" description="Write Protection Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="31" name="WP" description="Write Protection Set" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="PAC1" start="0x41000000" description="Peripheral Access Controller 1">
|
|
|
+ <Register start="+0x0" size="4" name="PAC_WPCLR" access="Read/Write" description="Write Protection Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="31" name="WP" description="Write Protection Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4" size="4" name="PAC_WPSET" access="Read/Write" description="Write Protection Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="31" name="WP" description="Write Protection Set" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="PAC2" start="0x42000000" description="Peripheral Access Controller 2">
|
|
|
+ <Register start="+0x0" size="4" name="PAC_WPCLR" access="Read/Write" description="Write Protection Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="31" name="WP" description="Write Protection Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4" size="4" name="PAC_WPSET" access="Read/Write" description="Write Protection Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="31" name="WP" description="Write Protection Set" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="PM" start="0x40000400" description="Power Manager">
|
|
|
+ <Register start="+0x14" size="4" name="PM_AHBMASK" access="Read/Write" description="AHB Mask" reset_value="0x0000007F" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="HPB0_" description="HPB0 AHB Clock Mask" />
|
|
|
+ <BitField start="1" size="1" name="HPB1_" description="HPB1 AHB Clock Mask" />
|
|
|
+ <BitField start="2" size="1" name="HPB2_" description="HPB2 AHB Clock Mask" />
|
|
|
+ <BitField start="3" size="1" name="DSU_" description="DSU AHB Clock Mask" />
|
|
|
+ <BitField start="4" size="1" name="NVMCTRL_" description="NVMCTRL AHB Clock Mask" />
|
|
|
+ <BitField start="5" size="1" name="DMAC_" description="DMAC AHB Clock Mask" />
|
|
|
+ <BitField start="6" size="1" name="USB_" description="USB AHB Clock Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="4" name="PM_APBAMASK" access="Read/Write" description="APBA Mask" reset_value="0x0000007F" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PAC0_" description="PAC0 APB Clock Enable" />
|
|
|
+ <BitField start="1" size="1" name="PM_" description="PM APB Clock Enable" />
|
|
|
+ <BitField start="2" size="1" name="SYSCTRL_" description="SYSCTRL APB Clock Enable" />
|
|
|
+ <BitField start="3" size="1" name="GCLK_" description="GCLK APB Clock Enable" />
|
|
|
+ <BitField start="4" size="1" name="WDT_" description="WDT APB Clock Enable" />
|
|
|
+ <BitField start="5" size="1" name="RTC_" description="RTC APB Clock Enable" />
|
|
|
+ <BitField start="6" size="1" name="EIC_" description="EIC APB Clock Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x09" size="1" name="PM_APBASEL" access="Read/Write" description="APBA Clock Select" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="APBADIV" description="APBA Prescaler Selection">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Divide by 1" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Divide by 2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Divide by 4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Divide by 8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Divide by 16" />
|
|
|
+ <Enum name="DIV32" start="0x5" description="Divide by 32" />
|
|
|
+ <Enum name="DIV64" start="0x6" description="Divide by 64" />
|
|
|
+ <Enum name="DIV128" start="0x7" description="Divide by 128" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="PM_APBBMASK" access="Read/Write" description="APBB Mask" reset_value="0x0000007F" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PAC1_" description="PAC1 APB Clock Enable" />
|
|
|
+ <BitField start="1" size="1" name="DSU_" description="DSU APB Clock Enable" />
|
|
|
+ <BitField start="2" size="1" name="NVMCTRL_" description="NVMCTRL APB Clock Enable" />
|
|
|
+ <BitField start="3" size="1" name="PORT_" description="PORT APB Clock Enable" />
|
|
|
+ <BitField start="4" size="1" name="DMAC_" description="DMAC APB Clock Enable" />
|
|
|
+ <BitField start="5" size="1" name="USB_" description="USB APB Clock Enable" />
|
|
|
+ <BitField start="6" size="1" name="HMATRIX_" description="HMATRIX APB Clock Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="1" name="PM_APBBSEL" access="Read/Write" description="APBB Clock Select" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="APBBDIV" description="APBB Prescaler Selection">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Divide by 1" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Divide by 2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Divide by 4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Divide by 8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Divide by 16" />
|
|
|
+ <Enum name="DIV32" start="0x5" description="Divide by 32" />
|
|
|
+ <Enum name="DIV64" start="0x6" description="Divide by 64" />
|
|
|
+ <Enum name="DIV128" start="0x7" description="Divide by 128" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20" size="4" name="PM_APBCMASK" access="Read/Write" description="APBC Mask" reset_value="0x00010000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PAC2_" description="PAC2 APB Clock Enable" />
|
|
|
+ <BitField start="1" size="1" name="EVSYS_" description="EVSYS APB Clock Enable" />
|
|
|
+ <BitField start="2" size="1" name="SERCOM0_" description="SERCOM0 APB Clock Enable" />
|
|
|
+ <BitField start="3" size="1" name="SERCOM1_" description="SERCOM1 APB Clock Enable" />
|
|
|
+ <BitField start="4" size="1" name="SERCOM2_" description="SERCOM2 APB Clock Enable" />
|
|
|
+ <BitField start="5" size="1" name="SERCOM3_" description="SERCOM3 APB Clock Enable" />
|
|
|
+ <BitField start="6" size="1" name="SERCOM4_" description="SERCOM4 APB Clock Enable" />
|
|
|
+ <BitField start="7" size="1" name="SERCOM5_" description="SERCOM5 APB Clock Enable" />
|
|
|
+ <BitField start="8" size="1" name="TCC0_" description="TCC0 APB Clock Enable" />
|
|
|
+ <BitField start="9" size="1" name="TCC1_" description="TCC1 APB Clock Enable" />
|
|
|
+ <BitField start="10" size="1" name="TCC2_" description="TCC2 APB Clock Enable" />
|
|
|
+ <BitField start="11" size="1" name="TC3_" description="TC3 APB Clock Enable" />
|
|
|
+ <BitField start="12" size="1" name="TC4_" description="TC4 APB Clock Enable" />
|
|
|
+ <BitField start="13" size="1" name="TC5_" description="TC5 APB Clock Enable" />
|
|
|
+ <BitField start="16" size="1" name="ADC_" description="ADC APB Clock Enable" />
|
|
|
+ <BitField start="17" size="1" name="AC_" description="AC APB Clock Enable" />
|
|
|
+ <BitField start="18" size="1" name="DAC_" description="DAC APB Clock Enable" />
|
|
|
+ <BitField start="19" size="1" name="PTC_" description="PTC APB Clock Enable" />
|
|
|
+ <BitField start="20" size="1" name="I2S_" description="I2S APB Clock Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0B" size="1" name="PM_APBCSEL" access="Read/Write" description="APBC Clock Select" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="APBCDIV" description="APBC Prescaler Selection">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Divide by 1" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Divide by 2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Divide by 4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Divide by 8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Divide by 16" />
|
|
|
+ <Enum name="DIV32" start="0x5" description="Divide by 32" />
|
|
|
+ <Enum name="DIV64" start="0x6" description="Divide by 64" />
|
|
|
+ <Enum name="DIV128" start="0x7" description="Divide by 128" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="PM_CPUSEL" access="Read/Write" description="CPU Clock Select" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CPUDIV" description="CPU Prescaler Selection">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Divide by 1" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Divide by 2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Divide by 4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Divide by 8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Divide by 16" />
|
|
|
+ <Enum name="DIV32" start="0x5" description="Divide by 32" />
|
|
|
+ <Enum name="DIV64" start="0x6" description="Divide by 64" />
|
|
|
+ <Enum name="DIV128" start="0x7" description="Divide by 128" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="1" name="PM_CTRL" access="Read/Write" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF" />
|
|
|
+ <Register start="+0x34" size="1" name="PM_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CKRDY" description="Clock Ready Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x35" size="1" name="PM_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CKRDY" description="Clock Ready Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x36" size="1" name="PM_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CKRDY" description="Clock Ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x38" size="1" name="PM_RCAUSE" access="ReadOnly" description="Reset Cause" reset_value="0x01" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="POR" description="Power On Reset" />
|
|
|
+ <BitField start="1" size="1" name="BOD12" description="Brown Out 12 Detector Reset" />
|
|
|
+ <BitField start="2" size="1" name="BOD33" description="Brown Out 33 Detector Reset" />
|
|
|
+ <BitField start="4" size="1" name="EXT" description="External Reset" />
|
|
|
+ <BitField start="5" size="1" name="WDT" description="Watchdog Reset" />
|
|
|
+ <BitField start="6" size="1" name="SYST" description="System Reset Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x01" size="1" name="PM_SLEEP" access="Read/Write" description="Sleep Mode" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="IDLE" description="Idle Mode Configuration">
|
|
|
+ <Enum name="CPU" start="0x0" description="The CPU clock domain is stopped" />
|
|
|
+ <Enum name="AHB" start="0x1" description="The CPU and AHB clock domains are stopped" />
|
|
|
+ <Enum name="APB" start="0x2" description="The CPU, AHB and APB clock domains are stopped" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="PORT" start="0x41004400" description="Port Module">
|
|
|
+ <Register start="+0x24+0" size="4" name="PORT_CTRL0" access="Read/Write" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SAMPLING" description="Input Sampling Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x24+128" size="4" name="PORT_CTRL1" access="Read/Write" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="SAMPLING" description="Input Sampling Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00+0" size="4" name="PORT_DIR0" access="Read/Write" description="Data Direction" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DIR" description="Port Data Direction" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00+128" size="4" name="PORT_DIR1" access="Read/Write" description="Data Direction" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DIR" description="Port Data Direction" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04+0" size="4" name="PORT_DIRCLR0" access="Read/Write" description="Data Direction Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DIRCLR" description="Port Data Direction Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04+128" size="4" name="PORT_DIRCLR1" access="Read/Write" description="Data Direction Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DIRCLR" description="Port Data Direction Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08+0" size="4" name="PORT_DIRSET0" access="Read/Write" description="Data Direction Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DIRSET" description="Port Data Direction Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08+128" size="4" name="PORT_DIRSET1" access="Read/Write" description="Data Direction Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DIRSET" description="Port Data Direction Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C+0" size="4" name="PORT_DIRTGL0" access="Read/Write" description="Data Direction Toggle" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DIRTGL" description="Port Data Direction Toggle" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C+128" size="4" name="PORT_DIRTGL1" access="Read/Write" description="Data Direction Toggle" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DIRTGL" description="Port Data Direction Toggle" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20+0" size="4" name="PORT_IN0" access="ReadOnly" description="Data Input Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="IN" description="Port Data Input Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20+128" size="4" name="PORT_IN1" access="ReadOnly" description="Data Input Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="IN" description="Port Data Input Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10+0" size="4" name="PORT_OUT0" access="Read/Write" description="Data Output Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="OUT" description="Port Data Output Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10+128" size="4" name="PORT_OUT1" access="Read/Write" description="Data Output Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="OUT" description="Port Data Output Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14+0" size="4" name="PORT_OUTCLR0" access="Read/Write" description="Data Output Value Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="OUTCLR" description="Port Data Output Value Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14+128" size="4" name="PORT_OUTCLR1" access="Read/Write" description="Data Output Value Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="OUTCLR" description="Port Data Output Value Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+0" size="4" name="PORT_OUTSET0" access="Read/Write" description="Data Output Value Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="OUTSET" description="Port Data Output Value Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+128" size="4" name="PORT_OUTSET1" access="Read/Write" description="Data Output Value Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="OUTSET" description="Port Data Output Value Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C+0" size="4" name="PORT_OUTTGL0" access="Read/Write" description="Data Output Value Toggle" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="OUTTGL" description="Port Data Output Value Toggle" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C+128" size="4" name="PORT_OUTTGL1" access="Read/Write" description="Data Output Value Toggle" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="OUTTGL" description="Port Data Output Value Toggle" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+0" size="1" name="PORT_PINCFG0_0" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+1" size="1" name="PORT_PINCFG0_1" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+2" size="1" name="PORT_PINCFG0_2" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+3" size="1" name="PORT_PINCFG0_3" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+4" size="1" name="PORT_PINCFG0_4" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+5" size="1" name="PORT_PINCFG0_5" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+6" size="1" name="PORT_PINCFG0_6" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+7" size="1" name="PORT_PINCFG0_7" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+8" size="1" name="PORT_PINCFG0_8" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+9" size="1" name="PORT_PINCFG0_9" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+10" size="1" name="PORT_PINCFG0_10" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+11" size="1" name="PORT_PINCFG0_11" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+12" size="1" name="PORT_PINCFG0_12" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+13" size="1" name="PORT_PINCFG0_13" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+14" size="1" name="PORT_PINCFG0_14" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+15" size="1" name="PORT_PINCFG0_15" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+16" size="1" name="PORT_PINCFG0_16" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+17" size="1" name="PORT_PINCFG0_17" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+18" size="1" name="PORT_PINCFG0_18" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+19" size="1" name="PORT_PINCFG0_19" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+20" size="1" name="PORT_PINCFG0_20" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+21" size="1" name="PORT_PINCFG0_21" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+22" size="1" name="PORT_PINCFG0_22" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+23" size="1" name="PORT_PINCFG0_23" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+24" size="1" name="PORT_PINCFG0_24" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+25" size="1" name="PORT_PINCFG0_25" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+26" size="1" name="PORT_PINCFG0_26" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+27" size="1" name="PORT_PINCFG0_27" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+28" size="1" name="PORT_PINCFG0_28" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+29" size="1" name="PORT_PINCFG0_29" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+30" size="1" name="PORT_PINCFG0_30" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40+31" size="1" name="PORT_PINCFG0_31" access="Read/Write" description="Pin Configuration n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+0" size="1" name="PORT_PINCFG1_0" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+1" size="1" name="PORT_PINCFG1_1" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+2" size="1" name="PORT_PINCFG1_2" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+3" size="1" name="PORT_PINCFG1_3" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+4" size="1" name="PORT_PINCFG1_4" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+5" size="1" name="PORT_PINCFG1_5" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+6" size="1" name="PORT_PINCFG1_6" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+7" size="1" name="PORT_PINCFG1_7" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+8" size="1" name="PORT_PINCFG1_8" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+9" size="1" name="PORT_PINCFG1_9" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+10" size="1" name="PORT_PINCFG1_10" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+11" size="1" name="PORT_PINCFG1_11" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+12" size="1" name="PORT_PINCFG1_12" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+13" size="1" name="PORT_PINCFG1_13" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+14" size="1" name="PORT_PINCFG1_14" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+15" size="1" name="PORT_PINCFG1_15" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+16" size="1" name="PORT_PINCFG1_16" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+17" size="1" name="PORT_PINCFG1_17" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+18" size="1" name="PORT_PINCFG1_18" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+19" size="1" name="PORT_PINCFG1_19" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+20" size="1" name="PORT_PINCFG1_20" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+21" size="1" name="PORT_PINCFG1_21" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+22" size="1" name="PORT_PINCFG1_22" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+23" size="1" name="PORT_PINCFG1_23" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+24" size="1" name="PORT_PINCFG1_24" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+25" size="1" name="PORT_PINCFG1_25" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+26" size="1" name="PORT_PINCFG1_26" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+27" size="1" name="PORT_PINCFG1_27" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+28" size="1" name="PORT_PINCFG1_28" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+29" size="1" name="PORT_PINCFG1_29" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+30" size="1" name="PORT_PINCFG1_30" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xc0+31" size="1" name="PORT_PINCFG1_31" access="Read/Write" description="Pin Configuration n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="1" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="2" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="6" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+0" size="1" name="PORT_PMUX0_0" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+1" size="1" name="PORT_PMUX0_1" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+2" size="1" name="PORT_PMUX0_2" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+3" size="1" name="PORT_PMUX0_3" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+4" size="1" name="PORT_PMUX0_4" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+5" size="1" name="PORT_PMUX0_5" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+6" size="1" name="PORT_PMUX0_6" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+7" size="1" name="PORT_PMUX0_7" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+8" size="1" name="PORT_PMUX0_8" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+9" size="1" name="PORT_PMUX0_9" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+10" size="1" name="PORT_PMUX0_10" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+11" size="1" name="PORT_PMUX0_11" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+12" size="1" name="PORT_PMUX0_12" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+13" size="1" name="PORT_PMUX0_13" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+14" size="1" name="PORT_PMUX0_14" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30+15" size="1" name="PORT_PMUX0_15" access="Read/Write" description="Peripheral Multiplexing n - Group 0" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+0" size="1" name="PORT_PMUX1_0" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+1" size="1" name="PORT_PMUX1_1" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+2" size="1" name="PORT_PMUX1_2" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+3" size="1" name="PORT_PMUX1_3" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+4" size="1" name="PORT_PMUX1_4" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+5" size="1" name="PORT_PMUX1_5" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+6" size="1" name="PORT_PMUX1_6" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+7" size="1" name="PORT_PMUX1_7" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+8" size="1" name="PORT_PMUX1_8" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+9" size="1" name="PORT_PMUX1_9" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+10" size="1" name="PORT_PMUX1_10" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+11" size="1" name="PORT_PMUX1_11" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+12" size="1" name="PORT_PMUX1_12" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+13" size="1" name="PORT_PMUX1_13" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+14" size="1" name="PORT_PMUX1_14" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0xb0+15" size="1" name="PORT_PMUX1_15" access="Read/Write" description="Peripheral Multiplexing n - Group 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PMUXE" description="Peripheral Multiplexing Even">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="PMUXO" description="Peripheral Multiplexing Odd">
|
|
|
+ <Enum name="A" start="0x0" description="Peripheral function A selected" />
|
|
|
+ <Enum name="B" start="0x1" description="Peripheral function B selected" />
|
|
|
+ <Enum name="C" start="0x2" description="Peripheral function C selected" />
|
|
|
+ <Enum name="D" start="0x3" description="Peripheral function D selected" />
|
|
|
+ <Enum name="E" start="0x4" description="Peripheral function E selected" />
|
|
|
+ <Enum name="F" start="0x5" description="Peripheral function F selected" />
|
|
|
+ <Enum name="G" start="0x6" description="Peripheral function G selected" />
|
|
|
+ <Enum name="H" start="0x7" description="Peripheral function H selected" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28+0" size="4" name="PORT_WRCONFIG0" access="WriteOnly" description="Write Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="PINMASK" description="Pin Mask for Multiple Pin Configuration" />
|
|
|
+ <BitField start="16" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="17" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="18" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="22" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ <BitField start="24" size="4" name="PMUX" description="Peripheral Multiplexing" />
|
|
|
+ <BitField start="28" size="1" name="WRPMUX" description="Write PMUX" />
|
|
|
+ <BitField start="30" size="1" name="WRPINCFG" description="Write PINCFG" />
|
|
|
+ <BitField start="31" size="1" name="HWSEL" description="Half-Word Select" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28+128" size="4" name="PORT_WRCONFIG1" access="WriteOnly" description="Write Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="PINMASK" description="Pin Mask for Multiple Pin Configuration" />
|
|
|
+ <BitField start="16" size="1" name="PMUXEN" description="Peripheral Multiplexer Enable" />
|
|
|
+ <BitField start="17" size="1" name="INEN" description="Input Enable" />
|
|
|
+ <BitField start="18" size="1" name="PULLEN" description="Pull Enable" />
|
|
|
+ <BitField start="22" size="1" name="DRVSTR" description="Output Driver Strength Selection" />
|
|
|
+ <BitField start="24" size="4" name="PMUX" description="Peripheral Multiplexing" />
|
|
|
+ <BitField start="28" size="1" name="WRPMUX" description="Write PMUX" />
|
|
|
+ <BitField start="30" size="1" name="WRPINCFG" description="Write PINCFG" />
|
|
|
+ <BitField start="31" size="1" name="HWSEL" description="Half-Word Select" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="RTC (MODE0)" start="0x40001400" description="Real-Time Counter">
|
|
|
+ <Register start="+0x18+0" size="4" name="RTC_COMP0" access="Read/Write" description="MODE0 Compare n Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="COMP" description="Compare Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="RTC_COUNT" access="Read/Write" description="MODE0 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="RTC_CTRL" access="Read/Write" description="MODE0 Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="COUNT32" start="0x0" description="Mode 0: 32-bit Counter" />
|
|
|
+ <Enum name="COUNT16" start="0x1" description="Mode 1: 16-bit Counter" />
|
|
|
+ <Enum name="CLOCK" start="0x2" description="Mode 2: Clock/Calendar" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="MATCHCLR" description="Clear on Match" />
|
|
|
+ <BitField start="8" size="4" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="CLK_RTC_CNT = GCLK_RTC/1" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="CLK_RTC_CNT = GCLK_RTC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="CLK_RTC_CNT = GCLK_RTC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="CLK_RTC_CNT = GCLK_RTC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="CLK_RTC_CNT = GCLK_RTC/16" />
|
|
|
+ <Enum name="DIV32" start="0x5" description="CLK_RTC_CNT = GCLK_RTC/32" />
|
|
|
+ <Enum name="DIV64" start="0x6" description="CLK_RTC_CNT = GCLK_RTC/64" />
|
|
|
+ <Enum name="DIV128" start="0x7" description="CLK_RTC_CNT = GCLK_RTC/128" />
|
|
|
+ <Enum name="DIV256" start="0x8" description="CLK_RTC_CNT = GCLK_RTC/256" />
|
|
|
+ <Enum name="DIV512" start="0x9" description="CLK_RTC_CNT = GCLK_RTC/512" />
|
|
|
+ <Enum name="DIV1024" start="0xa" description="CLK_RTC_CNT = GCLK_RTC/1024" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0B" size="1" name="RTC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Run During Debug" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="2" name="RTC_EVCTRL" access="Read/Write" description="MODE0 Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PEREO0" description="Periodic Interval 0 Event Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="PEREO1" description="Periodic Interval 1 Event Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="PEREO2" description="Periodic Interval 2 Event Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="PEREO3" description="Periodic Interval 3 Event Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="PEREO4" description="Periodic Interval 4 Event Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="PEREO5" description="Periodic Interval 5 Event Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="PEREO6" description="Periodic Interval 6 Event Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="PEREO7" description="Periodic Interval 7 Event Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="CMPEO0" description="Compare 0 Event Output Enable" />
|
|
|
+ <BitField start="15" size="1" name="OVFEO" description="Overflow Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="RTC_FREQCORR" access="Read/Write" description="Frequency Correction" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="7" name="VALUE" description="Correction Value" />
|
|
|
+ <BitField start="7" size="1" name="SIGN" description="Correction Sign" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="RTC_INTENCLR" access="Read/Write" description="MODE0 Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CMP0" description="Compare 0 Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x07" size="1" name="RTC_INTENSET" access="Read/Write" description="MODE0 Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CMP0" description="Compare 0 Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="RTC_INTFLAG" access="Read/Write" description="MODE0 Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CMP0" description="Compare 0" />
|
|
|
+ <BitField start="6" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="7" size="1" name="OVF" description="Overflow" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="RTC_READREQ" access="Read/Write" description="Read Request" reset_value="0x0010" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="1" name="RTC_STATUS" access="Read/Write" description="Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="RTC (MODE1)" start="0x40001400" description="Real-Time Counter">
|
|
|
+ <Register start="+0x18+0" size="2" name="RTC_COMP0" access="Read/Write" description="MODE1 Compare n Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="COMP" description="Compare Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+2" size="2" name="RTC_COMP1" access="Read/Write" description="MODE1 Compare n Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="COMP" description="Compare Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="2" name="RTC_COUNT" access="Read/Write" description="MODE1 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="RTC_CTRL" access="Read/Write" description="MODE1 Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="COUNT32" start="0x0" description="Mode 0: 32-bit Counter" />
|
|
|
+ <Enum name="COUNT16" start="0x1" description="Mode 1: 16-bit Counter" />
|
|
|
+ <Enum name="CLOCK" start="0x2" description="Mode 2: Clock/Calendar" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="4" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="CLK_RTC_CNT = GCLK_RTC/1" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="CLK_RTC_CNT = GCLK_RTC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="CLK_RTC_CNT = GCLK_RTC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="CLK_RTC_CNT = GCLK_RTC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="CLK_RTC_CNT = GCLK_RTC/16" />
|
|
|
+ <Enum name="DIV32" start="0x5" description="CLK_RTC_CNT = GCLK_RTC/32" />
|
|
|
+ <Enum name="DIV64" start="0x6" description="CLK_RTC_CNT = GCLK_RTC/64" />
|
|
|
+ <Enum name="DIV128" start="0x7" description="CLK_RTC_CNT = GCLK_RTC/128" />
|
|
|
+ <Enum name="DIV256" start="0x8" description="CLK_RTC_CNT = GCLK_RTC/256" />
|
|
|
+ <Enum name="DIV512" start="0x9" description="CLK_RTC_CNT = GCLK_RTC/512" />
|
|
|
+ <Enum name="DIV1024" start="0xa" description="CLK_RTC_CNT = GCLK_RTC/1024" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0B" size="1" name="RTC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Run During Debug" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="2" name="RTC_EVCTRL" access="Read/Write" description="MODE1 Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PEREO0" description="Periodic Interval 0 Event Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="PEREO1" description="Periodic Interval 1 Event Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="PEREO2" description="Periodic Interval 2 Event Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="PEREO3" description="Periodic Interval 3 Event Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="PEREO4" description="Periodic Interval 4 Event Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="PEREO5" description="Periodic Interval 5 Event Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="PEREO6" description="Periodic Interval 6 Event Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="PEREO7" description="Periodic Interval 7 Event Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="CMPEO0" description="Compare 0 Event Output Enable" />
|
|
|
+ <BitField start="9" size="1" name="CMPEO1" description="Compare 1 Event Output Enable" />
|
|
|
+ <BitField start="15" size="1" name="OVFEO" description="Overflow Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="RTC_FREQCORR" access="Read/Write" description="Frequency Correction" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="7" name="VALUE" description="Correction Value" />
|
|
|
+ <BitField start="7" size="1" name="SIGN" description="Correction Sign" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="RTC_INTENCLR" access="Read/Write" description="MODE1 Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CMP0" description="Compare 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="CMP1" description="Compare 1 Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x07" size="1" name="RTC_INTENSET" access="Read/Write" description="MODE1 Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CMP0" description="Compare 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="CMP1" description="Compare 1 Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="RTC_INTFLAG" access="Read/Write" description="MODE1 Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="CMP0" description="Compare 0" />
|
|
|
+ <BitField start="1" size="1" name="CMP1" description="Compare 1" />
|
|
|
+ <BitField start="6" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="7" size="1" name="OVF" description="Overflow" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="2" name="RTC_PER" access="Read/Write" description="MODE1 Counter Period" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="PER" description="Counter Period" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="RTC_READREQ" access="Read/Write" description="Read Request" reset_value="0x0010" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="1" name="RTC_STATUS" access="Read/Write" description="Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="RTC (MODE2)" start="0x40001400" description="Real-Time Counter">
|
|
|
+ <Register start="+0x18+0" size="4" name="RTC_ALARM0" access="Read/Write" description="MODE2 Alarm n Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="SECOND" description="Second" />
|
|
|
+ <BitField start="6" size="6" name="MINUTE" description="Minute" />
|
|
|
+ <BitField start="12" size="5" name="HOUR" description="Hour" />
|
|
|
+ <BitField start="17" size="5" name="DAY" description="Day" />
|
|
|
+ <BitField start="22" size="4" name="MONTH" description="Month" />
|
|
|
+ <BitField start="26" size="6" name="YEAR" description="Year" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="RTC_CLOCK" access="Read/Write" description="MODE2 Clock Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="SECOND" description="Second" />
|
|
|
+ <BitField start="6" size="6" name="MINUTE" description="Minute" />
|
|
|
+ <BitField start="12" size="5" name="HOUR" description="Hour">
|
|
|
+ <Enum name="PM" start="0x10" description="Afternoon Hour" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="17" size="5" name="DAY" description="Day" />
|
|
|
+ <BitField start="22" size="4" name="MONTH" description="Month" />
|
|
|
+ <BitField start="26" size="6" name="YEAR" description="Year" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="RTC_CTRL" access="Read/Write" description="MODE2 Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="COUNT32" start="0x0" description="Mode 0: 32-bit Counter" />
|
|
|
+ <Enum name="COUNT16" start="0x1" description="Mode 1: 16-bit Counter" />
|
|
|
+ <Enum name="CLOCK" start="0x2" description="Mode 2: Clock/Calendar" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="6" size="1" name="CLKREP" description="Clock Representation" />
|
|
|
+ <BitField start="7" size="1" name="MATCHCLR" description="Clear on Match" />
|
|
|
+ <BitField start="8" size="4" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="CLK_RTC_CNT = GCLK_RTC/1" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="CLK_RTC_CNT = GCLK_RTC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="CLK_RTC_CNT = GCLK_RTC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="CLK_RTC_CNT = GCLK_RTC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="CLK_RTC_CNT = GCLK_RTC/16" />
|
|
|
+ <Enum name="DIV32" start="0x5" description="CLK_RTC_CNT = GCLK_RTC/32" />
|
|
|
+ <Enum name="DIV64" start="0x6" description="CLK_RTC_CNT = GCLK_RTC/64" />
|
|
|
+ <Enum name="DIV128" start="0x7" description="CLK_RTC_CNT = GCLK_RTC/128" />
|
|
|
+ <Enum name="DIV256" start="0x8" description="CLK_RTC_CNT = GCLK_RTC/256" />
|
|
|
+ <Enum name="DIV512" start="0x9" description="CLK_RTC_CNT = GCLK_RTC/512" />
|
|
|
+ <Enum name="DIV1024" start="0xa" description="CLK_RTC_CNT = GCLK_RTC/1024" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0B" size="1" name="RTC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Run During Debug" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="2" name="RTC_EVCTRL" access="Read/Write" description="MODE2 Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PEREO0" description="Periodic Interval 0 Event Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="PEREO1" description="Periodic Interval 1 Event Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="PEREO2" description="Periodic Interval 2 Event Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="PEREO3" description="Periodic Interval 3 Event Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="PEREO4" description="Periodic Interval 4 Event Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="PEREO5" description="Periodic Interval 5 Event Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="PEREO6" description="Periodic Interval 6 Event Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="PEREO7" description="Periodic Interval 7 Event Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="ALARMEO0" description="Alarm 0 Event Output Enable" />
|
|
|
+ <BitField start="15" size="1" name="OVFEO" description="Overflow Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="RTC_FREQCORR" access="Read/Write" description="Frequency Correction" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="7" name="VALUE" description="Correction Value" />
|
|
|
+ <BitField start="7" size="1" name="SIGN" description="Correction Sign" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="RTC_INTENCLR" access="Read/Write" description="MODE2 Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="ALARM0" description="Alarm 0 Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x07" size="1" name="RTC_INTENSET" access="Read/Write" description="MODE2 Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="ALARM0" description="Alarm 0 Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="RTC_INTFLAG" access="Read/Write" description="MODE2 Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="ALARM0" description="Alarm 0" />
|
|
|
+ <BitField start="6" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="7" size="1" name="OVF" description="Overflow" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C+0" size="1" name="RTC_MASK0" access="Read/Write" description="MODE2 Alarm n Mask" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="SEL" description="Alarm Mask Selection">
|
|
|
+ <Enum name="OFF" start="0x0" description="Alarm Disabled" />
|
|
|
+ <Enum name="SS" start="0x1" description="Match seconds only" />
|
|
|
+ <Enum name="MMSS" start="0x2" description="Match seconds and minutes only" />
|
|
|
+ <Enum name="HHMMSS" start="0x3" description="Match seconds, minutes, and hours only" />
|
|
|
+ <Enum name="DDHHMMSS" start="0x4" description="Match seconds, minutes, hours, and days only" />
|
|
|
+ <Enum name="MMDDHHMMSS" start="0x5" description="Match seconds, minutes, hours, days, and months only" />
|
|
|
+ <Enum name="YYMMDDHHMMSS" start="0x6" description="Match seconds, minutes, hours, days, months, and years" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="RTC_READREQ" access="Read/Write" description="Read Request" reset_value="0x0010" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="1" name="RTC_STATUS" access="Read/Write" description="Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM0 (I2CM)" start="0x42000800" description="Serial Communication Interface 0">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CM Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="11" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="13" size="1" name="LENEN" description="Length Enable" />
|
|
|
+ <BitField start="14" size="1" name="HS" description="High Speed Mode" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="16" size="8" name="LEN" description="Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="SERCOM_BAUD" access="Read/Write" description="I2CM Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="8" size="8" name="BAUDLOW" description="Baud Rate Value Low" />
|
|
|
+ <BitField start="16" size="8" name="HSBAUD" description="High Speed Baud Rate Value" />
|
|
|
+ <BitField start="24" size="8" name="HSBAUDLOW" description="High Speed Baud Rate Value Low" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CM Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="22" size="1" name="MEXTTOEN" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="28" size="2" name="INACTOUT" description="Inactive Time-Out" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CM Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="QCEN" description="Quick Command Enable" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CM Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="I2CM Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CM Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CM Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CM Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CM Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="ARBLOST" description="Arbitration Lost" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="4" size="2" name="BUSSTATE" description="Bus State" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="8" size="1" name="MEXTTOUT" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="LENERR" description="Length Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CM Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="SYSOP" description="System Operation Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM0 (I2CS)" start="0x42000800" description="Serial Communication Interface 0">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CS Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="GENCEN" description="General Call Address Enable" />
|
|
|
+ <BitField start="1" size="10" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="17" size="10" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CS Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CS Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="GCMD" description="PMBus Group Command" />
|
|
|
+ <BitField start="10" size="1" name="AACKEN" description="Automatic Address Acknowledge" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CS Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CS Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CS Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CS Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CS Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="COLL" description="Transmit Collision" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="3" size="1" name="DIR" description="Read/Write Direction" />
|
|
|
+ <BitField start="4" size="1" name="SR" description="Repeated Start" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="HS" description="High Speed" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CS Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM0 (SPI)" start="0x42000800" description="Serial Communication Interface 0">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="SPI Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="16" size="8" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="SERCOM_BAUD" access="Read/Write" description="SPI Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="SPI Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="16" size="2" name="DOPO" description="Data Out Pinout" />
|
|
|
+ <BitField start="20" size="2" name="DIPO" description="Data In Pinout" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CPHA" description="Clock Phase" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="SPI Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="PLOADEN" description="Data Preload Enable" />
|
|
|
+ <BitField start="9" size="1" name="SSDE" description="Slave Select Low Detect Enable" />
|
|
|
+ <BitField start="13" size="1" name="MSSEN" description="Master Slave Select Enable" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="SERCOM_DATA" access="Read/Write" description="SPI Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="SPI Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="SPI Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="SPI Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="SPI Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Flag" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="SPI Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="SPI Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM0 (USART)" start="0x42000800" description="Serial Communication Interface 0">
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRAC_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRACFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_USARTFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="USART Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="13" size="3" name="SAMPR" description="Sample" />
|
|
|
+ <BitField start="16" size="2" name="TXPO" description="Transmit Data Pinout" />
|
|
|
+ <BitField start="20" size="2" name="RXPO" description="Receive Data Pinout" />
|
|
|
+ <BitField start="22" size="2" name="SAMPA" description="Sample Adjustment" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CMODE" description="Communication Mode" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="USART Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="SBMODE" description="Stop Bit Mode" />
|
|
|
+ <BitField start="8" size="1" name="COLDEN" description="Collision Detection Enable" />
|
|
|
+ <BitField start="9" size="1" name="SFDE" description="Start of Frame Detection Enable" />
|
|
|
+ <BitField start="10" size="1" name="ENC" description="Encoding Format" />
|
|
|
+ <BitField start="13" size="1" name="PMODE" description="Parity Mode" />
|
|
|
+ <BitField start="16" size="1" name="TXEN" description="Transmitter Enable" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="2" name="SERCOM_DATA" access="Read/Write" description="USART Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="USART Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="USART Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="USART Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="USART Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="SERCOM_RXPL" access="Read/Write" description="USART Receive Pulse Length" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="RXPL" description="Receive Pulse Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="USART Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PERR" description="Parity Error" />
|
|
|
+ <BitField start="1" size="1" name="FERR" description="Frame Error" />
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ <BitField start="3" size="1" name="CTS" description="Clear To Send" />
|
|
|
+ <BitField start="4" size="1" name="ISF" description="Inconsistent Sync Field" />
|
|
|
+ <BitField start="5" size="1" name="COLL" description="Collision Detected" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="USART Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM1 (I2CM)" start="0x42000C00" description="Serial Communication Interface 1">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CM Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="11" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="13" size="1" name="LENEN" description="Length Enable" />
|
|
|
+ <BitField start="14" size="1" name="HS" description="High Speed Mode" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="16" size="8" name="LEN" description="Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="SERCOM_BAUD" access="Read/Write" description="I2CM Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="8" size="8" name="BAUDLOW" description="Baud Rate Value Low" />
|
|
|
+ <BitField start="16" size="8" name="HSBAUD" description="High Speed Baud Rate Value" />
|
|
|
+ <BitField start="24" size="8" name="HSBAUDLOW" description="High Speed Baud Rate Value Low" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CM Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="22" size="1" name="MEXTTOEN" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="28" size="2" name="INACTOUT" description="Inactive Time-Out" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CM Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="QCEN" description="Quick Command Enable" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CM Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="I2CM Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CM Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CM Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CM Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CM Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="ARBLOST" description="Arbitration Lost" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="4" size="2" name="BUSSTATE" description="Bus State" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="8" size="1" name="MEXTTOUT" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="LENERR" description="Length Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CM Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="SYSOP" description="System Operation Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM1 (I2CS)" start="0x42000C00" description="Serial Communication Interface 1">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CS Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="GENCEN" description="General Call Address Enable" />
|
|
|
+ <BitField start="1" size="10" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="17" size="10" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CS Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CS Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="GCMD" description="PMBus Group Command" />
|
|
|
+ <BitField start="10" size="1" name="AACKEN" description="Automatic Address Acknowledge" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CS Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CS Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CS Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CS Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CS Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="COLL" description="Transmit Collision" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="3" size="1" name="DIR" description="Read/Write Direction" />
|
|
|
+ <BitField start="4" size="1" name="SR" description="Repeated Start" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="HS" description="High Speed" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CS Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM1 (SPI)" start="0x42000C00" description="Serial Communication Interface 1">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="SPI Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="16" size="8" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="SERCOM_BAUD" access="Read/Write" description="SPI Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="SPI Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="16" size="2" name="DOPO" description="Data Out Pinout" />
|
|
|
+ <BitField start="20" size="2" name="DIPO" description="Data In Pinout" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CPHA" description="Clock Phase" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="SPI Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="PLOADEN" description="Data Preload Enable" />
|
|
|
+ <BitField start="9" size="1" name="SSDE" description="Slave Select Low Detect Enable" />
|
|
|
+ <BitField start="13" size="1" name="MSSEN" description="Master Slave Select Enable" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="SERCOM_DATA" access="Read/Write" description="SPI Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="SPI Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="SPI Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="SPI Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="SPI Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Flag" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="SPI Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="SPI Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM1 (USART)" start="0x42000C00" description="Serial Communication Interface 1">
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRAC_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRACFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_USARTFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="USART Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="13" size="3" name="SAMPR" description="Sample" />
|
|
|
+ <BitField start="16" size="2" name="TXPO" description="Transmit Data Pinout" />
|
|
|
+ <BitField start="20" size="2" name="RXPO" description="Receive Data Pinout" />
|
|
|
+ <BitField start="22" size="2" name="SAMPA" description="Sample Adjustment" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CMODE" description="Communication Mode" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="USART Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="SBMODE" description="Stop Bit Mode" />
|
|
|
+ <BitField start="8" size="1" name="COLDEN" description="Collision Detection Enable" />
|
|
|
+ <BitField start="9" size="1" name="SFDE" description="Start of Frame Detection Enable" />
|
|
|
+ <BitField start="10" size="1" name="ENC" description="Encoding Format" />
|
|
|
+ <BitField start="13" size="1" name="PMODE" description="Parity Mode" />
|
|
|
+ <BitField start="16" size="1" name="TXEN" description="Transmitter Enable" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="2" name="SERCOM_DATA" access="Read/Write" description="USART Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="USART Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="USART Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="USART Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="USART Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="SERCOM_RXPL" access="Read/Write" description="USART Receive Pulse Length" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="RXPL" description="Receive Pulse Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="USART Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PERR" description="Parity Error" />
|
|
|
+ <BitField start="1" size="1" name="FERR" description="Frame Error" />
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ <BitField start="3" size="1" name="CTS" description="Clear To Send" />
|
|
|
+ <BitField start="4" size="1" name="ISF" description="Inconsistent Sync Field" />
|
|
|
+ <BitField start="5" size="1" name="COLL" description="Collision Detected" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="USART Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM2 (I2CM)" start="0x42001000" description="Serial Communication Interface 2">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CM Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="11" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="13" size="1" name="LENEN" description="Length Enable" />
|
|
|
+ <BitField start="14" size="1" name="HS" description="High Speed Mode" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="16" size="8" name="LEN" description="Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="SERCOM_BAUD" access="Read/Write" description="I2CM Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="8" size="8" name="BAUDLOW" description="Baud Rate Value Low" />
|
|
|
+ <BitField start="16" size="8" name="HSBAUD" description="High Speed Baud Rate Value" />
|
|
|
+ <BitField start="24" size="8" name="HSBAUDLOW" description="High Speed Baud Rate Value Low" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CM Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="22" size="1" name="MEXTTOEN" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="28" size="2" name="INACTOUT" description="Inactive Time-Out" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CM Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="QCEN" description="Quick Command Enable" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CM Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="I2CM Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CM Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CM Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CM Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CM Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="ARBLOST" description="Arbitration Lost" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="4" size="2" name="BUSSTATE" description="Bus State" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="8" size="1" name="MEXTTOUT" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="LENERR" description="Length Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CM Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="SYSOP" description="System Operation Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM2 (I2CS)" start="0x42001000" description="Serial Communication Interface 2">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CS Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="GENCEN" description="General Call Address Enable" />
|
|
|
+ <BitField start="1" size="10" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="17" size="10" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CS Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CS Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="GCMD" description="PMBus Group Command" />
|
|
|
+ <BitField start="10" size="1" name="AACKEN" description="Automatic Address Acknowledge" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CS Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CS Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CS Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CS Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CS Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="COLL" description="Transmit Collision" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="3" size="1" name="DIR" description="Read/Write Direction" />
|
|
|
+ <BitField start="4" size="1" name="SR" description="Repeated Start" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="HS" description="High Speed" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CS Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM2 (SPI)" start="0x42001000" description="Serial Communication Interface 2">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="SPI Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="16" size="8" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="SERCOM_BAUD" access="Read/Write" description="SPI Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="SPI Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="16" size="2" name="DOPO" description="Data Out Pinout" />
|
|
|
+ <BitField start="20" size="2" name="DIPO" description="Data In Pinout" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CPHA" description="Clock Phase" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="SPI Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="PLOADEN" description="Data Preload Enable" />
|
|
|
+ <BitField start="9" size="1" name="SSDE" description="Slave Select Low Detect Enable" />
|
|
|
+ <BitField start="13" size="1" name="MSSEN" description="Master Slave Select Enable" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="SERCOM_DATA" access="Read/Write" description="SPI Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="SPI Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="SPI Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="SPI Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="SPI Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Flag" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="SPI Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="SPI Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM2 (USART)" start="0x42001000" description="Serial Communication Interface 2">
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRAC_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRACFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_USARTFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="USART Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="13" size="3" name="SAMPR" description="Sample" />
|
|
|
+ <BitField start="16" size="2" name="TXPO" description="Transmit Data Pinout" />
|
|
|
+ <BitField start="20" size="2" name="RXPO" description="Receive Data Pinout" />
|
|
|
+ <BitField start="22" size="2" name="SAMPA" description="Sample Adjustment" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CMODE" description="Communication Mode" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="USART Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="SBMODE" description="Stop Bit Mode" />
|
|
|
+ <BitField start="8" size="1" name="COLDEN" description="Collision Detection Enable" />
|
|
|
+ <BitField start="9" size="1" name="SFDE" description="Start of Frame Detection Enable" />
|
|
|
+ <BitField start="10" size="1" name="ENC" description="Encoding Format" />
|
|
|
+ <BitField start="13" size="1" name="PMODE" description="Parity Mode" />
|
|
|
+ <BitField start="16" size="1" name="TXEN" description="Transmitter Enable" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="2" name="SERCOM_DATA" access="Read/Write" description="USART Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="USART Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="USART Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="USART Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="USART Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="SERCOM_RXPL" access="Read/Write" description="USART Receive Pulse Length" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="RXPL" description="Receive Pulse Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="USART Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PERR" description="Parity Error" />
|
|
|
+ <BitField start="1" size="1" name="FERR" description="Frame Error" />
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ <BitField start="3" size="1" name="CTS" description="Clear To Send" />
|
|
|
+ <BitField start="4" size="1" name="ISF" description="Inconsistent Sync Field" />
|
|
|
+ <BitField start="5" size="1" name="COLL" description="Collision Detected" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="USART Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM3 (I2CM)" start="0x42001400" description="Serial Communication Interface 3">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CM Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="11" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="13" size="1" name="LENEN" description="Length Enable" />
|
|
|
+ <BitField start="14" size="1" name="HS" description="High Speed Mode" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="16" size="8" name="LEN" description="Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="SERCOM_BAUD" access="Read/Write" description="I2CM Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="8" size="8" name="BAUDLOW" description="Baud Rate Value Low" />
|
|
|
+ <BitField start="16" size="8" name="HSBAUD" description="High Speed Baud Rate Value" />
|
|
|
+ <BitField start="24" size="8" name="HSBAUDLOW" description="High Speed Baud Rate Value Low" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CM Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="22" size="1" name="MEXTTOEN" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="28" size="2" name="INACTOUT" description="Inactive Time-Out" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CM Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="QCEN" description="Quick Command Enable" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CM Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="I2CM Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CM Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CM Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CM Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CM Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="ARBLOST" description="Arbitration Lost" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="4" size="2" name="BUSSTATE" description="Bus State" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="8" size="1" name="MEXTTOUT" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="LENERR" description="Length Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CM Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="SYSOP" description="System Operation Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM3 (I2CS)" start="0x42001400" description="Serial Communication Interface 3">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CS Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="GENCEN" description="General Call Address Enable" />
|
|
|
+ <BitField start="1" size="10" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="17" size="10" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CS Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CS Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="GCMD" description="PMBus Group Command" />
|
|
|
+ <BitField start="10" size="1" name="AACKEN" description="Automatic Address Acknowledge" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CS Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CS Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CS Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CS Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CS Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="COLL" description="Transmit Collision" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="3" size="1" name="DIR" description="Read/Write Direction" />
|
|
|
+ <BitField start="4" size="1" name="SR" description="Repeated Start" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="HS" description="High Speed" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CS Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM3 (SPI)" start="0x42001400" description="Serial Communication Interface 3">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="SPI Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="16" size="8" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="SERCOM_BAUD" access="Read/Write" description="SPI Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="SPI Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="16" size="2" name="DOPO" description="Data Out Pinout" />
|
|
|
+ <BitField start="20" size="2" name="DIPO" description="Data In Pinout" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CPHA" description="Clock Phase" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="SPI Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="PLOADEN" description="Data Preload Enable" />
|
|
|
+ <BitField start="9" size="1" name="SSDE" description="Slave Select Low Detect Enable" />
|
|
|
+ <BitField start="13" size="1" name="MSSEN" description="Master Slave Select Enable" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="SERCOM_DATA" access="Read/Write" description="SPI Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="SPI Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="SPI Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="SPI Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="SPI Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Flag" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="SPI Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="SPI Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM3 (USART)" start="0x42001400" description="Serial Communication Interface 3">
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRAC_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRACFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_USARTFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="USART Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="13" size="3" name="SAMPR" description="Sample" />
|
|
|
+ <BitField start="16" size="2" name="TXPO" description="Transmit Data Pinout" />
|
|
|
+ <BitField start="20" size="2" name="RXPO" description="Receive Data Pinout" />
|
|
|
+ <BitField start="22" size="2" name="SAMPA" description="Sample Adjustment" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CMODE" description="Communication Mode" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="USART Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="SBMODE" description="Stop Bit Mode" />
|
|
|
+ <BitField start="8" size="1" name="COLDEN" description="Collision Detection Enable" />
|
|
|
+ <BitField start="9" size="1" name="SFDE" description="Start of Frame Detection Enable" />
|
|
|
+ <BitField start="10" size="1" name="ENC" description="Encoding Format" />
|
|
|
+ <BitField start="13" size="1" name="PMODE" description="Parity Mode" />
|
|
|
+ <BitField start="16" size="1" name="TXEN" description="Transmitter Enable" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="2" name="SERCOM_DATA" access="Read/Write" description="USART Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="USART Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="USART Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="USART Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="USART Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="SERCOM_RXPL" access="Read/Write" description="USART Receive Pulse Length" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="RXPL" description="Receive Pulse Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="USART Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PERR" description="Parity Error" />
|
|
|
+ <BitField start="1" size="1" name="FERR" description="Frame Error" />
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ <BitField start="3" size="1" name="CTS" description="Clear To Send" />
|
|
|
+ <BitField start="4" size="1" name="ISF" description="Inconsistent Sync Field" />
|
|
|
+ <BitField start="5" size="1" name="COLL" description="Collision Detected" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="USART Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM4 (I2CM)" start="0x42001800" description="Serial Communication Interface 4">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CM Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="11" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="13" size="1" name="LENEN" description="Length Enable" />
|
|
|
+ <BitField start="14" size="1" name="HS" description="High Speed Mode" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="16" size="8" name="LEN" description="Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="SERCOM_BAUD" access="Read/Write" description="I2CM Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="8" size="8" name="BAUDLOW" description="Baud Rate Value Low" />
|
|
|
+ <BitField start="16" size="8" name="HSBAUD" description="High Speed Baud Rate Value" />
|
|
|
+ <BitField start="24" size="8" name="HSBAUDLOW" description="High Speed Baud Rate Value Low" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CM Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="22" size="1" name="MEXTTOEN" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="28" size="2" name="INACTOUT" description="Inactive Time-Out" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CM Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="QCEN" description="Quick Command Enable" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CM Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="I2CM Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CM Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CM Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CM Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CM Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="ARBLOST" description="Arbitration Lost" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="4" size="2" name="BUSSTATE" description="Bus State" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="8" size="1" name="MEXTTOUT" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="LENERR" description="Length Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CM Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="SYSOP" description="System Operation Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM4 (I2CS)" start="0x42001800" description="Serial Communication Interface 4">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CS Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="GENCEN" description="General Call Address Enable" />
|
|
|
+ <BitField start="1" size="10" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="17" size="10" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CS Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CS Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="GCMD" description="PMBus Group Command" />
|
|
|
+ <BitField start="10" size="1" name="AACKEN" description="Automatic Address Acknowledge" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CS Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CS Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CS Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CS Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CS Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="COLL" description="Transmit Collision" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="3" size="1" name="DIR" description="Read/Write Direction" />
|
|
|
+ <BitField start="4" size="1" name="SR" description="Repeated Start" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="HS" description="High Speed" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CS Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM4 (SPI)" start="0x42001800" description="Serial Communication Interface 4">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="SPI Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="16" size="8" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="SERCOM_BAUD" access="Read/Write" description="SPI Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="SPI Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="16" size="2" name="DOPO" description="Data Out Pinout" />
|
|
|
+ <BitField start="20" size="2" name="DIPO" description="Data In Pinout" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CPHA" description="Clock Phase" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="SPI Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="PLOADEN" description="Data Preload Enable" />
|
|
|
+ <BitField start="9" size="1" name="SSDE" description="Slave Select Low Detect Enable" />
|
|
|
+ <BitField start="13" size="1" name="MSSEN" description="Master Slave Select Enable" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="SERCOM_DATA" access="Read/Write" description="SPI Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="SPI Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="SPI Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="SPI Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="SPI Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Flag" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="SPI Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="SPI Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM4 (USART)" start="0x42001800" description="Serial Communication Interface 4">
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRAC_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRACFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_USARTFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="USART Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="13" size="3" name="SAMPR" description="Sample" />
|
|
|
+ <BitField start="16" size="2" name="TXPO" description="Transmit Data Pinout" />
|
|
|
+ <BitField start="20" size="2" name="RXPO" description="Receive Data Pinout" />
|
|
|
+ <BitField start="22" size="2" name="SAMPA" description="Sample Adjustment" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CMODE" description="Communication Mode" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="USART Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="SBMODE" description="Stop Bit Mode" />
|
|
|
+ <BitField start="8" size="1" name="COLDEN" description="Collision Detection Enable" />
|
|
|
+ <BitField start="9" size="1" name="SFDE" description="Start of Frame Detection Enable" />
|
|
|
+ <BitField start="10" size="1" name="ENC" description="Encoding Format" />
|
|
|
+ <BitField start="13" size="1" name="PMODE" description="Parity Mode" />
|
|
|
+ <BitField start="16" size="1" name="TXEN" description="Transmitter Enable" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="2" name="SERCOM_DATA" access="Read/Write" description="USART Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="USART Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="USART Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="USART Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="USART Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="SERCOM_RXPL" access="Read/Write" description="USART Receive Pulse Length" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="RXPL" description="Receive Pulse Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="USART Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PERR" description="Parity Error" />
|
|
|
+ <BitField start="1" size="1" name="FERR" description="Frame Error" />
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ <BitField start="3" size="1" name="CTS" description="Clear To Send" />
|
|
|
+ <BitField start="4" size="1" name="ISF" description="Inconsistent Sync Field" />
|
|
|
+ <BitField start="5" size="1" name="COLL" description="Collision Detected" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="USART Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM5 (I2CM)" start="0x42001C00" description="Serial Communication Interface 5">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CM Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="11" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="13" size="1" name="LENEN" description="Length Enable" />
|
|
|
+ <BitField start="14" size="1" name="HS" description="High Speed Mode" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="16" size="8" name="LEN" description="Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="SERCOM_BAUD" access="Read/Write" description="I2CM Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="8" size="8" name="BAUDLOW" description="Baud Rate Value Low" />
|
|
|
+ <BitField start="16" size="8" name="HSBAUD" description="High Speed Baud Rate Value" />
|
|
|
+ <BitField start="24" size="8" name="HSBAUDLOW" description="High Speed Baud Rate Value Low" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CM Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="22" size="1" name="MEXTTOEN" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="28" size="2" name="INACTOUT" description="Inactive Time-Out" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CM Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="QCEN" description="Quick Command Enable" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CM Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="I2CM Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CM Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CM Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CM Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="MB" description="Master On Bus Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="SB" description="Slave On Bus Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CM Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="ARBLOST" description="Arbitration Lost" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="4" size="2" name="BUSSTATE" description="Bus State" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="8" size="1" name="MEXTTOUT" description="Master SCL Low Extend Timeout" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="LENERR" description="Length Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CM Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="SYSOP" description="System Operation Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM5 (I2CS)" start="0x42001C00" description="Serial Communication Interface 5">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="I2CS Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="GENCEN" description="General Call Address Enable" />
|
|
|
+ <BitField start="1" size="10" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="15" size="1" name="TENBITEN" description="Ten Bit Addressing Enable" />
|
|
|
+ <BitField start="17" size="10" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="I2CS Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="16" size="1" name="PINOUT" description="Pin Usage" />
|
|
|
+ <BitField start="20" size="2" name="SDAHOLD" description="SDA Hold Time" />
|
|
|
+ <BitField start="23" size="1" name="SEXTTOEN" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="24" size="2" name="SPEED" description="Transfer Speed" />
|
|
|
+ <BitField start="27" size="1" name="SCLSM" description="SCL Clock Stretch Mode" />
|
|
|
+ <BitField start="30" size="1" name="LOWTOUTEN" description="SCL Low Timeout Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="I2CS Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="8" size="1" name="SMEN" description="Smart Mode Enable" />
|
|
|
+ <BitField start="9" size="1" name="GCMD" description="PMBus Group Command" />
|
|
|
+ <BitField start="10" size="1" name="AACKEN" description="Automatic Address Acknowledge" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="16" size="2" name="CMD" description="Command" />
|
|
|
+ <BitField start="18" size="1" name="ACKACT" description="Acknowledge Action" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="1" name="SERCOM_DATA" access="Read/Write" description="I2CS Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="I2CS Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="I2CS Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="I2CS Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PREC" description="Stop Received Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="AMATCH" description="Address Match Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="DRDY" description="Data Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="I2CS Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="BUSERR" description="Bus Error" />
|
|
|
+ <BitField start="1" size="1" name="COLL" description="Transmit Collision" />
|
|
|
+ <BitField start="2" size="1" name="RXNACK" description="Received Not Acknowledge" />
|
|
|
+ <BitField start="3" size="1" name="DIR" description="Read/Write Direction" />
|
|
|
+ <BitField start="4" size="1" name="SR" description="Repeated Start" />
|
|
|
+ <BitField start="6" size="1" name="LOWTOUT" description="SCL Low Timeout" />
|
|
|
+ <BitField start="7" size="1" name="CLKHOLD" description="Clock Hold" />
|
|
|
+ <BitField start="9" size="1" name="SEXTTOUT" description="Slave SCL Low Extend Timeout" />
|
|
|
+ <BitField start="10" size="1" name="HS" description="High Speed" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="I2CS Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM5 (SPI)" start="0x42001C00" description="Serial Communication Interface 5">
|
|
|
+ <Register start="+0x24" size="4" name="SERCOM_ADDR" access="Read/Write" description="SPI Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="ADDR" description="Address Value" />
|
|
|
+ <BitField start="16" size="8" name="ADDRMASK" description="Address Mask" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="SERCOM_BAUD" access="Read/Write" description="SPI Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="SPI Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="16" size="2" name="DOPO" description="Data Out Pinout" />
|
|
|
+ <BitField start="20" size="2" name="DIPO" description="Data In Pinout" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CPHA" description="Clock Phase" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="SPI Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="PLOADEN" description="Data Preload Enable" />
|
|
|
+ <BitField start="9" size="1" name="SSDE" description="Slave Select Low Detect Enable" />
|
|
|
+ <BitField start="13" size="1" name="MSSEN" description="Master Slave Select Enable" />
|
|
|
+ <BitField start="14" size="2" name="AMODE" description="Address Mode" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="SERCOM_DATA" access="Read/Write" description="SPI Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="SPI Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="SPI Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="SPI Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="SPI Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="SSL" description="Slave Select Low Interrupt Flag" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="SPI Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="SPI Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SERCOM5 (USART)" start="0x42001C00" description="Serial Communication Interface 5">
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRAC_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_FRACFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="13" name="BAUD" description="Baud Rate Value" />
|
|
|
+ <BitField start="13" size="3" name="FP" description="Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="2" name="SERCOM_BAUD_USARTFP_MODE" access="Read/Write" description="USART Baud Rate" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="BAUD" description="Baud Rate Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SERCOM_CTRLA" access="Read/Write" description="USART Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="3" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="USART_EXT_CLK" start="0x0" description="USART mode with external clock" />
|
|
|
+ <Enum name="USART_INT_CLK" start="0x1" description="USART mode with internal clock" />
|
|
|
+ <Enum name="SPI_SLAVE" start="0x2" description="SPI mode with external clock" />
|
|
|
+ <Enum name="SPI_MASTER" start="0x3" description="SPI mode with internal clock" />
|
|
|
+ <Enum name="I2C_SLAVE" start="0x4" description="I2C mode with external clock" />
|
|
|
+ <Enum name="I2C_MASTER" start="0x5" description="I2C mode with internal clock" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RUNSTDBY" description="Run during Standby" />
|
|
|
+ <BitField start="8" size="1" name="IBON" description="Immediate Buffer Overflow Notification" />
|
|
|
+ <BitField start="13" size="3" name="SAMPR" description="Sample" />
|
|
|
+ <BitField start="16" size="2" name="TXPO" description="Transmit Data Pinout" />
|
|
|
+ <BitField start="20" size="2" name="RXPO" description="Receive Data Pinout" />
|
|
|
+ <BitField start="22" size="2" name="SAMPA" description="Sample Adjustment" />
|
|
|
+ <BitField start="24" size="4" name="FORM" description="Frame Format" />
|
|
|
+ <BitField start="28" size="1" name="CMODE" description="Communication Mode" />
|
|
|
+ <BitField start="29" size="1" name="CPOL" description="Clock Polarity" />
|
|
|
+ <BitField start="30" size="1" name="DORD" description="Data Order" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SERCOM_CTRLB" access="Read/Write" description="USART Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="CHSIZE" description="Character Size" />
|
|
|
+ <BitField start="6" size="1" name="SBMODE" description="Stop Bit Mode" />
|
|
|
+ <BitField start="8" size="1" name="COLDEN" description="Collision Detection Enable" />
|
|
|
+ <BitField start="9" size="1" name="SFDE" description="Start of Frame Detection Enable" />
|
|
|
+ <BitField start="10" size="1" name="ENC" description="Encoding Format" />
|
|
|
+ <BitField start="13" size="1" name="PMODE" description="Parity Mode" />
|
|
|
+ <BitField start="16" size="1" name="TXEN" description="Transmitter Enable" />
|
|
|
+ <BitField start="17" size="1" name="RXEN" description="Receiver Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="2" name="SERCOM_DATA" access="Read/Write" description="USART Data" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="9" name="DATA" description="Data Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SERCOM_DBGCTRL" access="Read/Write" description="USART Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGSTOP" description="Debug Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="SERCOM_INTENCLR" access="Read/Write" description="USART Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x16" size="1" name="SERCOM_INTENSET" access="Read/Write" description="USART Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="1" name="SERCOM_INTFLAG" access="Read/Write" description="USART Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DRE" description="Data Register Empty Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="TXC" description="Transmit Complete Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="RXC" description="Receive Complete Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="RXS" description="Receive Start Interrupt" />
|
|
|
+ <BitField start="4" size="1" name="CTSIC" description="Clear To Send Input Change Interrupt" />
|
|
|
+ <BitField start="5" size="1" name="RXBRK" description="Break Received Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="ERROR" description="Combined Error Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="SERCOM_RXPL" access="Read/Write" description="USART Receive Pulse Length" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="RXPL" description="Receive Pulse Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1A" size="2" name="SERCOM_STATUS" access="Read/Write" description="USART Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PERR" description="Parity Error" />
|
|
|
+ <BitField start="1" size="1" name="FERR" description="Frame Error" />
|
|
|
+ <BitField start="2" size="1" name="BUFOVF" description="Buffer Overflow" />
|
|
|
+ <BitField start="3" size="1" name="CTS" description="Clear To Send" />
|
|
|
+ <BitField start="4" size="1" name="ISF" description="Inconsistent Sync Field" />
|
|
|
+ <BitField start="5" size="1" name="COLL" description="Collision Detected" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="4" name="SERCOM_SYNCBUSY" access="ReadOnly" description="USART Syncbusy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="SERCOM Enable Synchronization Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="CTRLB Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SYSCTRL" start="0x40000800" description="System Control">
|
|
|
+ <Register start="+0x34" size="4" name="SYSCTRL_BOD33" access="Read/Write" description="3.3V Brown-Out Detector (BOD33) Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="1" name="HYST" description="Hysteresis" />
|
|
|
+ <BitField start="3" size="2" name="ACTION" description="BOD33 Action">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RESET" start="0x1" description="The BOD33 generates a reset" />
|
|
|
+ <Enum name="INTERRUPT" start="0x2" description="The BOD33 generates an interrupt" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="6" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="8" size="1" name="MODE" description="Operation Mode" />
|
|
|
+ <BitField start="9" size="1" name="CEN" description="Clock Enable" />
|
|
|
+ <BitField start="12" size="4" name="PSEL" description="Prescaler Select">
|
|
|
+ <Enum name="DIV2" start="0x0" description="Divide clock by 2" />
|
|
|
+ <Enum name="DIV4" start="0x1" description="Divide clock by 4" />
|
|
|
+ <Enum name="DIV8" start="0x2" description="Divide clock by 8" />
|
|
|
+ <Enum name="DIV16" start="0x3" description="Divide clock by 16" />
|
|
|
+ <Enum name="DIV32" start="0x4" description="Divide clock by 32" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Divide clock by 64" />
|
|
|
+ <Enum name="DIV128" start="0x6" description="Divide clock by 128" />
|
|
|
+ <Enum name="DIV256" start="0x7" description="Divide clock by 256" />
|
|
|
+ <Enum name="DIV512" start="0x8" description="Divide clock by 512" />
|
|
|
+ <Enum name="DIV1K" start="0x9" description="Divide clock by 1024" />
|
|
|
+ <Enum name="DIV2K" start="0xa" description="Divide clock by 2048" />
|
|
|
+ <Enum name="DIV4K" start="0xb" description="Divide clock by 4096" />
|
|
|
+ <Enum name="DIV8K" start="0xc" description="Divide clock by 8192" />
|
|
|
+ <Enum name="DIV16K" start="0xd" description="Divide clock by 16384" />
|
|
|
+ <Enum name="DIV32K" start="0xe" description="Divide clock by 32768" />
|
|
|
+ <Enum name="DIV64K" start="0xf" description="Divide clock by 65536" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="6" name="LEVEL" description="BOD33 Threshold Level" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x24" size="2" name="SYSCTRL_DFLLCTRL" access="Read/Write" description="DFLL48M Control" reset_value="0x0080" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="DFLL Enable" />
|
|
|
+ <BitField start="2" size="1" name="MODE" description="Operating Mode Selection" />
|
|
|
+ <BitField start="3" size="1" name="STABLE" description="Stable DFLL Frequency" />
|
|
|
+ <BitField start="4" size="1" name="LLAW" description="Lose Lock After Wake" />
|
|
|
+ <BitField start="5" size="1" name="USBCRM" description="USB Clock Recovery Mode" />
|
|
|
+ <BitField start="6" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="7" size="1" name="ONDEMAND" description="On Demand Control" />
|
|
|
+ <BitField start="8" size="1" name="CCDIS" description="Chill Cycle Disable" />
|
|
|
+ <BitField start="9" size="1" name="QLDIS" description="Quick Lock Disable" />
|
|
|
+ <BitField start="10" size="1" name="BPLCKC" description="Bypass Coarse Lock" />
|
|
|
+ <BitField start="11" size="1" name="WAITLOCK" description="Wait Lock" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x2C" size="4" name="SYSCTRL_DFLLMUL" access="Read/Write" description="DFLL48M Multiplier" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="MUL" description="DFLL Multiply Factor" />
|
|
|
+ <BitField start="16" size="10" name="FSTEP" description="Fine Maximum Step" />
|
|
|
+ <BitField start="26" size="6" name="CSTEP" description="Coarse Maximum Step" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="1" name="SYSCTRL_DFLLSYNC" access="Read/Write" description="DFLL48M Synchronization" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="7" size="1" name="READREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="SYSCTRL_DFLLVAL" access="Read/Write" description="DFLL48M Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="10" name="FINE" description="Fine Value" />
|
|
|
+ <BitField start="10" size="6" name="COARSE" description="Coarse Value" />
|
|
|
+ <BitField start="16" size="16" name="DIFF" description="Multiplication Ratio Difference" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44" size="1" name="SYSCTRL_DPLLCTRLA" access="Read/Write" description="DPLL Control A" reset_value="0x80" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="DPLL Enable" />
|
|
|
+ <BitField start="6" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="7" size="1" name="ONDEMAND" description="On Demand Clock Activation" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4C" size="4" name="SYSCTRL_DPLLCTRLB" access="Read/Write" description="DPLL Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="FILTER" description="Proportional Integral Filter Selection">
|
|
|
+ <Enum name="DEFAULT" start="0x0" description="Default filter mode" />
|
|
|
+ <Enum name="LBFILT" start="0x1" description="Low bandwidth filter" />
|
|
|
+ <Enum name="HBFILT" start="0x2" description="High bandwidth filter" />
|
|
|
+ <Enum name="HDFILT" start="0x3" description="High damping filter" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="2" size="1" name="LPEN" description="Low-Power Enable" />
|
|
|
+ <BitField start="3" size="1" name="WUF" description="Wake Up Fast" />
|
|
|
+ <BitField start="4" size="2" name="REFCLK" description="Reference Clock Selection">
|
|
|
+ <Enum name="REF0" start="0x0" description="CLK_DPLL_REF0 clock reference" />
|
|
|
+ <Enum name="REF1" start="0x1" description="CLK_DPLL_REF1 clock reference" />
|
|
|
+ <Enum name="GCLK" start="0x2" description="GCLK_DPLL clock reference" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="LTIME" description="Lock Time">
|
|
|
+ <Enum name="DEFAULT" start="0x0" description="No time-out" />
|
|
|
+ <Enum name="8MS" start="0x4" description="Time-out if no lock within 8 ms" />
|
|
|
+ <Enum name="9MS" start="0x5" description="Time-out if no lock within 9 ms" />
|
|
|
+ <Enum name="10MS" start="0x6" description="Time-out if no lock within 10 ms" />
|
|
|
+ <Enum name="11MS" start="0x7" description="Time-out if no lock within 11 ms" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="12" size="1" name="LBYPASS" description="Lock Bypass" />
|
|
|
+ <BitField start="16" size="11" name="DIV" description="Clock Divider" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x48" size="4" name="SYSCTRL_DPLLRATIO" access="Read/Write" description="DPLL Ratio Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="12" name="LDR" description="Loop Divider Ratio" />
|
|
|
+ <BitField start="16" size="4" name="LDRFRAC" description="Loop Divider Ratio Fractional Part" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x50" size="1" name="SYSCTRL_DPLLSTATUS" access="ReadOnly" description="DPLL Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="LOCK" description="DPLL Lock Status" />
|
|
|
+ <BitField start="1" size="1" name="CLKRDY" description="Output Clock Ready" />
|
|
|
+ <BitField start="2" size="1" name="ENABLE" description="DPLL Enable" />
|
|
|
+ <BitField start="3" size="1" name="DIV" description="Divider Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="SYSCTRL_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="XOSCRDY" description="XOSC Ready Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="XOSC32KRDY" description="XOSC32K Ready Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="OSC32KRDY" description="OSC32K Ready Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="OSC8MRDY" description="OSC8M Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="DFLLRDY" description="DFLL Ready Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="DFLLOOB" description="DFLL Out Of Bounds Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="DFLLLCKF" description="DFLL Lock Fine Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="DFLLLCKC" description="DFLL Lock Coarse Interrupt Enable" />
|
|
|
+ <BitField start="8" size="1" name="DFLLRCS" description="DFLL Reference Clock Stopped Interrupt Enable" />
|
|
|
+ <BitField start="9" size="1" name="BOD33RDY" description="BOD33 Ready Interrupt Enable" />
|
|
|
+ <BitField start="10" size="1" name="BOD33DET" description="BOD33 Detection Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="B33SRDY" description="BOD33 Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="DPLLLCKR" description="DPLL Lock Rise Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="DPLLLCKF" description="DPLL Lock Fall Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="DPLLLTO" description="DPLL Lock Timeout Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="4" name="SYSCTRL_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="XOSCRDY" description="XOSC Ready Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="XOSC32KRDY" description="XOSC32K Ready Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="OSC32KRDY" description="OSC32K Ready Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="OSC8MRDY" description="OSC8M Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="DFLLRDY" description="DFLL Ready Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="DFLLOOB" description="DFLL Out Of Bounds Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="DFLLLCKF" description="DFLL Lock Fine Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="DFLLLCKC" description="DFLL Lock Coarse Interrupt Enable" />
|
|
|
+ <BitField start="8" size="1" name="DFLLRCS" description="DFLL Reference Clock Stopped Interrupt Enable" />
|
|
|
+ <BitField start="9" size="1" name="BOD33RDY" description="BOD33 Ready Interrupt Enable" />
|
|
|
+ <BitField start="10" size="1" name="BOD33DET" description="BOD33 Detection Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="B33SRDY" description="BOD33 Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="DPLLLCKR" description="DPLL Lock Rise Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="DPLLLCKF" description="DPLL Lock Fall Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="DPLLLTO" description="DPLL Lock Timeout Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="4" name="SYSCTRL_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="XOSCRDY" description="XOSC Ready" />
|
|
|
+ <BitField start="1" size="1" name="XOSC32KRDY" description="XOSC32K Ready" />
|
|
|
+ <BitField start="2" size="1" name="OSC32KRDY" description="OSC32K Ready" />
|
|
|
+ <BitField start="3" size="1" name="OSC8MRDY" description="OSC8M Ready" />
|
|
|
+ <BitField start="4" size="1" name="DFLLRDY" description="DFLL Ready" />
|
|
|
+ <BitField start="5" size="1" name="DFLLOOB" description="DFLL Out Of Bounds" />
|
|
|
+ <BitField start="6" size="1" name="DFLLLCKF" description="DFLL Lock Fine" />
|
|
|
+ <BitField start="7" size="1" name="DFLLLCKC" description="DFLL Lock Coarse" />
|
|
|
+ <BitField start="8" size="1" name="DFLLRCS" description="DFLL Reference Clock Stopped" />
|
|
|
+ <BitField start="9" size="1" name="BOD33RDY" description="BOD33 Ready" />
|
|
|
+ <BitField start="10" size="1" name="BOD33DET" description="BOD33 Detection" />
|
|
|
+ <BitField start="11" size="1" name="B33SRDY" description="BOD33 Synchronization Ready" />
|
|
|
+ <BitField start="15" size="1" name="DPLLLCKR" description="DPLL Lock Rise" />
|
|
|
+ <BitField start="16" size="1" name="DPLLLCKF" description="DPLL Lock Fall" />
|
|
|
+ <BitField start="17" size="1" name="DPLLLTO" description="DPLL Lock Timeout" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="4" name="SYSCTRL_OSC32K" access="Read/Write" description="32kHz Internal Oscillator (OSC32K) Control" reset_value="0x003F0080" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Oscillator Enable" />
|
|
|
+ <BitField start="2" size="1" name="EN32K" description="32kHz Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="EN1K" description="1kHz Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="7" size="1" name="ONDEMAND" description="On Demand Control" />
|
|
|
+ <BitField start="8" size="3" name="STARTUP" description="Oscillator Start-Up Time" />
|
|
|
+ <BitField start="12" size="1" name="WRTLOCK" description="Write Lock" />
|
|
|
+ <BitField start="16" size="7" name="CALIB" description="Oscillator Calibration" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20" size="4" name="SYSCTRL_OSC8M" access="Read/Write" description="8MHz Internal Oscillator (OSC8M) Control" reset_value="0x87070382" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Oscillator Enable" />
|
|
|
+ <BitField start="6" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="7" size="1" name="ONDEMAND" description="On Demand Control" />
|
|
|
+ <BitField start="8" size="2" name="PRESC" description="Oscillator Prescaler">
|
|
|
+ <Enum name="0" start="0x0" description="1" />
|
|
|
+ <Enum name="1" start="0x1" description="2" />
|
|
|
+ <Enum name="2" start="0x2" description="4" />
|
|
|
+ <Enum name="3" start="0x3" description="8" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="12" name="CALIB" description="Oscillator Calibration" />
|
|
|
+ <BitField start="30" size="2" name="FRANGE" description="Oscillator Frequency Range">
|
|
|
+ <Enum name="0" start="0x0" description="4 to 6MHz" />
|
|
|
+ <Enum name="1" start="0x1" description="6 to 8MHz" />
|
|
|
+ <Enum name="2" start="0x2" description="8 to 11MHz" />
|
|
|
+ <Enum name="3" start="0x3" description="11 to 15MHz" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1C" size="1" name="SYSCTRL_OSCULP32K" access="Read/Write" description="32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control" reset_value="0x1F" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="CALIB" description="Oscillator Calibration" />
|
|
|
+ <BitField start="7" size="1" name="WRTLOCK" description="Write Lock" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="SYSCTRL_PCLKSR" access="ReadOnly" description="Power and Clocks Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="XOSCRDY" description="XOSC Ready" />
|
|
|
+ <BitField start="1" size="1" name="XOSC32KRDY" description="XOSC32K Ready" />
|
|
|
+ <BitField start="2" size="1" name="OSC32KRDY" description="OSC32K Ready" />
|
|
|
+ <BitField start="3" size="1" name="OSC8MRDY" description="OSC8M Ready" />
|
|
|
+ <BitField start="4" size="1" name="DFLLRDY" description="DFLL Ready" />
|
|
|
+ <BitField start="5" size="1" name="DFLLOOB" description="DFLL Out Of Bounds" />
|
|
|
+ <BitField start="6" size="1" name="DFLLLCKF" description="DFLL Lock Fine" />
|
|
|
+ <BitField start="7" size="1" name="DFLLLCKC" description="DFLL Lock Coarse" />
|
|
|
+ <BitField start="8" size="1" name="DFLLRCS" description="DFLL Reference Clock Stopped" />
|
|
|
+ <BitField start="9" size="1" name="BOD33RDY" description="BOD33 Ready" />
|
|
|
+ <BitField start="10" size="1" name="BOD33DET" description="BOD33 Detection" />
|
|
|
+ <BitField start="11" size="1" name="B33SRDY" description="BOD33 Synchronization Ready" />
|
|
|
+ <BitField start="15" size="1" name="DPLLLCKR" description="DPLL Lock Rise" />
|
|
|
+ <BitField start="16" size="1" name="DPLLLCKF" description="DPLL Lock Fall" />
|
|
|
+ <BitField start="17" size="1" name="DPLLLTO" description="DPLL Lock Timeout" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="SYSCTRL_VREF" access="Read/Write" description="Voltage References System (VREF) Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="TSEN" description="Temperature Sensor Enable" />
|
|
|
+ <BitField start="2" size="1" name="BGOUTEN" description="Bandgap Output Enable" />
|
|
|
+ <BitField start="16" size="11" name="CALIB" description="Bandgap Voltage Generator Calibration" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x3C" size="2" name="SYSCTRL_VREG" access="Read/Write" description="Voltage Regulator System (VREG) Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="6" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="13" size="1" name="FORCELDO" description="Force LDO Voltage Regulator" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="2" name="SYSCTRL_XOSC" access="Read/Write" description="External Multipurpose Crystal Oscillator (XOSC) Control" reset_value="0x0080" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Oscillator Enable" />
|
|
|
+ <BitField start="2" size="1" name="XTALEN" description="Crystal Oscillator Enable" />
|
|
|
+ <BitField start="6" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="7" size="1" name="ONDEMAND" description="On Demand Control" />
|
|
|
+ <BitField start="8" size="3" name="GAIN" description="Oscillator Gain">
|
|
|
+ <Enum name="0" start="0x0" description="2MHz" />
|
|
|
+ <Enum name="1" start="0x1" description="4MHz" />
|
|
|
+ <Enum name="2" start="0x2" description="8MHz" />
|
|
|
+ <Enum name="3" start="0x3" description="16MHz" />
|
|
|
+ <Enum name="4" start="0x4" description="30MHz" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="AMPGC" description="Automatic Amplitude Gain Control" />
|
|
|
+ <BitField start="12" size="4" name="STARTUP" description="Start-Up Time" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="2" name="SYSCTRL_XOSC32K" access="Read/Write" description="32kHz External Crystal Oscillator (XOSC32K) Control" reset_value="0x0080" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Oscillator Enable" />
|
|
|
+ <BitField start="2" size="1" name="XTALEN" description="Crystal Oscillator Enable" />
|
|
|
+ <BitField start="3" size="1" name="EN32K" description="32kHz Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="EN1K" description="1kHz Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="AAMPEN" description="Automatic Amplitude Control Enable" />
|
|
|
+ <BitField start="6" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="7" size="1" name="ONDEMAND" description="On Demand Control" />
|
|
|
+ <BitField start="8" size="3" name="STARTUP" description="Oscillator Start-Up Time" />
|
|
|
+ <BitField start="12" size="1" name="WRTLOCK" description="Write Lock" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TC3 (COUNT8)" start="0x42002C00" description="Basic Timer Counter 3">
|
|
|
+ <Register start="+0x18+0" size="1" name="TC_CC0" access="Read/Write" description="COUNT8 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+1" size="1" name="TC_CC1" access="Read/Write" description="COUNT8 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="1" name="TC_COUNT" access="Read/Write" description="COUNT8 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="TC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="TC Mode">
|
|
|
+ <Enum name="COUNT16" start="0x0" description="Counter in 16-bit mode" />
|
|
|
+ <Enum name="COUNT8" start="0x1" description="Counter in 8-bit mode" />
|
|
|
+ <Enum name="COUNT32" start="0x2" description="Counter in 32-bit mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="2" name="WAVEGEN" description="Waveform Generation Operation">
|
|
|
+ <Enum name="NFRQ" start="0x0" />
|
|
|
+ <Enum name="MFRQ" start="0x1" />
|
|
|
+ <Enum name="NPWM" start="0x2" />
|
|
|
+ <Enum name="MPWM" start="0x3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Prescaler: GCLK_TC" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Prescaler: GCLK_TC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Prescaler: GCLK_TC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Prescaler: GCLK_TC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Prescaler: GCLK_TC/16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Prescaler: GCLK_TC/64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Prescaler: GCLK_TC/256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Prescaler: GCLK_TC/1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset the counter on next generic clock" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset the counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset the counter on next generic clock. Reset the prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x02" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="TC_CTRLC" access="Read/Write" description="Control C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="INVEN0" description="Output Waveform 0 Invert Enable" />
|
|
|
+ <BitField start="1" size="1" name="INVEN1" description="Output Waveform 1 Invert Enable" />
|
|
|
+ <BitField start="4" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="TC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="2" name="TC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or retrigger TC on event" />
|
|
|
+ <Enum name="COUNT" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start TC on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period captured in CC0, pulse width in CC1" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period captured in CC1, pulse width in CC0" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TCINV" description="TC Inverted Event Input" />
|
|
|
+ <BitField start="5" size="1" name="TCEI" description="TC Event Input" />
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="TC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="TC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="TC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="TC_PER" access="Read/Write" description="COUNT8 Period Value" reset_value="0xFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="TC_READREQ" access="Read/Write" description="Read Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0F" size="1" name="TC_STATUS" access="ReadOnly" description="Status" reset_value="0x08" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="3" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TC3 (COUNT16)" start="0x42002C00" description="Basic Timer Counter 3">
|
|
|
+ <Register start="+0x18+0" size="2" name="TC_CC0" access="Read/Write" description="COUNT16 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+2" size="2" name="TC_CC1" access="Read/Write" description="COUNT16 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="2" name="TC_COUNT" access="Read/Write" description="COUNT16 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="COUNT" description="Count Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="TC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="TC Mode">
|
|
|
+ <Enum name="COUNT16" start="0x0" description="Counter in 16-bit mode" />
|
|
|
+ <Enum name="COUNT8" start="0x1" description="Counter in 8-bit mode" />
|
|
|
+ <Enum name="COUNT32" start="0x2" description="Counter in 32-bit mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="2" name="WAVEGEN" description="Waveform Generation Operation">
|
|
|
+ <Enum name="NFRQ" start="0x0" />
|
|
|
+ <Enum name="MFRQ" start="0x1" />
|
|
|
+ <Enum name="NPWM" start="0x2" />
|
|
|
+ <Enum name="MPWM" start="0x3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Prescaler: GCLK_TC" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Prescaler: GCLK_TC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Prescaler: GCLK_TC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Prescaler: GCLK_TC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Prescaler: GCLK_TC/16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Prescaler: GCLK_TC/64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Prescaler: GCLK_TC/256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Prescaler: GCLK_TC/1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset the counter on next generic clock" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset the counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset the counter on next generic clock. Reset the prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x02" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="TC_CTRLC" access="Read/Write" description="Control C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="INVEN0" description="Output Waveform 0 Invert Enable" />
|
|
|
+ <BitField start="1" size="1" name="INVEN1" description="Output Waveform 1 Invert Enable" />
|
|
|
+ <BitField start="4" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="TC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="2" name="TC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or retrigger TC on event" />
|
|
|
+ <Enum name="COUNT" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start TC on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period captured in CC0, pulse width in CC1" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period captured in CC1, pulse width in CC0" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TCINV" description="TC Inverted Event Input" />
|
|
|
+ <BitField start="5" size="1" name="TCEI" description="TC Event Input" />
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="TC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="TC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="TC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="TC_READREQ" access="Read/Write" description="Read Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0F" size="1" name="TC_STATUS" access="ReadOnly" description="Status" reset_value="0x08" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="3" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TC3 (COUNT32)" start="0x42002C00" description="Basic Timer Counter 3">
|
|
|
+ <Register start="+0x18+0" size="4" name="TC_CC0" access="Read/Write" description="COUNT32 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+4" size="4" name="TC_CC1" access="Read/Write" description="COUNT32 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="TC_COUNT" access="Read/Write" description="COUNT32 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="COUNT" description="Count Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="TC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="TC Mode">
|
|
|
+ <Enum name="COUNT16" start="0x0" description="Counter in 16-bit mode" />
|
|
|
+ <Enum name="COUNT8" start="0x1" description="Counter in 8-bit mode" />
|
|
|
+ <Enum name="COUNT32" start="0x2" description="Counter in 32-bit mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="2" name="WAVEGEN" description="Waveform Generation Operation">
|
|
|
+ <Enum name="NFRQ" start="0x0" />
|
|
|
+ <Enum name="MFRQ" start="0x1" />
|
|
|
+ <Enum name="NPWM" start="0x2" />
|
|
|
+ <Enum name="MPWM" start="0x3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Prescaler: GCLK_TC" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Prescaler: GCLK_TC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Prescaler: GCLK_TC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Prescaler: GCLK_TC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Prescaler: GCLK_TC/16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Prescaler: GCLK_TC/64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Prescaler: GCLK_TC/256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Prescaler: GCLK_TC/1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset the counter on next generic clock" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset the counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset the counter on next generic clock. Reset the prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x02" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="TC_CTRLC" access="Read/Write" description="Control C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="INVEN0" description="Output Waveform 0 Invert Enable" />
|
|
|
+ <BitField start="1" size="1" name="INVEN1" description="Output Waveform 1 Invert Enable" />
|
|
|
+ <BitField start="4" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="TC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="2" name="TC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or retrigger TC on event" />
|
|
|
+ <Enum name="COUNT" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start TC on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period captured in CC0, pulse width in CC1" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period captured in CC1, pulse width in CC0" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TCINV" description="TC Inverted Event Input" />
|
|
|
+ <BitField start="5" size="1" name="TCEI" description="TC Event Input" />
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="TC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="TC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="TC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="TC_READREQ" access="Read/Write" description="Read Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0F" size="1" name="TC_STATUS" access="ReadOnly" description="Status" reset_value="0x08" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="3" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TC4 (COUNT8)" start="0x42003000" description="Basic Timer Counter 4">
|
|
|
+ <Register start="+0x18+0" size="1" name="TC_CC0" access="Read/Write" description="COUNT8 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+1" size="1" name="TC_CC1" access="Read/Write" description="COUNT8 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="1" name="TC_COUNT" access="Read/Write" description="COUNT8 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="TC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="TC Mode">
|
|
|
+ <Enum name="COUNT16" start="0x0" description="Counter in 16-bit mode" />
|
|
|
+ <Enum name="COUNT8" start="0x1" description="Counter in 8-bit mode" />
|
|
|
+ <Enum name="COUNT32" start="0x2" description="Counter in 32-bit mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="2" name="WAVEGEN" description="Waveform Generation Operation">
|
|
|
+ <Enum name="NFRQ" start="0x0" />
|
|
|
+ <Enum name="MFRQ" start="0x1" />
|
|
|
+ <Enum name="NPWM" start="0x2" />
|
|
|
+ <Enum name="MPWM" start="0x3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Prescaler: GCLK_TC" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Prescaler: GCLK_TC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Prescaler: GCLK_TC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Prescaler: GCLK_TC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Prescaler: GCLK_TC/16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Prescaler: GCLK_TC/64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Prescaler: GCLK_TC/256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Prescaler: GCLK_TC/1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset the counter on next generic clock" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset the counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset the counter on next generic clock. Reset the prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x02" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="TC_CTRLC" access="Read/Write" description="Control C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="INVEN0" description="Output Waveform 0 Invert Enable" />
|
|
|
+ <BitField start="1" size="1" name="INVEN1" description="Output Waveform 1 Invert Enable" />
|
|
|
+ <BitField start="4" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="TC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="2" name="TC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or retrigger TC on event" />
|
|
|
+ <Enum name="COUNT" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start TC on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period captured in CC0, pulse width in CC1" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period captured in CC1, pulse width in CC0" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TCINV" description="TC Inverted Event Input" />
|
|
|
+ <BitField start="5" size="1" name="TCEI" description="TC Event Input" />
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="TC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="TC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="TC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="TC_PER" access="Read/Write" description="COUNT8 Period Value" reset_value="0xFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="TC_READREQ" access="Read/Write" description="Read Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0F" size="1" name="TC_STATUS" access="ReadOnly" description="Status" reset_value="0x08" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="3" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TC4 (COUNT16)" start="0x42003000" description="Basic Timer Counter 4">
|
|
|
+ <Register start="+0x18+0" size="2" name="TC_CC0" access="Read/Write" description="COUNT16 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+2" size="2" name="TC_CC1" access="Read/Write" description="COUNT16 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="2" name="TC_COUNT" access="Read/Write" description="COUNT16 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="COUNT" description="Count Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="TC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="TC Mode">
|
|
|
+ <Enum name="COUNT16" start="0x0" description="Counter in 16-bit mode" />
|
|
|
+ <Enum name="COUNT8" start="0x1" description="Counter in 8-bit mode" />
|
|
|
+ <Enum name="COUNT32" start="0x2" description="Counter in 32-bit mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="2" name="WAVEGEN" description="Waveform Generation Operation">
|
|
|
+ <Enum name="NFRQ" start="0x0" />
|
|
|
+ <Enum name="MFRQ" start="0x1" />
|
|
|
+ <Enum name="NPWM" start="0x2" />
|
|
|
+ <Enum name="MPWM" start="0x3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Prescaler: GCLK_TC" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Prescaler: GCLK_TC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Prescaler: GCLK_TC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Prescaler: GCLK_TC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Prescaler: GCLK_TC/16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Prescaler: GCLK_TC/64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Prescaler: GCLK_TC/256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Prescaler: GCLK_TC/1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset the counter on next generic clock" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset the counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset the counter on next generic clock. Reset the prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x02" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="TC_CTRLC" access="Read/Write" description="Control C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="INVEN0" description="Output Waveform 0 Invert Enable" />
|
|
|
+ <BitField start="1" size="1" name="INVEN1" description="Output Waveform 1 Invert Enable" />
|
|
|
+ <BitField start="4" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="TC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="2" name="TC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or retrigger TC on event" />
|
|
|
+ <Enum name="COUNT" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start TC on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period captured in CC0, pulse width in CC1" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period captured in CC1, pulse width in CC0" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TCINV" description="TC Inverted Event Input" />
|
|
|
+ <BitField start="5" size="1" name="TCEI" description="TC Event Input" />
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="TC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="TC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="TC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="TC_READREQ" access="Read/Write" description="Read Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0F" size="1" name="TC_STATUS" access="ReadOnly" description="Status" reset_value="0x08" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="3" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TC4 (COUNT32)" start="0x42003000" description="Basic Timer Counter 4">
|
|
|
+ <Register start="+0x18+0" size="4" name="TC_CC0" access="Read/Write" description="COUNT32 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+4" size="4" name="TC_CC1" access="Read/Write" description="COUNT32 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="TC_COUNT" access="Read/Write" description="COUNT32 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="COUNT" description="Count Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="TC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="TC Mode">
|
|
|
+ <Enum name="COUNT16" start="0x0" description="Counter in 16-bit mode" />
|
|
|
+ <Enum name="COUNT8" start="0x1" description="Counter in 8-bit mode" />
|
|
|
+ <Enum name="COUNT32" start="0x2" description="Counter in 32-bit mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="2" name="WAVEGEN" description="Waveform Generation Operation">
|
|
|
+ <Enum name="NFRQ" start="0x0" />
|
|
|
+ <Enum name="MFRQ" start="0x1" />
|
|
|
+ <Enum name="NPWM" start="0x2" />
|
|
|
+ <Enum name="MPWM" start="0x3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Prescaler: GCLK_TC" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Prescaler: GCLK_TC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Prescaler: GCLK_TC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Prescaler: GCLK_TC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Prescaler: GCLK_TC/16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Prescaler: GCLK_TC/64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Prescaler: GCLK_TC/256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Prescaler: GCLK_TC/1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset the counter on next generic clock" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset the counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset the counter on next generic clock. Reset the prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x02" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="TC_CTRLC" access="Read/Write" description="Control C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="INVEN0" description="Output Waveform 0 Invert Enable" />
|
|
|
+ <BitField start="1" size="1" name="INVEN1" description="Output Waveform 1 Invert Enable" />
|
|
|
+ <BitField start="4" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="TC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="2" name="TC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or retrigger TC on event" />
|
|
|
+ <Enum name="COUNT" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start TC on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period captured in CC0, pulse width in CC1" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period captured in CC1, pulse width in CC0" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TCINV" description="TC Inverted Event Input" />
|
|
|
+ <BitField start="5" size="1" name="TCEI" description="TC Event Input" />
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="TC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="TC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="TC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="TC_READREQ" access="Read/Write" description="Read Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0F" size="1" name="TC_STATUS" access="ReadOnly" description="Status" reset_value="0x08" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="3" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TC5 (COUNT8)" start="0x42003400" description="Basic Timer Counter 5">
|
|
|
+ <Register start="+0x18+0" size="1" name="TC_CC0" access="Read/Write" description="COUNT8 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+1" size="1" name="TC_CC1" access="Read/Write" description="COUNT8 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="1" name="TC_COUNT" access="Read/Write" description="COUNT8 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="TC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="TC Mode">
|
|
|
+ <Enum name="COUNT16" start="0x0" description="Counter in 16-bit mode" />
|
|
|
+ <Enum name="COUNT8" start="0x1" description="Counter in 8-bit mode" />
|
|
|
+ <Enum name="COUNT32" start="0x2" description="Counter in 32-bit mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="2" name="WAVEGEN" description="Waveform Generation Operation">
|
|
|
+ <Enum name="NFRQ" start="0x0" />
|
|
|
+ <Enum name="MFRQ" start="0x1" />
|
|
|
+ <Enum name="NPWM" start="0x2" />
|
|
|
+ <Enum name="MPWM" start="0x3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Prescaler: GCLK_TC" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Prescaler: GCLK_TC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Prescaler: GCLK_TC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Prescaler: GCLK_TC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Prescaler: GCLK_TC/16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Prescaler: GCLK_TC/64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Prescaler: GCLK_TC/256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Prescaler: GCLK_TC/1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset the counter on next generic clock" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset the counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset the counter on next generic clock. Reset the prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x02" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="TC_CTRLC" access="Read/Write" description="Control C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="INVEN0" description="Output Waveform 0 Invert Enable" />
|
|
|
+ <BitField start="1" size="1" name="INVEN1" description="Output Waveform 1 Invert Enable" />
|
|
|
+ <BitField start="4" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="TC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="2" name="TC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or retrigger TC on event" />
|
|
|
+ <Enum name="COUNT" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start TC on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period captured in CC0, pulse width in CC1" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period captured in CC1, pulse width in CC0" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TCINV" description="TC Inverted Event Input" />
|
|
|
+ <BitField start="5" size="1" name="TCEI" description="TC Event Input" />
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="TC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="TC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="TC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="1" name="TC_PER" access="Read/Write" description="COUNT8 Period Value" reset_value="0xFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="TC_READREQ" access="Read/Write" description="Read Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0F" size="1" name="TC_STATUS" access="ReadOnly" description="Status" reset_value="0x08" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="3" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TC5 (COUNT16)" start="0x42003400" description="Basic Timer Counter 5">
|
|
|
+ <Register start="+0x18+0" size="2" name="TC_CC0" access="Read/Write" description="COUNT16 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+2" size="2" name="TC_CC1" access="Read/Write" description="COUNT16 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="2" name="TC_COUNT" access="Read/Write" description="COUNT16 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="16" name="COUNT" description="Count Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="TC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="TC Mode">
|
|
|
+ <Enum name="COUNT16" start="0x0" description="Counter in 16-bit mode" />
|
|
|
+ <Enum name="COUNT8" start="0x1" description="Counter in 8-bit mode" />
|
|
|
+ <Enum name="COUNT32" start="0x2" description="Counter in 32-bit mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="2" name="WAVEGEN" description="Waveform Generation Operation">
|
|
|
+ <Enum name="NFRQ" start="0x0" />
|
|
|
+ <Enum name="MFRQ" start="0x1" />
|
|
|
+ <Enum name="NPWM" start="0x2" />
|
|
|
+ <Enum name="MPWM" start="0x3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Prescaler: GCLK_TC" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Prescaler: GCLK_TC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Prescaler: GCLK_TC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Prescaler: GCLK_TC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Prescaler: GCLK_TC/16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Prescaler: GCLK_TC/64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Prescaler: GCLK_TC/256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Prescaler: GCLK_TC/1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset the counter on next generic clock" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset the counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset the counter on next generic clock. Reset the prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x02" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="TC_CTRLC" access="Read/Write" description="Control C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="INVEN0" description="Output Waveform 0 Invert Enable" />
|
|
|
+ <BitField start="1" size="1" name="INVEN1" description="Output Waveform 1 Invert Enable" />
|
|
|
+ <BitField start="4" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="TC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="2" name="TC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or retrigger TC on event" />
|
|
|
+ <Enum name="COUNT" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start TC on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period captured in CC0, pulse width in CC1" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period captured in CC1, pulse width in CC0" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TCINV" description="TC Inverted Event Input" />
|
|
|
+ <BitField start="5" size="1" name="TCEI" description="TC Event Input" />
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="TC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="TC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="TC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="TC_READREQ" access="Read/Write" description="Read Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0F" size="1" name="TC_STATUS" access="ReadOnly" description="Status" reset_value="0x08" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="3" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TC5 (COUNT32)" start="0x42003400" description="Basic Timer Counter 5">
|
|
|
+ <Register start="+0x18+0" size="4" name="TC_CC0" access="Read/Write" description="COUNT32 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18+4" size="4" name="TC_CC1" access="Read/Write" description="COUNT32 Compare/Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="CC" description="Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="TC_COUNT" access="Read/Write" description="COUNT32 Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="COUNT" description="Count Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="2" name="TC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="2" name="MODE" description="TC Mode">
|
|
|
+ <Enum name="COUNT16" start="0x0" description="Counter in 16-bit mode" />
|
|
|
+ <Enum name="COUNT8" start="0x1" description="Counter in 8-bit mode" />
|
|
|
+ <Enum name="COUNT32" start="0x2" description="Counter in 32-bit mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="2" name="WAVEGEN" description="Waveform Generation Operation">
|
|
|
+ <Enum name="NFRQ" start="0x0" />
|
|
|
+ <Enum name="MFRQ" start="0x1" />
|
|
|
+ <Enum name="NPWM" start="0x2" />
|
|
|
+ <Enum name="MPWM" start="0x3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="Prescaler: GCLK_TC" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Prescaler: GCLK_TC/2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Prescaler: GCLK_TC/4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Prescaler: GCLK_TC/8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Prescaler: GCLK_TC/16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Prescaler: GCLK_TC/64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Prescaler: GCLK_TC/256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Prescaler: GCLK_TC/1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset the counter on next generic clock" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset the counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset the counter on next generic clock. Reset the prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x02" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="6" size="2" name="CMD" description="Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Force a start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force a stop" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x06" size="1" name="TC_CTRLC" access="Read/Write" description="Control C" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="INVEN0" description="Output Waveform 0 Invert Enable" />
|
|
|
+ <BitField start="1" size="1" name="INVEN1" description="Output Waveform 1 Invert Enable" />
|
|
|
+ <BitField start="4" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="5" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="1" name="TC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Run Mode" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0A" size="2" name="TC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT" description="Event Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or retrigger TC on event" />
|
|
|
+ <Enum name="COUNT" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start TC on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period captured in CC0, pulse width in CC1" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period captured in CC1, pulse width in CC0" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="TCINV" description="TC Inverted Event Input" />
|
|
|
+ <BitField start="5" size="1" name="TCEI" description="TC Event Input" />
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Event Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="1" name="TC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0D" size="1" name="TC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0E" size="1" name="TC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="3" size="1" name="SYNCRDY" description="Synchronization Ready" />
|
|
|
+ <BitField start="4" size="1" name="MC0" description="Match or Capture Channel 0" />
|
|
|
+ <BitField start="5" size="1" name="MC1" description="Match or Capture Channel 1" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x02" size="2" name="TC_READREQ" access="Read/Write" description="Read Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="ADDR" description="Address" />
|
|
|
+ <BitField start="14" size="1" name="RCONT" description="Read Continuously" />
|
|
|
+ <BitField start="15" size="1" name="RREQ" description="Read Request" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0F" size="1" name="TC_STATUS" access="ReadOnly" description="Status" reset_value="0x08" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="3" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TCC0" start="0x42002000" description="Timer Counter Control 0">
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT_DITH4" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="4" size="20" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT_DITH5" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="5" size="19" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT_DITH6" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="6" size="18" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="TCC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="5" size="2" name="RESOLUTION" description="Enhanced Resolution">
|
|
|
+ <Enum name="NONE" start="0x0" description="Dithering is disabled" />
|
|
|
+ <Enum name="DITH4" start="0x1" description="Dithering is done every 16 PWM frames" />
|
|
|
+ <Enum name="DITH5" start="0x2" description="Dithering is done every 32 PWM frames" />
|
|
|
+ <Enum name="DITH6" start="0x3" description="Dithering is done every 64 PWM frames" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="No division" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Divide by 2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Divide by 4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Divide by 8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Divide by 16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Divide by 64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Divide by 256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Divide by 1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization Selection">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset counter on next GCLK" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset counter on next GCLK and reset prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="14" size="1" name="ALOCK" description="Auto Lock" />
|
|
|
+ <BitField start="24" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="25" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ <BitField start="26" size="1" name="CPTEN2" description="Capture Channel 2 Enable" />
|
|
|
+ <BitField start="27" size="1" name="CPTEN3" description="Capture Channel 3 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TCC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="1" size="1" name="LUPD" description="Lock Update" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="3" size="2" name="IDXCMD" description="Ramp Index Command">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Command disabled: Index toggles between cycles A and B" />
|
|
|
+ <Enum name="SET" start="0x1" description="Set index: cycle B will be forced in the next cycle" />
|
|
|
+ <Enum name="CLEAR" start="0x2" description="Clear index: cycle A will be forced in the next cycle" />
|
|
|
+ <Enum name="HOLD" start="0x3" description="Hold index: the next cycle will be the same as the current cycle" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="3" name="CMD" description="TCC Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Clear start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force stop" />
|
|
|
+ <Enum name="UPDATE" start="0x3" description="Force update of double buffered registers" />
|
|
|
+ <Enum name="READSYNC" start="0x4" description="Force COUNT read synchronization" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TCC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="1" size="1" name="LUPD" description="Lock Update" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="3" size="2" name="IDXCMD" description="Ramp Index Command">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Command disabled: Index toggles between cycles A and B" />
|
|
|
+ <Enum name="SET" start="0x1" description="Set index: cycle B will be forced in the next cycle" />
|
|
|
+ <Enum name="CLEAR" start="0x2" description="Clear index: cycle A will be forced in the next cycle" />
|
|
|
+ <Enum name="HOLD" start="0x3" description="Hold index: the next cycle will be the same as the current cycle" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="3" name="CMD" description="TCC Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Clear start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force stop" />
|
|
|
+ <Enum name="UPDATE" start="0x3" description="Force update of double buffered registers" />
|
|
|
+ <Enum name="READSYNC" start="0x4" description="Force COUNT read synchronization" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1E" size="1" name="TCC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Running Mode" />
|
|
|
+ <BitField start="2" size="1" name="FDDBD" description="Fault Detection on Debug Break Detection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="4" name="TCC_DRVCTRL" access="Read/Write" description="Driver Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="NRE0" description="Non-Recoverable State 0 Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="NRE1" description="Non-Recoverable State 1 Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="NRE2" description="Non-Recoverable State 2 Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="NRE3" description="Non-Recoverable State 3 Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="NRE4" description="Non-Recoverable State 4 Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="NRE5" description="Non-Recoverable State 5 Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="NRE6" description="Non-Recoverable State 6 Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="NRE7" description="Non-Recoverable State 7 Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="NRV0" description="Non-Recoverable State 0 Output Value" />
|
|
|
+ <BitField start="9" size="1" name="NRV1" description="Non-Recoverable State 1 Output Value" />
|
|
|
+ <BitField start="10" size="1" name="NRV2" description="Non-Recoverable State 2 Output Value" />
|
|
|
+ <BitField start="11" size="1" name="NRV3" description="Non-Recoverable State 3 Output Value" />
|
|
|
+ <BitField start="12" size="1" name="NRV4" description="Non-Recoverable State 4 Output Value" />
|
|
|
+ <BitField start="13" size="1" name="NRV5" description="Non-Recoverable State 5 Output Value" />
|
|
|
+ <BitField start="14" size="1" name="NRV6" description="Non-Recoverable State 6 Output Value" />
|
|
|
+ <BitField start="15" size="1" name="NRV7" description="Non-Recoverable State 7 Output Value" />
|
|
|
+ <BitField start="16" size="1" name="INVEN0" description="Output Waveform 0 Inversion" />
|
|
|
+ <BitField start="17" size="1" name="INVEN1" description="Output Waveform 1 Inversion" />
|
|
|
+ <BitField start="18" size="1" name="INVEN2" description="Output Waveform 2 Inversion" />
|
|
|
+ <BitField start="19" size="1" name="INVEN3" description="Output Waveform 3 Inversion" />
|
|
|
+ <BitField start="20" size="1" name="INVEN4" description="Output Waveform 4 Inversion" />
|
|
|
+ <BitField start="21" size="1" name="INVEN5" description="Output Waveform 5 Inversion" />
|
|
|
+ <BitField start="22" size="1" name="INVEN6" description="Output Waveform 6 Inversion" />
|
|
|
+ <BitField start="23" size="1" name="INVEN7" description="Output Waveform 7 Inversion" />
|
|
|
+ <BitField start="24" size="4" name="FILTERVAL0" description="Non-Recoverable Fault Input 0 Filter Value" />
|
|
|
+ <BitField start="28" size="4" name="FILTERVAL1" description="Non-Recoverable Fault Input 1 Filter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20" size="4" name="TCC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT0" description="Timer/counter Input Event0 Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or re-trigger counter on event" />
|
|
|
+ <Enum name="COUNTEV" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start counter on event" />
|
|
|
+ <Enum name="INC" start="0x4" description="Increment counter on event" />
|
|
|
+ <Enum name="COUNT" start="0x5" description="Count on active state of asynchronous event" />
|
|
|
+ <Enum name="FAULT" start="0x7" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="3" name="EVACT1" description="Timer/counter Input Event1 Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Re-trigger counter on event" />
|
|
|
+ <Enum name="DIR" start="0x2" description="Direction control" />
|
|
|
+ <Enum name="STOP" start="0x3" description="Stop counter on event" />
|
|
|
+ <Enum name="DEC" start="0x4" description="Decrement counter on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period capture value in CC0 register, pulse width capture value in CC1 register" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period capture value in CC1 register, pulse width capture value in CC0 register" />
|
|
|
+ <Enum name="FAULT" start="0x7" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="6" size="2" name="CNTSEL" description="Timer/counter Output Event Mode">
|
|
|
+ <Enum name="START" start="0x0" description="An interrupt/event is generated when a new counter cycle starts" />
|
|
|
+ <Enum name="END" start="0x1" description="An interrupt/event is generated when a counter cycle ends" />
|
|
|
+ <Enum name="BETWEEN" start="0x2" description="An interrupt/event is generated when a counter cycle ends, except for the first and last cycles" />
|
|
|
+ <Enum name="BOUNDARY" start="0x3" description="An interrupt/event is generated when a new counter cycle starts or a counter cycle ends" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Output Event Enable" />
|
|
|
+ <BitField start="9" size="1" name="TRGEO" description="Retrigger Output Event Enable" />
|
|
|
+ <BitField start="10" size="1" name="CNTEO" description="Timer/counter Output Event Enable" />
|
|
|
+ <BitField start="12" size="1" name="TCINV0" description="Inverted Event 0 Input Enable" />
|
|
|
+ <BitField start="13" size="1" name="TCINV1" description="Inverted Event 1 Input Enable" />
|
|
|
+ <BitField start="14" size="1" name="TCEI0" description="Timer/counter Event 0 Input Enable" />
|
|
|
+ <BitField start="15" size="1" name="TCEI1" description="Timer/counter Event 1 Input Enable" />
|
|
|
+ <BitField start="16" size="1" name="MCEI0" description="Match or Capture Channel 0 Event Input Enable" />
|
|
|
+ <BitField start="17" size="1" name="MCEI1" description="Match or Capture Channel 1 Event Input Enable" />
|
|
|
+ <BitField start="18" size="1" name="MCEI2" description="Match or Capture Channel 2 Event Input Enable" />
|
|
|
+ <BitField start="19" size="1" name="MCEI3" description="Match or Capture Channel 3 Event Input Enable" />
|
|
|
+ <BitField start="24" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="25" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ <BitField start="26" size="1" name="MCEO2" description="Match or Capture Channel 2 Event Output Enable" />
|
|
|
+ <BitField start="27" size="1" name="MCEO3" description="Match or Capture Channel 3 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="TCC_FCTRLA" access="Read/Write" description="Recoverable Fault A Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SRC" description="Fault A Source">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Fault input disabled" />
|
|
|
+ <Enum name="ENABLE" start="0x1" description="MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="INVERT" start="0x2" description="Inverted MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="ALTFAULT" start="0x3" description="Alternate fault (A or B) state at the end of the previous period" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="KEEP" description="Fault A Keeper" />
|
|
|
+ <BitField start="4" size="1" name="QUAL" description="Fault A Qualification" />
|
|
|
+ <BitField start="5" size="2" name="BLANK" description="Fault A Blanking Mode">
|
|
|
+ <Enum name="NONE" start="0x0" description="No blanking applied" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Blanking applied from rising edge of the output waveform" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Blanking applied from falling edge of the output waveform" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Blanking applied from each toggle of the output waveform" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RESTART" description="Fault A Restart" />
|
|
|
+ <BitField start="8" size="2" name="HALT" description="Fault A Halt Mode">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Halt action disabled" />
|
|
|
+ <Enum name="HW" start="0x1" description="Hardware halt action" />
|
|
|
+ <Enum name="SW" start="0x2" description="Software halt action" />
|
|
|
+ <Enum name="NR" start="0x3" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="10" size="2" name="CHSEL" description="Fault A Capture Channel">
|
|
|
+ <Enum name="CC0" start="0x0" description="Capture value stored in channel 0" />
|
|
|
+ <Enum name="CC1" start="0x1" description="Capture value stored in channel 1" />
|
|
|
+ <Enum name="CC2" start="0x2" description="Capture value stored in channel 2" />
|
|
|
+ <Enum name="CC3" start="0x3" description="Capture value stored in channel 3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="12" size="3" name="CAPTURE" description="Fault A Capture Action">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="No capture" />
|
|
|
+ <Enum name="CAPT" start="0x1" description="Capture on fault" />
|
|
|
+ <Enum name="CAPTMIN" start="0x2" description="Minimum capture" />
|
|
|
+ <Enum name="CAPTMAX" start="0x3" description="Maximum capture" />
|
|
|
+ <Enum name="LOCMIN" start="0x4" description="Minimum local detection" />
|
|
|
+ <Enum name="LOCMAX" start="0x5" description="Maximum local detection" />
|
|
|
+ <Enum name="DERIV0" start="0x6" description="Minimum and maximum local detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="8" name="BLANKVAL" description="Fault A Blanking Time" />
|
|
|
+ <BitField start="24" size="4" name="FILTERVAL" description="Fault A Filter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="TCC_FCTRLB" access="Read/Write" description="Recoverable Fault B Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SRC" description="Fault B Source">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Fault input disabled" />
|
|
|
+ <Enum name="ENABLE" start="0x1" description="MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="INVERT" start="0x2" description="Inverted MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="ALTFAULT" start="0x3" description="Alternate fault (A or B) state at the end of the previous period" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="KEEP" description="Fault B Keeper" />
|
|
|
+ <BitField start="4" size="1" name="QUAL" description="Fault B Qualification" />
|
|
|
+ <BitField start="5" size="2" name="BLANK" description="Fault B Blanking Mode">
|
|
|
+ <Enum name="NONE" start="0x0" description="No blanking applied" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Blanking applied from rising edge of the output waveform" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Blanking applied from falling edge of the output waveform" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Blanking applied from each toggle of the output waveform" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RESTART" description="Fault B Restart" />
|
|
|
+ <BitField start="8" size="2" name="HALT" description="Fault B Halt Mode">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Halt action disabled" />
|
|
|
+ <Enum name="HW" start="0x1" description="Hardware halt action" />
|
|
|
+ <Enum name="SW" start="0x2" description="Software halt action" />
|
|
|
+ <Enum name="NR" start="0x3" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="10" size="2" name="CHSEL" description="Fault B Capture Channel">
|
|
|
+ <Enum name="CC0" start="0x0" description="Capture value stored in channel 0" />
|
|
|
+ <Enum name="CC1" start="0x1" description="Capture value stored in channel 1" />
|
|
|
+ <Enum name="CC2" start="0x2" description="Capture value stored in channel 2" />
|
|
|
+ <Enum name="CC3" start="0x3" description="Capture value stored in channel 3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="12" size="3" name="CAPTURE" description="Fault B Capture Action">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="No capture" />
|
|
|
+ <Enum name="CAPT" start="0x1" description="Capture on fault" />
|
|
|
+ <Enum name="CAPTMIN" start="0x2" description="Minimum capture" />
|
|
|
+ <Enum name="CAPTMAX" start="0x3" description="Maximum capture" />
|
|
|
+ <Enum name="LOCMIN" start="0x4" description="Minimum local detection" />
|
|
|
+ <Enum name="LOCMAX" start="0x5" description="Maximum local detection" />
|
|
|
+ <Enum name="DERIV0" start="0x6" description="Minimum and maximum local detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="8" name="BLANKVAL" description="Fault B Blanking Time" />
|
|
|
+ <BitField start="24" size="4" name="FILTERVAL" description="Fault B Filter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x24" size="4" name="TCC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRG" description="Retrigger Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="CNT" description="Counter Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="DFS" description="Non-Recoverable Debug Fault Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B Interrupt Enable" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0 Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1 Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ <BitField start="18" size="1" name="MC2" description="Match or Capture Channel 2 Interrupt Enable" />
|
|
|
+ <BitField start="19" size="1" name="MC3" description="Match or Capture Channel 3 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="TCC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRG" description="Retrigger Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="CNT" description="Counter Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="DFS" description="Non-Recoverable Debug Fault Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B Interrupt Enable" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0 Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1 Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ <BitField start="18" size="1" name="MC2" description="Match or Capture Channel 2 Interrupt Enable" />
|
|
|
+ <BitField start="19" size="1" name="MC3" description="Match or Capture Channel 3 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x2C" size="4" name="TCC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="TRG" description="Retrigger" />
|
|
|
+ <BitField start="2" size="1" name="CNT" description="Counter" />
|
|
|
+ <BitField start="3" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="11" size="1" name="DFS" description="Non-Recoverable Debug Fault" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1" />
|
|
|
+ <BitField start="16" size="1" name="MC0" description="Match or Capture 0" />
|
|
|
+ <BitField start="17" size="1" name="MC1" description="Match or Capture 1" />
|
|
|
+ <BitField start="18" size="1" name="MC2" description="Match or Capture 2" />
|
|
|
+ <BitField start="19" size="1" name="MC3" description="Match or Capture 3" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x38" size="2" name="TCC_PATT" access="Read/Write" description="Pattern" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PGE0" description="Pattern Generator 0 Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="PGE1" description="Pattern Generator 1 Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="PGE2" description="Pattern Generator 2 Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="PGE3" description="Pattern Generator 3 Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="PGE4" description="Pattern Generator 4 Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="PGE5" description="Pattern Generator 5 Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="PGE6" description="Pattern Generator 6 Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="PGE7" description="Pattern Generator 7 Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="PGV0" description="Pattern Generator 0 Output Value" />
|
|
|
+ <BitField start="9" size="1" name="PGV1" description="Pattern Generator 1 Output Value" />
|
|
|
+ <BitField start="10" size="1" name="PGV2" description="Pattern Generator 2 Output Value" />
|
|
|
+ <BitField start="11" size="1" name="PGV3" description="Pattern Generator 3 Output Value" />
|
|
|
+ <BitField start="12" size="1" name="PGV4" description="Pattern Generator 4 Output Value" />
|
|
|
+ <BitField start="13" size="1" name="PGV5" description="Pattern Generator 5 Output Value" />
|
|
|
+ <BitField start="14" size="1" name="PGV6" description="Pattern Generator 6 Output Value" />
|
|
|
+ <BitField start="15" size="1" name="PGV7" description="Pattern Generator 7 Output Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x64" size="2" name="TCC_PATTB" access="Read/Write" description="Pattern Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PGEB0" description="Pattern Generator 0 Output Enable Buffer" />
|
|
|
+ <BitField start="1" size="1" name="PGEB1" description="Pattern Generator 1 Output Enable Buffer" />
|
|
|
+ <BitField start="2" size="1" name="PGEB2" description="Pattern Generator 2 Output Enable Buffer" />
|
|
|
+ <BitField start="3" size="1" name="PGEB3" description="Pattern Generator 3 Output Enable Buffer" />
|
|
|
+ <BitField start="4" size="1" name="PGEB4" description="Pattern Generator 4 Output Enable Buffer" />
|
|
|
+ <BitField start="5" size="1" name="PGEB5" description="Pattern Generator 5 Output Enable Buffer" />
|
|
|
+ <BitField start="6" size="1" name="PGEB6" description="Pattern Generator 6 Output Enable Buffer" />
|
|
|
+ <BitField start="7" size="1" name="PGEB7" description="Pattern Generator 7 Output Enable Buffer" />
|
|
|
+ <BitField start="8" size="1" name="PGVB0" description="Pattern Generator 0 Output Enable" />
|
|
|
+ <BitField start="9" size="1" name="PGVB1" description="Pattern Generator 1 Output Enable" />
|
|
|
+ <BitField start="10" size="1" name="PGVB2" description="Pattern Generator 2 Output Enable" />
|
|
|
+ <BitField start="11" size="1" name="PGVB3" description="Pattern Generator 3 Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="PGVB4" description="Pattern Generator 4 Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="PGVB5" description="Pattern Generator 5 Output Enable" />
|
|
|
+ <BitField start="14" size="1" name="PGVB6" description="Pattern Generator 6 Output Enable" />
|
|
|
+ <BitField start="15" size="1" name="PGVB7" description="Pattern Generator 7 Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER_DITH4" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER_DITH5" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER_DITH6" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB_DITH4" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB_DITH5" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB_DITH6" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="4" name="TCC_STATUS" access="Read/Write" description="Status" reset_value="0x00000001" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="1" size="1" name="IDX" description="Ramp" />
|
|
|
+ <BitField start="3" size="1" name="DFS" description="Non-Recoverable Debug Fault State" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="5" size="1" name="PATTBV" description="Pattern Buffer Valid" />
|
|
|
+ <BitField start="6" size="1" name="WAVEBV" description="Wave Buffer Valid" />
|
|
|
+ <BitField start="7" size="1" name="PERBV" description="Period Buffer Valid" />
|
|
|
+ <BitField start="8" size="1" name="FAULTAIN" description="Recoverable Fault A Input" />
|
|
|
+ <BitField start="9" size="1" name="FAULTBIN" description="Recoverable Fault B Input" />
|
|
|
+ <BitField start="10" size="1" name="FAULT0IN" description="Non-Recoverable Fault0 Input" />
|
|
|
+ <BitField start="11" size="1" name="FAULT1IN" description="Non-Recoverable Fault1 Input" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A State" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B State" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0 State" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1 State" />
|
|
|
+ <BitField start="16" size="1" name="CCBV0" description="Compare Channel 0 Buffer Valid" />
|
|
|
+ <BitField start="17" size="1" name="CCBV1" description="Compare Channel 1 Buffer Valid" />
|
|
|
+ <BitField start="18" size="1" name="CCBV2" description="Compare Channel 2 Buffer Valid" />
|
|
|
+ <BitField start="19" size="1" name="CCBV3" description="Compare Channel 3 Buffer Valid" />
|
|
|
+ <BitField start="24" size="1" name="CMP0" description="Compare Channel 0 Value" />
|
|
|
+ <BitField start="25" size="1" name="CMP1" description="Compare Channel 1 Value" />
|
|
|
+ <BitField start="26" size="1" name="CMP2" description="Compare Channel 2 Value" />
|
|
|
+ <BitField start="27" size="1" name="CMP3" description="Compare Channel 3 Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="4" name="TCC_SYNCBUSY" access="ReadOnly" description="Synchronization Busy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Swrst Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="Ctrlb Busy" />
|
|
|
+ <BitField start="3" size="1" name="STATUS" description="Status Busy" />
|
|
|
+ <BitField start="4" size="1" name="COUNT" description="Count Busy" />
|
|
|
+ <BitField start="5" size="1" name="PATT" description="Pattern Busy" />
|
|
|
+ <BitField start="6" size="1" name="WAVE" description="Wave Busy" />
|
|
|
+ <BitField start="7" size="1" name="PER" description="Period busy" />
|
|
|
+ <BitField start="8" size="1" name="CC0" description="Compare Channel 0 Busy" />
|
|
|
+ <BitField start="9" size="1" name="CC1" description="Compare Channel 1 Busy" />
|
|
|
+ <BitField start="10" size="1" name="CC2" description="Compare Channel 2 Busy" />
|
|
|
+ <BitField start="11" size="1" name="CC3" description="Compare Channel 3 Busy" />
|
|
|
+ <BitField start="16" size="1" name="PATTB" description="Pattern Buffer Busy" />
|
|
|
+ <BitField start="17" size="1" name="WAVEB" description="Wave Buffer Busy" />
|
|
|
+ <BitField start="18" size="1" name="PERB" description="Period Buffer Busy" />
|
|
|
+ <BitField start="19" size="1" name="CCB0" description="Compare Channel Buffer 0 Busy" />
|
|
|
+ <BitField start="20" size="1" name="CCB1" description="Compare Channel Buffer 1 Busy" />
|
|
|
+ <BitField start="21" size="1" name="CCB2" description="Compare Channel Buffer 2 Busy" />
|
|
|
+ <BitField start="22" size="1" name="CCB3" description="Compare Channel Buffer 3 Busy" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x3C" size="4" name="TCC_WAVE" access="Read/Write" description="Waveform Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="WAVEGEN" description="Waveform Generation">
|
|
|
+ <Enum name="NFRQ" start="0x0" description="Normal frequency" />
|
|
|
+ <Enum name="MFRQ" start="0x1" description="Match frequency" />
|
|
|
+ <Enum name="NPWM" start="0x2" description="Normal PWM" />
|
|
|
+ <Enum name="DSCRITICAL" start="0x4" description="Dual-slope critical" />
|
|
|
+ <Enum name="DSBOTTOM" start="0x5" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO" />
|
|
|
+ <Enum name="DSBOTH" start="0x6" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP" />
|
|
|
+ <Enum name="DSTOP" start="0x7" description="Dual-slope with interrupt/event condition when COUNT reaches TOP" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="2" name="RAMP" description="Ramp Mode">
|
|
|
+ <Enum name="RAMP1" start="0x0" description="RAMP1 operation" />
|
|
|
+ <Enum name="RAMP2A" start="0x1" description="Alternative RAMP2 operation" />
|
|
|
+ <Enum name="RAMP2" start="0x2" description="RAMP2 operation" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="CIPEREN" description="Circular period Enable" />
|
|
|
+ <BitField start="8" size="1" name="CICCEN0" description="Circular Channel 0 Enable" />
|
|
|
+ <BitField start="9" size="1" name="CICCEN1" description="Circular Channel 1 Enable" />
|
|
|
+ <BitField start="10" size="1" name="CICCEN2" description="Circular Channel 2 Enable" />
|
|
|
+ <BitField start="11" size="1" name="CICCEN3" description="Circular Channel 3 Enable" />
|
|
|
+ <BitField start="16" size="1" name="POL0" description="Channel 0 Polarity" />
|
|
|
+ <BitField start="17" size="1" name="POL1" description="Channel 1 Polarity" />
|
|
|
+ <BitField start="18" size="1" name="POL2" description="Channel 2 Polarity" />
|
|
|
+ <BitField start="19" size="1" name="POL3" description="Channel 3 Polarity" />
|
|
|
+ <BitField start="24" size="1" name="SWAP0" description="Swap DTI Output Pair 0" />
|
|
|
+ <BitField start="25" size="1" name="SWAP1" description="Swap DTI Output Pair 1" />
|
|
|
+ <BitField start="26" size="1" name="SWAP2" description="Swap DTI Output Pair 2" />
|
|
|
+ <BitField start="27" size="1" name="SWAP3" description="Swap DTI Output Pair 3" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x68" size="4" name="TCC_WAVEB" access="Read/Write" description="Waveform Control Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="WAVEGENB" description="Waveform Generation Buffer">
|
|
|
+ <Enum name="NFRQ" start="0x0" description="Normal frequency" />
|
|
|
+ <Enum name="MFRQ" start="0x1" description="Match frequency" />
|
|
|
+ <Enum name="NPWM" start="0x2" description="Normal PWM" />
|
|
|
+ <Enum name="DSCRITICAL" start="0x4" description="Dual-slope critical" />
|
|
|
+ <Enum name="DSBOTTOM" start="0x5" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO" />
|
|
|
+ <Enum name="DSBOTH" start="0x6" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP" />
|
|
|
+ <Enum name="DSTOP" start="0x7" description="Dual-slope with interrupt/event condition when COUNT reaches TOP" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="2" name="RAMPB" description="Ramp Mode Buffer">
|
|
|
+ <Enum name="RAMP1" start="0x0" description="RAMP1 operation" />
|
|
|
+ <Enum name="RAMP2A" start="0x1" description="Alternative RAMP2 operation" />
|
|
|
+ <Enum name="RAMP2" start="0x2" description="RAMP2 operation" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="CIPERENB" description="Circular Period Enable Buffer" />
|
|
|
+ <BitField start="8" size="1" name="CICCENB0" description="Circular Channel 0 Enable Buffer" />
|
|
|
+ <BitField start="9" size="1" name="CICCENB1" description="Circular Channel 1 Enable Buffer" />
|
|
|
+ <BitField start="10" size="1" name="CICCENB2" description="Circular Channel 2 Enable Buffer" />
|
|
|
+ <BitField start="11" size="1" name="CICCENB3" description="Circular Channel 3 Enable Buffer" />
|
|
|
+ <BitField start="16" size="1" name="POLB0" description="Channel 0 Polarity Buffer" />
|
|
|
+ <BitField start="17" size="1" name="POLB1" description="Channel 1 Polarity Buffer" />
|
|
|
+ <BitField start="18" size="1" name="POLB2" description="Channel 2 Polarity Buffer" />
|
|
|
+ <BitField start="19" size="1" name="POLB3" description="Channel 3 Polarity Buffer" />
|
|
|
+ <BitField start="24" size="1" name="SWAPB0" description="Swap DTI Output Pair 0 Buffer" />
|
|
|
+ <BitField start="25" size="1" name="SWAPB1" description="Swap DTI Output Pair 1 Buffer" />
|
|
|
+ <BitField start="26" size="1" name="SWAPB2" description="Swap DTI Output Pair 2 Buffer" />
|
|
|
+ <BitField start="27" size="1" name="SWAPB3" description="Swap DTI Output Pair 3 Buffer" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="4" name="TCC_WEXCTRL" access="Read/Write" description="Waveform Extension Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="OTMX" description="Output Matrix" />
|
|
|
+ <BitField start="8" size="1" name="DTIEN0" description="Dead-time Insertion Generator 0 Enable" />
|
|
|
+ <BitField start="9" size="1" name="DTIEN1" description="Dead-time Insertion Generator 1 Enable" />
|
|
|
+ <BitField start="10" size="1" name="DTIEN2" description="Dead-time Insertion Generator 2 Enable" />
|
|
|
+ <BitField start="11" size="1" name="DTIEN3" description="Dead-time Insertion Generator 3 Enable" />
|
|
|
+ <BitField start="16" size="8" name="DTLS" description="Dead-time Low Side Outputs Value" />
|
|
|
+ <BitField start="24" size="8" name="DTHS" description="Dead-time High Side Outputs Value" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TCC1" start="0x42002400" description="Timer Counter Control 1">
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT_DITH4" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="4" size="20" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT_DITH5" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="5" size="19" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT_DITH6" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="6" size="18" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="TCC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="5" size="2" name="RESOLUTION" description="Enhanced Resolution">
|
|
|
+ <Enum name="NONE" start="0x0" description="Dithering is disabled" />
|
|
|
+ <Enum name="DITH4" start="0x1" description="Dithering is done every 16 PWM frames" />
|
|
|
+ <Enum name="DITH5" start="0x2" description="Dithering is done every 32 PWM frames" />
|
|
|
+ <Enum name="DITH6" start="0x3" description="Dithering is done every 64 PWM frames" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="No division" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Divide by 2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Divide by 4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Divide by 8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Divide by 16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Divide by 64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Divide by 256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Divide by 1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization Selection">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset counter on next GCLK" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset counter on next GCLK and reset prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="14" size="1" name="ALOCK" description="Auto Lock" />
|
|
|
+ <BitField start="24" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="25" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ <BitField start="26" size="1" name="CPTEN2" description="Capture Channel 2 Enable" />
|
|
|
+ <BitField start="27" size="1" name="CPTEN3" description="Capture Channel 3 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TCC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="1" size="1" name="LUPD" description="Lock Update" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="3" size="2" name="IDXCMD" description="Ramp Index Command">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Command disabled: Index toggles between cycles A and B" />
|
|
|
+ <Enum name="SET" start="0x1" description="Set index: cycle B will be forced in the next cycle" />
|
|
|
+ <Enum name="CLEAR" start="0x2" description="Clear index: cycle A will be forced in the next cycle" />
|
|
|
+ <Enum name="HOLD" start="0x3" description="Hold index: the next cycle will be the same as the current cycle" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="3" name="CMD" description="TCC Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Clear start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force stop" />
|
|
|
+ <Enum name="UPDATE" start="0x3" description="Force update of double buffered registers" />
|
|
|
+ <Enum name="READSYNC" start="0x4" description="Force COUNT read synchronization" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TCC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="1" size="1" name="LUPD" description="Lock Update" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="3" size="2" name="IDXCMD" description="Ramp Index Command">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Command disabled: Index toggles between cycles A and B" />
|
|
|
+ <Enum name="SET" start="0x1" description="Set index: cycle B will be forced in the next cycle" />
|
|
|
+ <Enum name="CLEAR" start="0x2" description="Clear index: cycle A will be forced in the next cycle" />
|
|
|
+ <Enum name="HOLD" start="0x3" description="Hold index: the next cycle will be the same as the current cycle" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="3" name="CMD" description="TCC Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Clear start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force stop" />
|
|
|
+ <Enum name="UPDATE" start="0x3" description="Force update of double buffered registers" />
|
|
|
+ <Enum name="READSYNC" start="0x4" description="Force COUNT read synchronization" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1E" size="1" name="TCC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Running Mode" />
|
|
|
+ <BitField start="2" size="1" name="FDDBD" description="Fault Detection on Debug Break Detection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="4" name="TCC_DRVCTRL" access="Read/Write" description="Driver Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="NRE0" description="Non-Recoverable State 0 Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="NRE1" description="Non-Recoverable State 1 Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="NRE2" description="Non-Recoverable State 2 Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="NRE3" description="Non-Recoverable State 3 Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="NRE4" description="Non-Recoverable State 4 Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="NRE5" description="Non-Recoverable State 5 Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="NRE6" description="Non-Recoverable State 6 Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="NRE7" description="Non-Recoverable State 7 Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="NRV0" description="Non-Recoverable State 0 Output Value" />
|
|
|
+ <BitField start="9" size="1" name="NRV1" description="Non-Recoverable State 1 Output Value" />
|
|
|
+ <BitField start="10" size="1" name="NRV2" description="Non-Recoverable State 2 Output Value" />
|
|
|
+ <BitField start="11" size="1" name="NRV3" description="Non-Recoverable State 3 Output Value" />
|
|
|
+ <BitField start="12" size="1" name="NRV4" description="Non-Recoverable State 4 Output Value" />
|
|
|
+ <BitField start="13" size="1" name="NRV5" description="Non-Recoverable State 5 Output Value" />
|
|
|
+ <BitField start="14" size="1" name="NRV6" description="Non-Recoverable State 6 Output Value" />
|
|
|
+ <BitField start="15" size="1" name="NRV7" description="Non-Recoverable State 7 Output Value" />
|
|
|
+ <BitField start="16" size="1" name="INVEN0" description="Output Waveform 0 Inversion" />
|
|
|
+ <BitField start="17" size="1" name="INVEN1" description="Output Waveform 1 Inversion" />
|
|
|
+ <BitField start="18" size="1" name="INVEN2" description="Output Waveform 2 Inversion" />
|
|
|
+ <BitField start="19" size="1" name="INVEN3" description="Output Waveform 3 Inversion" />
|
|
|
+ <BitField start="20" size="1" name="INVEN4" description="Output Waveform 4 Inversion" />
|
|
|
+ <BitField start="21" size="1" name="INVEN5" description="Output Waveform 5 Inversion" />
|
|
|
+ <BitField start="22" size="1" name="INVEN6" description="Output Waveform 6 Inversion" />
|
|
|
+ <BitField start="23" size="1" name="INVEN7" description="Output Waveform 7 Inversion" />
|
|
|
+ <BitField start="24" size="4" name="FILTERVAL0" description="Non-Recoverable Fault Input 0 Filter Value" />
|
|
|
+ <BitField start="28" size="4" name="FILTERVAL1" description="Non-Recoverable Fault Input 1 Filter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20" size="4" name="TCC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT0" description="Timer/counter Input Event0 Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or re-trigger counter on event" />
|
|
|
+ <Enum name="COUNTEV" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start counter on event" />
|
|
|
+ <Enum name="INC" start="0x4" description="Increment counter on event" />
|
|
|
+ <Enum name="COUNT" start="0x5" description="Count on active state of asynchronous event" />
|
|
|
+ <Enum name="FAULT" start="0x7" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="3" name="EVACT1" description="Timer/counter Input Event1 Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Re-trigger counter on event" />
|
|
|
+ <Enum name="DIR" start="0x2" description="Direction control" />
|
|
|
+ <Enum name="STOP" start="0x3" description="Stop counter on event" />
|
|
|
+ <Enum name="DEC" start="0x4" description="Decrement counter on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period capture value in CC0 register, pulse width capture value in CC1 register" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period capture value in CC1 register, pulse width capture value in CC0 register" />
|
|
|
+ <Enum name="FAULT" start="0x7" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="6" size="2" name="CNTSEL" description="Timer/counter Output Event Mode">
|
|
|
+ <Enum name="START" start="0x0" description="An interrupt/event is generated when a new counter cycle starts" />
|
|
|
+ <Enum name="END" start="0x1" description="An interrupt/event is generated when a counter cycle ends" />
|
|
|
+ <Enum name="BETWEEN" start="0x2" description="An interrupt/event is generated when a counter cycle ends, except for the first and last cycles" />
|
|
|
+ <Enum name="BOUNDARY" start="0x3" description="An interrupt/event is generated when a new counter cycle starts or a counter cycle ends" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Output Event Enable" />
|
|
|
+ <BitField start="9" size="1" name="TRGEO" description="Retrigger Output Event Enable" />
|
|
|
+ <BitField start="10" size="1" name="CNTEO" description="Timer/counter Output Event Enable" />
|
|
|
+ <BitField start="12" size="1" name="TCINV0" description="Inverted Event 0 Input Enable" />
|
|
|
+ <BitField start="13" size="1" name="TCINV1" description="Inverted Event 1 Input Enable" />
|
|
|
+ <BitField start="14" size="1" name="TCEI0" description="Timer/counter Event 0 Input Enable" />
|
|
|
+ <BitField start="15" size="1" name="TCEI1" description="Timer/counter Event 1 Input Enable" />
|
|
|
+ <BitField start="16" size="1" name="MCEI0" description="Match or Capture Channel 0 Event Input Enable" />
|
|
|
+ <BitField start="17" size="1" name="MCEI1" description="Match or Capture Channel 1 Event Input Enable" />
|
|
|
+ <BitField start="18" size="1" name="MCEI2" description="Match or Capture Channel 2 Event Input Enable" />
|
|
|
+ <BitField start="19" size="1" name="MCEI3" description="Match or Capture Channel 3 Event Input Enable" />
|
|
|
+ <BitField start="24" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="25" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ <BitField start="26" size="1" name="MCEO2" description="Match or Capture Channel 2 Event Output Enable" />
|
|
|
+ <BitField start="27" size="1" name="MCEO3" description="Match or Capture Channel 3 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="TCC_FCTRLA" access="Read/Write" description="Recoverable Fault A Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SRC" description="Fault A Source">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Fault input disabled" />
|
|
|
+ <Enum name="ENABLE" start="0x1" description="MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="INVERT" start="0x2" description="Inverted MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="ALTFAULT" start="0x3" description="Alternate fault (A or B) state at the end of the previous period" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="KEEP" description="Fault A Keeper" />
|
|
|
+ <BitField start="4" size="1" name="QUAL" description="Fault A Qualification" />
|
|
|
+ <BitField start="5" size="2" name="BLANK" description="Fault A Blanking Mode">
|
|
|
+ <Enum name="NONE" start="0x0" description="No blanking applied" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Blanking applied from rising edge of the output waveform" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Blanking applied from falling edge of the output waveform" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Blanking applied from each toggle of the output waveform" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RESTART" description="Fault A Restart" />
|
|
|
+ <BitField start="8" size="2" name="HALT" description="Fault A Halt Mode">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Halt action disabled" />
|
|
|
+ <Enum name="HW" start="0x1" description="Hardware halt action" />
|
|
|
+ <Enum name="SW" start="0x2" description="Software halt action" />
|
|
|
+ <Enum name="NR" start="0x3" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="10" size="2" name="CHSEL" description="Fault A Capture Channel">
|
|
|
+ <Enum name="CC0" start="0x0" description="Capture value stored in channel 0" />
|
|
|
+ <Enum name="CC1" start="0x1" description="Capture value stored in channel 1" />
|
|
|
+ <Enum name="CC2" start="0x2" description="Capture value stored in channel 2" />
|
|
|
+ <Enum name="CC3" start="0x3" description="Capture value stored in channel 3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="12" size="3" name="CAPTURE" description="Fault A Capture Action">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="No capture" />
|
|
|
+ <Enum name="CAPT" start="0x1" description="Capture on fault" />
|
|
|
+ <Enum name="CAPTMIN" start="0x2" description="Minimum capture" />
|
|
|
+ <Enum name="CAPTMAX" start="0x3" description="Maximum capture" />
|
|
|
+ <Enum name="LOCMIN" start="0x4" description="Minimum local detection" />
|
|
|
+ <Enum name="LOCMAX" start="0x5" description="Maximum local detection" />
|
|
|
+ <Enum name="DERIV0" start="0x6" description="Minimum and maximum local detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="8" name="BLANKVAL" description="Fault A Blanking Time" />
|
|
|
+ <BitField start="24" size="4" name="FILTERVAL" description="Fault A Filter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="TCC_FCTRLB" access="Read/Write" description="Recoverable Fault B Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SRC" description="Fault B Source">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Fault input disabled" />
|
|
|
+ <Enum name="ENABLE" start="0x1" description="MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="INVERT" start="0x2" description="Inverted MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="ALTFAULT" start="0x3" description="Alternate fault (A or B) state at the end of the previous period" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="KEEP" description="Fault B Keeper" />
|
|
|
+ <BitField start="4" size="1" name="QUAL" description="Fault B Qualification" />
|
|
|
+ <BitField start="5" size="2" name="BLANK" description="Fault B Blanking Mode">
|
|
|
+ <Enum name="NONE" start="0x0" description="No blanking applied" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Blanking applied from rising edge of the output waveform" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Blanking applied from falling edge of the output waveform" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Blanking applied from each toggle of the output waveform" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RESTART" description="Fault B Restart" />
|
|
|
+ <BitField start="8" size="2" name="HALT" description="Fault B Halt Mode">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Halt action disabled" />
|
|
|
+ <Enum name="HW" start="0x1" description="Hardware halt action" />
|
|
|
+ <Enum name="SW" start="0x2" description="Software halt action" />
|
|
|
+ <Enum name="NR" start="0x3" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="10" size="2" name="CHSEL" description="Fault B Capture Channel">
|
|
|
+ <Enum name="CC0" start="0x0" description="Capture value stored in channel 0" />
|
|
|
+ <Enum name="CC1" start="0x1" description="Capture value stored in channel 1" />
|
|
|
+ <Enum name="CC2" start="0x2" description="Capture value stored in channel 2" />
|
|
|
+ <Enum name="CC3" start="0x3" description="Capture value stored in channel 3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="12" size="3" name="CAPTURE" description="Fault B Capture Action">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="No capture" />
|
|
|
+ <Enum name="CAPT" start="0x1" description="Capture on fault" />
|
|
|
+ <Enum name="CAPTMIN" start="0x2" description="Minimum capture" />
|
|
|
+ <Enum name="CAPTMAX" start="0x3" description="Maximum capture" />
|
|
|
+ <Enum name="LOCMIN" start="0x4" description="Minimum local detection" />
|
|
|
+ <Enum name="LOCMAX" start="0x5" description="Maximum local detection" />
|
|
|
+ <Enum name="DERIV0" start="0x6" description="Minimum and maximum local detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="8" name="BLANKVAL" description="Fault B Blanking Time" />
|
|
|
+ <BitField start="24" size="4" name="FILTERVAL" description="Fault B Filter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x24" size="4" name="TCC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRG" description="Retrigger Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="CNT" description="Counter Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="DFS" description="Non-Recoverable Debug Fault Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B Interrupt Enable" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0 Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1 Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ <BitField start="18" size="1" name="MC2" description="Match or Capture Channel 2 Interrupt Enable" />
|
|
|
+ <BitField start="19" size="1" name="MC3" description="Match or Capture Channel 3 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="TCC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRG" description="Retrigger Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="CNT" description="Counter Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="DFS" description="Non-Recoverable Debug Fault Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B Interrupt Enable" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0 Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1 Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ <BitField start="18" size="1" name="MC2" description="Match or Capture Channel 2 Interrupt Enable" />
|
|
|
+ <BitField start="19" size="1" name="MC3" description="Match or Capture Channel 3 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x2C" size="4" name="TCC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="TRG" description="Retrigger" />
|
|
|
+ <BitField start="2" size="1" name="CNT" description="Counter" />
|
|
|
+ <BitField start="3" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="11" size="1" name="DFS" description="Non-Recoverable Debug Fault" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1" />
|
|
|
+ <BitField start="16" size="1" name="MC0" description="Match or Capture 0" />
|
|
|
+ <BitField start="17" size="1" name="MC1" description="Match or Capture 1" />
|
|
|
+ <BitField start="18" size="1" name="MC2" description="Match or Capture 2" />
|
|
|
+ <BitField start="19" size="1" name="MC3" description="Match or Capture 3" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x38" size="2" name="TCC_PATT" access="Read/Write" description="Pattern" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PGE0" description="Pattern Generator 0 Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="PGE1" description="Pattern Generator 1 Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="PGE2" description="Pattern Generator 2 Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="PGE3" description="Pattern Generator 3 Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="PGE4" description="Pattern Generator 4 Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="PGE5" description="Pattern Generator 5 Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="PGE6" description="Pattern Generator 6 Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="PGE7" description="Pattern Generator 7 Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="PGV0" description="Pattern Generator 0 Output Value" />
|
|
|
+ <BitField start="9" size="1" name="PGV1" description="Pattern Generator 1 Output Value" />
|
|
|
+ <BitField start="10" size="1" name="PGV2" description="Pattern Generator 2 Output Value" />
|
|
|
+ <BitField start="11" size="1" name="PGV3" description="Pattern Generator 3 Output Value" />
|
|
|
+ <BitField start="12" size="1" name="PGV4" description="Pattern Generator 4 Output Value" />
|
|
|
+ <BitField start="13" size="1" name="PGV5" description="Pattern Generator 5 Output Value" />
|
|
|
+ <BitField start="14" size="1" name="PGV6" description="Pattern Generator 6 Output Value" />
|
|
|
+ <BitField start="15" size="1" name="PGV7" description="Pattern Generator 7 Output Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x64" size="2" name="TCC_PATTB" access="Read/Write" description="Pattern Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PGEB0" description="Pattern Generator 0 Output Enable Buffer" />
|
|
|
+ <BitField start="1" size="1" name="PGEB1" description="Pattern Generator 1 Output Enable Buffer" />
|
|
|
+ <BitField start="2" size="1" name="PGEB2" description="Pattern Generator 2 Output Enable Buffer" />
|
|
|
+ <BitField start="3" size="1" name="PGEB3" description="Pattern Generator 3 Output Enable Buffer" />
|
|
|
+ <BitField start="4" size="1" name="PGEB4" description="Pattern Generator 4 Output Enable Buffer" />
|
|
|
+ <BitField start="5" size="1" name="PGEB5" description="Pattern Generator 5 Output Enable Buffer" />
|
|
|
+ <BitField start="6" size="1" name="PGEB6" description="Pattern Generator 6 Output Enable Buffer" />
|
|
|
+ <BitField start="7" size="1" name="PGEB7" description="Pattern Generator 7 Output Enable Buffer" />
|
|
|
+ <BitField start="8" size="1" name="PGVB0" description="Pattern Generator 0 Output Enable" />
|
|
|
+ <BitField start="9" size="1" name="PGVB1" description="Pattern Generator 1 Output Enable" />
|
|
|
+ <BitField start="10" size="1" name="PGVB2" description="Pattern Generator 2 Output Enable" />
|
|
|
+ <BitField start="11" size="1" name="PGVB3" description="Pattern Generator 3 Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="PGVB4" description="Pattern Generator 4 Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="PGVB5" description="Pattern Generator 5 Output Enable" />
|
|
|
+ <BitField start="14" size="1" name="PGVB6" description="Pattern Generator 6 Output Enable" />
|
|
|
+ <BitField start="15" size="1" name="PGVB7" description="Pattern Generator 7 Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER_DITH4" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER_DITH5" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER_DITH6" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB_DITH4" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB_DITH5" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB_DITH6" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="4" name="TCC_STATUS" access="Read/Write" description="Status" reset_value="0x00000001" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="1" size="1" name="IDX" description="Ramp" />
|
|
|
+ <BitField start="3" size="1" name="DFS" description="Non-Recoverable Debug Fault State" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="5" size="1" name="PATTBV" description="Pattern Buffer Valid" />
|
|
|
+ <BitField start="6" size="1" name="WAVEBV" description="Wave Buffer Valid" />
|
|
|
+ <BitField start="7" size="1" name="PERBV" description="Period Buffer Valid" />
|
|
|
+ <BitField start="8" size="1" name="FAULTAIN" description="Recoverable Fault A Input" />
|
|
|
+ <BitField start="9" size="1" name="FAULTBIN" description="Recoverable Fault B Input" />
|
|
|
+ <BitField start="10" size="1" name="FAULT0IN" description="Non-Recoverable Fault0 Input" />
|
|
|
+ <BitField start="11" size="1" name="FAULT1IN" description="Non-Recoverable Fault1 Input" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A State" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B State" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0 State" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1 State" />
|
|
|
+ <BitField start="16" size="1" name="CCBV0" description="Compare Channel 0 Buffer Valid" />
|
|
|
+ <BitField start="17" size="1" name="CCBV1" description="Compare Channel 1 Buffer Valid" />
|
|
|
+ <BitField start="18" size="1" name="CCBV2" description="Compare Channel 2 Buffer Valid" />
|
|
|
+ <BitField start="19" size="1" name="CCBV3" description="Compare Channel 3 Buffer Valid" />
|
|
|
+ <BitField start="24" size="1" name="CMP0" description="Compare Channel 0 Value" />
|
|
|
+ <BitField start="25" size="1" name="CMP1" description="Compare Channel 1 Value" />
|
|
|
+ <BitField start="26" size="1" name="CMP2" description="Compare Channel 2 Value" />
|
|
|
+ <BitField start="27" size="1" name="CMP3" description="Compare Channel 3 Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="4" name="TCC_SYNCBUSY" access="ReadOnly" description="Synchronization Busy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Swrst Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="Ctrlb Busy" />
|
|
|
+ <BitField start="3" size="1" name="STATUS" description="Status Busy" />
|
|
|
+ <BitField start="4" size="1" name="COUNT" description="Count Busy" />
|
|
|
+ <BitField start="5" size="1" name="PATT" description="Pattern Busy" />
|
|
|
+ <BitField start="6" size="1" name="WAVE" description="Wave Busy" />
|
|
|
+ <BitField start="7" size="1" name="PER" description="Period busy" />
|
|
|
+ <BitField start="8" size="1" name="CC0" description="Compare Channel 0 Busy" />
|
|
|
+ <BitField start="9" size="1" name="CC1" description="Compare Channel 1 Busy" />
|
|
|
+ <BitField start="10" size="1" name="CC2" description="Compare Channel 2 Busy" />
|
|
|
+ <BitField start="11" size="1" name="CC3" description="Compare Channel 3 Busy" />
|
|
|
+ <BitField start="16" size="1" name="PATTB" description="Pattern Buffer Busy" />
|
|
|
+ <BitField start="17" size="1" name="WAVEB" description="Wave Buffer Busy" />
|
|
|
+ <BitField start="18" size="1" name="PERB" description="Period Buffer Busy" />
|
|
|
+ <BitField start="19" size="1" name="CCB0" description="Compare Channel Buffer 0 Busy" />
|
|
|
+ <BitField start="20" size="1" name="CCB1" description="Compare Channel Buffer 1 Busy" />
|
|
|
+ <BitField start="21" size="1" name="CCB2" description="Compare Channel Buffer 2 Busy" />
|
|
|
+ <BitField start="22" size="1" name="CCB3" description="Compare Channel Buffer 3 Busy" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x3C" size="4" name="TCC_WAVE" access="Read/Write" description="Waveform Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="WAVEGEN" description="Waveform Generation">
|
|
|
+ <Enum name="NFRQ" start="0x0" description="Normal frequency" />
|
|
|
+ <Enum name="MFRQ" start="0x1" description="Match frequency" />
|
|
|
+ <Enum name="NPWM" start="0x2" description="Normal PWM" />
|
|
|
+ <Enum name="DSCRITICAL" start="0x4" description="Dual-slope critical" />
|
|
|
+ <Enum name="DSBOTTOM" start="0x5" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO" />
|
|
|
+ <Enum name="DSBOTH" start="0x6" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP" />
|
|
|
+ <Enum name="DSTOP" start="0x7" description="Dual-slope with interrupt/event condition when COUNT reaches TOP" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="2" name="RAMP" description="Ramp Mode">
|
|
|
+ <Enum name="RAMP1" start="0x0" description="RAMP1 operation" />
|
|
|
+ <Enum name="RAMP2A" start="0x1" description="Alternative RAMP2 operation" />
|
|
|
+ <Enum name="RAMP2" start="0x2" description="RAMP2 operation" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="CIPEREN" description="Circular period Enable" />
|
|
|
+ <BitField start="8" size="1" name="CICCEN0" description="Circular Channel 0 Enable" />
|
|
|
+ <BitField start="9" size="1" name="CICCEN1" description="Circular Channel 1 Enable" />
|
|
|
+ <BitField start="10" size="1" name="CICCEN2" description="Circular Channel 2 Enable" />
|
|
|
+ <BitField start="11" size="1" name="CICCEN3" description="Circular Channel 3 Enable" />
|
|
|
+ <BitField start="16" size="1" name="POL0" description="Channel 0 Polarity" />
|
|
|
+ <BitField start="17" size="1" name="POL1" description="Channel 1 Polarity" />
|
|
|
+ <BitField start="18" size="1" name="POL2" description="Channel 2 Polarity" />
|
|
|
+ <BitField start="19" size="1" name="POL3" description="Channel 3 Polarity" />
|
|
|
+ <BitField start="24" size="1" name="SWAP0" description="Swap DTI Output Pair 0" />
|
|
|
+ <BitField start="25" size="1" name="SWAP1" description="Swap DTI Output Pair 1" />
|
|
|
+ <BitField start="26" size="1" name="SWAP2" description="Swap DTI Output Pair 2" />
|
|
|
+ <BitField start="27" size="1" name="SWAP3" description="Swap DTI Output Pair 3" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x68" size="4" name="TCC_WAVEB" access="Read/Write" description="Waveform Control Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="WAVEGENB" description="Waveform Generation Buffer">
|
|
|
+ <Enum name="NFRQ" start="0x0" description="Normal frequency" />
|
|
|
+ <Enum name="MFRQ" start="0x1" description="Match frequency" />
|
|
|
+ <Enum name="NPWM" start="0x2" description="Normal PWM" />
|
|
|
+ <Enum name="DSCRITICAL" start="0x4" description="Dual-slope critical" />
|
|
|
+ <Enum name="DSBOTTOM" start="0x5" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO" />
|
|
|
+ <Enum name="DSBOTH" start="0x6" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP" />
|
|
|
+ <Enum name="DSTOP" start="0x7" description="Dual-slope with interrupt/event condition when COUNT reaches TOP" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="2" name="RAMPB" description="Ramp Mode Buffer">
|
|
|
+ <Enum name="RAMP1" start="0x0" description="RAMP1 operation" />
|
|
|
+ <Enum name="RAMP2A" start="0x1" description="Alternative RAMP2 operation" />
|
|
|
+ <Enum name="RAMP2" start="0x2" description="RAMP2 operation" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="CIPERENB" description="Circular Period Enable Buffer" />
|
|
|
+ <BitField start="8" size="1" name="CICCENB0" description="Circular Channel 0 Enable Buffer" />
|
|
|
+ <BitField start="9" size="1" name="CICCENB1" description="Circular Channel 1 Enable Buffer" />
|
|
|
+ <BitField start="10" size="1" name="CICCENB2" description="Circular Channel 2 Enable Buffer" />
|
|
|
+ <BitField start="11" size="1" name="CICCENB3" description="Circular Channel 3 Enable Buffer" />
|
|
|
+ <BitField start="16" size="1" name="POLB0" description="Channel 0 Polarity Buffer" />
|
|
|
+ <BitField start="17" size="1" name="POLB1" description="Channel 1 Polarity Buffer" />
|
|
|
+ <BitField start="18" size="1" name="POLB2" description="Channel 2 Polarity Buffer" />
|
|
|
+ <BitField start="19" size="1" name="POLB3" description="Channel 3 Polarity Buffer" />
|
|
|
+ <BitField start="24" size="1" name="SWAPB0" description="Swap DTI Output Pair 0 Buffer" />
|
|
|
+ <BitField start="25" size="1" name="SWAPB1" description="Swap DTI Output Pair 1 Buffer" />
|
|
|
+ <BitField start="26" size="1" name="SWAPB2" description="Swap DTI Output Pair 2 Buffer" />
|
|
|
+ <BitField start="27" size="1" name="SWAPB3" description="Swap DTI Output Pair 3 Buffer" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="4" name="TCC_WEXCTRL" access="Read/Write" description="Waveform Extension Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="OTMX" description="Output Matrix" />
|
|
|
+ <BitField start="8" size="1" name="DTIEN0" description="Dead-time Insertion Generator 0 Enable" />
|
|
|
+ <BitField start="9" size="1" name="DTIEN1" description="Dead-time Insertion Generator 1 Enable" />
|
|
|
+ <BitField start="10" size="1" name="DTIEN2" description="Dead-time Insertion Generator 2 Enable" />
|
|
|
+ <BitField start="11" size="1" name="DTIEN3" description="Dead-time Insertion Generator 3 Enable" />
|
|
|
+ <BitField start="16" size="8" name="DTLS" description="Dead-time Low Side Outputs Value" />
|
|
|
+ <BitField start="24" size="8" name="DTHS" description="Dead-time High Side Outputs Value" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="TCC2" start="0x42002800" description="Timer Counter Control 2">
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3_DITH4" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3_DITH5" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+0" size="4" name="TCC_CC0_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+4" size="4" name="TCC_CC1_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+8" size="4" name="TCC_CC2_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x44+12" size="4" name="TCC_CC3_DITH6" access="Read/Write" description="Compare and Capture" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CC" description="Channel Compare/Capture Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3_DITH4" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3_DITH5" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+0" size="4" name="TCC_CCB0_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+4" size="4" name="TCC_CCB1_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+8" size="4" name="TCC_CCB2_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x70+12" size="4" name="TCC_CCB3_DITH6" access="Read/Write" description="Compare and Capture Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="CCB" description="Channel Compare/Capture Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT_DITH4" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="4" size="20" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT_DITH5" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="5" size="19" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x34" size="4" name="TCC_COUNT_DITH6" access="Read/Write" description="Count" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="6" size="18" name="COUNT" description="Counter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00" size="4" name="TCC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="5" size="2" name="RESOLUTION" description="Enhanced Resolution">
|
|
|
+ <Enum name="NONE" start="0x0" description="Dithering is disabled" />
|
|
|
+ <Enum name="DITH4" start="0x1" description="Dithering is done every 16 PWM frames" />
|
|
|
+ <Enum name="DITH5" start="0x2" description="Dithering is done every 32 PWM frames" />
|
|
|
+ <Enum name="DITH6" start="0x3" description="Dithering is done every 64 PWM frames" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="3" name="PRESCALER" description="Prescaler">
|
|
|
+ <Enum name="DIV1" start="0x0" description="No division" />
|
|
|
+ <Enum name="DIV2" start="0x1" description="Divide by 2" />
|
|
|
+ <Enum name="DIV4" start="0x2" description="Divide by 4" />
|
|
|
+ <Enum name="DIV8" start="0x3" description="Divide by 8" />
|
|
|
+ <Enum name="DIV16" start="0x4" description="Divide by 16" />
|
|
|
+ <Enum name="DIV64" start="0x5" description="Divide by 64" />
|
|
|
+ <Enum name="DIV256" start="0x6" description="Divide by 256" />
|
|
|
+ <Enum name="DIV1024" start="0x7" description="Divide by 1024" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="11" size="1" name="RUNSTDBY" description="Run in Standby" />
|
|
|
+ <BitField start="12" size="2" name="PRESCSYNC" description="Prescaler and Counter Synchronization Selection">
|
|
|
+ <Enum name="GCLK" start="0x0" description="Reload or reset counter on next GCLK" />
|
|
|
+ <Enum name="PRESC" start="0x1" description="Reload or reset counter on next prescaler clock" />
|
|
|
+ <Enum name="RESYNC" start="0x2" description="Reload or reset counter on next GCLK and reset prescaler counter" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="14" size="1" name="ALOCK" description="Auto Lock" />
|
|
|
+ <BitField start="24" size="1" name="CPTEN0" description="Capture Channel 0 Enable" />
|
|
|
+ <BitField start="25" size="1" name="CPTEN1" description="Capture Channel 1 Enable" />
|
|
|
+ <BitField start="26" size="1" name="CPTEN2" description="Capture Channel 2 Enable" />
|
|
|
+ <BitField start="27" size="1" name="CPTEN3" description="Capture Channel 3 Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x04" size="1" name="TCC_CTRLBCLR" access="Read/Write" description="Control B Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="1" size="1" name="LUPD" description="Lock Update" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="3" size="2" name="IDXCMD" description="Ramp Index Command">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Command disabled: Index toggles between cycles A and B" />
|
|
|
+ <Enum name="SET" start="0x1" description="Set index: cycle B will be forced in the next cycle" />
|
|
|
+ <Enum name="CLEAR" start="0x2" description="Clear index: cycle A will be forced in the next cycle" />
|
|
|
+ <Enum name="HOLD" start="0x3" description="Hold index: the next cycle will be the same as the current cycle" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="3" name="CMD" description="TCC Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Clear start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force stop" />
|
|
|
+ <Enum name="UPDATE" start="0x3" description="Force update of double buffered registers" />
|
|
|
+ <Enum name="READSYNC" start="0x4" description="Force COUNT read synchronization" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x05" size="1" name="TCC_CTRLBSET" access="Read/Write" description="Control B Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DIR" description="Counter Direction" />
|
|
|
+ <BitField start="1" size="1" name="LUPD" description="Lock Update" />
|
|
|
+ <BitField start="2" size="1" name="ONESHOT" description="One-Shot" />
|
|
|
+ <BitField start="3" size="2" name="IDXCMD" description="Ramp Index Command">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Command disabled: Index toggles between cycles A and B" />
|
|
|
+ <Enum name="SET" start="0x1" description="Set index: cycle B will be forced in the next cycle" />
|
|
|
+ <Enum name="CLEAR" start="0x2" description="Clear index: cycle A will be forced in the next cycle" />
|
|
|
+ <Enum name="HOLD" start="0x3" description="Hold index: the next cycle will be the same as the current cycle" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="3" name="CMD" description="TCC Command">
|
|
|
+ <Enum name="NONE" start="0x0" description="No action" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Clear start, restart or retrigger" />
|
|
|
+ <Enum name="STOP" start="0x2" description="Force stop" />
|
|
|
+ <Enum name="UPDATE" start="0x3" description="Force update of double buffered registers" />
|
|
|
+ <Enum name="READSYNC" start="0x4" description="Force COUNT read synchronization" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1E" size="1" name="TCC_DBGCTRL" access="Read/Write" description="Debug Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DBGRUN" description="Debug Running Mode" />
|
|
|
+ <BitField start="2" size="1" name="FDDBD" description="Fault Detection on Debug Break Detection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x18" size="4" name="TCC_DRVCTRL" access="Read/Write" description="Driver Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="NRE0" description="Non-Recoverable State 0 Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="NRE1" description="Non-Recoverable State 1 Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="NRE2" description="Non-Recoverable State 2 Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="NRE3" description="Non-Recoverable State 3 Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="NRE4" description="Non-Recoverable State 4 Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="NRE5" description="Non-Recoverable State 5 Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="NRE6" description="Non-Recoverable State 6 Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="NRE7" description="Non-Recoverable State 7 Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="NRV0" description="Non-Recoverable State 0 Output Value" />
|
|
|
+ <BitField start="9" size="1" name="NRV1" description="Non-Recoverable State 1 Output Value" />
|
|
|
+ <BitField start="10" size="1" name="NRV2" description="Non-Recoverable State 2 Output Value" />
|
|
|
+ <BitField start="11" size="1" name="NRV3" description="Non-Recoverable State 3 Output Value" />
|
|
|
+ <BitField start="12" size="1" name="NRV4" description="Non-Recoverable State 4 Output Value" />
|
|
|
+ <BitField start="13" size="1" name="NRV5" description="Non-Recoverable State 5 Output Value" />
|
|
|
+ <BitField start="14" size="1" name="NRV6" description="Non-Recoverable State 6 Output Value" />
|
|
|
+ <BitField start="15" size="1" name="NRV7" description="Non-Recoverable State 7 Output Value" />
|
|
|
+ <BitField start="16" size="1" name="INVEN0" description="Output Waveform 0 Inversion" />
|
|
|
+ <BitField start="17" size="1" name="INVEN1" description="Output Waveform 1 Inversion" />
|
|
|
+ <BitField start="18" size="1" name="INVEN2" description="Output Waveform 2 Inversion" />
|
|
|
+ <BitField start="19" size="1" name="INVEN3" description="Output Waveform 3 Inversion" />
|
|
|
+ <BitField start="20" size="1" name="INVEN4" description="Output Waveform 4 Inversion" />
|
|
|
+ <BitField start="21" size="1" name="INVEN5" description="Output Waveform 5 Inversion" />
|
|
|
+ <BitField start="22" size="1" name="INVEN6" description="Output Waveform 6 Inversion" />
|
|
|
+ <BitField start="23" size="1" name="INVEN7" description="Output Waveform 7 Inversion" />
|
|
|
+ <BitField start="24" size="4" name="FILTERVAL0" description="Non-Recoverable Fault Input 0 Filter Value" />
|
|
|
+ <BitField start="28" size="4" name="FILTERVAL1" description="Non-Recoverable Fault Input 1 Filter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x20" size="4" name="TCC_EVCTRL" access="Read/Write" description="Event Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EVACT0" description="Timer/counter Input Event0 Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Start, restart or re-trigger counter on event" />
|
|
|
+ <Enum name="COUNTEV" start="0x2" description="Count on event" />
|
|
|
+ <Enum name="START" start="0x3" description="Start counter on event" />
|
|
|
+ <Enum name="INC" start="0x4" description="Increment counter on event" />
|
|
|
+ <Enum name="COUNT" start="0x5" description="Count on active state of asynchronous event" />
|
|
|
+ <Enum name="FAULT" start="0x7" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="3" name="EVACT1" description="Timer/counter Input Event1 Action">
|
|
|
+ <Enum name="OFF" start="0x0" description="Event action disabled" />
|
|
|
+ <Enum name="RETRIGGER" start="0x1" description="Re-trigger counter on event" />
|
|
|
+ <Enum name="DIR" start="0x2" description="Direction control" />
|
|
|
+ <Enum name="STOP" start="0x3" description="Stop counter on event" />
|
|
|
+ <Enum name="DEC" start="0x4" description="Decrement counter on event" />
|
|
|
+ <Enum name="PPW" start="0x5" description="Period capture value in CC0 register, pulse width capture value in CC1 register" />
|
|
|
+ <Enum name="PWP" start="0x6" description="Period capture value in CC1 register, pulse width capture value in CC0 register" />
|
|
|
+ <Enum name="FAULT" start="0x7" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="6" size="2" name="CNTSEL" description="Timer/counter Output Event Mode">
|
|
|
+ <Enum name="START" start="0x0" description="An interrupt/event is generated when a new counter cycle starts" />
|
|
|
+ <Enum name="END" start="0x1" description="An interrupt/event is generated when a counter cycle ends" />
|
|
|
+ <Enum name="BETWEEN" start="0x2" description="An interrupt/event is generated when a counter cycle ends, except for the first and last cycles" />
|
|
|
+ <Enum name="BOUNDARY" start="0x3" description="An interrupt/event is generated when a new counter cycle starts or a counter cycle ends" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="8" size="1" name="OVFEO" description="Overflow/Underflow Output Event Enable" />
|
|
|
+ <BitField start="9" size="1" name="TRGEO" description="Retrigger Output Event Enable" />
|
|
|
+ <BitField start="10" size="1" name="CNTEO" description="Timer/counter Output Event Enable" />
|
|
|
+ <BitField start="12" size="1" name="TCINV0" description="Inverted Event 0 Input Enable" />
|
|
|
+ <BitField start="13" size="1" name="TCINV1" description="Inverted Event 1 Input Enable" />
|
|
|
+ <BitField start="14" size="1" name="TCEI0" description="Timer/counter Event 0 Input Enable" />
|
|
|
+ <BitField start="15" size="1" name="TCEI1" description="Timer/counter Event 1 Input Enable" />
|
|
|
+ <BitField start="16" size="1" name="MCEI0" description="Match or Capture Channel 0 Event Input Enable" />
|
|
|
+ <BitField start="17" size="1" name="MCEI1" description="Match or Capture Channel 1 Event Input Enable" />
|
|
|
+ <BitField start="18" size="1" name="MCEI2" description="Match or Capture Channel 2 Event Input Enable" />
|
|
|
+ <BitField start="19" size="1" name="MCEI3" description="Match or Capture Channel 3 Event Input Enable" />
|
|
|
+ <BitField start="24" size="1" name="MCEO0" description="Match or Capture Channel 0 Event Output Enable" />
|
|
|
+ <BitField start="25" size="1" name="MCEO1" description="Match or Capture Channel 1 Event Output Enable" />
|
|
|
+ <BitField start="26" size="1" name="MCEO2" description="Match or Capture Channel 2 Event Output Enable" />
|
|
|
+ <BitField start="27" size="1" name="MCEO3" description="Match or Capture Channel 3 Event Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0C" size="4" name="TCC_FCTRLA" access="Read/Write" description="Recoverable Fault A Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SRC" description="Fault A Source">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Fault input disabled" />
|
|
|
+ <Enum name="ENABLE" start="0x1" description="MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="INVERT" start="0x2" description="Inverted MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="ALTFAULT" start="0x3" description="Alternate fault (A or B) state at the end of the previous period" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="KEEP" description="Fault A Keeper" />
|
|
|
+ <BitField start="4" size="1" name="QUAL" description="Fault A Qualification" />
|
|
|
+ <BitField start="5" size="2" name="BLANK" description="Fault A Blanking Mode">
|
|
|
+ <Enum name="NONE" start="0x0" description="No blanking applied" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Blanking applied from rising edge of the output waveform" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Blanking applied from falling edge of the output waveform" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Blanking applied from each toggle of the output waveform" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RESTART" description="Fault A Restart" />
|
|
|
+ <BitField start="8" size="2" name="HALT" description="Fault A Halt Mode">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Halt action disabled" />
|
|
|
+ <Enum name="HW" start="0x1" description="Hardware halt action" />
|
|
|
+ <Enum name="SW" start="0x2" description="Software halt action" />
|
|
|
+ <Enum name="NR" start="0x3" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="10" size="2" name="CHSEL" description="Fault A Capture Channel">
|
|
|
+ <Enum name="CC0" start="0x0" description="Capture value stored in channel 0" />
|
|
|
+ <Enum name="CC1" start="0x1" description="Capture value stored in channel 1" />
|
|
|
+ <Enum name="CC2" start="0x2" description="Capture value stored in channel 2" />
|
|
|
+ <Enum name="CC3" start="0x3" description="Capture value stored in channel 3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="12" size="3" name="CAPTURE" description="Fault A Capture Action">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="No capture" />
|
|
|
+ <Enum name="CAPT" start="0x1" description="Capture on fault" />
|
|
|
+ <Enum name="CAPTMIN" start="0x2" description="Minimum capture" />
|
|
|
+ <Enum name="CAPTMAX" start="0x3" description="Maximum capture" />
|
|
|
+ <Enum name="LOCMIN" start="0x4" description="Minimum local detection" />
|
|
|
+ <Enum name="LOCMAX" start="0x5" description="Maximum local detection" />
|
|
|
+ <Enum name="DERIV0" start="0x6" description="Minimum and maximum local detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="8" name="BLANKVAL" description="Fault A Blanking Time" />
|
|
|
+ <BitField start="24" size="4" name="FILTERVAL" description="Fault A Filter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x10" size="4" name="TCC_FCTRLB" access="Read/Write" description="Recoverable Fault B Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="SRC" description="Fault B Source">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Fault input disabled" />
|
|
|
+ <Enum name="ENABLE" start="0x1" description="MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="INVERT" start="0x2" description="Inverted MCEx (x=0,1) event input" />
|
|
|
+ <Enum name="ALTFAULT" start="0x3" description="Alternate fault (A or B) state at the end of the previous period" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="3" size="1" name="KEEP" description="Fault B Keeper" />
|
|
|
+ <BitField start="4" size="1" name="QUAL" description="Fault B Qualification" />
|
|
|
+ <BitField start="5" size="2" name="BLANK" description="Fault B Blanking Mode">
|
|
|
+ <Enum name="NONE" start="0x0" description="No blanking applied" />
|
|
|
+ <Enum name="RISE" start="0x1" description="Blanking applied from rising edge of the output waveform" />
|
|
|
+ <Enum name="FALL" start="0x2" description="Blanking applied from falling edge of the output waveform" />
|
|
|
+ <Enum name="BOTH" start="0x3" description="Blanking applied from each toggle of the output waveform" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="RESTART" description="Fault B Restart" />
|
|
|
+ <BitField start="8" size="2" name="HALT" description="Fault B Halt Mode">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Halt action disabled" />
|
|
|
+ <Enum name="HW" start="0x1" description="Hardware halt action" />
|
|
|
+ <Enum name="SW" start="0x2" description="Software halt action" />
|
|
|
+ <Enum name="NR" start="0x3" description="Non-recoverable fault" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="10" size="2" name="CHSEL" description="Fault B Capture Channel">
|
|
|
+ <Enum name="CC0" start="0x0" description="Capture value stored in channel 0" />
|
|
|
+ <Enum name="CC1" start="0x1" description="Capture value stored in channel 1" />
|
|
|
+ <Enum name="CC2" start="0x2" description="Capture value stored in channel 2" />
|
|
|
+ <Enum name="CC3" start="0x3" description="Capture value stored in channel 3" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="12" size="3" name="CAPTURE" description="Fault B Capture Action">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="No capture" />
|
|
|
+ <Enum name="CAPT" start="0x1" description="Capture on fault" />
|
|
|
+ <Enum name="CAPTMIN" start="0x2" description="Minimum capture" />
|
|
|
+ <Enum name="CAPTMAX" start="0x3" description="Maximum capture" />
|
|
|
+ <Enum name="LOCMIN" start="0x4" description="Minimum local detection" />
|
|
|
+ <Enum name="LOCMAX" start="0x5" description="Maximum local detection" />
|
|
|
+ <Enum name="DERIV0" start="0x6" description="Minimum and maximum local detection" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="16" size="8" name="BLANKVAL" description="Fault B Blanking Time" />
|
|
|
+ <BitField start="24" size="4" name="FILTERVAL" description="Fault B Filter Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x24" size="4" name="TCC_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRG" description="Retrigger Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="CNT" description="Counter Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="DFS" description="Non-Recoverable Debug Fault Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B Interrupt Enable" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0 Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1 Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ <BitField start="18" size="1" name="MC2" description="Match or Capture Channel 2 Interrupt Enable" />
|
|
|
+ <BitField start="19" size="1" name="MC3" description="Match or Capture Channel 3 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x28" size="4" name="TCC_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRG" description="Retrigger Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="CNT" description="Counter Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="ERR" description="Error Interrupt Enable" />
|
|
|
+ <BitField start="11" size="1" name="DFS" description="Non-Recoverable Debug Fault Interrupt Enable" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A Interrupt Enable" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B Interrupt Enable" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0 Interrupt Enable" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1 Interrupt Enable" />
|
|
|
+ <BitField start="16" size="1" name="MC0" description="Match or Capture Channel 0 Interrupt Enable" />
|
|
|
+ <BitField start="17" size="1" name="MC1" description="Match or Capture Channel 1 Interrupt Enable" />
|
|
|
+ <BitField start="18" size="1" name="MC2" description="Match or Capture Channel 2 Interrupt Enable" />
|
|
|
+ <BitField start="19" size="1" name="MC3" description="Match or Capture Channel 3 Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x2C" size="4" name="TCC_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="OVF" description="Overflow" />
|
|
|
+ <BitField start="1" size="1" name="TRG" description="Retrigger" />
|
|
|
+ <BitField start="2" size="1" name="CNT" description="Counter" />
|
|
|
+ <BitField start="3" size="1" name="ERR" description="Error" />
|
|
|
+ <BitField start="11" size="1" name="DFS" description="Non-Recoverable Debug Fault" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1" />
|
|
|
+ <BitField start="16" size="1" name="MC0" description="Match or Capture 0" />
|
|
|
+ <BitField start="17" size="1" name="MC1" description="Match or Capture 1" />
|
|
|
+ <BitField start="18" size="1" name="MC2" description="Match or Capture 2" />
|
|
|
+ <BitField start="19" size="1" name="MC3" description="Match or Capture 3" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x38" size="2" name="TCC_PATT" access="Read/Write" description="Pattern" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PGE0" description="Pattern Generator 0 Output Enable" />
|
|
|
+ <BitField start="1" size="1" name="PGE1" description="Pattern Generator 1 Output Enable" />
|
|
|
+ <BitField start="2" size="1" name="PGE2" description="Pattern Generator 2 Output Enable" />
|
|
|
+ <BitField start="3" size="1" name="PGE3" description="Pattern Generator 3 Output Enable" />
|
|
|
+ <BitField start="4" size="1" name="PGE4" description="Pattern Generator 4 Output Enable" />
|
|
|
+ <BitField start="5" size="1" name="PGE5" description="Pattern Generator 5 Output Enable" />
|
|
|
+ <BitField start="6" size="1" name="PGE6" description="Pattern Generator 6 Output Enable" />
|
|
|
+ <BitField start="7" size="1" name="PGE7" description="Pattern Generator 7 Output Enable" />
|
|
|
+ <BitField start="8" size="1" name="PGV0" description="Pattern Generator 0 Output Value" />
|
|
|
+ <BitField start="9" size="1" name="PGV1" description="Pattern Generator 1 Output Value" />
|
|
|
+ <BitField start="10" size="1" name="PGV2" description="Pattern Generator 2 Output Value" />
|
|
|
+ <BitField start="11" size="1" name="PGV3" description="Pattern Generator 3 Output Value" />
|
|
|
+ <BitField start="12" size="1" name="PGV4" description="Pattern Generator 4 Output Value" />
|
|
|
+ <BitField start="13" size="1" name="PGV5" description="Pattern Generator 5 Output Value" />
|
|
|
+ <BitField start="14" size="1" name="PGV6" description="Pattern Generator 6 Output Value" />
|
|
|
+ <BitField start="15" size="1" name="PGV7" description="Pattern Generator 7 Output Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x64" size="2" name="TCC_PATTB" access="Read/Write" description="Pattern Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="PGEB0" description="Pattern Generator 0 Output Enable Buffer" />
|
|
|
+ <BitField start="1" size="1" name="PGEB1" description="Pattern Generator 1 Output Enable Buffer" />
|
|
|
+ <BitField start="2" size="1" name="PGEB2" description="Pattern Generator 2 Output Enable Buffer" />
|
|
|
+ <BitField start="3" size="1" name="PGEB3" description="Pattern Generator 3 Output Enable Buffer" />
|
|
|
+ <BitField start="4" size="1" name="PGEB4" description="Pattern Generator 4 Output Enable Buffer" />
|
|
|
+ <BitField start="5" size="1" name="PGEB5" description="Pattern Generator 5 Output Enable Buffer" />
|
|
|
+ <BitField start="6" size="1" name="PGEB6" description="Pattern Generator 6 Output Enable Buffer" />
|
|
|
+ <BitField start="7" size="1" name="PGEB7" description="Pattern Generator 7 Output Enable Buffer" />
|
|
|
+ <BitField start="8" size="1" name="PGVB0" description="Pattern Generator 0 Output Enable" />
|
|
|
+ <BitField start="9" size="1" name="PGVB1" description="Pattern Generator 1 Output Enable" />
|
|
|
+ <BitField start="10" size="1" name="PGVB2" description="Pattern Generator 2 Output Enable" />
|
|
|
+ <BitField start="11" size="1" name="PGVB3" description="Pattern Generator 3 Output Enable" />
|
|
|
+ <BitField start="12" size="1" name="PGVB4" description="Pattern Generator 4 Output Enable" />
|
|
|
+ <BitField start="13" size="1" name="PGVB5" description="Pattern Generator 5 Output Enable" />
|
|
|
+ <BitField start="14" size="1" name="PGVB6" description="Pattern Generator 6 Output Enable" />
|
|
|
+ <BitField start="15" size="1" name="PGVB7" description="Pattern Generator 7 Output Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER_DITH4" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER_DITH5" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x40" size="4" name="TCC_PER_DITH6" access="Read/Write" description="Period" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCY" description="Dithering Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="PER" description="Period Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="24" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB_DITH4" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="4" size="20" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB_DITH5" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="5" size="19" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6C" size="4" name="TCC_PERB_DITH6" access="Read/Write" description="Period Buffer" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="DITHERCYB" description="Dithering Buffer Cycle Number" />
|
|
|
+ <BitField start="6" size="18" name="PERB" description="Period Buffer Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x30" size="4" name="TCC_STATUS" access="Read/Write" description="Status" reset_value="0x00000001" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="STOP" description="Stop" />
|
|
|
+ <BitField start="1" size="1" name="IDX" description="Ramp" />
|
|
|
+ <BitField start="3" size="1" name="DFS" description="Non-Recoverable Debug Fault State" />
|
|
|
+ <BitField start="4" size="1" name="SLAVE" description="Slave" />
|
|
|
+ <BitField start="5" size="1" name="PATTBV" description="Pattern Buffer Valid" />
|
|
|
+ <BitField start="6" size="1" name="WAVEBV" description="Wave Buffer Valid" />
|
|
|
+ <BitField start="7" size="1" name="PERBV" description="Period Buffer Valid" />
|
|
|
+ <BitField start="8" size="1" name="FAULTAIN" description="Recoverable Fault A Input" />
|
|
|
+ <BitField start="9" size="1" name="FAULTBIN" description="Recoverable Fault B Input" />
|
|
|
+ <BitField start="10" size="1" name="FAULT0IN" description="Non-Recoverable Fault0 Input" />
|
|
|
+ <BitField start="11" size="1" name="FAULT1IN" description="Non-Recoverable Fault1 Input" />
|
|
|
+ <BitField start="12" size="1" name="FAULTA" description="Recoverable Fault A State" />
|
|
|
+ <BitField start="13" size="1" name="FAULTB" description="Recoverable Fault B State" />
|
|
|
+ <BitField start="14" size="1" name="FAULT0" description="Non-Recoverable Fault 0 State" />
|
|
|
+ <BitField start="15" size="1" name="FAULT1" description="Non-Recoverable Fault 1 State" />
|
|
|
+ <BitField start="16" size="1" name="CCBV0" description="Compare Channel 0 Buffer Valid" />
|
|
|
+ <BitField start="17" size="1" name="CCBV1" description="Compare Channel 1 Buffer Valid" />
|
|
|
+ <BitField start="18" size="1" name="CCBV2" description="Compare Channel 2 Buffer Valid" />
|
|
|
+ <BitField start="19" size="1" name="CCBV3" description="Compare Channel 3 Buffer Valid" />
|
|
|
+ <BitField start="24" size="1" name="CMP0" description="Compare Channel 0 Value" />
|
|
|
+ <BitField start="25" size="1" name="CMP1" description="Compare Channel 1 Value" />
|
|
|
+ <BitField start="26" size="1" name="CMP2" description="Compare Channel 2 Value" />
|
|
|
+ <BitField start="27" size="1" name="CMP3" description="Compare Channel 3 Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x08" size="4" name="TCC_SYNCBUSY" access="ReadOnly" description="Synchronization Busy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Swrst Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable Busy" />
|
|
|
+ <BitField start="2" size="1" name="CTRLB" description="Ctrlb Busy" />
|
|
|
+ <BitField start="3" size="1" name="STATUS" description="Status Busy" />
|
|
|
+ <BitField start="4" size="1" name="COUNT" description="Count Busy" />
|
|
|
+ <BitField start="5" size="1" name="PATT" description="Pattern Busy" />
|
|
|
+ <BitField start="6" size="1" name="WAVE" description="Wave Busy" />
|
|
|
+ <BitField start="7" size="1" name="PER" description="Period busy" />
|
|
|
+ <BitField start="8" size="1" name="CC0" description="Compare Channel 0 Busy" />
|
|
|
+ <BitField start="9" size="1" name="CC1" description="Compare Channel 1 Busy" />
|
|
|
+ <BitField start="10" size="1" name="CC2" description="Compare Channel 2 Busy" />
|
|
|
+ <BitField start="11" size="1" name="CC3" description="Compare Channel 3 Busy" />
|
|
|
+ <BitField start="16" size="1" name="PATTB" description="Pattern Buffer Busy" />
|
|
|
+ <BitField start="17" size="1" name="WAVEB" description="Wave Buffer Busy" />
|
|
|
+ <BitField start="18" size="1" name="PERB" description="Period Buffer Busy" />
|
|
|
+ <BitField start="19" size="1" name="CCB0" description="Compare Channel Buffer 0 Busy" />
|
|
|
+ <BitField start="20" size="1" name="CCB1" description="Compare Channel Buffer 1 Busy" />
|
|
|
+ <BitField start="21" size="1" name="CCB2" description="Compare Channel Buffer 2 Busy" />
|
|
|
+ <BitField start="22" size="1" name="CCB3" description="Compare Channel Buffer 3 Busy" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x3C" size="4" name="TCC_WAVE" access="Read/Write" description="Waveform Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="WAVEGEN" description="Waveform Generation">
|
|
|
+ <Enum name="NFRQ" start="0x0" description="Normal frequency" />
|
|
|
+ <Enum name="MFRQ" start="0x1" description="Match frequency" />
|
|
|
+ <Enum name="NPWM" start="0x2" description="Normal PWM" />
|
|
|
+ <Enum name="DSCRITICAL" start="0x4" description="Dual-slope critical" />
|
|
|
+ <Enum name="DSBOTTOM" start="0x5" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO" />
|
|
|
+ <Enum name="DSBOTH" start="0x6" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP" />
|
|
|
+ <Enum name="DSTOP" start="0x7" description="Dual-slope with interrupt/event condition when COUNT reaches TOP" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="2" name="RAMP" description="Ramp Mode">
|
|
|
+ <Enum name="RAMP1" start="0x0" description="RAMP1 operation" />
|
|
|
+ <Enum name="RAMP2A" start="0x1" description="Alternative RAMP2 operation" />
|
|
|
+ <Enum name="RAMP2" start="0x2" description="RAMP2 operation" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="CIPEREN" description="Circular period Enable" />
|
|
|
+ <BitField start="8" size="1" name="CICCEN0" description="Circular Channel 0 Enable" />
|
|
|
+ <BitField start="9" size="1" name="CICCEN1" description="Circular Channel 1 Enable" />
|
|
|
+ <BitField start="10" size="1" name="CICCEN2" description="Circular Channel 2 Enable" />
|
|
|
+ <BitField start="11" size="1" name="CICCEN3" description="Circular Channel 3 Enable" />
|
|
|
+ <BitField start="16" size="1" name="POL0" description="Channel 0 Polarity" />
|
|
|
+ <BitField start="17" size="1" name="POL1" description="Channel 1 Polarity" />
|
|
|
+ <BitField start="18" size="1" name="POL2" description="Channel 2 Polarity" />
|
|
|
+ <BitField start="19" size="1" name="POL3" description="Channel 3 Polarity" />
|
|
|
+ <BitField start="24" size="1" name="SWAP0" description="Swap DTI Output Pair 0" />
|
|
|
+ <BitField start="25" size="1" name="SWAP1" description="Swap DTI Output Pair 1" />
|
|
|
+ <BitField start="26" size="1" name="SWAP2" description="Swap DTI Output Pair 2" />
|
|
|
+ <BitField start="27" size="1" name="SWAP3" description="Swap DTI Output Pair 3" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x68" size="4" name="TCC_WAVEB" access="Read/Write" description="Waveform Control Buffer" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="WAVEGENB" description="Waveform Generation Buffer">
|
|
|
+ <Enum name="NFRQ" start="0x0" description="Normal frequency" />
|
|
|
+ <Enum name="MFRQ" start="0x1" description="Match frequency" />
|
|
|
+ <Enum name="NPWM" start="0x2" description="Normal PWM" />
|
|
|
+ <Enum name="DSCRITICAL" start="0x4" description="Dual-slope critical" />
|
|
|
+ <Enum name="DSBOTTOM" start="0x5" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO" />
|
|
|
+ <Enum name="DSBOTH" start="0x6" description="Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP" />
|
|
|
+ <Enum name="DSTOP" start="0x7" description="Dual-slope with interrupt/event condition when COUNT reaches TOP" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="2" name="RAMPB" description="Ramp Mode Buffer">
|
|
|
+ <Enum name="RAMP1" start="0x0" description="RAMP1 operation" />
|
|
|
+ <Enum name="RAMP2A" start="0x1" description="Alternative RAMP2 operation" />
|
|
|
+ <Enum name="RAMP2" start="0x2" description="RAMP2 operation" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="7" size="1" name="CIPERENB" description="Circular Period Enable Buffer" />
|
|
|
+ <BitField start="8" size="1" name="CICCENB0" description="Circular Channel 0 Enable Buffer" />
|
|
|
+ <BitField start="9" size="1" name="CICCENB1" description="Circular Channel 1 Enable Buffer" />
|
|
|
+ <BitField start="10" size="1" name="CICCENB2" description="Circular Channel 2 Enable Buffer" />
|
|
|
+ <BitField start="11" size="1" name="CICCENB3" description="Circular Channel 3 Enable Buffer" />
|
|
|
+ <BitField start="16" size="1" name="POLB0" description="Channel 0 Polarity Buffer" />
|
|
|
+ <BitField start="17" size="1" name="POLB1" description="Channel 1 Polarity Buffer" />
|
|
|
+ <BitField start="18" size="1" name="POLB2" description="Channel 2 Polarity Buffer" />
|
|
|
+ <BitField start="19" size="1" name="POLB3" description="Channel 3 Polarity Buffer" />
|
|
|
+ <BitField start="24" size="1" name="SWAPB0" description="Swap DTI Output Pair 0 Buffer" />
|
|
|
+ <BitField start="25" size="1" name="SWAPB1" description="Swap DTI Output Pair 1 Buffer" />
|
|
|
+ <BitField start="26" size="1" name="SWAPB2" description="Swap DTI Output Pair 2 Buffer" />
|
|
|
+ <BitField start="27" size="1" name="SWAPB3" description="Swap DTI Output Pair 3 Buffer" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x14" size="4" name="TCC_WEXCTRL" access="Read/Write" description="Waveform Extension Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="OTMX" description="Output Matrix" />
|
|
|
+ <BitField start="8" size="1" name="DTIEN0" description="Dead-time Insertion Generator 0 Enable" />
|
|
|
+ <BitField start="9" size="1" name="DTIEN1" description="Dead-time Insertion Generator 1 Enable" />
|
|
|
+ <BitField start="10" size="1" name="DTIEN2" description="Dead-time Insertion Generator 2 Enable" />
|
|
|
+ <BitField start="11" size="1" name="DTIEN3" description="Dead-time Insertion Generator 3 Enable" />
|
|
|
+ <BitField start="16" size="8" name="DTLS" description="Dead-time Low Side Outputs Value" />
|
|
|
+ <BitField start="24" size="8" name="DTHS" description="Dead-time High Side Outputs Value" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="USB (DEVICE)" start="0x41005000" description="Universal Serial Bus">
|
|
|
+ <Register start="+0x000" size="1" name="USB_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="1" name="RUNSTDBY" description="Run in Standby Mode" />
|
|
|
+ <BitField start="7" size="1" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="DEVICE" start="0x0" description="Device Mode" />
|
|
|
+ <Enum name="HOST" start="0x1" description="Host Mode" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x008" size="2" name="USB_CTRLB" access="Read/Write" description="DEVICE Control B" reset_value="0x0001" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DETACH" description="Detach" />
|
|
|
+ <BitField start="1" size="1" name="UPRSM" description="Upstream Resume" />
|
|
|
+ <BitField start="2" size="2" name="SPDCONF" description="Speed Configuration">
|
|
|
+ <Enum name="FS" start="0x0" description="FS : Full Speed" />
|
|
|
+ <Enum name="LS" start="0x1" description="LS : Low Speed" />
|
|
|
+ <Enum name="HS" start="0x2" description="HS : High Speed capable" />
|
|
|
+ <Enum name="HSTM" start="0x3" description="HSTM: High Speed Test Mode (force high-speed mode for test mode)" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="1" name="NREPLY" description="No Reply" />
|
|
|
+ <BitField start="5" size="1" name="TSTJ" description="Test mode J" />
|
|
|
+ <BitField start="6" size="1" name="TSTK" description="Test mode K" />
|
|
|
+ <BitField start="7" size="1" name="TSTPCKT" description="Test packet mode" />
|
|
|
+ <BitField start="8" size="1" name="OPMODE2" description="Specific Operational Mode" />
|
|
|
+ <BitField start="9" size="1" name="GNAK" description="Global NAK" />
|
|
|
+ <BitField start="10" size="2" name="LPMHDSK" description="Link Power Management Handshake">
|
|
|
+ <Enum name="NO" start="0x0" description="No handshake. LPM is not supported" />
|
|
|
+ <Enum name="ACK" start="0x1" description="ACK" />
|
|
|
+ <Enum name="NYET" start="0x2" description="NYET" />
|
|
|
+ <Enum name="STALL" start="0x3" description="STALL" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00A" size="1" name="USB_DADD" access="Read/Write" description="DEVICE Device Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="7" name="DADD" description="Device Address" />
|
|
|
+ <BitField start="7" size="1" name="ADDEN" description="Device Address Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x024" size="4" name="USB_DESCADD" access="Read/Write" description="Descriptor Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DESCADD" description="Descriptor Address Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+0" size="1" name="USB_EPCFG0" access="Read/Write" description="DEVICE End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EPTYPE0" description="End Point Type0" />
|
|
|
+ <BitField start="4" size="3" name="EPTYPE1" description="End Point Type1" />
|
|
|
+ <BitField start="7" size="1" name="NYETDIS" description="NYET Token Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+32" size="1" name="USB_EPCFG1" access="Read/Write" description="DEVICE End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EPTYPE0" description="End Point Type0" />
|
|
|
+ <BitField start="4" size="3" name="EPTYPE1" description="End Point Type1" />
|
|
|
+ <BitField start="7" size="1" name="NYETDIS" description="NYET Token Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+64" size="1" name="USB_EPCFG2" access="Read/Write" description="DEVICE End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EPTYPE0" description="End Point Type0" />
|
|
|
+ <BitField start="4" size="3" name="EPTYPE1" description="End Point Type1" />
|
|
|
+ <BitField start="7" size="1" name="NYETDIS" description="NYET Token Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+96" size="1" name="USB_EPCFG3" access="Read/Write" description="DEVICE End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EPTYPE0" description="End Point Type0" />
|
|
|
+ <BitField start="4" size="3" name="EPTYPE1" description="End Point Type1" />
|
|
|
+ <BitField start="7" size="1" name="NYETDIS" description="NYET Token Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+128" size="1" name="USB_EPCFG4" access="Read/Write" description="DEVICE End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EPTYPE0" description="End Point Type0" />
|
|
|
+ <BitField start="4" size="3" name="EPTYPE1" description="End Point Type1" />
|
|
|
+ <BitField start="7" size="1" name="NYETDIS" description="NYET Token Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+160" size="1" name="USB_EPCFG5" access="Read/Write" description="DEVICE End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EPTYPE0" description="End Point Type0" />
|
|
|
+ <BitField start="4" size="3" name="EPTYPE1" description="End Point Type1" />
|
|
|
+ <BitField start="7" size="1" name="NYETDIS" description="NYET Token Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+192" size="1" name="USB_EPCFG6" access="Read/Write" description="DEVICE End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EPTYPE0" description="End Point Type0" />
|
|
|
+ <BitField start="4" size="3" name="EPTYPE1" description="End Point Type1" />
|
|
|
+ <BitField start="7" size="1" name="NYETDIS" description="NYET Token Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+224" size="1" name="USB_EPCFG7" access="Read/Write" description="DEVICE End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="EPTYPE0" description="End Point Type0" />
|
|
|
+ <BitField start="4" size="3" name="EPTYPE1" description="End Point Type1" />
|
|
|
+ <BitField start="7" size="1" name="NYETDIS" description="NYET Token Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+0" size="1" name="USB_EPINTENCLR0" access="Read/Write" description="DEVICE End Point Interrupt Clear Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/Out Interrupt Disable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/Out Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+32" size="1" name="USB_EPINTENCLR1" access="Read/Write" description="DEVICE End Point Interrupt Clear Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/Out Interrupt Disable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/Out Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+64" size="1" name="USB_EPINTENCLR2" access="Read/Write" description="DEVICE End Point Interrupt Clear Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/Out Interrupt Disable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/Out Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+96" size="1" name="USB_EPINTENCLR3" access="Read/Write" description="DEVICE End Point Interrupt Clear Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/Out Interrupt Disable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/Out Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+128" size="1" name="USB_EPINTENCLR4" access="Read/Write" description="DEVICE End Point Interrupt Clear Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/Out Interrupt Disable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/Out Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+160" size="1" name="USB_EPINTENCLR5" access="Read/Write" description="DEVICE End Point Interrupt Clear Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/Out Interrupt Disable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/Out Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+192" size="1" name="USB_EPINTENCLR6" access="Read/Write" description="DEVICE End Point Interrupt Clear Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/Out Interrupt Disable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/Out Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+224" size="1" name="USB_EPINTENCLR7" access="Read/Write" description="DEVICE End Point Interrupt Clear Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/Out Interrupt Disable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/Out Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+0" size="1" name="USB_EPINTENSET0" access="Read/Write" description="DEVICE End Point Interrupt Set Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out Interrupt enable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out Interrupt enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+32" size="1" name="USB_EPINTENSET1" access="Read/Write" description="DEVICE End Point Interrupt Set Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out Interrupt enable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out Interrupt enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+64" size="1" name="USB_EPINTENSET2" access="Read/Write" description="DEVICE End Point Interrupt Set Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out Interrupt enable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out Interrupt enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+96" size="1" name="USB_EPINTENSET3" access="Read/Write" description="DEVICE End Point Interrupt Set Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out Interrupt enable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out Interrupt enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+128" size="1" name="USB_EPINTENSET4" access="Read/Write" description="DEVICE End Point Interrupt Set Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out Interrupt enable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out Interrupt enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+160" size="1" name="USB_EPINTENSET5" access="Read/Write" description="DEVICE End Point Interrupt Set Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out Interrupt enable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out Interrupt enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+192" size="1" name="USB_EPINTENSET6" access="Read/Write" description="DEVICE End Point Interrupt Set Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out Interrupt enable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out Interrupt enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+224" size="1" name="USB_EPINTENSET7" access="Read/Write" description="DEVICE End Point Interrupt Set Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0 Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1 Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out Interrupt enable" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out Interrupt enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+0" size="1" name="USB_EPINTFLAG0" access="Read/Write" description="DEVICE End Point Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+32" size="1" name="USB_EPINTFLAG1" access="Read/Write" description="DEVICE End Point Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+64" size="1" name="USB_EPINTFLAG2" access="Read/Write" description="DEVICE End Point Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+96" size="1" name="USB_EPINTFLAG3" access="Read/Write" description="DEVICE End Point Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+128" size="1" name="USB_EPINTFLAG4" access="Read/Write" description="DEVICE End Point Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+160" size="1" name="USB_EPINTFLAG5" access="Read/Write" description="DEVICE End Point Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+192" size="1" name="USB_EPINTFLAG6" access="Read/Write" description="DEVICE End Point Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+224" size="1" name="USB_EPINTFLAG7" access="Read/Write" description="DEVICE End Point Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL0" description="Error Flow 0" />
|
|
|
+ <BitField start="3" size="1" name="TRFAIL1" description="Error Flow 1" />
|
|
|
+ <BitField start="4" size="1" name="RXSTP" description="Received Setup" />
|
|
|
+ <BitField start="5" size="1" name="STALL0" description="Stall 0 In/out" />
|
|
|
+ <BitField start="6" size="1" name="STALL1" description="Stall 1 In/out" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x020" size="2" name="USB_EPINTSMRY" access="ReadOnly" description="DEVICE End Point Interrupt Summary" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EPINT0" description="End Point 0 Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="EPINT1" description="End Point 1 Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="EPINT2" description="End Point 2 Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="EPINT3" description="End Point 3 Interrupt" />
|
|
|
+ <BitField start="4" size="1" name="EPINT4" description="End Point 4 Interrupt" />
|
|
|
+ <BitField start="5" size="1" name="EPINT5" description="End Point 5 Interrupt" />
|
|
|
+ <BitField start="6" size="1" name="EPINT6" description="End Point 6 Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="EPINT7" description="End Point 7 Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+0" size="1" name="USB_EPSTATUS0" access="ReadOnly" description="DEVICE End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle Out" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle In" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+32" size="1" name="USB_EPSTATUS1" access="ReadOnly" description="DEVICE End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle Out" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle In" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+64" size="1" name="USB_EPSTATUS2" access="ReadOnly" description="DEVICE End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle Out" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle In" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+96" size="1" name="USB_EPSTATUS3" access="ReadOnly" description="DEVICE End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle Out" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle In" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+128" size="1" name="USB_EPSTATUS4" access="ReadOnly" description="DEVICE End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle Out" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle In" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+160" size="1" name="USB_EPSTATUS5" access="ReadOnly" description="DEVICE End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle Out" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle In" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+192" size="1" name="USB_EPSTATUS6" access="ReadOnly" description="DEVICE End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle Out" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle In" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+224" size="1" name="USB_EPSTATUS7" access="ReadOnly" description="DEVICE End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle Out" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle In" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+0" size="1" name="USB_EPSTATUSCLR0" access="WriteOnly" description="DEVICE End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Clear" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank Clear" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Clear" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+32" size="1" name="USB_EPSTATUSCLR1" access="WriteOnly" description="DEVICE End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Clear" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank Clear" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Clear" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+64" size="1" name="USB_EPSTATUSCLR2" access="WriteOnly" description="DEVICE End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Clear" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank Clear" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Clear" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+96" size="1" name="USB_EPSTATUSCLR3" access="WriteOnly" description="DEVICE End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Clear" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank Clear" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Clear" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+128" size="1" name="USB_EPSTATUSCLR4" access="WriteOnly" description="DEVICE End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Clear" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank Clear" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Clear" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+160" size="1" name="USB_EPSTATUSCLR5" access="WriteOnly" description="DEVICE End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Clear" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank Clear" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Clear" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+192" size="1" name="USB_EPSTATUSCLR6" access="WriteOnly" description="DEVICE End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Clear" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank Clear" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Clear" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+224" size="1" name="USB_EPSTATUSCLR7" access="WriteOnly" description="DEVICE End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Clear" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank Clear" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Clear" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+0" size="1" name="USB_EPSTATUSSET0" access="WriteOnly" description="DEVICE End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Set" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Set" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+32" size="1" name="USB_EPSTATUSSET1" access="WriteOnly" description="DEVICE End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Set" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Set" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+64" size="1" name="USB_EPSTATUSSET2" access="WriteOnly" description="DEVICE End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Set" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Set" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+96" size="1" name="USB_EPSTATUSSET3" access="WriteOnly" description="DEVICE End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Set" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Set" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+128" size="1" name="USB_EPSTATUSSET4" access="WriteOnly" description="DEVICE End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Set" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Set" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+160" size="1" name="USB_EPSTATUSSET5" access="WriteOnly" description="DEVICE End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Set" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Set" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+192" size="1" name="USB_EPSTATUSSET6" access="WriteOnly" description="DEVICE End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Set" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Set" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+224" size="1" name="USB_EPSTATUSSET7" access="WriteOnly" description="DEVICE End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGLOUT" description="Data Toggle OUT Set" />
|
|
|
+ <BitField start="1" size="1" name="DTGLIN" description="Data Toggle IN Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="STALLRQ0" description="Stall 0 Request Set" />
|
|
|
+ <BitField start="5" size="1" name="STALLRQ1" description="Stall 1 Request Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x010" size="2" name="USB_FNUM" access="ReadOnly" description="DEVICE Device Frame Number" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="MFNUM" description="Micro Frame Number" />
|
|
|
+ <BitField start="3" size="11" name="FNUM" description="Frame Number" />
|
|
|
+ <BitField start="15" size="1" name="FNCERR" description="Frame Number CRC Error" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00D" size="1" name="USB_FSMSTATUS" access="ReadOnly" description="Finite State Machine Status" reset_value="0x01" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="FSMSTATE" description="Fine State Machine Status">
|
|
|
+ <Enum name="OFF" start="0x1" description="OFF (L3). It corresponds to the powered-off, disconnected, and disabled state" />
|
|
|
+ <Enum name="ON" start="0x2" description="ON (L0). It corresponds to the Idle and Active states" />
|
|
|
+ <Enum name="SUSPEND" start="0x4" description="SUSPEND (L2)" />
|
|
|
+ <Enum name="SLEEP" start="0x8" description="SLEEP (L1)" />
|
|
|
+ <Enum name="DNRESUME" start="0x10" description="DNRESUME. Down Stream Resume." />
|
|
|
+ <Enum name="UPRESUME" start="0x20" description="UPRESUME. Up Stream Resume." />
|
|
|
+ <Enum name="RESET" start="0x40" description="RESET. USB lines Reset." />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x014" size="2" name="USB_INTENCLR" access="Read/Write" description="DEVICE Device Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SUSPEND" description="Suspend Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="MSOF" description="Micro Start of Frame Interrupt Enable in High Speed Mode" />
|
|
|
+ <BitField start="2" size="1" name="SOF" description="Start Of Frame Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="EORST" description="End of Reset Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="WAKEUP" description="Wake Up Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="EORSM" description="End Of Resume Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="UPRSM" description="Upstream Resume Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="RAMACER" description="Ram Access Interrupt Enable" />
|
|
|
+ <BitField start="8" size="1" name="LPMNYET" description="Link Power Management Not Yet Interrupt Enable" />
|
|
|
+ <BitField start="9" size="1" name="LPMSUSP" description="Link Power Management Suspend Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x018" size="2" name="USB_INTENSET" access="Read/Write" description="DEVICE Device Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SUSPEND" description="Suspend Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="MSOF" description="Micro Start of Frame Interrupt Enable in High Speed Mode" />
|
|
|
+ <BitField start="2" size="1" name="SOF" description="Start Of Frame Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="EORST" description="End of Reset Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="WAKEUP" description="Wake Up Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="EORSM" description="End Of Resume Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="UPRSM" description="Upstream Resume Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="RAMACER" description="Ram Access Interrupt Enable" />
|
|
|
+ <BitField start="8" size="1" name="LPMNYET" description="Link Power Management Not Yet Interrupt Enable" />
|
|
|
+ <BitField start="9" size="1" name="LPMSUSP" description="Link Power Management Suspend Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x01C" size="2" name="USB_INTFLAG" access="Read/Write" description="DEVICE Device Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SUSPEND" description="Suspend" />
|
|
|
+ <BitField start="1" size="1" name="MSOF" description="Micro Start of Frame in High Speed Mode" />
|
|
|
+ <BitField start="2" size="1" name="SOF" description="Start Of Frame" />
|
|
|
+ <BitField start="3" size="1" name="EORST" description="End of Reset" />
|
|
|
+ <BitField start="4" size="1" name="WAKEUP" description="Wake Up" />
|
|
|
+ <BitField start="5" size="1" name="EORSM" description="End Of Resume" />
|
|
|
+ <BitField start="6" size="1" name="UPRSM" description="Upstream Resume" />
|
|
|
+ <BitField start="7" size="1" name="RAMACER" description="Ram Access" />
|
|
|
+ <BitField start="8" size="1" name="LPMNYET" description="Link Power Management Not Yet" />
|
|
|
+ <BitField start="9" size="1" name="LPMSUSP" description="Link Power Management Suspend" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x028" size="2" name="USB_PADCAL" access="Read/Write" description="USB PAD Calibration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="TRANSP" description="USB Pad Transp calibration" />
|
|
|
+ <BitField start="6" size="5" name="TRANSN" description="USB Pad Transn calibration" />
|
|
|
+ <BitField start="12" size="3" name="TRIM" description="USB Pad Trim calibration" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x003" size="1" name="USB_QOSCTRL" access="Read/Write" description="USB Quality Of Service" reset_value="0x05" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="CQOS" description="Configuration Quality of Service">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Background (no sensitive operation)" />
|
|
|
+ <Enum name="LOW" start="0x1" description="Sensitive Bandwidth" />
|
|
|
+ <Enum name="MEDIUM" start="0x2" description="Sensitive Latency" />
|
|
|
+ <Enum name="HIGH" start="0x3" description="Critical Latency" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="2" size="2" name="DQOS" description="Data Quality of Service">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Background (no sensitive operation)" />
|
|
|
+ <Enum name="LOW" start="0x1" description="Sensitive Bandwidth" />
|
|
|
+ <Enum name="MEDIUM" start="0x2" description="Sensitive Latency" />
|
|
|
+ <Enum name="HIGH" start="0x3" description="Critical Latency" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00C" size="1" name="USB_STATUS" access="ReadOnly" description="DEVICE Status" reset_value="0x40" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="2" name="SPEED" description="Speed Status">
|
|
|
+ <Enum name="FS" start="0x0" description="Full-speed mode" />
|
|
|
+ <Enum name="HS" start="0x1" description="High-speed mode" />
|
|
|
+ <Enum name="LS" start="0x2" description="Low-speed mode" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="6" size="2" name="LINESTATE" description="USB Line State Status">
|
|
|
+ <Enum name="0" start="0x0" description="SE0/RESET" />
|
|
|
+ <Enum name="1" start="0x1" description="FS-J or LS-K State" />
|
|
|
+ <Enum name="2" start="0x2" description="FS-K or LS-J State" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x002" size="1" name="USB_SYNCBUSY" access="ReadOnly" description="Synchronization Busy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="USB (HOST)" start="0x41005000" description="Universal Serial Bus">
|
|
|
+ <Register start="+0x103+0" size="1" name="USB_BINTERVAL0" access="Read/Write" description="HOST Bus Access Period of Pipe" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BITINTERVAL" description="Bit Interval" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x103+32" size="1" name="USB_BINTERVAL1" access="Read/Write" description="HOST Bus Access Period of Pipe" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BITINTERVAL" description="Bit Interval" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x103+64" size="1" name="USB_BINTERVAL2" access="Read/Write" description="HOST Bus Access Period of Pipe" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BITINTERVAL" description="Bit Interval" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x103+96" size="1" name="USB_BINTERVAL3" access="Read/Write" description="HOST Bus Access Period of Pipe" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BITINTERVAL" description="Bit Interval" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x103+128" size="1" name="USB_BINTERVAL4" access="Read/Write" description="HOST Bus Access Period of Pipe" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BITINTERVAL" description="Bit Interval" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x103+160" size="1" name="USB_BINTERVAL5" access="Read/Write" description="HOST Bus Access Period of Pipe" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BITINTERVAL" description="Bit Interval" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x103+192" size="1" name="USB_BINTERVAL6" access="Read/Write" description="HOST Bus Access Period of Pipe" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BITINTERVAL" description="Bit Interval" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x103+224" size="1" name="USB_BINTERVAL7" access="Read/Write" description="HOST Bus Access Period of Pipe" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="BITINTERVAL" description="Bit Interval" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x000" size="1" name="USB_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="1" name="RUNSTDBY" description="Run in Standby Mode" />
|
|
|
+ <BitField start="7" size="1" name="MODE" description="Operating Mode">
|
|
|
+ <Enum name="DEVICE" start="0x0" description="Device Mode" />
|
|
|
+ <Enum name="HOST" start="0x1" description="Host Mode" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x008" size="2" name="USB_CTRLB" access="Read/Write" description="HOST Control B" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="RESUME" description="Send USB Resume" />
|
|
|
+ <BitField start="2" size="2" name="SPDCONF" description="Speed Configuration for Host">
|
|
|
+ <Enum name="NORMAL" start="0x0" description="Normal mode:the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheral is high-speed capable." />
|
|
|
+ <Enum name="FS" start="0x3" description="Full-speed:the host remains in full-speed mode whatever is the peripheral speed capability. Relevant in UTMI mode only." />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="5" size="1" name="TSTJ" description="Test mode J" />
|
|
|
+ <BitField start="6" size="1" name="TSTK" description="Test mode K" />
|
|
|
+ <BitField start="8" size="1" name="SOFE" description="Start of Frame Generation Enable" />
|
|
|
+ <BitField start="9" size="1" name="BUSRESET" description="Send USB Reset" />
|
|
|
+ <BitField start="10" size="1" name="VBUSOK" description="VBUS is OK" />
|
|
|
+ <BitField start="11" size="1" name="L1RESUME" description="Send L1 Resume" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x024" size="4" name="USB_DESCADD" access="Read/Write" description="Descriptor Address" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="32" name="DESCADD" description="Descriptor Address Value" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x012" size="1" name="USB_FLENHIGH" access="ReadOnly" description="HOST Host Frame Length" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="FLENHIGH" description="Frame Length" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x010" size="2" name="USB_FNUM" access="Read/Write" description="HOST Host Frame Number" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="3" name="MFNUM" description="Micro Frame Number" />
|
|
|
+ <BitField start="3" size="11" name="FNUM" description="Frame Number" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00D" size="1" name="USB_FSMSTATUS" access="ReadOnly" description="Finite State Machine Status" reset_value="0x01" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="6" name="FSMSTATE" description="Fine State Machine Status">
|
|
|
+ <Enum name="OFF" start="0x1" description="OFF (L3). It corresponds to the powered-off, disconnected, and disabled state" />
|
|
|
+ <Enum name="ON" start="0x2" description="ON (L0). It corresponds to the Idle and Active states" />
|
|
|
+ <Enum name="SUSPEND" start="0x4" description="SUSPEND (L2)" />
|
|
|
+ <Enum name="SLEEP" start="0x8" description="SLEEP (L1)" />
|
|
|
+ <Enum name="DNRESUME" start="0x10" description="DNRESUME. Down Stream Resume." />
|
|
|
+ <Enum name="UPRESUME" start="0x20" description="UPRESUME. Up Stream Resume." />
|
|
|
+ <Enum name="RESET" start="0x40" description="RESET. USB lines Reset." />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00A" size="1" name="USB_HSOFC" access="Read/Write" description="HOST Host Start Of Frame Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="FLENC" description="Frame Length Control" />
|
|
|
+ <BitField start="7" size="1" name="FLENCE" description="Frame Length Control Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x014" size="2" name="USB_INTENCLR" access="Read/Write" description="HOST Host Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="HSOF" description="Host Start Of Frame Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="RST" description="BUS Reset Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="WAKEUP" description="Wake Up Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="DNRSM" description="DownStream to Device Interrupt Disable" />
|
|
|
+ <BitField start="6" size="1" name="UPRSM" description="Upstream Resume from Device Interrupt Disable" />
|
|
|
+ <BitField start="7" size="1" name="RAMACER" description="Ram Access Interrupt Disable" />
|
|
|
+ <BitField start="8" size="1" name="DCONN" description="Device Connection Interrupt Disable" />
|
|
|
+ <BitField start="9" size="1" name="DDISC" description="Device Disconnection Interrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x018" size="2" name="USB_INTENSET" access="Read/Write" description="HOST Host Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="HSOF" description="Host Start Of Frame Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="RST" description="Bus Reset Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="WAKEUP" description="Wake Up Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="DNRSM" description="DownStream to the Device Interrupt Enable" />
|
|
|
+ <BitField start="6" size="1" name="UPRSM" description="Upstream Resume fromthe device Interrupt Enable" />
|
|
|
+ <BitField start="7" size="1" name="RAMACER" description="Ram Access Interrupt Enable" />
|
|
|
+ <BitField start="8" size="1" name="DCONN" description="Link Power Management Interrupt Enable" />
|
|
|
+ <BitField start="9" size="1" name="DDISC" description="Device Disconnection Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x01C" size="2" name="USB_INTFLAG" access="Read/Write" description="HOST Host Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="1" name="HSOF" description="Host Start Of Frame" />
|
|
|
+ <BitField start="3" size="1" name="RST" description="Bus Reset" />
|
|
|
+ <BitField start="4" size="1" name="WAKEUP" description="Wake Up" />
|
|
|
+ <BitField start="5" size="1" name="DNRSM" description="Downstream" />
|
|
|
+ <BitField start="6" size="1" name="UPRSM" description="Upstream Resume from the Device" />
|
|
|
+ <BitField start="7" size="1" name="RAMACER" description="Ram Access" />
|
|
|
+ <BitField start="8" size="1" name="DCONN" description="Device Connection" />
|
|
|
+ <BitField start="9" size="1" name="DDISC" description="Device Disconnection" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x028" size="2" name="USB_PADCAL" access="Read/Write" description="USB PAD Calibration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="5" name="TRANSP" description="USB Pad Transp calibration" />
|
|
|
+ <BitField start="6" size="5" name="TRANSN" description="USB Pad Transn calibration" />
|
|
|
+ <BitField start="12" size="3" name="TRIM" description="USB Pad Trim calibration" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+0" size="1" name="USB_PCFG0" access="Read/Write" description="HOST End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="PTOKEN" description="Pipe Token" />
|
|
|
+ <BitField start="2" size="1" name="BK" description="Pipe Bank" />
|
|
|
+ <BitField start="3" size="3" name="PTYPE" description="Pipe Type" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+32" size="1" name="USB_PCFG1" access="Read/Write" description="HOST End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="PTOKEN" description="Pipe Token" />
|
|
|
+ <BitField start="2" size="1" name="BK" description="Pipe Bank" />
|
|
|
+ <BitField start="3" size="3" name="PTYPE" description="Pipe Type" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+64" size="1" name="USB_PCFG2" access="Read/Write" description="HOST End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="PTOKEN" description="Pipe Token" />
|
|
|
+ <BitField start="2" size="1" name="BK" description="Pipe Bank" />
|
|
|
+ <BitField start="3" size="3" name="PTYPE" description="Pipe Type" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+96" size="1" name="USB_PCFG3" access="Read/Write" description="HOST End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="PTOKEN" description="Pipe Token" />
|
|
|
+ <BitField start="2" size="1" name="BK" description="Pipe Bank" />
|
|
|
+ <BitField start="3" size="3" name="PTYPE" description="Pipe Type" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+128" size="1" name="USB_PCFG4" access="Read/Write" description="HOST End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="PTOKEN" description="Pipe Token" />
|
|
|
+ <BitField start="2" size="1" name="BK" description="Pipe Bank" />
|
|
|
+ <BitField start="3" size="3" name="PTYPE" description="Pipe Type" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+160" size="1" name="USB_PCFG5" access="Read/Write" description="HOST End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="PTOKEN" description="Pipe Token" />
|
|
|
+ <BitField start="2" size="1" name="BK" description="Pipe Bank" />
|
|
|
+ <BitField start="3" size="3" name="PTYPE" description="Pipe Type" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+192" size="1" name="USB_PCFG6" access="Read/Write" description="HOST End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="PTOKEN" description="Pipe Token" />
|
|
|
+ <BitField start="2" size="1" name="BK" description="Pipe Bank" />
|
|
|
+ <BitField start="3" size="3" name="PTYPE" description="Pipe Type" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x100+224" size="1" name="USB_PCFG7" access="Read/Write" description="HOST End Point Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="PTOKEN" description="Pipe Token" />
|
|
|
+ <BitField start="2" size="1" name="BK" description="Pipe Bank" />
|
|
|
+ <BitField start="3" size="3" name="PTYPE" description="Pipe Type" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+0" size="1" name="USB_PINTENCLR0" access="Read/Write" description="HOST Pipe Interrupt Flag Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Inetrrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+32" size="1" name="USB_PINTENCLR1" access="Read/Write" description="HOST Pipe Interrupt Flag Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Inetrrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+64" size="1" name="USB_PINTENCLR2" access="Read/Write" description="HOST Pipe Interrupt Flag Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Inetrrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+96" size="1" name="USB_PINTENCLR3" access="Read/Write" description="HOST Pipe Interrupt Flag Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Inetrrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+128" size="1" name="USB_PINTENCLR4" access="Read/Write" description="HOST Pipe Interrupt Flag Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Inetrrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+160" size="1" name="USB_PINTENCLR5" access="Read/Write" description="HOST Pipe Interrupt Flag Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Inetrrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+192" size="1" name="USB_PINTENCLR6" access="Read/Write" description="HOST Pipe Interrupt Flag Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Inetrrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x108+224" size="1" name="USB_PINTENCLR7" access="Read/Write" description="HOST Pipe Interrupt Flag Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Disable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Disable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Disable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Disable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Disable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Inetrrupt Disable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+0" size="1" name="USB_PINTENSET0" access="Read/Write" description="HOST Pipe Interrupt Flag Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+32" size="1" name="USB_PINTENSET1" access="Read/Write" description="HOST Pipe Interrupt Flag Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+64" size="1" name="USB_PINTENSET2" access="Read/Write" description="HOST Pipe Interrupt Flag Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+96" size="1" name="USB_PINTENSET3" access="Read/Write" description="HOST Pipe Interrupt Flag Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+128" size="1" name="USB_PINTENSET4" access="Read/Write" description="HOST Pipe Interrupt Flag Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+160" size="1" name="USB_PINTENSET5" access="Read/Write" description="HOST Pipe Interrupt Flag Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+192" size="1" name="USB_PINTENSET6" access="Read/Write" description="HOST Pipe Interrupt Flag Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x109+224" size="1" name="USB_PINTENSET7" access="Read/Write" description="HOST Pipe Interrupt Flag Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Enable" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Enable" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Enable" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Enable" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Enable" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+0" size="1" name="USB_PINTFLAG0" access="Read/Write" description="HOST Pipe Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Flag" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Flag" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Flag" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Flag" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Flag" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Flag" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+32" size="1" name="USB_PINTFLAG1" access="Read/Write" description="HOST Pipe Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Flag" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Flag" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Flag" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Flag" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Flag" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Flag" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+64" size="1" name="USB_PINTFLAG2" access="Read/Write" description="HOST Pipe Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Flag" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Flag" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Flag" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Flag" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Flag" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Flag" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+96" size="1" name="USB_PINTFLAG3" access="Read/Write" description="HOST Pipe Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Flag" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Flag" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Flag" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Flag" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Flag" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Flag" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+128" size="1" name="USB_PINTFLAG4" access="Read/Write" description="HOST Pipe Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Flag" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Flag" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Flag" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Flag" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Flag" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Flag" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+160" size="1" name="USB_PINTFLAG5" access="Read/Write" description="HOST Pipe Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Flag" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Flag" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Flag" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Flag" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Flag" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Flag" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+192" size="1" name="USB_PINTFLAG6" access="Read/Write" description="HOST Pipe Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Flag" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Flag" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Flag" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Flag" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Flag" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Flag" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x107+224" size="1" name="USB_PINTFLAG7" access="Read/Write" description="HOST Pipe Interrupt Flag" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="TRCPT0" description="Transfer Complete 0 Interrupt Flag" />
|
|
|
+ <BitField start="1" size="1" name="TRCPT1" description="Transfer Complete 1 Interrupt Flag" />
|
|
|
+ <BitField start="2" size="1" name="TRFAIL" description="Error Flow Interrupt Flag" />
|
|
|
+ <BitField start="3" size="1" name="PERR" description="Pipe Error Interrupt Flag" />
|
|
|
+ <BitField start="4" size="1" name="TXSTP" description="Transmit Setup Interrupt Flag" />
|
|
|
+ <BitField start="5" size="1" name="STALL" description="Stall Interrupt Flag" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x020" size="2" name="USB_PINTSMRY" access="ReadOnly" description="HOST Pipe Interrupt Summary" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EPINT0" description="Pipe 0 Interrupt" />
|
|
|
+ <BitField start="1" size="1" name="EPINT1" description="Pipe 1 Interrupt" />
|
|
|
+ <BitField start="2" size="1" name="EPINT2" description="Pipe 2 Interrupt" />
|
|
|
+ <BitField start="3" size="1" name="EPINT3" description="Pipe 3 Interrupt" />
|
|
|
+ <BitField start="4" size="1" name="EPINT4" description="Pipe 4 Interrupt" />
|
|
|
+ <BitField start="5" size="1" name="EPINT5" description="Pipe 5 Interrupt" />
|
|
|
+ <BitField start="6" size="1" name="EPINT6" description="Pipe 6 Interrupt" />
|
|
|
+ <BitField start="7" size="1" name="EPINT7" description="Pipe 7 Interrupt" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+0" size="1" name="USB_PSTATUS0" access="ReadOnly" description="HOST End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+32" size="1" name="USB_PSTATUS1" access="ReadOnly" description="HOST End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+64" size="1" name="USB_PSTATUS2" access="ReadOnly" description="HOST End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+96" size="1" name="USB_PSTATUS3" access="ReadOnly" description="HOST End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+128" size="1" name="USB_PSTATUS4" access="ReadOnly" description="HOST End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+160" size="1" name="USB_PSTATUS5" access="ReadOnly" description="HOST End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+192" size="1" name="USB_PSTATUS6" access="ReadOnly" description="HOST End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x106+224" size="1" name="USB_PSTATUS7" access="ReadOnly" description="HOST End Point Pipe Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 ready" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 ready" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+0" size="1" name="USB_PSTATUSCLR0" access="WriteOnly" description="HOST End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank clear" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+32" size="1" name="USB_PSTATUSCLR1" access="WriteOnly" description="HOST End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank clear" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+64" size="1" name="USB_PSTATUSCLR2" access="WriteOnly" description="HOST End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank clear" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+96" size="1" name="USB_PSTATUSCLR3" access="WriteOnly" description="HOST End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank clear" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+128" size="1" name="USB_PSTATUSCLR4" access="WriteOnly" description="HOST End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank clear" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+160" size="1" name="USB_PSTATUSCLR5" access="WriteOnly" description="HOST End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank clear" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+192" size="1" name="USB_PSTATUSCLR6" access="WriteOnly" description="HOST End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank clear" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x104+224" size="1" name="USB_PSTATUSCLR7" access="WriteOnly" description="HOST End Point Pipe Status Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle clear" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Curren Bank clear" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Clear" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Clear" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Clear" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+0" size="1" name="USB_PSTATUSSET0" access="WriteOnly" description="HOST End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+32" size="1" name="USB_PSTATUSSET1" access="WriteOnly" description="HOST End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+64" size="1" name="USB_PSTATUSSET2" access="WriteOnly" description="HOST End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+96" size="1" name="USB_PSTATUSSET3" access="WriteOnly" description="HOST End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+128" size="1" name="USB_PSTATUSSET4" access="WriteOnly" description="HOST End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+160" size="1" name="USB_PSTATUSSET5" access="WriteOnly" description="HOST End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+192" size="1" name="USB_PSTATUSSET6" access="WriteOnly" description="HOST End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x105+224" size="1" name="USB_PSTATUSSET7" access="WriteOnly" description="HOST End Point Pipe Status Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="DTGL" description="Data Toggle Set" />
|
|
|
+ <BitField start="2" size="1" name="CURBK" description="Current Bank Set" />
|
|
|
+ <BitField start="4" size="1" name="PFREEZE" description="Pipe Freeze Set" />
|
|
|
+ <BitField start="6" size="1" name="BK0RDY" description="Bank 0 Ready Set" />
|
|
|
+ <BitField start="7" size="1" name="BK1RDY" description="Bank 1 Ready Set" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x003" size="1" name="USB_QOSCTRL" access="Read/Write" description="USB Quality Of Service" reset_value="0x05" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="2" name="CQOS" description="Configuration Quality of Service">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Background (no sensitive operation)" />
|
|
|
+ <Enum name="LOW" start="0x1" description="Sensitive Bandwidth" />
|
|
|
+ <Enum name="MEDIUM" start="0x2" description="Sensitive Latency" />
|
|
|
+ <Enum name="HIGH" start="0x3" description="Critical Latency" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="2" size="2" name="DQOS" description="Data Quality of Service">
|
|
|
+ <Enum name="DISABLE" start="0x0" description="Background (no sensitive operation)" />
|
|
|
+ <Enum name="LOW" start="0x1" description="Sensitive Bandwidth" />
|
|
|
+ <Enum name="MEDIUM" start="0x2" description="Sensitive Latency" />
|
|
|
+ <Enum name="HIGH" start="0x3" description="Critical Latency" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x00C" size="1" name="USB_STATUS" access="Read/Write" description="HOST Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="2" size="2" name="SPEED" description="Speed Status" />
|
|
|
+ <BitField start="6" size="2" name="LINESTATE" description="USB Line State Status" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x002" size="1" name="USB_SYNCBUSY" access="ReadOnly" description="Synchronization Busy" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="SWRST" description="Software Reset Synchronization Busy" />
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="WDT" start="0x40001000" description="Watchdog Timer">
|
|
|
+ <Register start="+0x8" size="1" name="WDT_CLEAR" access="WriteOnly" description="Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="8" name="CLEAR" description="Watchdog Clear">
|
|
|
+ <Enum name="KEY" start="0xa5" description="Clear Key" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x1" size="1" name="WDT_CONFIG" access="Read/Write" description="Configuration" reset_value="0xBB" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="PER" description="Time-Out Period">
|
|
|
+ <Enum name="8" start="0x0" description="8 clock cycles" />
|
|
|
+ <Enum name="16" start="0x1" description="16 clock cycles" />
|
|
|
+ <Enum name="32" start="0x2" description="32 clock cycles" />
|
|
|
+ <Enum name="64" start="0x3" description="64 clock cycles" />
|
|
|
+ <Enum name="128" start="0x4" description="128 clock cycles" />
|
|
|
+ <Enum name="256" start="0x5" description="256 clock cycles" />
|
|
|
+ <Enum name="512" start="0x6" description="512 clock cycles" />
|
|
|
+ <Enum name="1K" start="0x7" description="1024 clock cycles" />
|
|
|
+ <Enum name="2K" start="0x8" description="2048 clock cycles" />
|
|
|
+ <Enum name="4K" start="0x9" description="4096 clock cycles" />
|
|
|
+ <Enum name="8K" start="0xa" description="8192 clock cycles" />
|
|
|
+ <Enum name="16K" start="0xb" description="16384 clock cycles" />
|
|
|
+ </BitField>
|
|
|
+ <BitField start="4" size="4" name="WINDOW" description="Window Mode Time-Out Period">
|
|
|
+ <Enum name="8" start="0x0" description="8 clock cycles" />
|
|
|
+ <Enum name="16" start="0x1" description="16 clock cycles" />
|
|
|
+ <Enum name="32" start="0x2" description="32 clock cycles" />
|
|
|
+ <Enum name="64" start="0x3" description="64 clock cycles" />
|
|
|
+ <Enum name="128" start="0x4" description="128 clock cycles" />
|
|
|
+ <Enum name="256" start="0x5" description="256 clock cycles" />
|
|
|
+ <Enum name="512" start="0x6" description="512 clock cycles" />
|
|
|
+ <Enum name="1K" start="0x7" description="1024 clock cycles" />
|
|
|
+ <Enum name="2K" start="0x8" description="2048 clock cycles" />
|
|
|
+ <Enum name="4K" start="0x9" description="4096 clock cycles" />
|
|
|
+ <Enum name="8K" start="0xa" description="8192 clock cycles" />
|
|
|
+ <Enum name="16K" start="0xb" description="16384 clock cycles" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x0" size="1" name="WDT_CTRL" access="Read/Write" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="1" size="1" name="ENABLE" description="Enable" />
|
|
|
+ <BitField start="2" size="1" name="WEN" description="Watchdog Timer Window Mode Enable" />
|
|
|
+ <BitField start="7" size="1" name="ALWAYSON" description="Always-On" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x2" size="1" name="WDT_EWCTRL" access="Read/Write" description="Early Warning Interrupt Control" reset_value="0x0B" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="4" name="EWOFFSET" description="Early Warning Interrupt Time Offset">
|
|
|
+ <Enum name="8" start="0x0" description="8 clock cycles" />
|
|
|
+ <Enum name="16" start="0x1" description="16 clock cycles" />
|
|
|
+ <Enum name="32" start="0x2" description="32 clock cycles" />
|
|
|
+ <Enum name="64" start="0x3" description="64 clock cycles" />
|
|
|
+ <Enum name="128" start="0x4" description="128 clock cycles" />
|
|
|
+ <Enum name="256" start="0x5" description="256 clock cycles" />
|
|
|
+ <Enum name="512" start="0x6" description="512 clock cycles" />
|
|
|
+ <Enum name="1K" start="0x7" description="1024 clock cycles" />
|
|
|
+ <Enum name="2K" start="0x8" description="2048 clock cycles" />
|
|
|
+ <Enum name="4K" start="0x9" description="4096 clock cycles" />
|
|
|
+ <Enum name="8K" start="0xa" description="8192 clock cycles" />
|
|
|
+ <Enum name="16K" start="0xb" description="16384 clock cycles" />
|
|
|
+ </BitField>
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x4" size="1" name="WDT_INTENCLR" access="Read/Write" description="Interrupt Enable Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EW" description="Early Warning Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x5" size="1" name="WDT_INTENSET" access="Read/Write" description="Interrupt Enable Set" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EW" description="Early Warning Interrupt Enable" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x6" size="1" name="WDT_INTFLAG" access="Read/Write" description="Interrupt Flag Status and Clear" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="0" size="1" name="EW" description="Early Warning" />
|
|
|
+ </Register>
|
|
|
+ <Register start="+0x7" size="1" name="WDT_STATUS" access="ReadOnly" description="Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
|
+ <BitField start="7" size="1" name="SYNCBUSY" description="Synchronization Busy" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="NVIC" start="0xE000E100" description="Nested Vectored Interrupt Controller">
|
|
|
+ <Register name="NVIC_ISER0" description="Interrupt Set-Enable Register 0" start="0xE000E100">
|
|
|
+ <BitField name="PM" start="0" size="1" />
|
|
|
+ <BitField name="SYSCTRL" start="1" size="1" />
|
|
|
+ <BitField name="WDT" start="2" size="1" />
|
|
|
+ <BitField name="RTC" start="3" size="1" />
|
|
|
+ <BitField name="EIC" start="4" size="1" />
|
|
|
+ <BitField name="NVMCTRL" start="5" size="1" />
|
|
|
+ <BitField name="DMAC" start="6" size="1" />
|
|
|
+ <BitField name="USB" start="7" size="1" />
|
|
|
+ <BitField name="EVSYS" start="8" size="1" />
|
|
|
+ <BitField name="SERCOM0" start="9" size="1" />
|
|
|
+ <BitField name="SERCOM1" start="10" size="1" />
|
|
|
+ <BitField name="SERCOM2" start="11" size="1" />
|
|
|
+ <BitField name="SERCOM3" start="12" size="1" />
|
|
|
+ <BitField name="SERCOM4" start="13" size="1" />
|
|
|
+ <BitField name="SERCOM5" start="14" size="1" />
|
|
|
+ <BitField name="TCC0" start="15" size="1" />
|
|
|
+ <BitField name="TCC1" start="16" size="1" />
|
|
|
+ <BitField name="TCC2" start="17" size="1" />
|
|
|
+ <BitField name="TC3" start="18" size="1" />
|
|
|
+ <BitField name="TC4" start="19" size="1" />
|
|
|
+ <BitField name="TC5" start="20" size="1" />
|
|
|
+ <BitField name="ADC" start="23" size="1" />
|
|
|
+ <BitField name="AC" start="24" size="1" />
|
|
|
+ <BitField name="DAC" start="25" size="1" />
|
|
|
+ <BitField name="I2S" start="27" size="1" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_ICER0" description="Interrupt Clear-Enable Register 0" start="0xE000E180">
|
|
|
+ <BitField name="PM" start="0" size="1" />
|
|
|
+ <BitField name="SYSCTRL" start="1" size="1" />
|
|
|
+ <BitField name="WDT" start="2" size="1" />
|
|
|
+ <BitField name="RTC" start="3" size="1" />
|
|
|
+ <BitField name="EIC" start="4" size="1" />
|
|
|
+ <BitField name="NVMCTRL" start="5" size="1" />
|
|
|
+ <BitField name="DMAC" start="6" size="1" />
|
|
|
+ <BitField name="USB" start="7" size="1" />
|
|
|
+ <BitField name="EVSYS" start="8" size="1" />
|
|
|
+ <BitField name="SERCOM0" start="9" size="1" />
|
|
|
+ <BitField name="SERCOM1" start="10" size="1" />
|
|
|
+ <BitField name="SERCOM2" start="11" size="1" />
|
|
|
+ <BitField name="SERCOM3" start="12" size="1" />
|
|
|
+ <BitField name="SERCOM4" start="13" size="1" />
|
|
|
+ <BitField name="SERCOM5" start="14" size="1" />
|
|
|
+ <BitField name="TCC0" start="15" size="1" />
|
|
|
+ <BitField name="TCC1" start="16" size="1" />
|
|
|
+ <BitField name="TCC2" start="17" size="1" />
|
|
|
+ <BitField name="TC3" start="18" size="1" />
|
|
|
+ <BitField name="TC4" start="19" size="1" />
|
|
|
+ <BitField name="TC5" start="20" size="1" />
|
|
|
+ <BitField name="ADC" start="23" size="1" />
|
|
|
+ <BitField name="AC" start="24" size="1" />
|
|
|
+ <BitField name="DAC" start="25" size="1" />
|
|
|
+ <BitField name="I2S" start="27" size="1" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_ISPR0" description="Interrupt Set-Pending Register 0" start="0xE000E200">
|
|
|
+ <BitField name="PM" start="0" size="1" />
|
|
|
+ <BitField name="SYSCTRL" start="1" size="1" />
|
|
|
+ <BitField name="WDT" start="2" size="1" />
|
|
|
+ <BitField name="RTC" start="3" size="1" />
|
|
|
+ <BitField name="EIC" start="4" size="1" />
|
|
|
+ <BitField name="NVMCTRL" start="5" size="1" />
|
|
|
+ <BitField name="DMAC" start="6" size="1" />
|
|
|
+ <BitField name="USB" start="7" size="1" />
|
|
|
+ <BitField name="EVSYS" start="8" size="1" />
|
|
|
+ <BitField name="SERCOM0" start="9" size="1" />
|
|
|
+ <BitField name="SERCOM1" start="10" size="1" />
|
|
|
+ <BitField name="SERCOM2" start="11" size="1" />
|
|
|
+ <BitField name="SERCOM3" start="12" size="1" />
|
|
|
+ <BitField name="SERCOM4" start="13" size="1" />
|
|
|
+ <BitField name="SERCOM5" start="14" size="1" />
|
|
|
+ <BitField name="TCC0" start="15" size="1" />
|
|
|
+ <BitField name="TCC1" start="16" size="1" />
|
|
|
+ <BitField name="TCC2" start="17" size="1" />
|
|
|
+ <BitField name="TC3" start="18" size="1" />
|
|
|
+ <BitField name="TC4" start="19" size="1" />
|
|
|
+ <BitField name="TC5" start="20" size="1" />
|
|
|
+ <BitField name="ADC" start="23" size="1" />
|
|
|
+ <BitField name="AC" start="24" size="1" />
|
|
|
+ <BitField name="DAC" start="25" size="1" />
|
|
|
+ <BitField name="I2S" start="27" size="1" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_ICPR0" description="Interrupt Clear-Pending Register 0" start="0xE000E280">
|
|
|
+ <BitField name="PM" start="0" size="1" />
|
|
|
+ <BitField name="SYSCTRL" start="1" size="1" />
|
|
|
+ <BitField name="WDT" start="2" size="1" />
|
|
|
+ <BitField name="RTC" start="3" size="1" />
|
|
|
+ <BitField name="EIC" start="4" size="1" />
|
|
|
+ <BitField name="NVMCTRL" start="5" size="1" />
|
|
|
+ <BitField name="DMAC" start="6" size="1" />
|
|
|
+ <BitField name="USB" start="7" size="1" />
|
|
|
+ <BitField name="EVSYS" start="8" size="1" />
|
|
|
+ <BitField name="SERCOM0" start="9" size="1" />
|
|
|
+ <BitField name="SERCOM1" start="10" size="1" />
|
|
|
+ <BitField name="SERCOM2" start="11" size="1" />
|
|
|
+ <BitField name="SERCOM3" start="12" size="1" />
|
|
|
+ <BitField name="SERCOM4" start="13" size="1" />
|
|
|
+ <BitField name="SERCOM5" start="14" size="1" />
|
|
|
+ <BitField name="TCC0" start="15" size="1" />
|
|
|
+ <BitField name="TCC1" start="16" size="1" />
|
|
|
+ <BitField name="TCC2" start="17" size="1" />
|
|
|
+ <BitField name="TC3" start="18" size="1" />
|
|
|
+ <BitField name="TC4" start="19" size="1" />
|
|
|
+ <BitField name="TC5" start="20" size="1" />
|
|
|
+ <BitField name="ADC" start="23" size="1" />
|
|
|
+ <BitField name="AC" start="24" size="1" />
|
|
|
+ <BitField name="DAC" start="25" size="1" />
|
|
|
+ <BitField name="I2S" start="27" size="1" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_IABR0" description="Interrupt Active Bit Register 0" start="0xE000E300" access="ReadOnly">
|
|
|
+ <BitField name="PM" start="0" size="1" />
|
|
|
+ <BitField name="SYSCTRL" start="1" size="1" />
|
|
|
+ <BitField name="WDT" start="2" size="1" />
|
|
|
+ <BitField name="RTC" start="3" size="1" />
|
|
|
+ <BitField name="EIC" start="4" size="1" />
|
|
|
+ <BitField name="NVMCTRL" start="5" size="1" />
|
|
|
+ <BitField name="DMAC" start="6" size="1" />
|
|
|
+ <BitField name="USB" start="7" size="1" />
|
|
|
+ <BitField name="EVSYS" start="8" size="1" />
|
|
|
+ <BitField name="SERCOM0" start="9" size="1" />
|
|
|
+ <BitField name="SERCOM1" start="10" size="1" />
|
|
|
+ <BitField name="SERCOM2" start="11" size="1" />
|
|
|
+ <BitField name="SERCOM3" start="12" size="1" />
|
|
|
+ <BitField name="SERCOM4" start="13" size="1" />
|
|
|
+ <BitField name="SERCOM5" start="14" size="1" />
|
|
|
+ <BitField name="TCC0" start="15" size="1" />
|
|
|
+ <BitField name="TCC1" start="16" size="1" />
|
|
|
+ <BitField name="TCC2" start="17" size="1" />
|
|
|
+ <BitField name="TC3" start="18" size="1" />
|
|
|
+ <BitField name="TC4" start="19" size="1" />
|
|
|
+ <BitField name="TC5" start="20" size="1" />
|
|
|
+ <BitField name="ADC" start="23" size="1" />
|
|
|
+ <BitField name="AC" start="24" size="1" />
|
|
|
+ <BitField name="DAC" start="25" size="1" />
|
|
|
+ <BitField name="I2S" start="27" size="1" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_IPR0" description="Interrupt Priority Register 0" start="0xE000E400">
|
|
|
+ <BitField name="PM" start="6" size="2" />
|
|
|
+ <BitField name="SYSCTRL" start="14" size="2" />
|
|
|
+ <BitField name="WDT" start="22" size="2" />
|
|
|
+ <BitField name="RTC" start="30" size="2" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_IPR1" description="Interrupt Priority Register 1" start="0xE000E404">
|
|
|
+ <BitField name="EIC" start="6" size="2" />
|
|
|
+ <BitField name="NVMCTRL" start="14" size="2" />
|
|
|
+ <BitField name="DMAC" start="22" size="2" />
|
|
|
+ <BitField name="USB" start="30" size="2" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_IPR2" description="Interrupt Priority Register 2" start="0xE000E408">
|
|
|
+ <BitField name="EVSYS" start="6" size="2" />
|
|
|
+ <BitField name="SERCOM0" start="14" size="2" />
|
|
|
+ <BitField name="SERCOM1" start="22" size="2" />
|
|
|
+ <BitField name="SERCOM2" start="30" size="2" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_IPR3" description="Interrupt Priority Register 3" start="0xE000E40C">
|
|
|
+ <BitField name="SERCOM3" start="6" size="2" />
|
|
|
+ <BitField name="SERCOM4" start="14" size="2" />
|
|
|
+ <BitField name="SERCOM5" start="22" size="2" />
|
|
|
+ <BitField name="TCC0" start="30" size="2" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_IPR4" description="Interrupt Priority Register 4" start="0xE000E410">
|
|
|
+ <BitField name="TCC1" start="6" size="2" />
|
|
|
+ <BitField name="TCC2" start="14" size="2" />
|
|
|
+ <BitField name="TC3" start="22" size="2" />
|
|
|
+ <BitField name="TC4" start="30" size="2" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_IPR5" description="Interrupt Priority Register 5" start="0xE000E414">
|
|
|
+ <BitField name="TC5" start="6" size="2" />
|
|
|
+ <BitField name="ADC" start="30" size="2" />
|
|
|
+ </Register>
|
|
|
+ <Register name="NVIC_IPR6" description="Interrupt Priority Register 6" start="0xE000E418">
|
|
|
+ <BitField name="AC" start="6" size="2" />
|
|
|
+ <BitField name="DAC" start="14" size="2" />
|
|
|
+ <BitField name="I2S" start="30" size="2" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SysTick" start="0xE000E010" description="24-bit System Timer">
|
|
|
+ <Register name="SYST_CSR" start="0xE000E010" description="SysTick Control and Status Register">
|
|
|
+ <BitField name="COUNTFLAG" start="16" size="1" description="Counter Flag" />
|
|
|
+ <BitField name="CLKSOURCE" start="2" size="1" description="Timer Clock Source" />
|
|
|
+ <BitField name="TICKINT" start="1" size="1" description="Tick Interrupt Enable" />
|
|
|
+ <BitField name="ENABLE" start="0" size="1" description="Enable SysTick Timer" />
|
|
|
+ </Register>
|
|
|
+ <Register name="SYST_RVR" start="0xE000E014" description="SysTick Reload Value Register">
|
|
|
+ <BitField name="RELOAD" start="0" size="24" description="Value to load into the SYST_CVR when the counter is enabled and when it reaches 0" />
|
|
|
+ </Register>
|
|
|
+ <Register name="SYST_CVR" start="0xE000E018" description="SysTick Current Value Register Register">
|
|
|
+ <BitField name="CURRENT" start="0" size="24" description="The current value of the SysTick counter" />
|
|
|
+ </Register>
|
|
|
+ <Register name="SYST_CALIB" start="0xE000E01C" access="ReadOnly" description="SysTick Calibration Value Register">
|
|
|
+ <BitField name="NOREF" start="31" size="1" description="Indicates whether the device provides a reference clock to the processor" />
|
|
|
+ <BitField name="SKEW" start="30" size="1" description="Indicates whether the TENMS value is exact" />
|
|
|
+ <BitField name="TENMS" start="0" size="24" description="Reload value for 10ms (100Hz) timing, subject to system clock skew errors" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+ <RegisterGroup name="SCB" start="" description="System Control Block">
|
|
|
+ <Register name="CPUID" start="0xE000ED00" access="ReadOnly" description="CPUID Register">
|
|
|
+ <BitField name="IMPLEMENTER" start="24" size="8" description="Implementer Code" />
|
|
|
+ <BitField name="VARIANT" start="20" size="4" description="Variant Number" />
|
|
|
+ <BitField name="PARTNO" start="4" size="12" description="Part Number" />
|
|
|
+ <BitField name="REVISION" start="0" size="4" description="Revision Number" />
|
|
|
+ </Register>
|
|
|
+ <Register name="ICSR" start="0xE000ED04" description="Interrupt Control and State Register">
|
|
|
+ <BitField name="NMIPENDSET" start="31" size="1" description="NMI set-pending bit" />
|
|
|
+ <BitField name="PENDSVSET" start="28" size="1" description="PendSV set-pending bit" />
|
|
|
+ <BitField name="PENDSVCLR" start="27" size="1" description="PendSV clear-pending bit" />
|
|
|
+ <BitField name="PENDSTSET" start="26" size="1" description="SysTick exception set-pending bit" />
|
|
|
+ <BitField name="PENDSTCLR" start="25" size="1" description="SysTick exception clear-pending bit" />
|
|
|
+ <BitField name="ISRPREEMPT" start="23" size="1" description="" />
|
|
|
+ <BitField name="ISRPENDING" start="22" size="1" description="Interrupt pending flag" />
|
|
|
+ <BitField name="VECTPENDING" start="12" size="9" description="Indicates the exception number of the highest priority pending enabled exception" />
|
|
|
+ <BitField name="VECTACTIVE" start="0" size="9" description="Contains the active exception number" />
|
|
|
+ </Register>
|
|
|
+ <Register name="AIRCR" start="0xE000ED0C" description="Application Interrupt and Reset Control Register">
|
|
|
+ <BitField name="VECTKEY" start="16" size="16" description="Register key" />
|
|
|
+ <BitField name="ENDIANESS" start="15" size="1" description="Data endianness bit" />
|
|
|
+ <BitField name="SYSRESETREQ" start="2" size="1" description="System reset request bit" />
|
|
|
+ <BitField name="VECTCLRACTIVE" start="1" size="1" description="" />
|
|
|
+ </Register>
|
|
|
+ <Register name="SCR" start="0xE000ED10" description="System Control Register">
|
|
|
+ <BitField name="SEVONPEND" start="4" size="1" description="Send event on pending bit" />
|
|
|
+ <BitField name="SLEEPDEEP" start="2" size="1" description="Controls whether the processor uses sleep or deep sleep as its low power mode" />
|
|
|
+ <BitField name="SLEEPONEXIT" start="1" size="1" description="Indicates sleep-on-exit when returning from Handler mode to Thread mode" />
|
|
|
+ </Register>
|
|
|
+ <Register name="CCR" start="0xE000ED14" access="ReadOnly" description="Configuration and Control Register">
|
|
|
+ <BitField name="STKALIGN" start="9" size="1" description="Indicates stack alignment on exception entry" />
|
|
|
+ <BitField name="UNALIGN_TRP" start="3" size="1" description="Enables unaligned access traps" />
|
|
|
+ </Register>
|
|
|
+ <Register name="SHPR2" start="0xE000ED1C" description="System Handler Priority Register 2">
|
|
|
+ <BitField name="PRI_11" start="30" size="2" description="Priority of system handler 11 (SVCall)" />
|
|
|
+ </Register>
|
|
|
+ <Register name="SHPR3" start="0xE000ED20" description="System Handler Priority Register 3">
|
|
|
+ <BitField name="PRI_15" start="30" size="2" description="Priority of system handler 15 (SysTick)" />
|
|
|
+ <BitField name="PRI_14" start="22" size="2" description="Priority of system handler 14 (PendSV)" />
|
|
|
+ </Register>
|
|
|
+ <Register name="SHCSR" start="0xE000ED24" description="System Handler Control and State Register">
|
|
|
+ <BitField name="SVCALLPENDED" start="15" size="1" description="SVCall Pending Bit" />
|
|
|
+ </Register>
|
|
|
+ <Register name="DFSR" start="0xE000ED30" description="Debug Fault Status Register">
|
|
|
+ <BitField name="EXTERNAL" start="4" size="1" description="" />
|
|
|
+ <BitField name="VCATCH" start="3" size="1" description="" />
|
|
|
+ <BitField name="DWTTRAP" start="2" size="1" description="" />
|
|
|
+ <BitField name="BKPT" start="1" size="1" description="" />
|
|
|
+ <BitField name="HALTED" start="0" size="1" description="" />
|
|
|
+ </Register>
|
|
|
+ </RegisterGroup>
|
|
|
+</Processor>
|
hathach