board_test work with lpcxpresso55s69

examples/make.mk

@@ -21,11 +21,17 @@ __check_defined = \
     $(if $(value $1),, \
     $(error Undefined make flag: $1$(if $2, ($2))))
 
+
+define newline
+
+
+endef
+
 # Select the board to build for.
 ifeq ($(BOARD),)
   $(info You must provide a BOARD parameter with 'BOARD=')
-  $(info Possible values are:)
-  $(info $(sort $(subst /.,,$(subst $(TOP)/hw/bsp/,,$(wildcard $(TOP)/hw/bsp/*/.)))))
+  $(info Supported boards are:)
+  $(info $(sort $(subst /.,,$(subst $(TOP)/hw/bsp/, $(newline)-,$(wildcard $(TOP)/hw/bsp/*/.)))))
   $(error BOARD not defined)
 else
   ifeq ($(wildcard $(TOP)/hw/bsp/$(BOARD)/.),)

hw/bsp/lpcxpresso11u68/board.mk

@@ -5,8 +5,8 @@ CFLAGS += \
   -nostdlib \
   -DCORE_M0PLUS \
   -D__VTOR_PRESENT=0 \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
   -D__USE_LPCOPEN \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
 

hw/bsp/lpcxpresso1347/board.mk

@@ -4,8 +4,8 @@ CFLAGS += \
   -mcpu=cortex-m3 \
   -nostdlib \
   -DCORE_M3 \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
   -D__USE_LPCOPEN \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
 

hw/bsp/lpcxpresso1769/board.mk

@@ -4,8 +4,8 @@ CFLAGS += \
   -mcpu=cortex-m3 \
   -nostdlib \
   -DCORE_M3 \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \
   -D__USE_LPCOPEN \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \
   -DRTC_EV_SUPPORT=0
 
 # All source paths should be relative to the top level.

hw/bsp/lpcxpresso51u68/board.mk

@@ -2,11 +2,14 @@ CFLAGS += \
   -mthumb \
   -mabi=aapcs \
   -mcpu=cortex-m0plus \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \
   -DCPU_LPC51U68JBD64 \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
 
+# system_LPC51U68.c cause following errors
+CFLAGS += -Wno-error=nested-externs
+
 MCU_DIR = hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68
 
 # All source paths should be relative to the top level.
@@ -20,7 +23,7 @@ SRC_C += \
 	$(MCU_DIR)/drivers/fsl_reset.c
 
 INC += \
-	$(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/CMSIS/Include \
+	$(TOP)/$(MCU_DIR)/../CMSIS/Include \
 	$(TOP)/$(MCU_DIR) \
 	$(TOP)/$(MCU_DIR)/drivers
 

hw/bsp/lpcxpresso54114/board.mk

@@ -4,8 +4,8 @@ CFLAGS += \
   -mcpu=cortex-m4 \
   -mfloat-abi=hard \
   -mfpu=fpv4-sp-d16 \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \
   -DCPU_LPC54114J256BD64_cm4 \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
 
@@ -22,7 +22,7 @@ SRC_C += \
 	$(MCU_DIR)/drivers/fsl_reset.c
 
 INC += \
-	$(TOP)/hw/mcu/nxp/lpc_driver/lpc54xxx/CMSIS/Include \
+	$(TOP)/$(MCU_DIR)/../CMSIS/Include \
 	$(TOP)/$(MCU_DIR) \
 	$(TOP)/$(MCU_DIR)/drivers
 

hw/bsp/lpcxpresso55s69/board.mk

@@ -0,0 +1,49 @@
+CFLAGS += \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m33 \
+  -mfloat-abi=hard \
+  -mfpu=fpv5-sp-d16 \
+  -DCPU_LPC55S69JBD100_cm33_core0 \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC55XX \
+  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
+
+# system_LPC55S69_cm33_core0.c cause following errors
+CFLAGS += -Wno-error=float-equal -Wno-error=nested-externs
+
+MCU_DIR = hw/mcu/nxp/lpc_driver/lpc55xx/devices/LPC55S69
+
+# All source paths should be relative to the top level.
+LD_FILE = $(MCU_DIR)/gcc/LPC55S69_cm33_core0_flash.ld
+
+SRC_C += \
+	$(MCU_DIR)/system_LPC55S69_cm33_core0.c \
+	$(MCU_DIR)/drivers/fsl_clock.c \
+	$(MCU_DIR)/drivers/fsl_gpio.c \
+	$(MCU_DIR)/drivers/fsl_power.c \
+	$(MCU_DIR)/drivers/fsl_reset.c
+
+INC += \
+	$(TOP)/$(MCU_DIR)/../CMSIS/Include \
+	$(TOP)/$(MCU_DIR) \
+	$(TOP)/$(MCU_DIR)/drivers
+
+SRC_S += $(MCU_DIR)/gcc/startup_LPC55S69_cm33_core0.S
+
+LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a
+
+# For TinyUSB port source
+VENDOR = nxp
+CHIP_FAMILY = lpc_ip3511
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM33
+
+# For flash-jlink target
+JLINK_DEVICE = LPC55S69
+JLINK_IF = swd
+
+# flash using pyocd
+flash: $(BUILD)/$(BOARD)-firmware.hex
+	pyocd flash -t LPC55S69 $<

hw/bsp/lpcxpresso55s69/lpcxpresso55s69.c

@@ -0,0 +1,186 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018, hathach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "../board.h"
+#include "fsl_device_registers.h"
+#include "fsl_gpio.h"
+#include "fsl_power.h"
+#include "fsl_iocon.h"
+
+#define LED_PORT              1
+#define LED_PIN               6
+#define LED_STATE_ON          0
+
+// WAKE button
+#define BUTTON_PORT           1
+#define BUTTON_PIN            18
+#define BUTTON_STATE_ACTIVE   0
+
+// IOCON pin mux
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/****************************************************************
+name: BOARD_BootClockFROHF96M
+outputs:
+- {id: SYSTICK_clock.outFreq, value: 96 MHz}
+- {id: System_clock.outFreq, value: 96 MHz}
+settings:
+- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
+sources:
+- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
+******************************************************************/
+void BootClockFROHF96M(void)
+{
+  /*!< Set up the clock sources */
+  /*!< Set up FRO */
+  POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on  */
+  CLOCK_SetupFROClocking(12000000U);     /*!< Set up FRO to the 12 MHz, just for sure */
+  CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
+                                             accidentally being below the voltage for current speed */
+
+  CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
+
+  POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+  CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
+
+  /*!< Set up dividers */
+  CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);     /*!< Set AHBCLKDIV divider to value 1 */
+
+  /*!< Set up clock selectors - Attach clocks to the peripheries */
+  CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
+
+  /*!< Set SystemCoreClock variable. */
+  SystemCoreClock = 96000000U;
+}
+
+void board_init(void)
+{
+  // Enable IOCON clock
+  CLOCK_EnableClock(kCLOCK_Iocon);
+
+  // Init 96 MHz clock
+  BootClockFROHF96M();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#endif
+
+  GPIO_PortInit(GPIO, LED_PORT);
+  GPIO_PortInit(GPIO, BUTTON_PORT);
+
+  // LED
+  gpio_pin_config_t const led_config = { kGPIO_DigitalOutput, 0};
+  GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config);
+  board_led_write(true);
+
+  // Button
+  const uint32_t port1_pin18_config = (/* Pin is configured as PIO1_18 */
+                                       IOCON_PIO_FUNC0 |
+                                       /* No addition pin function */
+                                       IOCON_PIO_MODE_INACT |
+                                       /* Standard mode, output slew rate control is enabled */
+                                       IOCON_PIO_SLEW_STANDARD |
+                                       /* Input function is not inverted */
+                                       IOCON_PIO_INV_DI |
+                                       /* Enables digital function */
+                                       IOCON_PIO_DIGITAL_EN |
+                                       /* Open drain is disabled */
+                                       IOCON_PIO_OPENDRAIN_DI);
+  /* PORT1 PIN18 (coords: 64) is configured as PIO1_18 */
+  IOCON_PinMuxSet(IOCON, 1U, 18U, port1_pin18_config);
+
+  gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0};
+  GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config);
+
+#if 0
+  // USB
+  const uint32_t port1_pin6_config = (
+    IOCON_PIO_FUNC7       | /* Pin is configured as USB0_VBUS */
+    IOCON_PIO_MODE_INACT  | /* No addition pin function */
+    IOCON_PIO_INV_DI      | /* Input function is not inverted */
+    IOCON_PIO_DIGITAL_EN  | /* Enables digital function */
+    IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
+    IOCON_PIO_OPENDRAIN_DI  /* Open drain is disabled */
+  );
+  IOCON_PinMuxSet(IOCON, 1, 6, port1_pin6_config); /* PORT1 PIN6 (coords: 26) is configured as USB0_VBUS */
+
+  POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB Phy */
+  CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+}
+
+uint32_t board_button_read(void)
+{
+  // active low
+  return BUTTON_STATE_ACTIVE == GPIO_PinRead(GPIO, BUTTON_PORT, BUTTON_PIN);
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler(void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif

hw/mcu/nxp/lpc_driver

@@ -1 +1 @@
-Subproject commit 9f67a2f86a9d392e0e108e97365bdff0b9b304ce
+Subproject commit 532887dbf60b486ffb77ca98c16e55c114846c3b