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+/*
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+ * The MIT License (MIT)
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+ *
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+ * Copyright (c) 2020 Jean Gressmann <jean@0x42.de>
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+ *
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+ * Permission is hereby granted, free of charge, to any person obtaining a copy
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+ * of this software and associated documentation files (the "Software"), to deal
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+ * in the Software without restriction, including without limitation the rights
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+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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+ * copies of the Software, and to permit persons to whom the Software is
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+ * furnished to do so, subject to the following conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be included in
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+ * all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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+ * THE SOFTWARE.
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+ *
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+ */
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+
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+#include <sam.h>
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+#include "bsp/board.h"
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+
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+#include <hal/include/hal_gpio.h>
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+
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+#if CONF_CPU_FREQUENCY != 80000000
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+# error "CONF_CPU_FREQUENCY" must 80000000
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+#endif
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+
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+#if CONF_GCLK_USB_FREQUENCY != 48000000
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+# error "CONF_GCLK_USB_FREQUENCY" must 48000000
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+#endif
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+
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+#if !defined(HWREV)
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+# error Define "HWREV"
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+#endif
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+
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+//--------------------------------------------------------------------+
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+// Forward USB interrupt events to TinyUSB IRQ Handler
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+//--------------------------------------------------------------------+
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+void USB_0_Handler (void)
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+{
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+ tud_int_handler(0);
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+}
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+
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+void USB_1_Handler (void)
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+{
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+ tud_int_handler(0);
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+}
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+
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+void USB_2_Handler (void)
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+{
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+ tud_int_handler(0);
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+}
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+
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+void USB_3_Handler (void)
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+{
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+ tud_int_handler(0);
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+}
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+
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+//--------------------------------------------------------------------+
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+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
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+//--------------------------------------------------------------------+
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+#define LED_PIN PIN_PA02
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+
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+#if HWREV < 3
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+# define BOARD_SERCOM SERCOM5
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+#else
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+# define BOARD_SERCOM SERCOM0
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+#endif
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+
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+static inline void init_clock(void)
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+{
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+ /* AUTOWS is enabled by default in REG_NVMCTRL_CTRLA - no need to change the number of wait states when changing the core clock */
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+#if HWREV == 1
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+ /* configure XOSC1 for a 16MHz crystal connected to XIN1/XOUT1 */
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+ OSCCTRL->XOSCCTRL[1].reg =
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+ OSCCTRL_XOSCCTRL_STARTUP(6) | // 1,953 ms
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+ OSCCTRL_XOSCCTRL_RUNSTDBY |
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+ OSCCTRL_XOSCCTRL_ENALC |
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+ OSCCTRL_XOSCCTRL_IMULT(4) |
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+ OSCCTRL_XOSCCTRL_IPTAT(3) |
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+ OSCCTRL_XOSCCTRL_XTALEN |
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+ OSCCTRL_XOSCCTRL_ENABLE;
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+ while(0 == OSCCTRL->STATUS.bit.XOSCRDY1);
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+
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+ OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(3) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val); /* pre-scaler = 8, input = XOSC1 */
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+ OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(39); /* multiply by 40 -> 80 MHz */
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+ OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
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+ while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */
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+
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+ OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(7) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val); /* pre-scaler = 16, input = XOSC1 */
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+ OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */
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+ OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
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+ while(0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */
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+#else // HWREV >= 1
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+ /* configure XOSC0 for a 16MHz crystal connected to XIN0/XOUT0 */
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+ OSCCTRL->XOSCCTRL[0].reg =
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+ OSCCTRL_XOSCCTRL_STARTUP(6) | // 1,953 ms
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+ OSCCTRL_XOSCCTRL_RUNSTDBY |
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+ OSCCTRL_XOSCCTRL_ENALC |
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+ OSCCTRL_XOSCCTRL_IMULT(4) |
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+ OSCCTRL_XOSCCTRL_IPTAT(3) |
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+ OSCCTRL_XOSCCTRL_XTALEN |
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+ OSCCTRL_XOSCCTRL_ENABLE;
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+ while(0 == OSCCTRL->STATUS.bit.XOSCRDY0);
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+
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+ OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(3) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val); /* pre-scaler = 8, input = XOSC1 */
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+ OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(39); /* multiply by 40 -> 80 MHz */
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+ OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
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+ while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */
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+
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+ OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(7) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val); /* pre-scaler = 16, input = XOSC1 */
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+ OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */
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+ OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
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+ while(0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */
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+#endif // HWREV
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+
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+ /* configure clock-generator 0 to use DPLL0 as source -> GCLK0 is used for the core */
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+ GCLK->GENCTRL[0].reg =
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+ GCLK_GENCTRL_DIV(0) |
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+ GCLK_GENCTRL_RUNSTDBY |
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+ GCLK_GENCTRL_GENEN |
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+ GCLK_GENCTRL_SRC_DPLL0 | /* DPLL0 */
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+ GCLK_GENCTRL_IDC ;
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+ while(1 == GCLK->SYNCBUSY.bit.GENCTRL0); /* wait for the synchronization between clock domains to be complete */
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+
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+ /* configure clock-generator 1 to use DPLL1 as source -> for use with some peripheral */
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+ GCLK->GENCTRL[1].reg =
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+ GCLK_GENCTRL_DIV(0) |
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+ GCLK_GENCTRL_RUNSTDBY |
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+ GCLK_GENCTRL_GENEN |
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+ GCLK_GENCTRL_SRC_DPLL1 |
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+ GCLK_GENCTRL_IDC ;
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+ while(1 == GCLK->SYNCBUSY.bit.GENCTRL1); /* wait for the synchronization between clock domains to be complete */
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+
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+ /* configure clock-generator 2 to use DPLL0 as source -> for use with SERCOM */
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+ GCLK->GENCTRL[2].reg =
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+ GCLK_GENCTRL_DIV(1) | /* 80MHz */
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+ GCLK_GENCTRL_RUNSTDBY |
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+ GCLK_GENCTRL_GENEN |
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+ GCLK_GENCTRL_SRC_DPLL0 |
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+ GCLK_GENCTRL_IDC ;
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+ while(1 == GCLK->SYNCBUSY.bit.GENCTRL2); /* wait for the synchronization between clock domains to be complete */
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+}
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+
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+static inline void uart_init(void)
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+{
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+#if HWREV < 3
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+ /* configure SERCOM5 on PB02 */
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+ PORT->Group[1].WRCONFIG.reg =
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+ PORT_WRCONFIG_WRPINCFG |
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+ PORT_WRCONFIG_WRPMUX |
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+ PORT_WRCONFIG_PMUX(3) | /* function D */
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+ PORT_WRCONFIG_DRVSTR |
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+ PORT_WRCONFIG_PINMASK(0x0004) | /* PB02 */
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+ PORT_WRCONFIG_PMUXEN;
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+
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+ MCLK->APBDMASK.bit.SERCOM5_ = 1;
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+ GCLK->PCHCTRL[SERCOM5_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK2 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK2 -> 80MHz */
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+
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+ SERCOM5->USART.CTRLA.reg = 0x00; /* disable SERCOM -> enable config */
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+ while(SERCOM5->USART.SYNCBUSY.bit.ENABLE);
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+
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+ SERCOM5->USART.CTRLA.reg = /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
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+ SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
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+// SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
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+ SERCOM_USART_CTRLA_DORD | /* LSB first */
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+ SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
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+ SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */
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+ SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */
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+
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+ SERCOM5->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */
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+ SERCOM_USART_CTRLB_TXEN; /* transmitter enabled */
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+ SERCOM5->USART.CTRLC.reg = 0x00;
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+ // 21.701388889 @ baud rate of 230400 bit/s, table 33-2, p 918 of DS60001507E
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+ SERCOM5->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(7) | SERCOM_USART_BAUD_FRAC_BAUD(21);
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+
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+// SERCOM5->USART.INTENSET.reg = SERCOM_USART_INTENSET_TXC;
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+ SERCOM5->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
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+ while(SERCOM5->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
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+#else
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+/* configure SERCOM0 on PA08 */
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+ PORT->Group[0].WRCONFIG.reg =
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+ PORT_WRCONFIG_WRPINCFG |
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+ PORT_WRCONFIG_WRPMUX |
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+ PORT_WRCONFIG_PMUX(2) | /* function C */
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+ PORT_WRCONFIG_DRVSTR |
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+ PORT_WRCONFIG_PINMASK(0x0100) | /* PA08 */
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+ PORT_WRCONFIG_PMUXEN;
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+
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+ MCLK->APBAMASK.bit.SERCOM0_ = 1;
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+ GCLK->PCHCTRL[SERCOM0_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK2 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK2 -> 80MHz */
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+
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+ SERCOM0->USART.CTRLA.reg = 0x00; /* disable SERCOM -> enable config */
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+ while(SERCOM0->USART.SYNCBUSY.bit.ENABLE);
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+
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+ SERCOM0->USART.CTRLA.reg = /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
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+ SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
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+// SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
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+ SERCOM_USART_CTRLA_DORD | /* LSB first */
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+ SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
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+ SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */
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+ SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */
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+
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+ SERCOM0->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */
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+ SERCOM_USART_CTRLB_TXEN; /* transmitter enabled */
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+ SERCOM0->USART.CTRLC.reg = 0x00;
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+ // 21.701388889 @ baud rate of 230400 bit/s, table 33-2, p 918 of DS60001507E
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+ SERCOM0->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(7) | SERCOM_USART_BAUD_FRAC_BAUD(21);
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+
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+// SERCOM0->USART.INTENSET.reg = SERCOM_USART_INTENSET_TXC;
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+ SERCOM0->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
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+ while(SERCOM0->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
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+#endif
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+}
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+
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+static inline void uart_send_buffer(uint8_t const *text, size_t len)
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+{
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+ for (size_t i = 0; i < len; ++i) {
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+ BOARD_SERCOM->USART.DATA.reg = text[i];
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+ while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0);
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+ }
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+}
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+
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+static inline void uart_send_str(const char* text)
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+{
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+ while (*text) {
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+ BOARD_SERCOM->USART.DATA.reg = *text++;
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+ while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0);
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+ }
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+}
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+
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+
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+void board_init(void)
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+{
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+ init_clock();
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+
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+ SystemCoreClock = CONF_CPU_FREQUENCY;
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+
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+#if CFG_TUSB_OS == OPT_OS_NONE
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+ SysTick_Config(CONF_CPU_FREQUENCY / 1000);
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+#endif
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+
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+ uart_init();
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+#if CFG_TUSB_DEBUG >= 2
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+ uart_send_str(BOARD_NAME " UART initialized\n");
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+ tu_printf(BOARD_NAME " reset cause %#02x\n", RSTC->RCAUSE.reg);
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+#endif
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+
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+ // Led init
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+ gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
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+ gpio_set_pin_level(LED_PIN, 0);
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+
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+#if CFG_TUSB_DEBUG >= 2
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+ uart_send_str(BOARD_NAME " LED pin configured\n");
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+#endif
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+
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+#if CFG_TUSB_OS == OPT_OS_FREERTOS
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+ // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
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+ NVIC_SetPriority(USB_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
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+ NVIC_SetPriority(USB_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
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+ NVIC_SetPriority(USB_2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
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+ NVIC_SetPriority(USB_3_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
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+#endif
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+
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+
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+#if TUSB_OPT_DEVICE_ENABLED
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+#if CFG_TUSB_DEBUG >= 2
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+ uart_send_str(BOARD_NAME " USB device enabled\n");
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+#endif
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+
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+ /* USB clock init
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+ * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
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+ * for low speed and full speed operation. */
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+ hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
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+ hri_mclk_set_AHBMASK_USB_bit(MCLK);
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+ hri_mclk_set_APBBMASK_USB_bit(MCLK);
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+
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+ // USB pin init
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+ gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT);
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+ gpio_set_pin_level(PIN_PA24, false);
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+ gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF);
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+ gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT);
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+ gpio_set_pin_level(PIN_PA25, false);
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+ gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF);
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+
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+ gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM);
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+ gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP);
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+
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+
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+#if CFG_TUSB_DEBUG >= 2
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+ uart_send_str(BOARD_NAME " USB device configured\n");
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+#endif
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+#endif
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+}
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+
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+//--------------------------------------------------------------------+
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+// Board porting API
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+//--------------------------------------------------------------------+
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+
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+void board_led_write(bool state)
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+{
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+ gpio_set_pin_level(LED_PIN, state);
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+}
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+
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+uint32_t board_button_read(void)
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+{
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+ // this board has no button
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+int board_uart_read(uint8_t* buf, int len)
|
|
|
+{
|
|
|
+ (void) buf; (void) len;
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+int board_uart_write(void const * buf, int len)
|
|
|
+{
|
|
|
+ if (len < 0) {
|
|
|
+ uart_send_str(buf);
|
|
|
+ } else {
|
|
|
+ uart_send_buffer(buf, len);
|
|
|
+ }
|
|
|
+ return len;
|
|
|
+}
|
|
|
+
|
|
|
+#if CFG_TUSB_OS == OPT_OS_NONE
|
|
|
+volatile uint32_t system_ticks = 0;
|
|
|
+
|
|
|
+void SysTick_Handler(void)
|
|
|
+{
|
|
|
+ system_ticks++;
|
|
|
+}
|
|
|
+
|
|
|
+uint32_t board_millis(void)
|
|
|
+{
|
|
|
+ return system_ticks;
|
|
|
+}
|
|
|
+#endif
|
|
|
+
|
|
|
+// Required by __libc_init_array in startup code if we are compiling using
|
|
|
+// -nostdlib/-nostartfiles.
|
|
|
+void _init(void)
|
|
|
+{
|
|
|
+
|
|
|
+}
|
Ha Thach