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@@ -109,8 +109,15 @@ typedef struct {
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tu_edpt_state_t ep_status[CFG_TUH_ENDPOINT_MAX][2];
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-#if CFG_TUH_BARE
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-
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+#if CFG_TUH_API_EDPT_XFER
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+// struct
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+// {
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+// uint8_t* buffer;
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+// tuh_xfer_cb_t complete_cb;
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+// uintptr_t user_arg;
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+//
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+// volatile uint16_t actual_len;
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+// }ep_xfer;
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#endif
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} usbh_device_t;
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@@ -240,6 +247,16 @@ static osal_queue_t _usbh_q;
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CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN
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static uint8_t _usbh_ctrl_buf[CFG_TUH_ENUMERATION_BUFSIZE];
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+//// internal version of tuh_xfer_t
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+//typedef struct
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+//{
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+// uint8_t* buffer;
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+// tuh_xfer_cb_t complete_cb;
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+// uintptr_t user_arg;
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+//
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+// volatile uint16_t actual_len;
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+//}usbh_xfer_t;
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+
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// Control transfer: since most controller does not support multiple control transfer
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// on multiple devices concurrently. And control transfer is not used much except enumeration
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// We will only execute control transfer one at a time.
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@@ -890,6 +907,19 @@ static void _control_blocking_complete_cb(uint8_t daddr, tuh_xfer_t* xfer)
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*((xfer_result_t*) xfer->user_arg) = xfer->result;
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}
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+bool tuh_control_xfer_sync(uint8_t daddr, tuh_xfer_t* xfer, uint32_t timeout_ms)
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+{
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+ (void) timeout_ms;
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+
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+ // clear callback for sync
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+ xfer->complete_cb = NULL;
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+
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+ // TODO use timeout to wait
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+ TU_VERIFY(tuh_control_xfer(daddr, xfer));
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+
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+ return true;
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+}
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+
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bool tuh_control_xfer (uint8_t daddr, tuh_xfer_t* xfer)
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{
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// pre-check to help reducing mutex lock
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@@ -956,19 +986,6 @@ bool tuh_control_xfer (uint8_t daddr, tuh_xfer_t* xfer)
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return true;
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}
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-bool tuh_control_xfer_sync(uint8_t daddr, tuh_xfer_t* xfer, uint32_t timeout_ms)
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-{
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- (void) timeout_ms;
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-
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- // clear callback for sync
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- xfer->complete_cb = NULL;
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-
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- // TODO use timeout to wait
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- TU_VERIFY(tuh_control_xfer(daddr, xfer));
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-
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- return true;
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-}
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-
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TU_ATTR_ALWAYS_INLINE static inline void _set_control_xfer_stage(uint8_t stage)
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{
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usbh_lock();
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