Merge pull request #587 from hathach/followup-pr581

minor clean up following pr581

src/portable/st/synopsys/dcd_synopsys.c

@@ -45,13 +45,13 @@
 #define STM32L4_SYNOPSYS
 #endif
 
-#if TUSB_OPT_DEVICE_ENABLED && \
+#if TUSB_OPT_DEVICE_ENABLED &&                                          \
     ( (CFG_TUSB_MCU == OPT_MCU_STM32F1 && defined(STM32F1_SYNOPSYS)) || \
-        CFG_TUSB_MCU == OPT_MCU_STM32F2 || \
-        CFG_TUSB_MCU == OPT_MCU_STM32F4 || \
-        CFG_TUSB_MCU == OPT_MCU_STM32F7 || \
-        CFG_TUSB_MCU == OPT_MCU_STM32H7 || \
-        (CFG_TUSB_MCU == OPT_MCU_STM32L4 && defined(STM32L4_SYNOPSYS)) \
+       CFG_TUSB_MCU == OPT_MCU_STM32F2                               || \
+       CFG_TUSB_MCU == OPT_MCU_STM32F4                               || \
+       CFG_TUSB_MCU == OPT_MCU_STM32F7                               || \
+       CFG_TUSB_MCU == OPT_MCU_STM32H7                               || \
+      (CFG_TUSB_MCU == OPT_MCU_STM32L4 && defined(STM32L4_SYNOPSYS))    \
     )
 
 // EP_MAX       : Max number of bi-directional endpoints including EP0
@@ -115,6 +115,7 @@
 #define EP_FIFO_SIZE      EP_FIFO_SIZE_HS
 #define RHPORT_REGS_BASE  USB_OTG_HS_PERIPH_BASE
 #define RHPORT_IRQn       OTG_HS_IRQn
+
 #endif
 
 #define GLOBAL_BASE(_port)     ((USB_OTG_GlobalTypeDef*) RHPORT_REGS_BASE)
@@ -149,36 +150,29 @@ static uint16_t ep0_pending[2];                   // Index determines direction
 
 // TX FIFO RAM allocation so far in words - RX FIFO size is readily available from usb_otg->GRXFSIZ
 static uint16_t _allocated_fifo_words_tx;         // TX FIFO size in words (IN EPs)
-static bool _rx_ep_closed;                        // Flag to check if RX FIFO size needs an update (reduce its size)
+static bool _out_ep_closed;                       // Flag to check if RX FIFO size needs an update (reduce its size)
 
 // Calculate the RX FIFO size according to recommendations from reference manual
-// ep_size in words
 static inline uint16_t calc_rx_ff_size(uint16_t ep_size)
 {
-  return 15 + 2*ep_size + 2*EP_MAX;
+  return 15 + 2*(ep_size/4) + 2*EP_MAX;
 }
 
-static inline void update_grxfsiz(void)
+static void update_grxfsiz(uint8_t rhport)
 {
-  // If an OUT EP was closed update (reduce) the RX FIFO size if RX FIFO is empty - since this function handle_rxflvl_ints() gets looped from dcd_int_handler() until RX FIFO is empty it is guaranteed to be entered
-  if (_rx_ep_closed)
-  {
-    USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport);
-
-    // Determine largest EP size for RX FIFO
-    uint16_t sz = xfer_status[0][TUSB_DIR_OUT].max_size;
-
-    for (uint8_t cnt = 1; cnt < EP_MAX; cnt++)
-    {
-      if (sz < xfer_status[cnt][TUSB_DIR_OUT].max_size) sz = xfer_status[cnt][TUSB_DIR_OUT].max_size;
-    }
+  (void) rhport;
 
-    // Update size of RX FIFO
-    usb_otg->GRXFSIZ = calc_rx_ff_size(sz/4);     // sz was in bytes and is now needed in words
+  USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport);
 
-    // Disable flag
-    _rx_ep_closed = false;
+  // Determine largest EP size for RX FIFO
+  uint16_t max_epsize = 0;
+  for (uint8_t epnum = 0; epnum < EP_MAX; epnum++)
+  {
+    max_epsize = tu_max16(max_epsize, xfer_status[epnum][TUSB_DIR_OUT].max_size);
   }
+
+  // Update size of RX FIFO
+  usb_otg->GRXFSIZ = calc_rx_ff_size(max_epsize);
 }
 
 // Setup the control endpoint 0.
@@ -192,7 +186,7 @@ static void bus_reset(uint8_t rhport)
   USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport);
 
   tu_memclr(xfer_status, sizeof(xfer_status));
-  _rx_ep_closed = false;
+  _out_ep_closed = false;
 
   for(uint8_t n = 0; n < EP_MAX; n++) {
     out_ep[n].DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
@@ -252,11 +246,7 @@ static void bus_reset(uint8_t rhport)
   //   are enabled at least "2 x (Largest-EPsize/4) + 1" are recommended.  Maybe provide a macro for application to
   //   overwrite this.
 
-#if TUD_OPT_HIGH_SPEED
-  usb_otg->GRXFSIZ = calc_rx_ff_size(128);
-#else
-  usb_otg->GRXFSIZ = calc_rx_ff_size(16);
-#endif
+  usb_otg->GRXFSIZ = calc_rx_ff_size(TUD_OPT_HIGH_SPEED ? 512 : 64);
 
   _allocated_fifo_words_tx = 16;
 
@@ -588,12 +578,12 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
   xfer->max_size = desc_edpt->wMaxPacketSize.size;
   xfer->interval = desc_edpt->bInterval;
 
-  uint16_t const fifo_size = tu_max16((desc_edpt->wMaxPacketSize.size + 3) / 4, 16); // Round up to next full word, minimum value must be 16
+  uint16_t const fifo_size = (desc_edpt->wMaxPacketSize.size + 3) / 4; // Round up to next full word
 
   if(dir == TUSB_DIR_OUT)
   {
     // Calculate required size of RX FIFO
-    uint16_t const sz = calc_rx_ff_size(fifo_size);
+    uint16_t const sz = calc_rx_ff_size(4*fifo_size);
 
     // If size_rx needs to be extended check if possible and if so enlarge it
     if (usb_otg->GRXFSIZ < sz)
@@ -764,7 +754,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
   }
   else
   {
-    _rx_ep_closed = true;     // Set flag such that RX FIFO gets reduced in size once RX FIFO is empty
+    _out_ep_closed = true;     // Set flag such that RX FIFO gets reduced in size once RX FIFO is empty
   }
 }
 
@@ -1020,13 +1010,15 @@ void dcd_int_handler(uint8_t rhport)
 
   uint32_t int_status = usb_otg->GINTSTS;
 
-  if(int_status & USB_OTG_GINTSTS_USBRST) {
+  if(int_status & USB_OTG_GINTSTS_USBRST)
+  {
     // USBRST is start of reset.
     usb_otg->GINTSTS = USB_OTG_GINTSTS_USBRST;
     bus_reset(rhport);
   }
 
-  if(int_status & USB_OTG_GINTSTS_ENUMDNE) {
+  if(int_status & USB_OTG_GINTSTS_ENUMDNE)
+  {
     // ENUMDNE is the end of reset where speed of the link is detected
 
     usb_otg->GINTSTS = USB_OTG_GINTSTS_ENUMDNE;
@@ -1063,39 +1055,50 @@ void dcd_int_handler(uint8_t rhport)
   }
 
 #if USE_SOF
-  if(int_status & USB_OTG_GINTSTS_SOF) {
+  if(int_status & USB_OTG_GINTSTS_SOF)
+  {
     usb_otg->GINTSTS = USB_OTG_GINTSTS_SOF;
     dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
   }
 #endif
 
   // RxFIFO non-empty interrupt handling.
-  if(int_status & USB_OTG_GINTSTS_RXFLVL) {
+  if(int_status & USB_OTG_GINTSTS_RXFLVL)
+  {
     // RXFLVL bit is read-only
 
     // Mask out RXFLVL while reading data from FIFO
     usb_otg->GINTMSK &= ~USB_OTG_GINTMSK_RXFLVLM;
 
     // Loop until all available packets were handled
-    do {
+    do
+    {
       handle_rxflvl_ints(rhport, out_ep);
       int_status = usb_otg->GINTSTS;
     } while(int_status & USB_OTG_GINTSTS_RXFLVL);
 
     // Manage RX FIFO size
-    update_grxfsiz();
+    if (_out_ep_closed)
+    {
+      update_grxfsiz(rhport);
+
+      // Disable flag
+      _out_ep_closed = false;
+    }
 
     usb_otg->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
   }
 
   // OUT endpoint interrupt handling.
-  if(int_status & USB_OTG_GINTSTS_OEPINT) {
+  if(int_status & USB_OTG_GINTSTS_OEPINT)
+  {
     // OEPINT is read-only
     handle_epout_ints(rhport, dev, out_ep);
   }
 
   // IN endpoint interrupt handling.
-  if(int_status & USB_OTG_GINTSTS_IEPINT) {
+  if(int_status & USB_OTG_GINTSTS_IEPINT)
+  {
     // IEPINT bit read-only
     handle_epin_ints(rhport, dev, in_ep);
   }

src/tusb_option.h

@@ -151,22 +151,22 @@
   #define CFG_TUSB_RHPORT1_MODE OPT_MODE_NONE
 #endif
 
-#if ((CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST  ) && (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST  )) || \
-    ((CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE) && (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE))
+#if (((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST  ) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST  )) || \
+    (((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE))
   #error "TinyUSB currently does not support same modes on more than 1 roothub port"
 #endif
 
 // Which roothub port is configured as host
-#define TUH_OPT_RHPORT          ( (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) ? 0 : ((CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) ? 1 : -1) )
+#define TUH_OPT_RHPORT          ( ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST) ? 0 : (((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST) ? 1 : -1) )
 #define TUSB_OPT_HOST_ENABLED   ( TUH_OPT_RHPORT >= 0 )
 
 // Which roothub port is configured as device
-#define TUD_OPT_RHPORT          ( (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE) ? 0 : ((CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE) ? 1 : -1) )
+#define TUD_OPT_RHPORT          ( ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE) ? 0 : (((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE) ? 1 : -1) )
 
 #if TUD_OPT_RHPORT == 0
-#define TUD_OPT_HIGH_SPEED      ( CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED )
+#define TUD_OPT_HIGH_SPEED      ( (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HIGH_SPEED )
 #else
-#define TUD_OPT_HIGH_SPEED      ( CFG_TUSB_RHPORT1_MODE & OPT_MODE_HIGH_SPEED )
+#define TUD_OPT_HIGH_SPEED      ( (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HIGH_SPEED )
 #endif
 
 #define TUSB_OPT_DEVICE_ENABLED ( TUD_OPT_RHPORT >= 0 )