kuiic.c 7.3 KB

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  1. /*
  2. * The MIT License (MIT)
  3. *
  4. * Copyright (c) 2018, hathach (tinyusb.org)
  5. * Copyright (c) 2020, Koji Kitayama
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy
  8. * of this software and associated documentation files (the "Software"), to deal
  9. * in the Software without restriction, including without limitation the rights
  10. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11. * copies of the Software, and to permit persons to whom the Software is
  12. * furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  20. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23. * THE SOFTWARE.
  24. *
  25. * This file is part of the TinyUSB stack.
  26. */
  27. #include "../board.h"
  28. #include "board.h"
  29. #include "fsl_smc.h"
  30. #include "fsl_gpio.h"
  31. #include "fsl_port.h"
  32. #include "fsl_clock.h"
  33. #include "fsl_lpuart.h"
  34. /*******************************************************************************
  35. * Definitions
  36. ******************************************************************************/
  37. #define SIM_OSC32KSEL_LPO_CLK 3U /*!< OSC32KSEL select: LPO clock */
  38. #define SOPT5_LPUART1RXSRC_LPUART_RX 0x00u /*!<@brief LPUART1 Receive Data Source Select: LPUART_RX pin */
  39. #define SOPT5_LPUART1TXSRC_LPUART_TX 0x00u /*!<@brief LPUART1 Transmit Data Source Select: LPUART_TX pin */
  40. #define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
  41. /*******************************************************************************
  42. * Variables
  43. ******************************************************************************/
  44. /* System clock frequency. */
  45. // extern uint32_t SystemCoreClock;
  46. /*******************************************************************************
  47. * Variables for BOARD_BootClockRUN configuration
  48. ******************************************************************************/
  49. const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = {
  50. .outSrc = kMCGLITE_ClkSrcHirc, /* MCGOUTCLK source is HIRC */
  51. .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
  52. .ircs = kMCGLITE_Lirc8M, /* Slow internal reference (LIRC) 8 MHz clock selected */
  53. .fcrdiv = kMCGLITE_LircDivBy1, /* Low-frequency Internal Reference Clock Divider: divided by 1 */
  54. .lircDiv2 = kMCGLITE_LircDivBy1, /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
  55. .hircEnableInNotHircMode = true, /* HIRC source is enabled */
  56. };
  57. const sim_clock_config_t simConfig_BOARD_BootClockRUN = {
  58. .er32kSrc = SIM_OSC32KSEL_LPO_CLK, /* OSC32KSEL select: LPO clock */
  59. .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
  60. };
  61. /*******************************************************************************
  62. * Code for BOARD_BootClockRUN configuration
  63. ******************************************************************************/
  64. void BOARD_BootClockRUN(void)
  65. {
  66. /* Set the system clock dividers in SIM to safe value. */
  67. CLOCK_SetSimSafeDivs();
  68. /* Set MCG to HIRC mode. */
  69. CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
  70. /* Set the clock configuration in SIM module. */
  71. CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
  72. /* Set SystemCoreClock variable. */
  73. SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
  74. }
  75. //--------------------------------------------------------------------+
  76. // Forward USB interrupt events to TinyUSB IRQ Handler
  77. //--------------------------------------------------------------------+
  78. void USB0_IRQHandler(void)
  79. {
  80. tud_int_handler(0);
  81. }
  82. void board_init(void)
  83. {
  84. /* Enable port clocks for GPIO pins */
  85. CLOCK_EnableClock(kCLOCK_PortA);
  86. CLOCK_EnableClock(kCLOCK_PortB);
  87. CLOCK_EnableClock(kCLOCK_PortC);
  88. CLOCK_EnableClock(kCLOCK_PortD);
  89. CLOCK_EnableClock(kCLOCK_PortE);
  90. gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 1 };
  91. GPIO_PinInit(GPIOA, 1U, &led_config);
  92. PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio);
  93. led_config.outputLogic = 0;
  94. GPIO_PinInit(GPIOA, 2U, &led_config);
  95. PORT_SetPinMux(PORTA, 2U, kPORT_MuxAsGpio);
  96. #ifdef BUTTON_PIN
  97. gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 };
  98. GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
  99. const port_pin_config_t BUTTON_CFG = {
  100. kPORT_PullUp,
  101. kPORT_FastSlewRate,
  102. kPORT_PassiveFilterDisable,
  103. kPORT_LowDriveStrength,
  104. kPORT_MuxAsGpio
  105. };
  106. PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG);
  107. #endif
  108. /* PORTC3 is configured as LPUART0_RX */
  109. PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3);
  110. /* PORTA2 (pin 24) is configured as LPUART0_TX */
  111. PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3);
  112. SIM->SOPT5 = ((SIM->SOPT5 &
  113. /* Mask bits to zero which are setting */
  114. (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK)))
  115. /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */
  116. | SIM_SOPT5_LPUART1TXSRC(SOPT5_LPUART1TXSRC_LPUART_TX)
  117. /* LPUART0 Receive Data Source Select: LPUART_RX pin. */
  118. | SIM_SOPT5_LPUART1RXSRC(SOPT5_LPUART1RXSRC_LPUART_RX));
  119. BOARD_BootClockRUN();
  120. SystemCoreClockUpdate();
  121. CLOCK_SetLpuart1Clock(1);
  122. #if CFG_TUSB_OS == OPT_OS_NONE
  123. // 1ms tick timer
  124. SysTick_Config(SystemCoreClock / 1000);
  125. #elif CFG_TUSB_OS == OPT_OS_FREERTOS
  126. // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
  127. NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
  128. #endif
  129. lpuart_config_t uart_config;
  130. LPUART_GetDefaultConfig(&uart_config);
  131. uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
  132. uart_config.enableTx = true;
  133. uart_config.enableRx = true;
  134. LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk));
  135. // USB
  136. CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U);
  137. }
  138. //--------------------------------------------------------------------+
  139. // Board porting API
  140. //--------------------------------------------------------------------+
  141. void board_led_write(bool state)
  142. {
  143. if (state) {
  144. LED_GPIO->PDDR |= GPIO_FIT_REG((1UL << LED_PIN));
  145. } else {
  146. LED_GPIO->PDDR &= GPIO_FIT_REG(~(1UL << LED_PIN));
  147. }
  148. // GPIO_PinWrite(GPIOA, 1, state ? LED_STATE_ON : (1-LED_STATE_ON) );
  149. // GPIO_PinWrite(GPIOA, 2, state ? (1-LED_STATE_ON) : LED_STATE_ON );
  150. }
  151. uint32_t board_button_read(void)
  152. {
  153. #ifdef BUTTON_PIN
  154. return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
  155. #else
  156. return 0;
  157. #endif
  158. }
  159. int board_uart_read(uint8_t* buf, int len)
  160. {
  161. LPUART_ReadBlocking(UART_PORT, buf, len);
  162. return len;
  163. }
  164. int board_uart_write(void const * buf, int len)
  165. {
  166. LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len);
  167. return len;
  168. }
  169. #if CFG_TUSB_OS == OPT_OS_NONE
  170. volatile uint32_t system_ticks = 0;
  171. void SysTick_Handler(void)
  172. {
  173. system_ticks++;
  174. }
  175. uint32_t board_millis(void)
  176. {
  177. return system_ticks;
  178. }
  179. #endif