wizchip_conf.c 24 KB

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  1. //****************************************************************************/
  2. //!
  3. //! \file wizchip_conf.c
  4. //! \brief WIZCHIP Config Header File.
  5. //! \version 1.0.1
  6. //! \date 2013/10/21
  7. //! \par Revision history
  8. //! <2015/02/05> Notice
  9. //! The version history is not updated after this point.
  10. //! Download the latest version directly from GitHub. Please visit the our GitHub repository for ioLibrary.
  11. //! >> https://github.com/Wiznet/ioLibrary_Driver
  12. //! <2014/05/01> V1.0.1 Refer to M20140501
  13. //! 1. Explicit type casting in wizchip_bus_readdata() & wizchip_bus_writedata()
  14. // Issued by Mathias ClauBen.
  15. //! uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t*
  16. //! For remove the warning when pointer type size is not 32bit.
  17. //! If ptrdiff_t doesn't support in your complier, You should must replace ptrdiff_t into your suitable pointer type.
  18. //! <2013/10/21> 1st Release
  19. //! \author MidnightCow
  20. //! \copyright
  21. //!
  22. //! Copyright (c) 2013, WIZnet Co., LTD.
  23. //! All rights reserved.
  24. //!
  25. //! Redistribution and use in source and binary forms, with or without
  26. //! modification, are permitted provided that the following conditions
  27. //! are met:
  28. //!
  29. //! * Redistributions of source code must retain the above copyright
  30. //! notice, this list of conditions and the following disclaimer.
  31. //! * Redistributions in binary form must reproduce the above copyright
  32. //! notice, this list of conditions and the following disclaimer in the
  33. //! documentation and/or other materials provided with the distribution.
  34. //! * Neither the name of the <ORGANIZATION> nor the names of its
  35. //! contributors may be used to endorse or promote products derived
  36. //! from this software without specific prior written permission.
  37. //!
  38. //! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  39. //! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  40. //! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  41. //! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  42. //! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  43. //! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  44. //! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  45. //! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  46. //! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  47. //! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  48. //! THE POSSIBILITY OF SUCH DAMAGE.
  49. //
  50. //*****************************************************************************/
  51. //A20140501 : for use the type - ptrdiff_t
  52. #include <stddef.h>
  53. //
  54. #include "wizchip_conf.h"
  55. /////////////
  56. //M20150401 : Remove ; in the default callback function such as wizchip_cris_enter(), wizchip_cs_select() and etc.
  57. /////////////
  58. /**
  59. * @brief Default function to enable interrupt.
  60. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  61. * null function is called.
  62. */
  63. //void wizchip_cris_enter(void) {};
  64. void wizchip_cris_enter(void) {}
  65. /**
  66. * @brief Default function to disable interrupt.
  67. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  68. * null function is called.
  69. */
  70. //void wizchip_cris_exit(void) {};
  71. void wizchip_cris_exit(void) {}
  72. /**
  73. * @brief Default function to select chip.
  74. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  75. * null function is called.
  76. */
  77. //void wizchip_cs_select(void) {};
  78. void wizchip_cs_select(void) {}
  79. /**
  80. * @brief Default function to deselect chip.
  81. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  82. * null function is called.
  83. */
  84. //void wizchip_cs_deselect(void) {};
  85. void wizchip_cs_deselect(void) {}
  86. /**
  87. * @brief Default function to read in direct or indirect interface.
  88. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  89. * null function is called.
  90. */
  91. //M20150601 : Rename the function for integrating with W5300
  92. //uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); }
  93. iodata_t wizchip_bus_readdata(uint32_t AddrSel) { return * ((volatile iodata_t *)((ptrdiff_t) AddrSel)); }
  94. /**
  95. * @brief Default function to write in direct or indirect interface.
  96. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  97. * null function is called.
  98. */
  99. //M20150601 : Rename the function for integrating with W5300
  100. //void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; }
  101. void wizchip_bus_writedata(uint32_t AddrSel, iodata_t wb) { *((volatile iodata_t*)((ptrdiff_t)AddrSel)) = wb; }
  102. /**
  103. * @brief Default function to read in SPI interface.
  104. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  105. * null function is called.
  106. */
  107. //uint8_t wizchip_spi_readbyte(void) {return 0;};
  108. uint8_t wizchip_spi_readbyte(void) {return 0;}
  109. /**
  110. * @brief Default function to write in SPI interface.
  111. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  112. * null function is called.
  113. */
  114. //void wizchip_spi_writebyte(uint8_t wb) {};
  115. void wizchip_spi_writebyte(uint8_t wb) {}
  116. /**
  117. * @brief Default function to burst read in SPI interface.
  118. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  119. * null function is called.
  120. */
  121. //void wizchip_spi_readburst(uint8_t* pBuf, uint16_t len) {};
  122. void wizchip_spi_readburst(uint8_t* pBuf, uint16_t len) {}
  123. /**
  124. * @brief Default function to burst write in SPI interface.
  125. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  126. * null function is called.
  127. */
  128. //void wizchip_spi_writeburst(uint8_t* pBuf, uint16_t len) {};
  129. void wizchip_spi_writeburst(uint8_t* pBuf, uint16_t len) {}
  130. /**
  131. * @\ref _WIZCHIP instance
  132. */
  133. //
  134. //M20150401 : For a compiler didnot support a member of structure
  135. // Replace the assignment of struct members with the assingment of array
  136. //
  137. /*
  138. _WIZCHIP WIZCHIP =
  139. {
  140. .id = _WIZCHIP_ID_,
  141. .if_mode = _WIZCHIP_IO_MODE_,
  142. .CRIS._enter = wizchip_cris_enter,
  143. .CRIS._exit = wizchip_cris_exit,
  144. .CS._select = wizchip_cs_select,
  145. .CS._deselect = wizchip_cs_deselect,
  146. .IF.BUS._read_byte = wizchip_bus_readbyte,
  147. .IF.BUS._write_byte = wizchip_bus_writebyte
  148. // .IF.SPI._read_byte = wizchip_spi_readbyte,
  149. // .IF.SPI._write_byte = wizchip_spi_writebyte
  150. };
  151. */
  152. _WIZCHIP WIZCHIP =
  153. {
  154. _WIZCHIP_IO_MODE_,
  155. _WIZCHIP_ID_ ,
  156. {
  157. wizchip_cris_enter,
  158. wizchip_cris_exit
  159. },
  160. {
  161. wizchip_cs_select,
  162. wizchip_cs_deselect
  163. },
  164. {
  165. {
  166. //M20150601 : Rename the function
  167. //wizchip_bus_readbyte,
  168. //wizchip_bus_writebyte
  169. wizchip_bus_readdata,
  170. wizchip_bus_writedata
  171. },
  172. }
  173. };
  174. static uint8_t _DNS_[4]; // DNS server ip address
  175. static dhcp_mode _DHCP_; // DHCP mode
  176. void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
  177. {
  178. if(!cris_en || !cris_ex)
  179. {
  180. WIZCHIP.CRIS._enter = wizchip_cris_enter;
  181. WIZCHIP.CRIS._exit = wizchip_cris_exit;
  182. }
  183. else
  184. {
  185. WIZCHIP.CRIS._enter = cris_en;
  186. WIZCHIP.CRIS._exit = cris_ex;
  187. }
  188. }
  189. void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
  190. {
  191. if(!cs_sel || !cs_desel)
  192. {
  193. WIZCHIP.CS._select = wizchip_cs_select;
  194. WIZCHIP.CS._deselect = wizchip_cs_deselect;
  195. }
  196. else
  197. {
  198. WIZCHIP.CS._select = cs_sel;
  199. WIZCHIP.CS._deselect = cs_desel;
  200. }
  201. }
  202. //M20150515 : For integrating with W5300
  203. //void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
  204. void reg_wizchip_bus_cbfunc(iodata_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, iodata_t wb))
  205. {
  206. while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
  207. //M20150601 : Rename call back function for integrating with W5300
  208. /*
  209. if(!bus_rb || !bus_wb)
  210. {
  211. WIZCHIP.IF.BUS._read_byte = wizchip_bus_readbyte;
  212. WIZCHIP.IF.BUS._write_byte = wizchip_bus_writebyte;
  213. }
  214. else
  215. {
  216. WIZCHIP.IF.BUS._read_byte = bus_rb;
  217. WIZCHIP.IF.BUS._write_byte = bus_wb;
  218. }
  219. */
  220. if(!bus_rb || !bus_wb)
  221. {
  222. WIZCHIP.IF.BUS._read_data = wizchip_bus_readdata;
  223. WIZCHIP.IF.BUS._write_data = wizchip_bus_writedata;
  224. }
  225. else
  226. {
  227. WIZCHIP.IF.BUS._read_data = bus_rb;
  228. WIZCHIP.IF.BUS._write_data = bus_wb;
  229. }
  230. }
  231. void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb))
  232. {
  233. while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
  234. if(!spi_rb || !spi_wb)
  235. {
  236. WIZCHIP.IF.SPI._read_byte = wizchip_spi_readbyte;
  237. WIZCHIP.IF.SPI._write_byte = wizchip_spi_writebyte;
  238. }
  239. else
  240. {
  241. WIZCHIP.IF.SPI._read_byte = spi_rb;
  242. WIZCHIP.IF.SPI._write_byte = spi_wb;
  243. }
  244. }
  245. // 20140626 Eric Added for SPI burst operations
  246. void reg_wizchip_spiburst_cbfunc(void (*spi_rb)(uint8_t* pBuf, uint16_t len), void (*spi_wb)(uint8_t* pBuf, uint16_t len))
  247. {
  248. while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
  249. if(!spi_rb || !spi_wb)
  250. {
  251. WIZCHIP.IF.SPI._read_burst = wizchip_spi_readburst;
  252. WIZCHIP.IF.SPI._write_burst = wizchip_spi_writeburst;
  253. }
  254. else
  255. {
  256. WIZCHIP.IF.SPI._read_burst = spi_rb;
  257. WIZCHIP.IF.SPI._write_burst = spi_wb;
  258. }
  259. }
  260. int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
  261. {
  262. #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5200 || _WIZCHIP_ == W5500
  263. uint8_t tmp = 0;
  264. #endif
  265. uint8_t* ptmp[2] = {0,0};
  266. switch(cwtype)
  267. {
  268. case CW_RESET_WIZCHIP:
  269. wizchip_sw_reset();
  270. break;
  271. case CW_INIT_WIZCHIP:
  272. if(arg != 0)
  273. {
  274. ptmp[0] = (uint8_t*)arg;
  275. ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
  276. }
  277. return wizchip_init(ptmp[0], ptmp[1]);
  278. case CW_CLR_INTERRUPT:
  279. wizchip_clrinterrupt(*((intr_kind*)arg));
  280. break;
  281. case CW_GET_INTERRUPT:
  282. *((intr_kind*)arg) = wizchip_getinterrupt();
  283. break;
  284. case CW_SET_INTRMASK:
  285. wizchip_setinterruptmask(*((intr_kind*)arg));
  286. break;
  287. case CW_GET_INTRMASK:
  288. *((intr_kind*)arg) = wizchip_getinterruptmask();
  289. break;
  290. //M20150601 : This can be supported by W5200, W5500
  291. //#if _WIZCHIP_ > W5100
  292. #if (_WIZCHIP_ == W5200 || _WIZCHIP_ == W5500)
  293. case CW_SET_INTRTIME:
  294. setINTLEVEL(*(uint16_t*)arg);
  295. break;
  296. case CW_GET_INTRTIME:
  297. *(uint16_t*)arg = getINTLEVEL();
  298. break;
  299. #endif
  300. case CW_GET_ID:
  301. ((uint8_t*)arg)[0] = WIZCHIP.id[0];
  302. ((uint8_t*)arg)[1] = WIZCHIP.id[1];
  303. ((uint8_t*)arg)[2] = WIZCHIP.id[2];
  304. ((uint8_t*)arg)[3] = WIZCHIP.id[3];
  305. ((uint8_t*)arg)[4] = WIZCHIP.id[4];
  306. ((uint8_t*)arg)[5] = 0;
  307. break;
  308. #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5500
  309. case CW_RESET_PHY:
  310. wizphy_reset();
  311. break;
  312. case CW_SET_PHYCONF:
  313. wizphy_setphyconf((wiz_PhyConf*)arg);
  314. break;
  315. case CW_GET_PHYCONF:
  316. wizphy_getphyconf((wiz_PhyConf*)arg);
  317. break;
  318. case CW_GET_PHYSTATUS:
  319. break;
  320. case CW_SET_PHYPOWMODE:
  321. return wizphy_setphypmode(*(uint8_t*)arg);
  322. #endif
  323. #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5200 || _WIZCHIP_ == W5500
  324. case CW_GET_PHYPOWMODE:
  325. tmp = wizphy_getphypmode();
  326. if((int8_t)tmp == -1) return -1;
  327. *(uint8_t*)arg = tmp;
  328. break;
  329. case CW_GET_PHYLINK:
  330. tmp = wizphy_getphylink();
  331. if((int8_t)tmp == -1) return -1;
  332. *(uint8_t*)arg = tmp;
  333. break;
  334. #endif
  335. default:
  336. return -1;
  337. }
  338. return 0;
  339. }
  340. int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
  341. {
  342. switch(cntype)
  343. {
  344. case CN_SET_NETINFO:
  345. wizchip_setnetinfo((wiz_NetInfo*)arg);
  346. break;
  347. case CN_GET_NETINFO:
  348. wizchip_getnetinfo((wiz_NetInfo*)arg);
  349. break;
  350. case CN_SET_NETMODE:
  351. return wizchip_setnetmode(*(netmode_type*)arg);
  352. case CN_GET_NETMODE:
  353. *(netmode_type*)arg = wizchip_getnetmode();
  354. break;
  355. case CN_SET_TIMEOUT:
  356. wizchip_settimeout((wiz_NetTimeout*)arg);
  357. break;
  358. case CN_GET_TIMEOUT:
  359. wizchip_gettimeout((wiz_NetTimeout*)arg);
  360. break;
  361. default:
  362. return -1;
  363. }
  364. return 0;
  365. }
  366. void wizchip_sw_reset(void)
  367. {
  368. uint8_t gw[4], sn[4], sip[4];
  369. uint8_t mac[6];
  370. //A20150601
  371. #if _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_
  372. uint16_t mr = (uint16_t)getMR();
  373. setMR(mr | MR_IND);
  374. #endif
  375. //
  376. getSHAR(mac);
  377. getGAR(gw); getSUBR(sn); getSIPR(sip);
  378. setMR(MR_RST);
  379. getMR(); // for delay
  380. //A2015051 : For indirect bus mode
  381. #if _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_
  382. setMR(mr | MR_IND);
  383. #endif
  384. //
  385. setSHAR(mac);
  386. setGAR(gw);
  387. setSUBR(sn);
  388. setSIPR(sip);
  389. }
  390. int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
  391. {
  392. int8_t i;
  393. #if _WIZCHIP_ < W5200
  394. int8_t j;
  395. #endif
  396. int8_t tmp = 0;
  397. wizchip_sw_reset();
  398. if(txsize)
  399. {
  400. tmp = 0;
  401. //M20150601 : For integrating with W5300
  402. #if _WIZCHIP_ == W5300
  403. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  404. {
  405. if(txsize[i] >= 64) return -1; //No use 64KB even if W5300 support max 64KB memory allocation
  406. tmp += txsize[i];
  407. if(tmp > 128) return -1;
  408. }
  409. if(tmp % 8) return -1;
  410. #else
  411. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  412. {
  413. tmp += txsize[i];
  414. #if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100 and w5100s
  415. if(tmp > 8) return -1;
  416. #else
  417. if(tmp > 16) return -1;
  418. #endif
  419. }
  420. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  421. {
  422. #if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100
  423. j = 0;
  424. while((txsize[i] >> j != 1)&&(txsize[i] !=0)){j++;}
  425. setSn_TXBUF_SIZE(i, j);
  426. #else
  427. setSn_TXBUF_SIZE(i, txsize[i]);
  428. #endif
  429. }
  430. #endif
  431. }
  432. if(rxsize)
  433. {
  434. tmp = 0;
  435. #if _WIZCHIP_ == W5300
  436. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  437. {
  438. if(rxsize[i] >= 64) return -1; //No use 64KB even if W5300 support max 64KB memory allocation
  439. tmp += rxsize[i];
  440. if(tmp > 128) return -1;
  441. }
  442. if(tmp % 8) return -1;
  443. #else
  444. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  445. {
  446. tmp += rxsize[i];
  447. #if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100 and w5100s
  448. if(tmp > 8) return -1;
  449. #else
  450. if(tmp > 16) return -1;
  451. #endif
  452. }
  453. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  454. {
  455. #if _WIZCHIP_ < W5200 // add condition for w5100
  456. j = 0;
  457. while((rxsize[i] >> j != 1)&&(txsize[i] !=0)){j++;}
  458. setSn_RXBUF_SIZE(i, j);
  459. #else
  460. setSn_RXBUF_SIZE(i, rxsize[i]);
  461. #endif
  462. }
  463. #endif
  464. }
  465. return 0;
  466. }
  467. void wizchip_clrinterrupt(intr_kind intr)
  468. {
  469. uint8_t ir = (uint8_t)intr;
  470. uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
  471. #if _WIZCHIP_ < W5500
  472. ir |= (1<<4); // IK_WOL
  473. #endif
  474. #if _WIZCHIP_ == W5200
  475. ir |= (1 << 6);
  476. #endif
  477. #if _WIZCHIP_ < W5200
  478. sir &= 0x0F;
  479. #endif
  480. #if _WIZCHIP_ <= W5100S
  481. ir |= sir;
  482. setIR(ir);
  483. //A20150601 : For integrating with W5300
  484. #elif _WIZCHIP_ == W5300
  485. setIR( ((((uint16_t)ir) << 8) | (((uint16_t)sir) & 0x00FF)) );
  486. #else
  487. setIR(ir);
  488. //M20200227 : For clear
  489. //setSIR(sir);
  490. for(ir=0; ir<8; ir++){
  491. if(sir & (0x01 <<ir) ) setSn_IR(ir, 0xff);
  492. }
  493. #endif
  494. }
  495. intr_kind wizchip_getinterrupt(void)
  496. {
  497. uint8_t ir = 0;
  498. uint8_t sir = 0;
  499. uint16_t ret = 0;
  500. #if _WIZCHIP_ <= W5100S
  501. ir = getIR();
  502. sir = ir & 0x0F;
  503. //A20150601 : For integrating with W5300
  504. #elif _WIZCHIP_ == W5300
  505. ret = getIR();
  506. ir = (uint8_t)(ret >> 8);
  507. sir = (uint8_t)ret;
  508. #else
  509. ir = getIR();
  510. sir = getSIR();
  511. #endif
  512. //M20150601 : For Integrating with W5300
  513. //#if _WIZCHIP_ < W5500
  514. #if _WIZCHIP_ < W5200
  515. ir &= ~(1<<4); // IK_WOL
  516. #endif
  517. #if _WIZCHIP_ == W5200
  518. ir &= ~(1 << 6);
  519. #endif
  520. ret = sir;
  521. ret = (ret << 8) + ir;
  522. return (intr_kind)ret;
  523. }
  524. void wizchip_setinterruptmask(intr_kind intr)
  525. {
  526. uint8_t imr = (uint8_t)intr;
  527. uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
  528. #if _WIZCHIP_ < W5500
  529. imr &= ~(1<<4); // IK_WOL
  530. #endif
  531. #if _WIZCHIP_ == W5200
  532. imr &= ~(1 << 6);
  533. #endif
  534. #if _WIZCHIP_ < W5200
  535. simr &= 0x0F;
  536. imr |= simr;
  537. setIMR(imr);
  538. //A20150601 : For integrating with W5300
  539. #elif _WIZCHIP_ == W5300
  540. setIMR( ((((uint16_t)imr) << 8) | (((uint16_t)simr) & 0x00FF)) );
  541. #else
  542. setIMR(imr);
  543. setSIMR(simr);
  544. #endif
  545. }
  546. intr_kind wizchip_getinterruptmask(void)
  547. {
  548. uint8_t imr = 0;
  549. uint8_t simr = 0;
  550. uint16_t ret = 0;
  551. #if _WIZCHIP_ < W5200
  552. imr = getIMR();
  553. simr = imr & 0x0F;
  554. //A20150601 : For integrating with W5300
  555. #elif _WIZCHIP_ == W5300
  556. ret = getIMR();
  557. imr = (uint8_t)(ret >> 8);
  558. simr = (uint8_t)ret;
  559. #else
  560. imr = getIMR();
  561. simr = getSIMR();
  562. #endif
  563. #if _WIZCHIP_ < W5500
  564. imr &= ~(1<<4); // IK_WOL
  565. #endif
  566. #if _WIZCHIP_ == W5200
  567. imr &= ~(1 << 6); // IK_DEST_UNREACH
  568. #endif
  569. ret = simr;
  570. ret = (ret << 8) + imr;
  571. return (intr_kind)ret;
  572. }
  573. int8_t wizphy_getphylink(void)
  574. {
  575. int8_t tmp = PHY_LINK_OFF;
  576. #if _WIZCHIP_ == W5100S
  577. if(getPHYSR() & PHYSR_LNK)
  578. tmp = PHY_LINK_ON;
  579. #elif _WIZCHIP_ == W5200
  580. if(getPHYSTATUS() & PHYSTATUS_LINK)
  581. tmp = PHY_LINK_ON;
  582. #elif _WIZCHIP_ == W5500
  583. if(getPHYCFGR() & PHYCFGR_LNK_ON)
  584. tmp = PHY_LINK_ON;
  585. #else
  586. tmp = -1;
  587. #endif
  588. return tmp;
  589. }
  590. #if _WIZCHIP_ > W5100
  591. int8_t wizphy_getphypmode(void)
  592. {
  593. int8_t tmp = 0;
  594. #if _WIZCHIP_ == W5200
  595. if(getPHYSTATUS() & PHYSTATUS_POWERDOWN)
  596. tmp = PHY_POWER_DOWN;
  597. else
  598. tmp = PHY_POWER_NORM;
  599. #elif _WIZCHIP_ == 5500
  600. if((getPHYCFGR() & PHYCFGR_OPMDC_ALLA) == PHYCFGR_OPMDC_PDOWN)
  601. tmp = PHY_POWER_DOWN;
  602. else
  603. tmp = PHY_POWER_NORM;
  604. #else
  605. tmp = -1;
  606. #endif
  607. return tmp;
  608. }
  609. #endif
  610. #if _WIZCHIP_ == W5100S
  611. void wizphy_reset(void)
  612. {
  613. uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
  614. tmp |= BMCR_RESET;
  615. wiz_mdio_write(PHYMDIO_BMCR, tmp);
  616. while(wiz_mdio_read(PHYMDIO_BMCR)&BMCR_RESET){}
  617. }
  618. void wizphy_setphyconf(wiz_PhyConf* phyconf)
  619. {
  620. uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
  621. if(phyconf->mode == PHY_MODE_AUTONEGO)
  622. tmp |= BMCR_AUTONEGO;
  623. else
  624. {
  625. tmp &= ~BMCR_AUTONEGO;
  626. if(phyconf->duplex == PHY_DUPLEX_FULL)
  627. {
  628. tmp |= BMCR_DUP;
  629. }
  630. else
  631. {
  632. tmp &= ~BMCR_DUP;
  633. }
  634. if(phyconf->speed == PHY_SPEED_100)
  635. {
  636. tmp |= BMCR_SPEED;
  637. }
  638. else
  639. {
  640. tmp &= ~BMCR_SPEED;
  641. }
  642. }
  643. wiz_mdio_write(PHYMDIO_BMCR, tmp);
  644. }
  645. void wizphy_getphyconf(wiz_PhyConf* phyconf)
  646. {
  647. uint16_t tmp = 0;
  648. tmp = wiz_mdio_read(PHYMDIO_BMCR);
  649. phyconf->by = PHY_CONFBY_SW;
  650. if(tmp & BMCR_AUTONEGO)
  651. {
  652. phyconf->mode = PHY_MODE_AUTONEGO;
  653. }
  654. else
  655. {
  656. phyconf->mode = PHY_MODE_MANUAL;
  657. if(tmp&BMCR_DUP) phyconf->duplex = PHY_DUPLEX_FULL;
  658. else phyconf->duplex = PHY_DUPLEX_HALF;
  659. if(tmp&BMCR_SPEED) phyconf->speed = PHY_SPEED_100;
  660. else phyconf->speed = PHY_SPEED_10;
  661. }
  662. }
  663. int8_t wizphy_setphypmode(uint8_t pmode)
  664. {
  665. uint16_t tmp = 0;
  666. tmp = wiz_mdio_read(PHYMDIO_BMCR);
  667. if( pmode == PHY_POWER_DOWN)
  668. {
  669. tmp |= BMCR_PWDN;
  670. }
  671. else
  672. {
  673. tmp &= ~BMCR_PWDN;
  674. }
  675. wiz_mdio_write(PHYMDIO_BMCR, tmp);
  676. tmp = wiz_mdio_read(PHYMDIO_BMCR);
  677. if( pmode == PHY_POWER_DOWN)
  678. {
  679. if(tmp & BMCR_PWDN) return 0;
  680. }
  681. else
  682. {
  683. if((tmp & BMCR_PWDN) != BMCR_PWDN) return 0;
  684. }
  685. return -1;
  686. }
  687. #endif
  688. #if _WIZCHIP_ == W5500
  689. void wizphy_reset(void)
  690. {
  691. uint8_t tmp = getPHYCFGR();
  692. tmp &= PHYCFGR_RST;
  693. setPHYCFGR(tmp);
  694. tmp = getPHYCFGR();
  695. tmp |= ~PHYCFGR_RST;
  696. setPHYCFGR(tmp);
  697. }
  698. void wizphy_setphyconf(wiz_PhyConf* phyconf)
  699. {
  700. uint8_t tmp = 0;
  701. if(phyconf->by == PHY_CONFBY_SW)
  702. tmp |= PHYCFGR_OPMD;
  703. else
  704. tmp &= ~PHYCFGR_OPMD;
  705. if(phyconf->mode == PHY_MODE_AUTONEGO)
  706. tmp |= PHYCFGR_OPMDC_ALLA;
  707. else
  708. {
  709. if(phyconf->duplex == PHY_DUPLEX_FULL)
  710. {
  711. if(phyconf->speed == PHY_SPEED_100)
  712. tmp |= PHYCFGR_OPMDC_100F;
  713. else
  714. tmp |= PHYCFGR_OPMDC_10F;
  715. }
  716. else
  717. {
  718. if(phyconf->speed == PHY_SPEED_100)
  719. tmp |= PHYCFGR_OPMDC_100H;
  720. else
  721. tmp |= PHYCFGR_OPMDC_10H;
  722. }
  723. }
  724. setPHYCFGR(tmp);
  725. wizphy_reset();
  726. }
  727. void wizphy_getphyconf(wiz_PhyConf* phyconf)
  728. {
  729. uint8_t tmp = 0;
  730. tmp = getPHYCFGR();
  731. phyconf->by = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
  732. switch(tmp & PHYCFGR_OPMDC_ALLA)
  733. {
  734. case PHYCFGR_OPMDC_ALLA:
  735. case PHYCFGR_OPMDC_100FA:
  736. phyconf->mode = PHY_MODE_AUTONEGO;
  737. break;
  738. default:
  739. phyconf->mode = PHY_MODE_MANUAL;
  740. break;
  741. }
  742. switch(tmp & PHYCFGR_OPMDC_ALLA)
  743. {
  744. case PHYCFGR_OPMDC_100FA:
  745. case PHYCFGR_OPMDC_100F:
  746. case PHYCFGR_OPMDC_100H:
  747. phyconf->speed = PHY_SPEED_100;
  748. break;
  749. default:
  750. phyconf->speed = PHY_SPEED_10;
  751. break;
  752. }
  753. switch(tmp & PHYCFGR_OPMDC_ALLA)
  754. {
  755. case PHYCFGR_OPMDC_100FA:
  756. case PHYCFGR_OPMDC_100F:
  757. case PHYCFGR_OPMDC_10F:
  758. phyconf->duplex = PHY_DUPLEX_FULL;
  759. break;
  760. default:
  761. phyconf->duplex = PHY_DUPLEX_HALF;
  762. break;
  763. }
  764. }
  765. void wizphy_getphystat(wiz_PhyConf* phyconf)
  766. {
  767. uint8_t tmp = getPHYCFGR();
  768. phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
  769. phyconf->speed = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
  770. }
  771. int8_t wizphy_setphypmode(uint8_t pmode)
  772. {
  773. uint8_t tmp = 0;
  774. tmp = getPHYCFGR();
  775. if((tmp & PHYCFGR_OPMD)== 0) return -1;
  776. tmp &= ~PHYCFGR_OPMDC_ALLA;
  777. if( pmode == PHY_POWER_DOWN)
  778. tmp |= PHYCFGR_OPMDC_PDOWN;
  779. else
  780. tmp |= PHYCFGR_OPMDC_ALLA;
  781. setPHYCFGR(tmp);
  782. wizphy_reset();
  783. tmp = getPHYCFGR();
  784. if( pmode == PHY_POWER_DOWN)
  785. {
  786. if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
  787. }
  788. else
  789. {
  790. if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
  791. }
  792. return -1;
  793. }
  794. #endif
  795. void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
  796. {
  797. setSHAR(pnetinfo->mac);
  798. setGAR(pnetinfo->gw);
  799. setSUBR(pnetinfo->sn);
  800. setSIPR(pnetinfo->ip);
  801. _DNS_[0] = pnetinfo->dns[0];
  802. _DNS_[1] = pnetinfo->dns[1];
  803. _DNS_[2] = pnetinfo->dns[2];
  804. _DNS_[3] = pnetinfo->dns[3];
  805. _DHCP_ = pnetinfo->dhcp;
  806. }
  807. void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
  808. {
  809. getSHAR(pnetinfo->mac);
  810. getGAR(pnetinfo->gw);
  811. getSUBR(pnetinfo->sn);
  812. getSIPR(pnetinfo->ip);
  813. pnetinfo->dns[0]= _DNS_[0];
  814. pnetinfo->dns[1]= _DNS_[1];
  815. pnetinfo->dns[2]= _DNS_[2];
  816. pnetinfo->dns[3]= _DNS_[3];
  817. pnetinfo->dhcp = _DHCP_;
  818. }
  819. int8_t wizchip_setnetmode(netmode_type netmode)
  820. {
  821. uint8_t tmp = 0;
  822. #if _WIZCHIP_ != W5500
  823. if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1;
  824. #else
  825. if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1;
  826. #endif
  827. tmp = getMR();
  828. tmp |= (uint8_t)netmode;
  829. setMR(tmp);
  830. return 0;
  831. }
  832. netmode_type wizchip_getnetmode(void)
  833. {
  834. return (netmode_type) getMR();
  835. }
  836. void wizchip_settimeout(wiz_NetTimeout* nettime)
  837. {
  838. setRCR(nettime->retry_cnt);
  839. setRTR(nettime->time_100us);
  840. }
  841. void wizchip_gettimeout(wiz_NetTimeout* nettime)
  842. {
  843. nettime->retry_cnt = getRCR();
  844. nettime->time_100us = getRTR();
  845. }