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[docs][libcpu][arm][cortex-a] correct TLBIALL comments in start_gcc.S

laidene пре 1 недеља
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11a1348ed6
1 измењених фајлова са 3 додато и 3 уклоњено
  1. 3 3
      libcpu/arm/cortex-a/start_gcc.S

+ 3 - 3
libcpu/arm/cortex-a/start_gcc.S

@@ -182,7 +182,7 @@ continue_exit:
 
 
     /* invalidate TLB, I-cache and branch predictor */
     /* invalidate TLB, I-cache and branch predictor */
     mov r0, #0
     mov r0, #0
-    mcr p15, 0, r0, c8, c7, 0    /* ITLBIALL */
+    mcr p15, 0, r0, c8, c7, 0    /* TLBIALL */
     mcr p15, 0, r0, c7, c5, 0    /* ICIALLU */
     mcr p15, 0, r0, c7, c5, 0    /* ICIALLU */
     mcr p15, 0, r0, c7, c5, 6    /* BPIALL */
     mcr p15, 0, r0, c7, c5, 6    /* BPIALL */
     dsb
     dsb
@@ -268,7 +268,7 @@ enable_mmu_page_table_early:
 
 
     /* invalidate TLB, I-cache and branch predictor */
     /* invalidate TLB, I-cache and branch predictor */
     mov r0, #0
     mov r0, #0
-    mcr p15, 0, r0, c8, c7, 0           /* ITLBIALL */
+    mcr p15, 0, r0, c8, c7, 0           /* TLBIALL */
     mcr p15, 0, r0, c7, c5, 0           /* ICIALLU */
     mcr p15, 0, r0, c7, c5, 0           /* ICIALLU */
     mcr p15, 0, r0, c7, c5, 6           /* BPIALL */
     mcr p15, 0, r0, c7, c5, 6           /* BPIALL */
 
 
@@ -660,7 +660,7 @@ rt_hw_mmu_switch:
 
 
     /* invalidate TLB, I-cache and branch predictor */
     /* invalidate TLB, I-cache and branch predictor */
     mov r0, #0
     mov r0, #0
-    mcr p15, 0, r0, c8, c7, 0       /* ITLBIALL */
+    mcr p15, 0, r0, c8, c7, 0       /* TLBIALL */
     mcr p15, 0, r0, c7, c5, 0       /* ICIALLU */
     mcr p15, 0, r0, c7, c5, 0       /* ICIALLU */
     mcr p15, 0, r0, c7, c5, 6       /* BPIALL */
     mcr p15, 0, r0, c7, c5, 6       /* BPIALL */