Hc32 pr (#6003)

* HC32F460 supported

Co-authored-by: JamieTx <yangjp24@126.com>
Co-authored-by: Jamie <48308473+JamieTx@users.noreply.github.com>

bsp/hc32/README.md

@@ -7,6 +7,7 @@ HC32 系列 BSP 目前支持情况如下表所示：
 |:------------------------- |:------------------------- |
 | **F1 系列** |  |
 | **F4 系列** |  |
+| [ev_hc32f460_lqfp100_v2](ev_hc32f460_lqfp100_v2) | 小华 官方 EV_F460_LQ100_V2 开发板 |
 | [ev_hc32f4a0_lqfp176](ev_hc32f4a0_lqfp176) | 小华 官方 EV_F4A0_LQ176 开发板 |
 | **M1 系列** |  |
 | **M4 系列** |  |

bsp/hc32/ev_hc32f460_lqfp100_v2/.config

@@ -0,0 +1,688 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=1000
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_HOOK_USING_FUNC_PTR=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+# CONFIG_RT_USING_TIMER_SOFT is not set
+
+#
+# kservice optimization
+#
+# CONFIG_RT_KSERVICE_USING_STDLIB is not set
+# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
+# CONFIG_RT_USING_TINY_FFS is not set
+# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
+CONFIG_RT_DEBUG=y
+CONFIG_RT_DEBUG_COLOR=y
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_MEMHEAP is not set
+CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
+# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
+# CONFIG_RT_USING_SLAB_AS_HEAP is not set
+# CONFIG_RT_USING_USERHEAP is not set
+# CONFIG_RT_USING_NOHEAP is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+# CONFIG_RT_USING_HEAP_ISR is not set
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
+CONFIG_RT_VER_NUM=0x40101
+CONFIG_ARCH_ARM=y
+CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M4=y
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+# CONFIG_RT_USING_LEGACY is not set
+CONFIG_RT_USING_MSH=y
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_CMD_SIZE=80
+CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_ARG_MAX=10
+# CONFIG_RT_USING_DFS is not set
+# CONFIG_RT_USING_FAL is not set
+# CONFIG_RT_USING_LWP is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
+CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
+CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
+CONFIG_RT_USING_SERIAL=y
+CONFIG_RT_USING_SERIAL_V1=y
+# CONFIG_RT_USING_SERIAL_V2 is not set
+CONFIG_RT_SERIAL_USING_DMA=y
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+CONFIG_RT_USING_SPI=y
+# CONFIG_RT_USING_SPI_BITOPS is not set
+# CONFIG_RT_USING_QSPI is not set
+# CONFIG_RT_USING_SPI_MSD is not set
+# CONFIG_RT_USING_SFUD is not set
+# CONFIG_RT_USING_ENC28J60 is not set
+# CONFIG_RT_USING_SPI_WIFI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB is not set
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# C/C++ and POSIX layer
+#
+CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
+
+#
+# POSIX (Portable Operating System Interface) layer
+#
+# CONFIG_RT_USING_POSIX_FS is not set
+# CONFIG_RT_USING_POSIX_DELAY is not set
+# CONFIG_RT_USING_POSIX_CLOCK is not set
+# CONFIG_RT_USING_POSIX_TIMER is not set
+# CONFIG_RT_USING_PTHREADS is not set
+# CONFIG_RT_USING_MODULE is not set
+
+#
+# Interprocess Communication (IPC)
+#
+# CONFIG_RT_USING_POSIX_PIPE is not set
+# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set
+# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set
+
+#
+# Socket is in the 'Network' category
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Network
+#
+# CONFIG_RT_USING_SAL is not set
+# CONFIG_RT_USING_NETDEV is not set
+# CONFIG_RT_USING_LWIP is not set
+# CONFIG_RT_USING_AT is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_VAR_EXPORT is not set
+# CONFIG_RT_USING_RT_LINK is not set
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# RT-Thread Utestcases
+#
+# CONFIG_RT_USING_UTESTCASES is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_LWIP is not set
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+# CONFIG_PKG_USING_ZB_COORDINATOR is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_EZ_IOT_OS is not set
+# CONFIG_PKG_USING_IOTSHARP_SDK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
+# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_BSAL is not set
+# CONFIG_PKG_USING_AGILE_MODBUS is not set
+# CONFIG_PKG_USING_AGILE_FTP is not set
+# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
+# CONFIG_PKG_USING_RT_LINK_HW is not set
+# CONFIG_PKG_USING_LORA_PKT_FWD is not set
+# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
+# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
+# CONFIG_PKG_USING_HM is not set
+# CONFIG_PKG_USING_SMALL_MODBUS is not set
+# CONFIG_PKG_USING_NET_SERVER is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_LIBSODIUM is not set
+# CONFIG_PKG_USING_LIBHYDROGEN is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
+
+#
+# language packages
+#
+
+#
+# JSON: JavaScript Object Notation, a lightweight data-interchange format
+#
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+
+#
+# XML: Extensible Markup Language
+#
+# CONFIG_PKG_USING_SIMPLE_XML is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_LUATOS_SOC is not set
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+# CONFIG_PKG_USING_PIKASCRIPT is not set
+
+#
+# multimedia packages
+#
+
+#
+# LVGL: powerful and easy-to-use embedded GUI library
+#
+# CONFIG_PKG_USING_LVGL is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
+# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
+
+#
+# u8g2: a monochrome graphic library
+#
+# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_PDFGEN is not set
+# CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
+# CONFIG_PKG_USING_NUEMWIN is not set
+# CONFIG_PKG_USING_MP3PLAYER is not set
+# CONFIG_PKG_USING_TINYJPEG is not set
+# CONFIG_PKG_USING_UGUI is not set
+
+#
+# PainterEngine: A cross-platform graphics application framework written in C language
+#
+# CONFIG_PKG_USING_PAINTERENGINE is not set
+# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_TERMBOX is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_SEGGER_RTT is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ULOG_FILE is not set
+# CONFIG_PKG_USING_LOGMGR is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
+# CONFIG_PKG_USING_GBK2UTF8 is not set
+# CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
+# CONFIG_PKG_USING_WAMR is not set
+# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
+# CONFIG_PKG_USING_LWLOG is not set
+# CONFIG_PKG_USING_ANV_TRACE is not set
+# CONFIG_PKG_USING_ANV_MEMLEAK is not set
+# CONFIG_PKG_USING_ANV_TESTSUIT is not set
+# CONFIG_PKG_USING_ANV_BENCH is not set
+# CONFIG_PKG_USING_DEVMEM is not set
+# CONFIG_PKG_USING_REGEX is not set
+# CONFIG_PKG_USING_MEM_SANDBOX is not set
+# CONFIG_PKG_USING_SOLAR_TERMS is not set
+# CONFIG_PKG_USING_GAN_ZHI is not set
+# CONFIG_PKG_USING_FDT is not set
+# CONFIG_PKG_USING_CBOX is not set
+# CONFIG_PKG_USING_SNOWFLAKE is not set
+# CONFIG_PKG_USING_HASH_MATCH is not set
+# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
+
+#
+# system packages
+#
+
+#
+# enhanced kernel services
+#
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
+# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
+
+#
+# POSIX extension functions
+#
+# CONFIG_PKG_USING_POSIX_GETLINE is not set
+# CONFIG_PKG_USING_POSIX_WCWIDTH is not set
+# CONFIG_PKG_USING_POSIX_ITOA is not set
+# CONFIG_PKG_USING_POSIX_STRINGS is not set
+
+#
+# acceleration: Assembly language or algorithmic acceleration packages
+#
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+
+#
+# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
+#
+# CONFIG_PKG_USING_CMSIS_5 is not set
+# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
+# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
+# CONFIG_PKG_USING_RTDUINO is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_DFS_JFFS2 is not set
+# CONFIG_PKG_USING_DFS_UFFS is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+# CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_LPM is not set
+# CONFIG_PKG_USING_TLSF is not set
+# CONFIG_PKG_USING_EVENT_RECORDER is not set
+# CONFIG_PKG_USING_ARM_2D is not set
+# CONFIG_PKG_USING_MCUBOOT is not set
+# CONFIG_PKG_USING_TINYUSB is not set
+# CONFIG_PKG_USING_CHERRYUSB is not set
+# CONFIG_PKG_USING_KMULTI_RTIMER is not set
+# CONFIG_PKG_USING_TFDB is not set
+# CONFIG_PKG_USING_QPC is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_AS7341 is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_MULTI_INFRARED is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+# CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_RS232 is not set
+# CONFIG_PKG_USING_NES is not set
+# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
+# CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+# CONFIG_PKG_USING_LIBNFC is not set
+# CONFIG_PKG_USING_MFOC is not set
+# CONFIG_PKG_USING_TMC51XX is not set
+# CONFIG_PKG_USING_TCA9534 is not set
+# CONFIG_PKG_USING_KOBUKI is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_MICRO_ROS is not set
+# CONFIG_PKG_USING_MCP23008 is not set
+# CONFIG_PKG_USING_BLUETRUM_SDK is not set
+# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
+# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
+# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
+# CONFIG_PKG_USING_BL_MCU_SDK is not set
+# CONFIG_PKG_USING_SOFT_SERIAL is not set
+# CONFIG_PKG_USING_MB85RS16 is not set
+# CONFIG_PKG_USING_CW2015 is not set
+# CONFIG_PKG_USING_RFM300 is not set
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_QUEST is not set
+# CONFIG_PKG_USING_NAXOS is not set
+
+#
+# miscellaneous packages
+#
+
+#
+# project laboratory
+#
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+
+#
+# entertainment: terminal games and other interesting software packages
+#
+# CONFIG_PKG_USING_CMATRIX is not set
+# CONFIG_PKG_USING_SL is not set
+# CONFIG_PKG_USING_CAL is not set
+# CONFIG_PKG_USING_ACLOCK is not set
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_DONUT is not set
+# CONFIG_PKG_USING_COWSAY is not set
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_MINIZIP is not set
+# CONFIG_PKG_USING_HEATSHRINK is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_STATE_MACHINE is not set
+# CONFIG_PKG_USING_DESIGN_PATTERN is not set
+# CONFIG_PKG_USING_CONTROLLER is not set
+# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
+# CONFIG_PKG_USING_MFBD is not set
+# CONFIG_PKG_USING_SLCAN2RTT is not set
+# CONFIG_PKG_USING_SOEM is not set
+CONFIG_SOC_FAMILY_HC32=y
+CONFIG_SOC_SERIES_HC32F4=y
+
+#
+# Hardware Drivers Config
+#
+CONFIG_SOC_HC32F460PE=y
+
+#
+# Onboard Peripheral Drivers
+#
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_GPIO=y
+CONFIG_BSP_USING_UART=y
+# CONFIG_BSP_USING_UART1 is not set
+# CONFIG_BSP_USING_UART2 is not set
+# CONFIG_BSP_USING_UART3 is not set
+CONFIG_BSP_USING_UART4=y
+# CONFIG_BSP_UART4_RX_USING_DMA is not set
+# CONFIG_BSP_UART4_TX_USING_DMA is not set
+
+#
+# Board extended module Drivers
+#

bsp/hc32/ev_hc32f460_lqfp100_v2/.gitignore

@@ -0,0 +1,42 @@
+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h

bsp/hc32/ev_hc32f460_lqfp100_v2/Kconfig

@@ -0,0 +1,21 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+ 
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "../libraries/Kconfig"
+source "board/Kconfig"

bsp/hc32/ev_hc32f460_lqfp100_v2/README.md

@@ -0,0 +1,107 @@
+# XHSC EV_F460_LQ100_V2 开发板 BSP 说明
+
+## 简介
+
+本文档为小华半导体为 EV_F460_LQ100_V2 开发板提供的 BSP (板级支持包) 说明。
+
+主要内容如下：
+
+- 开发板资源介绍
+- BSP 快速上手
+- 进阶使用方法
+
+通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
+
+## 开发板介绍
+
+EV_F460_LQ100_V2 是 XHSC 官方推出的开发板，搭载 HC32F460PETB 芯片，基于 ARM Cortex-M4 内核，最高主频 200 MHz，具有丰富的板载资源，可以充分发挥 HC32F460PETB 的芯片性能。
+
+开发板外观如下图所示：
+
+ ![board](figures/board.jpg)
+
+EV_F460_LQ100_V2 开发板常用 **板载资源** 如下：
+
+- MCU: HC32F460PETB，主频200MHz，512KB FLASH，192KB RAM
+- 常用外设
+  - LED: 4 个，User LED(LED0，LED1，LED2，LED3)。
+  - 按键: 11 个，矩阵键盘(K1~K9), WAKEUP(K10), RESET(K11)
+- 常用接口: USB转串口、SD卡接口、USB FS、3.5mm耳机接口、Line in接口、喇叭接口
+- 调试接口: 板载DAP调试器、标准JTAG/SWD
+
+开发板更多详细信息请参考小华半导体半导体[EV_F460_LQ100_V2](http://www.xhsc.com.cn)
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下：
+
+| **板载外设**  | **支持情况** |               **备注**                |
+| :------------ | :-----------: | :-----------------------------------: |
+| USB 转串口    |      支持     |          使用 UART4                  |
+| LED           |     支持     |           LED                   |
+| **片上外设**  | **支持情况** |               **备注**                |
+| :------------ | :-----------: | :-----------------------------------: |
+| GPIO          |     支持     | PA0, PA1... PH2 ---> PIN: 0, 1...82 |
+| UART          |     支持     |              UART1~4                 |
+
+
+## 使用说明
+
+使用说明分为如下两个章节：
+
+- 快速上手
+
+    本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
+
+- 进阶使用
+
+    本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
+
+
+### 快速上手
+
+本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
+
+#### 硬件连接
+
+使用Type-A to MircoUSB线连接开发板和PC供电。
+
+#### 编译下载
+
+双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
+
+> 工程默认配置使用板载 DAP 下载程序，点击下载按钮即可下载程序到开发板。
+
+#### 运行结果
+
+下载程序成功之后，系统会自动运行，观察开发板上LED的运行效果，绿色LED1会周期性闪烁。
+
+USB虚拟COM端口默认连接串口4，在终端工具里打开相应的串口，复位设备后，可以看到 RT-Thread 的输出信息:
+
+```
+ \ | /
+- RT -     Thread Operating System
+ / | \     4.1.1 build May 25 2022 08:55:55
+ 2006 - 2022 Copyright by RT-Thread team
+msh >
+```
+
+### 进阶使用
+
+此 BSP 默认只开启了 GPIO 和 串口 4 的功能，更多高级功能需要利用 env 工具对 BSP 进行配置，步骤如下：
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons --target=mdk5/iar` 命令重新生成工程。
+
+## 注意事项
+
+## 联系人信息
+
+维护人:
+
+-  [小华半导体MCU](http://www.xhsc.com.cn)，邮箱：<mcu_eco@xhsc.com.cn>

bsp/hc32/ev_hc32f460_lqfp100_v2/SConscript

@@ -0,0 +1,15 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/hc32/ev_hc32f460_lqfp100_v2/SConstruct

@@ -0,0 +1,60 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+hc32_library = 'hc32f460_ddl'
+rtconfig.BSP_LIBRARY_TYPE = hc32_library
+
+# include libraries
+objs.extend(SConscript(os.path.join(libraries_path_prefix, hc32_library, 'SConscript')))
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'hc32_drivers', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/hc32/ev_hc32f460_lqfp100_v2/applications/SConscript

@@ -0,0 +1,11 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'applications')
+src	= Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/hc32/ev_hc32f460_lqfp100_v2/applications/main.c

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+
+/* defined the LED_GREEN pin: PD4 */
+#define LED_GREEN_PIN GET_PIN(D, 4)
+
+
+int main(void)
+{
+    /* set LED_GREEN_PIN pin mode to output */
+    rt_pin_mode(LED_GREEN_PIN, PIN_MODE_OUTPUT);
+
+    while (1)
+    {
+        rt_pin_write(LED_GREEN_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED_GREEN_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
+}
+

bsp/hc32/ev_hc32f460_lqfp100_v2/board/Kconfig

@@ -0,0 +1,88 @@
+menu "Hardware Drivers Config"
+
+config SOC_HC32F460PE
+    bool 
+    select SOC_SERIES_HC32F4
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
+menu "Onboard Peripheral Drivers"
+
+endmenu
+
+menu "On-chip Peripheral Drivers"
+    config BSP_USING_GPIO
+        bool "Enable GPIO"
+        select RT_USING_PIN
+        default y
+
+    menuconfig BSP_USING_UART
+        bool "Enable UART"
+        default y
+        select RT_USING_SERIAL
+        if BSP_USING_UART
+            config BSP_USING_UART1
+                bool "Enable UART1"
+                default y
+
+            config BSP_UART1_RX_USING_DMA
+                bool "Enable UART1 RX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+
+            config BSP_UART1_TX_USING_DMA
+                bool "Enable UART1 TX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+
+            config BSP_USING_UART2
+                bool "Enable UART2"
+                default n
+
+            config BSP_UART2_RX_USING_DMA
+                bool "Enable UART2 RX DMA"
+                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
+                default n
+
+            config BSP_UART2_TX_USING_DMA
+                bool "Enable UART2 TX DMA"
+                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
+                default n
+            
+            config BSP_USING_UART3
+                bool "Enable UART3"
+                default n
+
+            config BSP_UART3_RX_USING_DMA
+                bool "Enable UART3 RX DMA"
+                depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
+                default n
+
+            config BSP_UART3_TX_USING_DMA
+                bool "Enable UART3 TX DMA"
+                depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
+                default n
+
+            config BSP_USING_UART4
+                bool "Enable UART4"
+                default n
+            
+            config BSP_UART4_RX_USING_DMA
+                bool "Enable UART4 RX DMA"
+                depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
+                default n
+
+            config BSP_UART4_TX_USING_DMA
+                bool "Enable UART4 TX DMA"
+                depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
+                default n
+        endif
+
+endmenu
+
+menu "Board extended module Drivers"
+
+endmenu
+ 
+endmenu

bsp/hc32/ev_hc32f460_lqfp100_v2/board/SConscript

@@ -0,0 +1,31 @@
+import os
+import rtconfig
+from building import *
+
+Import('SDK_LIB')
+
+cwd = GetCurrentDir()
+
+# add general drivers
+src = Split('''
+board.c
+board_config.c
+''')
+
+path =  [cwd]
+path += [cwd + '/ports']
+path += [cwd + '/config']
+
+startup_path_prefix = SDK_LIB
+
+if rtconfig.CROSS_TOOL == 'gcc':
+    src += [startup_path_prefix + '/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f460.S']
+elif rtconfig.CROSS_TOOL == 'keil':
+    src += [startup_path_prefix + '/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f460.s']
+elif rtconfig.CROSS_TOOL == 'iar':
+    src += [startup_path_prefix + '/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f460.s']
+
+CPPDEFINES = ['HC32F460']
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+
+Return('group')

bsp/hc32/ev_hc32f460_lqfp100_v2/board/board.c

@@ -0,0 +1,177 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#include "board.h"
+
+/* unlock/lock peripheral */
+#define EXAMPLE_PERIPH_WE               (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \
+                                         LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM)
+#define EXAMPLE_PERIPH_WP               (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM)
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @param  None
+  * @retval None
+  */
+void Error_Handler(void)
+{
+    /* USER CODE BEGIN Error_Handler */
+    /* User can add his own implementation to report the HAL error return state */
+    while (1)
+    {
+    }
+    /* USER CODE END Error_Handler */
+}
+
+/** System Clock Configuration
+*/
+void SystemClock_Config(void)
+{
+    stc_clock_xtal_init_t     stcXtalInit;
+    stc_clock_pll_init_t      stcMpllInit;
+
+    (void)CLK_XtalStructInit(&stcXtalInit);
+    (void)CLK_PLLStructInit(&stcMpllInit);
+
+    /* Set bus clk div. */
+    CLK_SetClockDiv(CLK_BUS_CLK_ALL, (CLK_HCLK_DIV1 | CLK_EXCLK_DIV2 | CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | \
+                                      CLK_PCLK2_DIV4 | CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2));
+
+    /* Config Xtal and enable Xtal */
+    stcXtalInit.u8Mode = CLK_XTAL_MD_OSC;
+    stcXtalInit.u8Drv = CLK_XTAL_DRV_ULOW;
+    stcXtalInit.u8State = CLK_XTAL_ON;
+    stcXtalInit.u8StableTime = CLK_XTAL_STB_2MS;
+    (void)CLK_XtalInit(&stcXtalInit);
+
+    /* MPLL config (XTAL / pllmDiv * plln / PllpDiv = 200M). */
+    stcMpllInit.PLLCFGR = 0UL;
+    stcMpllInit.PLLCFGR_f.PLLM = 1UL - 1UL;
+    stcMpllInit.PLLCFGR_f.PLLN = 50UL - 1UL;
+    stcMpllInit.PLLCFGR_f.PLLP = 2UL - 1UL;
+    stcMpllInit.PLLCFGR_f.PLLQ = 2UL - 1UL;
+    stcMpllInit.PLLCFGR_f.PLLR = 2UL - 1UL;
+    stcMpllInit.u8PLLState = CLK_PLL_ON;
+    stcMpllInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL;
+    (void)CLK_PLLInit(&stcMpllInit);
+    /* Wait MPLL ready. */
+    while (SET != CLK_GetStableStatus(CLK_STB_FLAG_PLL))
+    {
+        ;
+    }
+
+    /* sram init include read/write wait cycle setting */
+    SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE0, SRAM_WAIT_CYCLE0);
+    SRAM_SetWaitCycle((SRAM_SRAM12 | SRAM_SRAM3 | SRAM_SRAMR), SRAM_WAIT_CYCLE1, SRAM_WAIT_CYCLE1);
+
+    /* flash read wait cycle setting */
+    (void)EFM_SetWaitCycle(EFM_WAIT_CYCLE5);
+    /* 3 cycles for 126MHz ~ 200MHz */
+    GPIO_SetReadWaitCycle(GPIO_RD_WAIT3);
+    /* Switch driver ability */
+    (void)PWC_HighSpeedToHighPerformance();
+    /* Switch system clock source to MPLL. */
+    CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
+}
+
+/** Peripheral Clock Configuration
+*/
+static void PeripheralClock_Config(void)
+{
+#if defined(HC32F460)
+#if defined(BSP_USING_CAN1)
+    CLK_SetCANClockSrc(CLK_CAN1, CLK_CANCLK_SYSCLK_DIV6);
+#endif
+
+#if defined(RT_USING_ADC)
+    CLK_SetPeriClockSrc(CLK_PERIPHCLK_PCLK);
+#endif
+#endif
+}
+
+/*******************************************************************************
+ * Function Name  : SysTick_Configuration
+ * Description    : Configures the SysTick for OS tick.
+ * Input          : None
+ * Output         : None
+ * Return         : None
+ *******************************************************************************/
+void  SysTick_Configuration(void)
+{
+    stc_clock_freq_t stcClkFreq;
+    rt_uint32_t cnts;
+
+    CLK_GetClockFreq(&stcClkFreq);
+
+    cnts = (rt_uint32_t)stcClkFreq.u32HclkFreq / RT_TICK_PER_SECOND;
+
+    SysTick_Config(cnts);
+}
+
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+/**
+ * This function will initial HC32 board.
+ */
+void rt_hw_board_init()
+{
+    /* Peripheral registers write unprotected */
+    LL_PERIPH_WE(EXAMPLE_PERIPH_WE);
+
+    SystemClock_Config();
+    PeripheralClock_Config();
+    /* Configure the SysTick */
+    SysTick_Configuration();
+
+    /* Heap initialization */
+#if defined(RT_USING_HEAP)
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+#endif
+
+    /* Board underlying hardware initialization */
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+
+#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+}
+
+void rt_hw_us_delay(rt_uint32_t us)
+{
+    uint32_t start, now, delta, reload, us_tick;
+    start = SysTick->VAL;
+    reload = SysTick->LOAD;
+    us_tick = SystemCoreClock / 1000000UL;
+
+    do
+    {
+        now = SysTick->VAL;
+        delta = start > now ?  start - now : reload + start - now;
+    }
+    while (delta < us_tick * us);
+}
+
+/*@}*/

bsp/hc32/ev_hc32f460_lqfp100_v2/board/board.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <rtthread.h>
+#include "hc32_ll.h"
+#include "drv_gpio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define HC32_SRAM_SIZE                  (188)
+#define HC32_SRAM_END                   (0x1FFF8000 + HC32_SRAM_SIZE * 1024)
+
+#ifdef __CC_ARM
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN                      (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="HEAP"
+#define HEAP_BEGIN                      (__segment_end("HEAP"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN                      (&__bss_end)
+#endif
+
+#define HEAP_END                        HC32_SRAM_END
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

bsp/hc32/ev_hc32f460_lqfp100_v2/board/board_config.c

@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#include <rtdevice.h>
+#include "board_config.h"
+
+/**
+ * The below functions will initialize HC32 board.
+ */
+
+#if defined RT_USING_SERIAL
+rt_err_t rt_hw_board_uart_init(CM_USART_TypeDef *USARTx)
+{
+    rt_err_t result = RT_EOK;
+
+    switch ((rt_uint32_t)USARTx)
+    {
+#if defined(BSP_USING_UART4)
+    case (rt_uint32_t)CM_USART4:
+        /* Configure USART RX/TX pin. */
+        GPIO_SetFunc(USART4_RX_PORT, USART4_RX_PIN, GPIO_FUNC_37);
+        GPIO_SetFunc(USART4_TX_PORT, USART4_TX_PIN, GPIO_FUNC_36);
+        break;
+#endif
+    default:
+        result = -RT_ERROR;
+        break;
+    }
+
+    return result;
+}
+#endif
+

bsp/hc32/ev_hc32f460_lqfp100_v2/board/board_config.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+
+#ifndef __BOARD_CONFIG_H__
+#define __BOARD_CONFIG_H__
+
+#include <rtconfig.h>
+#include "hc32_ll.h"
+#include "drv_config.h"
+
+
+/************************ USART port **********************/
+#if defined(BSP_USING_UART1)
+    #define USART1_RX_PORT                  (GPIO_PORT_C)
+    #define USART1_RX_PIN                   (GPIO_PIN_04)
+
+    #define USART1_TX_PORT                  (GPIO_PORT_A)
+    #define USART1_TX_PIN                   (GPIO_PIN_07)
+#endif
+
+#if defined(BSP_USING_UART2)
+    #define USART2_RX_PORT                  (GPIO_PORT_A)
+    #define USART2_RX_PIN                   (GPIO_PIN_04)
+
+    #define USART2_TX_PORT                  (GPIO_PORT_A)
+    #define USART2_TX_PIN                   (GPIO_PIN_02)
+#endif
+
+#if defined(BSP_USING_UART3)
+    #define USART3_RX_PORT                  (GPIO_PORT_C)
+    #define USART3_RX_PIN                   (GPIO_PIN_13)
+
+    #define USART3_TX_PORT                  (GPIO_PORT_H)
+    #define USART3_TX_PIN                   (GPIO_PIN_02)
+#endif
+
+#if defined(BSP_USING_UART4)
+    #define USART4_RX_PORT                  (GPIO_PORT_B)
+    #define USART4_RX_PIN                   (GPIO_PIN_09)
+
+    #define USART4_TX_PORT                  (GPIO_PORT_E)
+    #define USART4_TX_PIN                   (GPIO_PIN_06)
+#endif
+
+#endif

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/dma_config.h

@@ -0,0 +1,195 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#ifndef __DMA_CONFIG_H__
+#define __DMA_CONFIG_H__
+
+#include <rtthread.h>
+#include "irq_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* DMA1 ch0 */
+#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
+#define SPI1_RX_DMA_INSTANCE            CM_DMA1
+#define SPI1_RX_DMA_CHANNEL             DMA_CH0
+#define SPI1_RX_DMA_CLOCK               (PWC_FCG0_DMA1 | PWC_FCG0_AOS)
+#define SPI1_RX_DMA_TRIG_SELECT         AOS_DMA1_0
+#define SPI1_RX_DMA_IRQn                BSP_DMA1_CH0_IRQ_NUM
+#define SPI1_RX_DMA_INT_PRIO            BSP_DMA1_CH0_IRQ_PRIO
+#define SPI1_RX_DMA_INT_SRC             INT_SRC_DMA1_TC0
+#endif
+
+#if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE)
+#define SPI3_RX_DMA_INSTANCE            CM_DMA1
+#define SPI3_RX_DMA_CHANNEL             DMA_CH0
+#define SPI3_RX_DMA_CLOCK               (PWC_FCG0_DMA1 | PWC_FCG0_AOS)
+#define SPI3_RX_DMA_TRIG_SELECT         AOS_DMA1_0
+#define SPI3_RX_DMA_IRQn                BSP_DMA1_CH0_IRQ_NUM
+#define SPI3_RX_DMA_INT_PRIO            BSP_DMA1_CH0_IRQ_PRIO
+#define SPI3_RX_DMA_INT_SRC             INT_SRC_DMA1_TC0
+#endif
+
+/* DMA1 ch1 */
+#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
+#define SPI1_TX_DMA_INSTANCE            CM_DMA1
+#define SPI1_TX_DMA_CHANNEL             DMA_CH1
+#define SPI1_TX_DMA_CLOCK               (PWC_FCG0_DMA1 | PWC_FCG0_AOS)
+#define SPI1_TX_DMA_TRIG_SELECT         AOS_DMA1_1
+#define SPI1_TX_DMA_IRQn                BSP_DMA1_CH1_IRQ_NUM
+#define SPI1_TX_DMA_INT_PRIO            BSP_DMA1_CH1_IRQ_PRIO
+#define SPI1_TX_DMA_INT_SRC             INT_SRC_DMA1_TC1
+#endif
+
+#if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_INSTANCE)
+#define SPI3_TX_DMA_INSTANCE            CM_DMA1
+#define SPI3_TX_DMA_CHANNEL             DMA_CH1
+#define SPI3_TX_DMA_CLOCK               (PWC_FCG0_DMA1 | PWC_FCG0_AOS)
+#define SPI3_TX_DMA_TRIG_SELECT         AOS_DMA1_1
+#define SPI3_TX_DMA_IRQn                BSP_DMA1_CH1_IRQ_NUM
+#define SPI3_TX_DMA_INT_PRIO            BSP_DMA1_CH1_IRQ_PRIO
+#define SPI3_TX_DMA_INT_SRC             INT_SRC_DMA1_TC1
+#endif
+
+/* DMA1 ch2 */
+#if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
+#define SPI2_RX_DMA_INSTANCE            CM_DMA1
+#define SPI2_RX_DMA_CHANNEL             DMA_CH2
+#define SPI2_RX_DMA_CLOCK               (PWC_FCG0_DMA1 | PWC_FCG0_AOS)
+#define SPI2_RX_DMA_TRIG_SELECT         AOS_DMA1_2
+#define SPI2_RX_DMA_IRQn                BSP_DMA1_CH2_IRQ_NUM
+#define SPI2_RX_DMA_INT_PRIO            BSP_DMA1_CH2_IRQ_PRIO
+#define SPI2_RX_DMA_INT_SRC             INT_SRC_DMA1_TC2
+#endif
+
+/* DMA1 ch3 */
+#if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
+#define SPI2_TX_DMA_INSTANCE            CM_DMA1
+#define SPI2_TX_DMA_CHANNEL             DMA_CH3
+#define SPI2_TX_DMA_CLOCK               (PWC_FCG0_DMA1 | PWC_FCG0_AOS)
+#define SPI2_TX_DMA_TRIG_SELECT         AOS_DMA1_3
+#define SPI2_TX_DMA_IRQn                BSP_DMA1_CH3_IRQ_NUM
+#define SPI2_TX_DMA_INT_PRIO            BSP_DMA1_CH3_IRQ_PRIO
+#define SPI2_TX_DMA_INT_SRC             INT_SRC_DMA1_TC3
+#endif
+
+#if defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_INSTANCE)
+#define SPI4_RX_DMA_INSTANCE            CM_DMA1
+#define SPI4_RX_DMA_CHANNEL             DMA_CH2
+#define SPI4_RX_DMA_CLOCK               (PWC_FCG0_DMA1 | PWC_FCG0_AOS)
+#define SPI4_RX_DMA_TRIG_SELECT         AOS_DMA1_2
+#define SPI4_RX_DMA_IRQn                BSP_DMA1_CH2_IRQ_NUM
+#define SPI4_RX_DMA_INT_PRIO            BSP_DMA1_CH2_IRQ_PRIO
+#define SPI4_RX_DMA_INT_SRC             INT_SRC_DMA1_TC2
+#endif
+
+#if defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE)
+#define SPI4_TX_DMA_INSTANCE            CM_DMA1
+#define SPI4_TX_DMA_CHANNEL             DMA_CH3
+#define SPI4_TX_DMA_CLOCK               (PWC_FCG0_DMA1 | PWC_FCG0_AOS)
+#define SPI4_TX_DMA_TRIG_SELECT         AOS_DMA1_3
+#define SPI4_TX_DMA_IRQn                BSP_DMA1_CH3_IRQ_NUM
+#define SPI4_TX_DMA_INT_PRIO            BSP_DMA1_CH3_IRQ_PRIO
+#define SPI4_TX_DMA_INT_SRC             INT_SRC_DMA1_TC3
+#endif
+
+/* DMA2 ch0 */
+#if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
+#define UART1_RX_DMA_INSTANCE           CM_DMA2
+#define UART1_RX_DMA_CHANNEL            DMA_CH0
+#define UART1_RX_DMA_CLOCK              (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define UART1_RX_DMA_TRIG_SELECT        AOS_DMA2_0
+#define UART1_RX_DMA_IRQn               BSP_DMA2_CH0_IRQ_NUM
+#define UART1_RX_DMA_INT_PRIO           BSP_DMA2_CH0_IRQ_PRIO
+#define UART1_RX_DMA_INT_SRC            INT_SRC_DMA2_TC0
+#endif
+
+#if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE)
+#define UART3_RX_DMA_INSTANCE           CM_DMA2
+#define UART3_RX_DMA_CHANNEL            DMA_CH0
+#define UART3_RX_DMA_CLOCK              (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define UART3_RX_DMA_TRIG_SELECT        AOS_DMA2_0
+#define UART3_RX_DMA_IRQn               BSP_DMA2_CH0_IRQ_NUM
+#define UART3_RX_DMA_INT_PRIO           BSP_DMA2_CH0_IRQ_PRIO
+#define UART3_RX_DMA_INT_SRC            INT_SRC_DMA2_TC0
+#endif
+
+/* DMA2 ch1 */
+#if defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE)
+#define UART1_TX_DMA_INSTANCE           CM_DMA2
+#define UART1_TX_DMA_CHANNEL            DMA_CH1
+#define UART1_TX_DMA_CLOCK              (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define UART1_TX_DMA_TRIG_SELECT        AOS_DMA2_1
+#define UART1_TX_DMA_IRQn               BSP_DMA2_CH1_IRQ_NUM
+#define UART1_TX_DMA_INT_PRIO           BSP_DMA2_CH1_IRQ_PRIO
+#define UART1_TX_DMA_INT_SRC            INT_SRC_DMA2_TC1
+#endif
+
+#if defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_INSTANCE)
+#define UART3_TX_DMA_INSTANCE           CM_DMA2
+#define UART3_TX_DMA_CHANNEL            DMA_CH1
+#define UART3_TX_DMA_CLOCK              (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define UART3_TX_DMA_TRIG_SELECT        AOS_DMA2_1
+#define UART3_TX_DMA_IRQn               BSP_DMA2_CH1_IRQ_NUM
+#define UART3_TX_DMA_INT_PRIO           BSP_DMA2_CH1_IRQ_PRIO
+#define UART3_TX_DMA_INT_SRC            INT_SRC_DMA2_TC1
+#endif
+
+/* DMA2 ch2 */
+#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
+#define UART2_RX_DMA_INSTANCE           CM_DMA2
+#define UART2_RX_DMA_CHANNEL            DMA_CH2
+#define UART2_RX_DMA_CLOCK              (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define UART2_RX_DMA_TRIG_SELECT        AOS_DMA2_2
+#define UART2_RX_DMA_IRQn               BSP_DMA2_CH2_IRQ_NUM
+#define UART2_RX_DMA_INT_PRIO           BSP_DMA2_CH2_IRQ_PRIO
+#define UART2_RX_DMA_INT_SRC            INT_SRC_DMA2_TC2
+#endif
+
+#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE)
+#define UART4_RX_DMA_INSTANCE           CM_DMA2
+#define UART4_RX_DMA_CHANNEL            DMA_CH2
+#define UART4_RX_DMA_CLOCK              (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define UART4_RX_DMA_TRIG_SELECT        AOS_DMA2_2
+#define UART4_RX_DMA_IRQn               BSP_DMA2_CH2_IRQ_NUM
+#define UART4_RX_DMA_INT_PRIO           BSP_DMA2_CH2_IRQ_PRIO
+#define UART4_RX_DMA_INT_SRC            INT_SRC_DMA2_TC2
+#endif
+
+/* DMA2 ch3 */
+#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_INSTANCE)
+#define UART2_TX_DMA_INSTANCE           CM_DMA2
+#define UART2_TX_DMA_CHANNEL            DMA_CH3
+#define UART2_TX_DMA_CLOCK              (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define UART2_TX_DMA_TRIG_SELECT        AOS_DMA2_3
+#define UART2_TX_DMA_IRQn               BSP_DMA2_CH3_IRQ_NUM
+#define UART2_TX_DMA_INT_PRIO           BSP_DMA2_CH3_IRQ_PRIO
+#define UART2_TX_DMA_INT_SRC            INT_SRC_DMA2_TC3
+#endif
+
+#if defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
+#define UART4_TX_DMA_INSTANCE           CM_DMA2
+#define UART4_TX_DMA_CHANNEL            DMA_CH3
+#define UART4_TX_DMA_CLOCK              (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define UART4_TX_DMA_TRIG_SELECT        AOS_DMA2_3
+#define UART4_TX_DMA_IRQn               BSP_DMA2_CH3_IRQ_NUM
+#define UART4_TX_DMA_INT_PRIO           BSP_DMA2_CH3_IRQ_PRIO
+#define UART4_TX_DMA_INT_SRC            INT_SRC_DMA2_TC3
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __DMA_CONFIG_H__ */

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/gpio_config.h

@@ -0,0 +1,176 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#ifndef __GPIO_CONFIG_H__
+#define __GPIO_CONFIG_H__
+
+#include <rtthread.h>
+#include "irq_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if defined(RT_USING_PIN)
+
+#ifndef EXTINT0_IRQ_CONFIG
+#define EXTINT0_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT0_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT0_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ0,                   \
+    }
+#endif /* EXTINT1_IRQ_CONFIG */
+
+#ifndef EXTINT1_IRQ_CONFIG
+#define EXTINT1_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT1_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT1_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ1,                   \
+    }
+#endif /* EXTINT1_IRQ_CONFIG */
+
+#ifndef EXTINT2_IRQ_CONFIG
+#define EXTINT2_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT2_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT2_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ2,                   \
+    }
+#endif /* EXTINT2_IRQ_CONFIG */
+
+#ifndef EXTINT3_IRQ_CONFIG
+#define EXTINT3_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT3_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT3_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ3,                   \
+    }
+#endif /* EXTINT3_IRQ_CONFIG */
+
+#ifndef EXTINT4_IRQ_CONFIG
+#define EXTINT4_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT4_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT4_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ4,                   \
+    }
+#endif /* EXTINT4_IRQ_CONFIG */
+
+#ifndef EXTINT5_IRQ_CONFIG
+#define EXTINT5_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT5_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT5_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ5,                   \
+    }
+#endif /* EXTINT5_IRQ_CONFIG */
+
+#ifndef EXTINT6_IRQ_CONFIG
+#define EXTINT6_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT6_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT6_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ6,                   \
+    }
+#endif /* EXTINT6_IRQ_CONFIG */
+
+#ifndef EXTINT7_IRQ_CONFIG
+#define EXTINT7_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT7_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT7_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ7,                   \
+    }
+#endif /* EXTINT7_IRQ_CONFIG */
+
+#ifndef EXTINT8_IRQ_CONFIG
+#define EXTINT8_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT8_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT8_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ8,                   \
+    }
+#endif /* EXTINT8_IRQ_CONFIG */
+
+#ifndef EXTINT9_IRQ_CONFIG
+#define EXTINT9_IRQ_CONFIG                                  \
+    {                                                       \
+        .irq_num    = BSP_EXTINT9_IRQ_NUM,                  \
+        .irq_prio   = BSP_EXTINT9_IRQ_PRIO,                 \
+        .int_src    = INT_SRC_PORT_EIRQ9,                   \
+    }
+#endif /* EXTINT9_IRQ_CONFIG */
+
+#ifndef EXTINT10_IRQ_CONFIG
+#define EXTINT10_IRQ_CONFIG                                 \
+    {                                                       \
+        .irq_num    = BSP_EXTINT10_IRQ_NUM,                 \
+        .irq_prio   = BSP_EXTINT10_IRQ_PRIO,                \
+        .int_src    = INT_SRC_PORT_EIRQ10,                  \
+    }
+#endif /* EXTINT10_IRQ_CONFIG */
+
+#ifndef EXTINT11_IRQ_CONFIG
+#define EXTINT11_IRQ_CONFIG                                 \
+    {                                                       \
+        .irq_num    = BSP_EXTINT11_IRQ_NUM,                 \
+        .irq_prio   = BSP_EXTINT11_IRQ_PRIO,                \
+        .int_src    = INT_SRC_PORT_EIRQ11,                  \
+    }
+#endif /* EXTINT11_IRQ_CONFIG */
+
+#ifndef EXTINT12_IRQ_CONFIG
+#define EXTINT12_IRQ_CONFIG                                 \
+    {                                                       \
+        .irq_num    = BSP_EXTINT12_IRQ_NUM,                 \
+        .irq_prio   = BSP_EXTINT12_IRQ_PRIO,                \
+        .int_src    = INT_SRC_PORT_EIRQ12,                  \
+    }
+#endif /* EXTINT12_IRQ_CONFIG */
+
+#ifndef EXTINT13_IRQ_CONFIG
+#define EXTINT13_IRQ_CONFIG                                 \
+    {                                                       \
+        .irq_num    = BSP_EXTINT13_IRQ_NUM,                 \
+        .irq_prio   = BSP_EXTINT13_IRQ_PRIO,                \
+        .int_src    = INT_SRC_PORT_EIRQ13,                  \
+    }
+#endif /* EXTINT13_IRQ_CONFIG */
+
+#ifndef EXTINT14_IRQ_CONFIG
+#define EXTINT14_IRQ_CONFIG                                 \
+    {                                                       \
+        .irq_num    = BSP_EXTINT14_IRQ_NUM,                 \
+        .irq_prio   = BSP_EXTINT14_IRQ_PRIO,                \
+        .int_src    = INT_SRC_PORT_EIRQ14,                  \
+    }
+#endif /* EXTINT14_IRQ_CONFIG */
+
+#ifndef EXTINT15_IRQ_CONFIG
+#define EXTINT15_IRQ_CONFIG                                 \
+    {                                                       \
+        .irq_num    = BSP_EXTINT15_IRQ_NUM,                 \
+        .irq_prio   = BSP_EXTINT15_IRQ_PRIO,                \
+        .int_src    = INT_SRC_PORT_EIRQ15,                  \
+    }
+#endif /* EXTINT15_IRQ_CONFIG */
+
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __GPIO_CONFIG_H__ */

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/irq_config.h

@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#ifndef __IRQ_CONFIG_H__
+#define __IRQ_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BSP_EXTINT0_IRQ_NUM             INT022_IRQn
+#define BSP_EXTINT0_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT1_IRQ_NUM             INT023_IRQn
+#define BSP_EXTINT1_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT2_IRQ_NUM             INT024_IRQn
+#define BSP_EXTINT2_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT3_IRQ_NUM             INT025_IRQn
+#define BSP_EXTINT3_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT4_IRQ_NUM             INT026_IRQn
+#define BSP_EXTINT4_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT5_IRQ_NUM             INT027_IRQn
+#define BSP_EXTINT5_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT6_IRQ_NUM             INT028_IRQn
+#define BSP_EXTINT6_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT7_IRQ_NUM             INT029_IRQn
+#define BSP_EXTINT7_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT8_IRQ_NUM             INT030_IRQn
+#define BSP_EXTINT8_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT9_IRQ_NUM             INT031_IRQn
+#define BSP_EXTINT9_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT10_IRQ_NUM            INT032_IRQn
+#define BSP_EXTINT10_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT11_IRQ_NUM            INT033_IRQn
+#define BSP_EXTINT11_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT12_IRQ_NUM            INT034_IRQn
+#define BSP_EXTINT12_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT13_IRQ_NUM            INT035_IRQn
+#define BSP_EXTINT13_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT14_IRQ_NUM            INT036_IRQn
+#define BSP_EXTINT14_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#define BSP_EXTINT15_IRQ_NUM            INT037_IRQn
+#define BSP_EXTINT15_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+
+/* DMA1 ch0 */
+#define BSP_DMA1_CH0_IRQ_NUM            INT038_IRQn
+#define BSP_DMA1_CH0_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+/* DMA1 ch1 */
+#define BSP_DMA1_CH1_IRQ_NUM            INT039_IRQn
+#define BSP_DMA1_CH1_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+/* DMA1 ch2 */
+#define BSP_DMA1_CH2_IRQ_NUM            INT040_IRQn
+#define BSP_DMA1_CH2_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+/* DMA1 ch3 */
+#define BSP_DMA1_CH3_IRQ_NUM            INT041_IRQn
+#define BSP_DMA1_CH3_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+
+/* DMA2 ch0 */
+#define BSP_DMA2_CH0_IRQ_NUM            INT042_IRQn
+#define BSP_DMA2_CH0_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+/* DMA2 ch1 */
+#define BSP_DMA2_CH1_IRQ_NUM            INT043_IRQn
+#define BSP_DMA2_CH1_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+/* DMA2 ch2 */
+#define BSP_DMA2_CH2_IRQ_NUM            INT008_IRQn
+#define BSP_DMA2_CH2_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+/* DMA2 ch3 */
+#define BSP_DMA2_CH3_IRQ_NUM            INT009_IRQn
+#define BSP_DMA2_CH3_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+
+
+#if defined(BSP_USING_UART1)
+#define BSP_UART1_RXERR_IRQ_NUM         INT010_IRQn
+#define BSP_UART1_RXERR_IRQ_PRIO        DDL_IRQ_PRIO_DEFAULT
+#define BSP_UART1_RX_IRQ_NUM            INT083_IRQn
+#define BSP_UART1_RX_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#define BSP_UART1_TX_IRQ_NUM            INT082_IRQn
+#define BSP_UART1_TX_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+
+#if defined(BSP_UART1_RX_USING_DMA)
+#define BSP_UART1_RXTO_IRQ_NUM          INT006_IRQn
+#define BSP_UART1_RXTO_IRQ_PRIO         DDL_IRQ_PRIO_DEFAULT
+#endif
+#if defined(BSP_UART1_TX_USING_DMA)
+#define BSP_UART1_TX_CPLT_IRQ_NUM       INT080_IRQn
+#define BSP_UART1_TX_CPLT_IRQ_PRIO      DDL_IRQ_PRIO_DEFAULT
+#endif
+#endif /* BSP_USING_UART1 */
+
+#if defined(BSP_USING_UART2)
+#define BSP_UART2_RXERR_IRQ_NUM         INT011_IRQn
+#define BSP_UART2_RXERR_IRQ_PRIO        DDL_IRQ_PRIO_DEFAULT
+#define BSP_UART2_RX_IRQ_NUM            INT085_IRQn
+#define BSP_UART2_RX_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#define BSP_UART2_TX_IRQ_NUM            INT084_IRQn
+#define BSP_UART2_TX_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+
+#if defined(BSP_UART2_RX_USING_DMA)
+#define BSP_UART2_RXTO_IRQ_NUM          INT007_IRQn
+#define BSP_UART2_RXTO_IRQ_PRIO         DDL_IRQ_PRIO_DEFAULT
+#endif
+#if defined(BSP_UART2_TX_USING_DMA)
+#define BSP_UART2_TX_CPLT_IRQ_NUM       INT081_IRQn
+#define BSP_UART2_TX_CPLT_IRQ_PRIO      DDL_IRQ_PRIO_DEFAULT
+#endif
+#endif /* BSP_USING_UART2 */
+
+#if defined(BSP_USING_UART3)
+#define BSP_UART3_RXERR_IRQ_NUM         INT012_IRQn
+#define BSP_UART3_RXERR_IRQ_PRIO        DDL_IRQ_PRIO_DEFAULT
+#define BSP_UART3_RX_IRQ_NUM            INT089_IRQn
+#define BSP_UART3_RX_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#define BSP_UART3_TX_IRQ_NUM            INT088_IRQn
+#define BSP_UART3_TX_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+
+#if defined(BSP_UART3_RX_USING_DMA)
+#define BSP_UART3_RXTO_IRQ_NUM          INT014_IRQn
+#define BSP_UART3_RXTO_IRQ_PRIO         DDL_IRQ_PRIO_DEFAULT
+#endif
+#if defined(BSP_UART3_TX_USING_DMA)
+#define BSP_UART3_TX_CPLT_IRQ_NUM       INT086_IRQn
+#define BSP_UART3_TX_CPLT_IRQ_PRIO      DDL_IRQ_PRIO_DEFAULT
+#endif
+#endif /* BSP_USING_UART3 */
+
+#if defined(BSP_USING_UART4)
+#define BSP_UART4_RXERR_IRQ_NUM         INT013_IRQn
+#define BSP_UART4_RXERR_IRQ_PRIO        DDL_IRQ_PRIO_DEFAULT
+#define BSP_UART4_RX_IRQ_NUM            INT091_IRQn
+#define BSP_UART4_RX_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#define BSP_UART4_TX_IRQ_NUM            INT090_IRQn
+#define BSP_UART4_TX_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+
+#if defined(BSP_UART4_RX_USING_DMA)
+#define BSP_UART4_RXTO_IRQ_NUM          INT015_IRQn
+#define BSP_UART4_RXTO_IRQ_PRIO         DDL_IRQ_PRIO_DEFAULT
+#endif
+#if defined(BSP_UART4_TX_USING_DMA)
+#define BSP_UART4_TX_CPLT_IRQ_NUM       INT087_IRQn
+#define BSP_UART4_TX_CPLT_IRQ_PRIO      DDL_IRQ_PRIO_DEFAULT
+#endif
+#endif /* BSP_USING_UART4 */
+
+#if defined(BSP_USING_CAN1)
+#define BSP_CAN1_IRQ_NUM                INT004_IRQn
+#define BSP_CAN1_IRQ_PRIO               DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_CAN1 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __IRQ_CONFIG_H__ */

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/uart_config.h

@@ -0,0 +1,407 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#ifndef __UART_CONFIG_H__
+#define __UART_CONFIG_H__
+
+#include <rtthread.h>
+#include "irq_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if defined(BSP_USING_UART1)
+#ifndef UART1_CONFIG
+#define UART1_CONFIG                                            \
+    {                                                           \
+        .name     = "uart1",                                    \
+        .Instance = CM_USART1,                                  \
+        .clock    = FCG1_PERIPH_USART1,                         \
+        .rxerr_irq.irq_config =                                 \
+        {                                                       \
+            .irq_num    = BSP_UART1_RXERR_IRQ_NUM,              \
+            .irq_prio   = BSP_UART1_RXERR_IRQ_PRIO,             \
+            .int_src    = INT_SRC_USART1_EI,                    \
+        },                                                      \
+        .rx_irq.irq_config =                                    \
+        {                                                       \
+            .irq_num    = BSP_UART1_RX_IRQ_NUM,                 \
+            .irq_prio   = BSP_UART1_RX_IRQ_PRIO,                \
+            .int_src    = INT_SRC_USART1_RI,                    \
+        },                                                      \
+        .tx_irq.irq_config =                                    \
+        {                                                       \
+            .irq_num    = BSP_UART1_TX_IRQ_NUM,                 \
+            .irq_prio   = BSP_UART1_TX_IRQ_PRIO,                \
+            .int_src    = INT_SRC_USART1_TI,                    \
+        },                                                      \
+    }
+#endif /* UART1_CONFIG */
+
+#if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_DMA_RX_CONFIG
+#define UART1_DMA_RX_CONFIG                                     \
+    {                                                           \
+        .Instance       = UART1_RX_DMA_INSTANCE,                \
+        .channel        = UART1_RX_DMA_CHANNEL,                 \
+        .clock          = UART1_RX_DMA_CLOCK,                   \
+        .trigger_select = UART1_RX_DMA_TRIG_SELECT,             \
+        .trigger_event  = EVT_SRC_USART1_RI,                    \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = UART1_RX_DMA_IRQn,                    \
+            .irq_prio   = UART1_RX_DMA_INT_PRIO,                \
+            .int_src    = UART1_RX_DMA_INT_SRC,                 \
+        },                                                      \
+    }
+#endif /* UART1_DMA_RX_CONFIG */
+
+#ifndef UART1_RXTO_CONFIG
+#define UART1_RXTO_CONFIG                                       \
+    {                                                           \
+        .TMR0_Instance = CM_TMR0_1,                             \
+        .channel       = TMR0_CH_A,                             \
+        .clock         = FCG2_PERIPH_TMR0_1,                    \
+        .timeout_bits  = 20UL,                                  \
+        .irq_config    =                                        \
+        {                                                       \
+            .irq_num   = BSP_UART1_RXTO_IRQ_NUM,                \
+            .irq_prio  = BSP_UART1_RXTO_IRQ_PRIO,               \
+            .int_src   = INT_SRC_USART1_RTO,                    \
+        },                                                      \
+    }
+#endif /* UART1_RXTO_CONFIG */
+#endif /* BSP_UART1_RX_USING_DMA */
+
+#if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_TX_CPLT_CONFIG
+#define UART1_TX_CPLT_CONFIG                                    \
+    {                                                           \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = BSP_UART1_TX_CPLT_IRQ_NUM,            \
+            .irq_prio   = BSP_UART1_TX_CPLT_IRQ_PRIO,           \
+            .int_src    = INT_SRC_USART1_TCI,                   \
+        },                                                      \
+    }
+#endif /* UART1_TX_CPLT_CONFIG */
+
+#ifndef UART1_DMA_TX_CONFIG
+#define UART1_DMA_TX_CONFIG                                     \
+    {                                                           \
+        .Instance       = UART1_TX_DMA_INSTANCE,                \
+        .channel        = UART1_TX_DMA_CHANNEL,                 \
+        .clock          = UART1_TX_DMA_CLOCK,                   \
+        .trigger_select = UART1_TX_DMA_TRIG_SELECT,             \
+        .trigger_event  = EVT_SRC_USART1_TI,                    \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = UART1_TX_DMA_IRQn,                    \
+            .irq_prio   = UART1_TX_DMA_INT_PRIO,                \
+            .int_src    = UART1_TX_DMA_INT_SRC,                 \
+        },                                                      \
+    }
+#endif /* UART1_DMA_TX_CONFIG */
+#endif /* BSP_UART1_TX_USING_DMA */
+#endif /* BSP_USING_UART1 */
+
+#if defined(BSP_USING_UART2)
+#ifndef UART2_CONFIG
+#define UART2_CONFIG                                            \
+    {                                                           \
+        .name     = "uart2",                                    \
+        .Instance = CM_USART2,                                  \
+        .clock    = FCG1_PERIPH_USART2,                         \
+        .rxerr_irq.irq_config =                                 \
+        {                                                       \
+            .irq_num    = BSP_UART2_RXERR_IRQ_NUM,              \
+            .irq_prio   = BSP_UART2_RXERR_IRQ_PRIO,             \
+            .int_src    = INT_SRC_USART2_EI,                    \
+        },                                                      \
+        .rx_irq.irq_config =                                    \
+        {                                                       \
+            .irq_num    = BSP_UART2_RX_IRQ_NUM,                 \
+            .irq_prio   = BSP_UART2_RX_IRQ_PRIO,                \
+            .int_src    = INT_SRC_USART2_RI,                    \
+        },                                                      \
+        .tx_irq.irq_config =                                    \
+        {                                                       \
+            .irq_num    = BSP_UART2_TX_IRQ_NUM,                 \
+            .irq_prio   = BSP_UART2_TX_IRQ_PRIO,                \
+            .int_src    = INT_SRC_USART2_TI,                    \
+        },                                                      \
+    }
+#endif /* UART2_CONFIG */
+
+#if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_DMA_RX_CONFIG
+#define UART2_DMA_RX_CONFIG                                     \
+    {                                                           \
+        .Instance       = UART2_RX_DMA_INSTANCE,                \
+        .channel        = UART2_RX_DMA_CHANNEL,                 \
+        .clock          = UART2_RX_DMA_CLOCK,                   \
+        .trigger_select = UART2_RX_DMA_TRIG_SELECT,             \
+        .trigger_event  = EVT_SRC_USART2_RI,                    \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = UART2_RX_DMA_IRQn,                    \
+            .irq_prio   = UART2_RX_DMA_INT_PRIO,                \
+            .int_src    = UART2_RX_DMA_INT_SRC,                 \
+        },                                                      \
+    }
+#endif /* UART2_DMA_RX_CONFIG */
+
+#ifndef UART2_RXTO_CONFIG
+#define UART2_RXTO_CONFIG                                       \
+    {                                                           \
+        .TMR0_Instance = CM_TMR0_1,                             \
+        .channel       = TMR0_CH_B,                             \
+        .clock         = FCG2_PERIPH_TMR0_1,                    \
+        .timeout_bits  = 20UL,                                  \
+        .irq_config    =                                        \
+        {                                                       \
+            .irq_num   = BSP_UART2_RXTO_IRQ_NUM,                \
+            .irq_prio  = BSP_UART2_RXTO_IRQ_PRIO,               \
+            .int_src   = INT_SRC_USART2_RTO,                    \
+        },                                                      \
+    }
+#endif /* UART2_RXTO_CONFIG */
+#endif /* BSP_UART2_RX_USING_DMA */
+
+#if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_TX_CPLT_CONFIG
+#define UART2_TX_CPLT_CONFIG                                    \
+    {                                                           \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = BSP_UART2_TX_CPLT_IRQ_NUM,            \
+            .irq_prio   = BSP_UART2_TX_CPLT_IRQ_PRIO,           \
+            .int_src    = INT_SRC_USART2_TCI,                   \
+        },                                                      \
+    }
+#endif /* UART2_TX_CPLT_CONFIG */
+
+#ifndef UART2_DMA_TX_CONFIG
+#define UART2_DMA_TX_CONFIG                                     \
+    {                                                           \
+        .Instance       = UART2_TX_DMA_INSTANCE,                \
+        .channel        = UART2_TX_DMA_CHANNEL,                 \
+        .clock          = UART2_TX_DMA_CLOCK,                   \
+        .trigger_select = UART2_TX_DMA_TRIG_SELECT,             \
+        .trigger_event  = EVT_SRC_USART2_TI,                    \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num     = UART2_TX_DMA_IRQn,                   \
+            .irq_prio   = UART2_TX_DMA_INT_PRIO,                \
+            .int_src    = UART2_TX_DMA_INT_SRC,                 \
+        },                                                      \
+    }
+#endif /* UART2_DMA_TX_CONFIG */
+#endif /* BSP_UART2_TX_USING_DMA */
+#endif /* BSP_USING_UART2 */
+
+#if defined(BSP_USING_UART3)
+#ifndef UART3_CONFIG
+#define UART3_CONFIG                                            \
+    {                                                           \
+        .name     = "uart3",                                    \
+        .Instance = CM_USART3,                                  \
+        .clock    = FCG1_PERIPH_USART3,                         \
+        .rxerr_irq.irq_config =                                 \
+        {                                                       \
+            .irq_num    = BSP_UART3_RXERR_IRQ_NUM,              \
+            .irq_prio   = BSP_UART3_RXERR_IRQ_PRIO,             \
+            .int_src    = INT_SRC_USART3_EI,                    \
+        },                                                      \
+        .rx_irq.irq_config =                                    \
+        {                                                       \
+            .irq_num    = BSP_UART3_RX_IRQ_NUM,                 \
+            .irq_prio   = BSP_UART3_RX_IRQ_PRIO,                \
+            .int_src    = INT_SRC_USART3_RI,                    \
+        },                                                      \
+        .tx_irq.irq_config =                                    \
+        {                                                       \
+            .irq_num    = BSP_UART3_TX_IRQ_NUM,                 \
+            .irq_prio   = BSP_UART3_TX_IRQ_PRIO,                \
+            .int_src    = INT_SRC_USART3_TI,                    \
+        },                                                      \
+    }
+#endif /* UART3_CONFIG */
+
+#if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_DMA_RX_CONFIG
+#define UART3_DMA_RX_CONFIG                                     \
+    {                                                           \
+        .Instance       = UART3_RX_DMA_INSTANCE,                \
+        .channel        = UART3_RX_DMA_CHANNEL,                 \
+        .clock          = UART3_RX_DMA_CLOCK,                   \
+        .trigger_select = UART3_RX_DMA_TRIG_SELECT,             \
+        .trigger_event  = EVT_SRC_USART3_RI,                    \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = UART3_RX_DMA_IRQn,                    \
+            .irq_prio   = UART3_RX_DMA_INT_PRIO,                \
+            .int_src    = UART3_RX_DMA_INT_SRC,                 \
+        },                                                      \
+    }
+#endif /* UART3_DMA_RX_CONFIG */
+
+#ifndef UART3_RXTO_CONFIG
+#define UART3_RXTO_CONFIG                                       \
+    {                                                           \
+        .TMR0_Instance = CM_TMR0_2,                             \
+        .channel       = TMR0_CH_A,                             \
+        .clock         = FCG2_PERIPH_TMR0_2,                    \
+        .timeout_bits  = 20UL,                                  \
+        .irq_config    =                                        \
+        {                                                       \
+            .irq_num   = BSP_UART3_RXTO_IRQ_NUM,                \
+            .irq_prio  = BSP_UART3_RXTO_IRQ_PRIO,               \
+            .int_src   = INT_SRC_USART3_RTO,                    \
+        },                                                      \
+    }
+#endif /* UART3_RXTO_CONFIG */
+#endif /* BSP_UART3_RX_USING_DMA */
+
+#if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_TX_CPLT_CONFIG
+#define UART3_TX_CPLT_CONFIG                                    \
+    {                                                           \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = BSP_UART3_TX_CPLT_IRQ_NUM,            \
+            .irq_prio   = BSP_UART3_TX_CPLT_IRQ_PRIO,           \
+            .int_src    = INT_SRC_USART3_TCI,                   \
+        },                                                      \
+    }
+#endif /* UART3_TX_CPLT_CONFIG */
+
+#ifndef UART3_DMA_TX_CONFIG
+#define UART3_DMA_TX_CONFIG                                     \
+    {                                                           \
+        .Instance       = UART3_TX_DMA_INSTANCE,                \
+        .channel        = UART3_TX_DMA_CHANNEL,                 \
+        .clock          = UART3_TX_DMA_CLOCK,                   \
+        .trigger_select = UART3_TX_DMA_TRIG_SELECT,             \
+        .trigger_event  = EVT_SRC_USART3_TI,                    \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = UART3_TX_DMA_IRQn,                    \
+            .irq_prio   = UART3_TX_DMA_INT_PRIO,                \
+            .int_src    = UART3_TX_DMA_INT_SRC,                 \
+        },                                                      \
+    }
+#endif /* UART3_DMA_TX_CONFIG */
+#endif /* BSP_UART3_TX_USING_DMA */
+#endif /* BSP_USING_UART3 */
+
+#if defined(BSP_USING_UART4)
+#ifndef UART4_CONFIG
+#define UART4_CONFIG                                            \
+    {                                                           \
+        .name     = "uart4",                                    \
+        .Instance = CM_USART4,                                  \
+        .clock    = FCG1_PERIPH_USART4,                         \
+        .rxerr_irq.irq_config =                                 \
+        {                                                       \
+            .irq_num    = BSP_UART4_RXERR_IRQ_NUM,              \
+            .irq_prio   = BSP_UART4_RXERR_IRQ_PRIO,             \
+            .int_src    = INT_SRC_USART4_EI,                    \
+        },                                                      \
+        .rx_irq.irq_config =                                    \
+        {                                                       \
+            .irq_num    = BSP_UART4_RX_IRQ_NUM,                 \
+            .irq_prio   = BSP_UART4_RX_IRQ_PRIO,                \
+            .int_src    = INT_SRC_USART4_RI,                    \
+        },                                                      \
+        .tx_irq.irq_config =                                    \
+        {                                                       \
+            .irq_num    = BSP_UART4_TX_IRQ_NUM,                 \
+            .irq_prio   = BSP_UART4_TX_IRQ_PRIO,                \
+            .int_src    = INT_SRC_USART4_TI,                    \
+        },                                                      \
+    }
+#endif /* UART4_CONFIG */
+
+#if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_DMA_RX_CONFIG
+#define UART4_DMA_RX_CONFIG                                     \
+    {                                                           \
+        .Instance       = UART4_RX_DMA_INSTANCE,                \
+        .channel        = UART4_RX_DMA_CHANNEL,                 \
+        .clock          = UART4_RX_DMA_CLOCK,                   \
+        .trigger_select = UART4_RX_DMA_TRIG_SELECT,             \
+        .trigger_event  = EVT_SRC_USART4_RI,                    \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = UART4_RX_DMA_IRQn,                    \
+            .irq_prio   = UART4_RX_DMA_INT_PRIO,                \
+            .int_src    = UART4_RX_DMA_INT_SRC,                 \
+        },                                                      \
+    }
+#endif /* UART4_DMA_RX_CONFIG */
+
+#ifndef UART4_RXTO_CONFIG
+#define UART4_RXTO_CONFIG                                       \
+    {                                                           \
+        .TMR0_Instance = CM_TMR0_2,                             \
+        .channel       = TMR0_CH_B,                             \
+        .clock         = FCG2_PERIPH_TMR0_2,                    \
+        .timeout_bits  = 20UL,                                  \
+        .irq_config    =                                        \
+        {                                                       \
+            .irq_num   = BSP_UART4_RXTO_IRQ_NUM,                \
+            .irq_prio  = BSP_UART4_RXTO_IRQ_PRIO,               \
+            .int_src   = INT_SRC_USART4_RTO,                    \
+        },                                                      \
+    }
+#endif /* UART4_RXTO_CONFIG */
+#endif /* BSP_UART4_RX_USING_DMA */
+
+#if defined(BSP_UART4_TX_USING_DMA)
+#ifndef UART4_TX_CPLT_CONFIG
+#define UART4_TX_CPLT_CONFIG                                    \
+    {                                                           \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = BSP_UART4_TX_CPLT_IRQ_NUM,            \
+            .irq_prio   = BSP_UART4_TX_CPLT_IRQ_PRIO,           \
+            .int_src    = INT_SRC_USART4_TCI,                   \
+        },                                                      \
+    }
+#endif /* UART4_TX_CPLT_CONFIG */
+
+#ifndef UART4_DMA_TX_CONFIG
+#define UART4_DMA_TX_CONFIG                                     \
+    {                                                           \
+        .Instance       = UART4_TX_DMA_INSTANCE,                \
+        .channel        = UART4_TX_DMA_CHANNEL,                 \
+        .clock          = UART4_TX_DMA_CLOCK,                   \
+        .trigger_select = UART4_TX_DMA_TRIG_SELECT,             \
+        .trigger_event  = EVT_SRC_USART4_TI,                    \
+        .irq_config     =                                       \
+        {                                                       \
+            .irq_num    = UART4_TX_DMA_IRQn,                    \
+            .irq_prio   = UART4_TX_DMA_INT_PRIO,                \
+            .int_src    = UART4_TX_DMA_INT_SRC,                 \
+        },                                                      \
+    }
+#endif /* UART4_DMA_TX_CONFIG */
+#endif /* BSP_UART4_TX_USING_DMA */
+#endif /* BSP_USING_UART4 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

bsp/hc32/ev_hc32f460_lqfp100_v2/board/drv_config.h

@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#ifndef __DRV_CONFIG_H__
+#define __DRV_CONFIG_H__
+
+#include <board.h>
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "dma_config.h"
+#include "uart_config.h"
+#include "gpio_config.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

bsp/hc32/ev_hc32f460_lqfp100_v2/board/hc32f4xx_conf.h

@@ -0,0 +1,167 @@
+/**
+ *******************************************************************************
+ * @file  template/source/hc32f4xx_conf.h
+ * @brief This file contains HC32 Series Device Driver Library usage management.
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2022-04-28       CDT             First version
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by XHSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __HC32F4XX_CONF_H__
+#define __HC32F4XX_CONF_H__
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+
+/**
+ * @brief This is the list of modules to be used in the Device Driver Library.
+ * Select the modules you need to use to DDL_ON.
+ * @note LL_ICG_ENABLE must be turned on(DDL_ON) to ensure that the chip works
+ * properly.
+ * @note LL_UTILITY_ENABLE must be turned on(DDL_ON) if using Device Driver
+ * Library.
+ * @note LL_PRINT_ENABLE must be turned on(DDL_ON) if using printf function.
+ */
+#define LL_ICG_ENABLE                               (DDL_ON)
+#define LL_UTILITY_ENABLE                           (DDL_ON)
+#define LL_PRINT_ENABLE                             (DDL_OFF)
+
+#define LL_ADC_ENABLE                               (DDL_ON)
+#define LL_AES_ENABLE                               (DDL_ON)
+#define LL_AOS_ENABLE                               (DDL_ON)
+#define LL_CAN_ENABLE                               (DDL_ON)
+#define LL_CLK_ENABLE                               (DDL_ON)
+#define LL_CMP_ENABLE                               (DDL_ON)
+#define LL_CRC_ENABLE                               (DDL_ON)
+#define LL_CTC_ENABLE                               (DDL_ON)
+#define LL_DAC_ENABLE                               (DDL_ON)
+#define LL_DCU_ENABLE                               (DDL_ON)
+#define LL_DMA_ENABLE                               (DDL_ON)
+#define LL_DMC_ENABLE                               (DDL_ON)
+#define LL_DVP_ENABLE                               (DDL_ON)
+#define LL_EFM_ENABLE                               (DDL_ON)
+#define LL_EMB_ENABLE                               (DDL_ON)
+#define LL_ETH_ENABLE                               (DDL_ON)
+#define LL_EVENT_PORT_ENABLE                        (DDL_OFF)
+#define LL_FCG_ENABLE                               (DDL_ON)
+#define LL_FCM_ENABLE                               (DDL_ON)
+#define LL_FMAC_ENABLE                              (DDL_ON)
+#define LL_GPIO_ENABLE                              (DDL_ON)
+#define LL_HASH_ENABLE                              (DDL_ON)
+#define LL_HRPWM_ENABLE                             (DDL_ON)
+#define LL_I2C_ENABLE                               (DDL_ON)
+#define LL_I2S_ENABLE                               (DDL_ON)
+#define LL_INTERRUPTS_ENABLE                        (DDL_ON)
+#define LL_INTERRUPTS_SHARE_ENABLE                  (DDL_ON)
+#define LL_KEYSCAN_ENABLE                           (DDL_ON)
+#define LL_MAU_ENABLE                               (DDL_ON)
+#define LL_MDIO_ENABLE                              (DDL_OFF)
+#define LL_MPU_ENABLE                               (DDL_ON)
+#define LL_NFC_ENABLE                               (DDL_ON)
+#define LL_OTS_ENABLE                               (DDL_ON)
+#define LL_PLA_ENABLE                               (DDL_OFF)
+#define LL_PWC_ENABLE                               (DDL_ON)
+#define LL_QSPI_ENABLE                              (DDL_ON)
+#define LL_RMU_ENABLE                               (DDL_ON)
+#define LL_RTC_ENABLE                               (DDL_ON)
+#define LL_SDIOC_ENABLE                             (DDL_ON)
+#define LL_SMC_ENABLE                               (DDL_ON)
+#define LL_SPI_ENABLE                               (DDL_ON)
+#define LL_SRAM_ENABLE                              (DDL_ON)
+#define LL_SWDT_ENABLE                              (DDL_ON)
+#define LL_TMR0_ENABLE                              (DDL_ON)
+#define LL_TMR2_ENABLE                              (DDL_ON)
+#define LL_TMR4_ENABLE                              (DDL_ON)
+#define LL_TMR6_ENABLE                              (DDL_ON)
+#define LL_TMRA_ENABLE                              (DDL_ON)
+#define LL_TRNG_ENABLE                              (DDL_ON)
+#define LL_USART_ENABLE                             (DDL_ON)
+#define LL_USB_ENABLE                               (DDL_OFF)
+#define LL_VREF_ENABLE                              (DDL_OFF)
+#define LL_WDT_ENABLE                               (DDL_ON)
+
+/**
+ * @brief The following is a list of currently supported BSP boards.
+ */
+#define BSP_EV_HC32F4A0_LQFP176                     (1U)
+#define BSP_EV_HC32F4A0_LQFP176_MEM                 (2U)
+#define BSP_EV_HC32F460_LQFP100_V1                  (3U)
+#define BSP_EV_HC32F460_LQFP100_V2                  (4U)
+#define BSP_EV_HC32F451_LQFP100                     (5U)
+#define BSP_EV_HC32F452_LQFP100                     (6U)
+#define BSP_EV_HC32F472_LQFP100                     (7U)
+#define BSP_SK_HC32F4A0_LQFP100                     (8U)
+
+/**
+ * @brief The macro BSP_EV_HC32F4XX is used to specify the BSP board currently
+ * in use.
+ * The value should be set to one of the list of currently supported BSP boards.
+ * @note  If there is no supported BSP board or the BSP function is not used,
+ * the value needs to be set to 0U.
+ */
+#define BSP_EV_HC32F4XX                             (BSP_EV_HC32F460_LQFP100_V2)
+
+/**
+ * @brief This is the list of BSP components to be used.
+ * Select the components you need to use to DDL_ON.
+ */
+#define BSP_24CXX_ENABLE                            (DDL_OFF)
+#define BSP_CY62167EV30LL_ENABLE                    (DDL_OFF)
+#define BSP_IS42S16400J7TLI_ENABLE                  (DDL_OFF)
+#define BSP_IS62WV51216_ENABLE                      (DDL_OFF)
+#define BSP_MT29F2G08AB_ENABLE                      (DDL_OFF)
+#define BSP_NT35510_ENABLE                          (DDL_OFF)
+#define BSP_OV5640_ENABLE                           (DDL_OFF)
+#define BSP_S29GL064N90TFI03_ENABLE                 (DDL_OFF)
+#define BSP_TCA9539_ENABLE                          (DDL_OFF)
+#define BSP_W25QXX_ENABLE                           (DDL_OFF)
+#define BSP_WM8731_ENABLE                           (DDL_OFF)
+
+/**
+ * @brief The macro is used to re-define main function in system_device.c(eg. device=hc32f4a0).
+ * @note  Set value to non-zero if re-define main function.
+ */
+#define RE_DEFINE_MAIN                              (0)
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global function prototypes (definition in C source)
+ ******************************************************************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32F4XX_CONF_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32/ev_hc32f460_lqfp100_v2/board/linker_scripts/link.icf

@@ -0,0 +1,51 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x00000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_IROM1_start__ = 0x00000000;
+define symbol __ICFEDIT_region_IROM1_end__   = 0x0007FFFF;
+define symbol __ICFEDIT_region_IROM2_start__ = 0x03000C00;
+define symbol __ICFEDIT_region_IROM2_end__   = 0x03000FFB;
+define symbol __ICFEDIT_region_EROM1_start__ = 0x0;
+define symbol __ICFEDIT_region_EROM1_end__   = 0x0;
+define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
+define symbol __ICFEDIT_region_EROM2_end__   = 0x0;
+define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
+define symbol __ICFEDIT_region_EROM3_end__   = 0x0;
+define symbol __ICFEDIT_region_IRAM1_start__ = 0x1FFF8000;
+define symbol __ICFEDIT_region_IRAM1_end__   = 0x20026FFF;
+define symbol __ICFEDIT_region_IRAM2_start__ = 0x200F0000;
+define symbol __ICFEDIT_region_IRAM2_end__   = 0x200F0FFF;
+define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
+define symbol __ICFEDIT_region_ERAM1_end__   = 0x0;
+define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
+define symbol __ICFEDIT_region_ERAM2_end__   = 0x0;
+define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
+define symbol __ICFEDIT_region_ERAM3_end__   = 0x0;
+
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0xC00;
+define symbol __ICFEDIT_size_proc_stack__ = 0x0;
+define symbol __ICFEDIT_size_heap__   = 0x400;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region       =   mem:[from __ICFEDIT_region_IROM1_start__   to __ICFEDIT_region_IROM1_end__]
+                                 | mem:[from __ICFEDIT_region_IROM2_start__   to __ICFEDIT_region_IROM2_end__];
+define region RAM_region       =   mem:[from __ICFEDIT_region_IRAM1_start__   to __ICFEDIT_region_IRAM1_end__]
+                                 | mem:[from __ICFEDIT_region_IRAM2_start__   to __ICFEDIT_region_IRAM2_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };

bsp/hc32/ev_hc32f460_lqfp100_v2/board/linker_scripts/link.ld

@@ -0,0 +1,267 @@
+/******************************************************************************
+ * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by XHSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ */
+/*****************************************************************************/
+/*  File        HC32F460xE.ld                                                */
+/*  Abstract    Linker script for HC32F460 Device with                       */
+/*              512KByte FLASH, 192KByte RAM                                 */
+/*  Version     V1.0                                                          */
+/*  Date        2022-04-28                                                   */
+/*****************************************************************************/
+
+/* Custom defines, according to section 7.7 of the user manual.
+   Take OTP sector 0 for example. */
+__OTP_DATA_START = 0x03000C00;
+__OTP_DATA_SIZE  = 64;
+__OTP_LOCK_START = 0x03000FC0;
+__OTP_LOCK_SIZE  = 4;
+
+/* Use contiguous memory regions for simple. */
+MEMORY
+{
+    FLASH       (rx): ORIGIN = 0x00000000, LENGTH = 512K
+    OTP_DATA    (rx): ORIGIN = __OTP_DATA_START, LENGTH = __OTP_DATA_SIZE
+    OTP_LOCK    (rx): ORIGIN = __OTP_LOCK_START, LENGTH = __OTP_LOCK_SIZE
+    RAM        (rwx): ORIGIN = 0x1FFF8000, LENGTH = 188K
+    RET_RAM    (rwx): ORIGIN = 0x200F0000, LENGTH = 4K
+}
+
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    .vectors :
+    {
+        . = ALIGN(4);
+        KEEP(*(.vectors))
+        . = ALIGN(4);
+    } >FLASH
+
+    .icg_sec 0x00000400 :
+    {
+        KEEP(*(.icg_sec))
+    } >FLASH
+
+    .text :
+    {
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+        . = ALIGN(4);
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(4);
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+        . = ALIGN(4);
+
+        . = ALIGN(4);
+        _etext = .;
+    } >FLASH
+
+    .rodata :
+    {
+        . = ALIGN(4);
+        *(.rodata)
+        *(.rodata*)
+        . = ALIGN(4);
+    } >FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } >FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } >FLASH
+    __exidx_end = .;
+
+    .preinit_array :
+    {
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+        . = ALIGN(4);
+    } >FLASH
+
+    .init_array :
+    {
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+        . = ALIGN(4);
+    } >FLASH
+
+    .fini_array :
+    {
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+        . = ALIGN(4);
+    } >FLASH
+
+    __etext = ALIGN(4);
+
+    .otp_data_sec :
+    {
+        KEEP(*(.otp_data_sec))
+    } >OTP_DATA
+
+    .otp_lock_sec :
+    {
+        KEEP(*(.otp_lock_sec))
+    } >OTP_LOCK
+
+    .data : AT (__etext)
+    {
+        . = ALIGN(4);
+        __data_start__ = .;
+        *(vtable)
+        *(.data)
+        *(.data*)
+        *(.gnu.linkonce.d*)
+        . = ALIGN(4);
+        *(.ramfunc)
+        *(.ramfunc*)
+        . = ALIGN(4);
+        __data_end__ = .;
+    } >RAM
+
+    __etext_ret_ram = __etext + ALIGN (SIZEOF(.data), 4);
+    .ret_ram_data : AT (__etext_ret_ram)
+    {
+        . = ALIGN(4);
+        __data_start_ret_ram__ = .;
+        *(.ret_ram_data)
+        *(.ret_ram_data*)
+        . = ALIGN(4);
+        __data_end_ret_ram__ = .;
+    } >RET_RAM
+
+    __bss_start = .;
+    .bss :
+    {
+        . = ALIGN(4);
+        _sbss = .;
+        __bss_start__ = _sbss;
+        *(.bss)
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = .;
+        __bss_end__ = _ebss;
+    } >RAM
+    __bss_end = .;
+
+    .ret_ram_bss :
+    {
+        . = ALIGN(4);
+        __bss_start_ret_ram__ = .;
+        *(.ret_ram_bss)
+        *(.ret_ram_bss*)
+        . = ALIGN(4);
+        __bss_end_ret_ram__ = .;
+    } >RET_RAM
+
+    .heap_stack (COPY) :
+    {
+        . = ALIGN(8);
+        __end__ = .;
+        PROVIDE(end = .);
+        PROVIDE(_end = .);
+        *(.heap*)
+        . = ALIGN(8);
+        __HeapLimit = .;
+
+        __StackLimit = .;
+        *(.stack*)
+        . = ALIGN(8);
+        __StackTop = .;
+    } >RAM
+
+    /DISCARD/ :
+    {
+        libc.a (*)
+        libm.a (*)
+        libgcc.a (*)
+    }
+
+    .ARM.attributes 0 : { *(.ARM.attributes) }
+
+    PROVIDE(_stack = __StackTop);
+    PROVIDE(_Min_Heap_Size = __HeapLimit - __HeapBase);
+    PROVIDE(_Min_Stack_Size = __StackTop - __StackLimit);
+
+    __RamEnd = ORIGIN(RAM) + LENGTH(RAM);
+    ASSERT(__StackTop <= __RamEnd, "region RAM overflowed with stack")
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}

bsp/hc32/ev_hc32f460_lqfp100_v2/board/linker_scripts/link.sct

@@ -0,0 +1,15 @@
+; ****************************************************************
+; Scatter-Loading Description File
+; ****************************************************************
+LR_IROM1 0x00000000 0x00080000  {    ; load region size_region
+    ER_IROM1 0x00000000 0x00080000  {  ; load address = execution address
+        *.o (RESET, +First)
+        *(InRoot$$Sections)
+        .ANY (+RO)
+        .ANY (+XO)
+    }
+    RW_IRAM1 0x1FFF8000 0x0002F000  {  ; RW data
+        .ANY (+RW +ZI)
+    }
+}
+

bsp/hc32/ev_hc32f460_lqfp100_v2/project.ewd

@@ -0,0 +1,2966 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>Debug</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>0</debug>
+        <settings>
+            <name>C-SPY</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>31</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>CInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CEndian</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCVariant</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>MemOverride</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>MemFile</name>
+                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HDSC_HC32F460.svd</state>
+                </option>
+                <option>
+                    <name>RunToEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RunToName</name>
+                    <state>main</state>
+                </option>
+                <option>
+                    <name>CExtraOptionsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CFpuProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDDFArgumentProducer</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadSuppressDownload</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDownloadVerifyAll</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProductVersion</name>
+                    <state>8.40.1.21529</state>
+                </option>
+                <option>
+                    <name>OCDynDriverList</name>
+                    <state>CMSISDAP_ID</state>
+                </option>
+                <option>
+                    <name>OCLastSavedByProductVersion</name>
+                    <state>8.40.1.21529</state>
+                </option>
+                <option>
+                    <name>UseFlashLoader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CLowLevel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCBE8Slave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>MacFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CDevice</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>FlashLoadersV3</name>
+                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/config/flashloader/HC32F460xE.board</state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OverrideDefFlashBoard</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCImagesOffset1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesUse1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDeviceConfigMacroFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDebuggerExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAllMTBOptions</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCores</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreWorkspace</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveProject</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveConfiguration</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadExtraImage</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAttachSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MassEraseBeforeFlashing</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCoresSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreAMPConfigType</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreSessionFile</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ARMSIM_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCSimDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCSimEnablePSP</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspOverrideConfig</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspConfigFile</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CADI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>CCadiMemory</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>Fast Model</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCADILogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCADILogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CMSISDAP_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>4</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CMSISDAPResetList</name>
+                    <version>1</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>CMSISDAPDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceRadio</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CMSISDAPProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPSelectedCPUBehaviour</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>GDBSERVER_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJTagBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IJET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>8</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetResetList</name>
+                    <version>1</version>
+                    <state>10</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>IjetPowerFromProbe</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPowerRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetProtocolRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSwoPin</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetCpuClockEdit</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetSwoPrescalerList</name>
+                    <version>1</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSelectedCPUBehaviour</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPreferETB</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetTraceSettingsList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetTraceSizeList</name>
+                    <version>0</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>FlashBoardPathSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>JLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>16</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>JLinkSpeed</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJLinkHWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>JLinkInitialSpeed</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCDoJlinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkCommRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>CCJLinkSpeedRadioV2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCUSBDevice</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCRDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceRadio</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJLinkResetList</name>
+                    <version>6</version>
+                    <state>7</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCTcpIpAlt</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTcpIpSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSourceDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkDeviceName</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>LMIFTDI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>2</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>LmiftdiSpeed</name>
+                    <state>500</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>NULINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>PEMICRO_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>3</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJPEMicroShowSettings</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>STLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>6</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkResetList</name>
+                    <version>3</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkJtagSpeedList</name>
+                    <version>2</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDAPNumber</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSTLinkDebugAccessPortRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUseServerSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkProbeList</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>THIRDPARTY_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>CThirdPartyDriverDll</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>TIFET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVccTypeDefault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CCMSPFetVCCDefault</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetSettlingtime</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioJtagSpeedType</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetConnection</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetUsbComPort</name>
+                    <state>Automatic</state>
+                </option>
+                <option>
+                    <name>CCMSPFetAllowAccessToBSL</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioEraseFlash</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>XDS100_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>8</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TIPackageOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TIPackage</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>BoardFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCXds100BreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100DoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CpuClockEdit</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockEdit</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCXds100HWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100JtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceRadio</name>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ProbeList</name>
+                    <version>0</version>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPortRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPort</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCXDSTargetVccEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXDSTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>OCXDSDigitalStatesConfigFile</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <debuggerPlugins>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+        </debuggerPlugins>
+    </configuration>
+    <configuration>
+        <name>Release</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>0</debug>
+        <settings>
+            <name>C-SPY</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>31</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>CInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CEndian</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCVariant</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>MemOverride</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>MemFile</name>
+                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HDSC_HC32F460.svd</state>
+                </option>
+                <option>
+                    <name>RunToEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RunToName</name>
+                    <state>main</state>
+                </option>
+                <option>
+                    <name>CExtraOptionsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CFpuProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDDFArgumentProducer</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadSuppressDownload</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDownloadVerifyAll</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProductVersion</name>
+                    <state>8.40.1.21529</state>
+                </option>
+                <option>
+                    <name>OCDynDriverList</name>
+                    <state>CMSISDAP_ID</state>
+                </option>
+                <option>
+                    <name>OCLastSavedByProductVersion</name>
+                    <state>8.40.1.21529</state>
+                </option>
+                <option>
+                    <name>UseFlashLoader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CLowLevel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCBE8Slave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>MacFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CDevice</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>FlashLoadersV3</name>
+                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/config/flashloader/HC32F460xE.board</state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OverrideDefFlashBoard</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCImagesOffset1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesUse1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDeviceConfigMacroFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDebuggerExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAllMTBOptions</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCores</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreWorkspace</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveProject</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveConfiguration</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadExtraImage</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAttachSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MassEraseBeforeFlashing</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCoresSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreAMPConfigType</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreSessionFile</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ARMSIM_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCSimDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCSimEnablePSP</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspOverrideConfig</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspConfigFile</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CADI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>CCadiMemory</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>Fast Model</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCADILogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCADILogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CMSISDAP_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>4</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CMSISDAPResetList</name>
+                    <version>1</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>CMSISDAPDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceRadio</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CMSISDAPProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPSelectedCPUBehaviour</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>GDBSERVER_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJTagBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IJET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>8</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetResetList</name>
+                    <version>1</version>
+                    <state>10</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>IjetPowerFromProbe</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPowerRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetProtocolRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSwoPin</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetCpuClockEdit</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetSwoPrescalerList</name>
+                    <version>1</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSelectedCPUBehaviour</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPreferETB</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetTraceSettingsList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetTraceSizeList</name>
+                    <version>0</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>FlashBoardPathSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>JLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>16</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>JLinkSpeed</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJLinkHWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>JLinkInitialSpeed</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCDoJlinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkCommRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>CCJLinkSpeedRadioV2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCUSBDevice</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCRDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceRadio</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJLinkResetList</name>
+                    <version>6</version>
+                    <state>7</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCTcpIpAlt</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTcpIpSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSourceDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkDeviceName</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>LMIFTDI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>2</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>LmiftdiSpeed</name>
+                    <state>500</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>NULINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>PEMICRO_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>3</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJPEMicroShowSettings</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>STLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>6</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkResetList</name>
+                    <version>3</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkJtagSpeedList</name>
+                    <version>2</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDAPNumber</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSTLinkDebugAccessPortRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUseServerSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkProbeList</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>THIRDPARTY_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>CThirdPartyDriverDll</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>TIFET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVccTypeDefault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CCMSPFetVCCDefault</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetSettlingtime</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioJtagSpeedType</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetConnection</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetUsbComPort</name>
+                    <state>Automatic</state>
+                </option>
+                <option>
+                    <name>CCMSPFetAllowAccessToBSL</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioEraseFlash</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>XDS100_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>8</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TIPackageOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TIPackage</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>BoardFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCXds100BreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100DoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CpuClockEdit</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockEdit</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCXds100HWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100JtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceRadio</name>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ProbeList</name>
+                    <version>0</version>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPortRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPort</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCXDSTargetVccEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXDSTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>OCXDSDigitalStatesConfigFile</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <debuggerPlugins>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+        </debuggerPlugins>
+    </configuration>
+</project>

bsp/hc32/ev_hc32f460_lqfp100_v2/project.ewp

@@ -0,0 +1,2209 @@
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>Debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>0</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>24</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>ExePath</name>
+          <state>build\iar\debug\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>build\iar\debug\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>build\iar\debug\List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>3</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>Automatic choice of formatter.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>Automatic choice of formatter.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>6.50.1.4445</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>7.70.1.11471</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>Default	None</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111011111111110111111111011011101111011111010110110011110101111110111111111111101111111111001101111110011110001111111011011111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>24</version>
+          <state>35</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>24</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state>Default	None</state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>4</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>24</version>
+          <state>39</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>31</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>CCDefines</name>
+          <state>__DEBUG</state>
+          <state>CLOCKS_PER_SEC=RT_TICK_PER_SECOND</state>
+          <state>RT_USING_DLIBC</state>
+          <state>RT_USING_LIBC</state>
+          <state>HC32F460</state>
+          <state>__RTTHREAD__</state>
+          <state>USE_DDL_DRIVER</state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state />
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state />
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state />
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state />
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>00000000</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state />
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state />
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state />
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
+          <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
+          <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
+          <state>$PROJ_DIR$\board\ports</state>
+          <state>$PROJ_DIR$\..\..\..\include</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
+          <state>$PROJ_DIR$\.</state>
+          <state>$PROJ_DIR$\applications</state>
+          <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\cmsis\Include</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\board\config</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\spi</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\inc</state>
+          <state>$PROJ_DIR$\board</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IInterwork2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>011111011111111110111111111011011101111011111011110110011111101111110111111111111101111111111001101111110111110001111111011111111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccExceptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccRTTI</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>9</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state />
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state />
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state />
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state />
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state />
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state />
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>rtthread.bin</state>
+        </option>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>3</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions />
+        <cmdline />
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data />
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild />
+        <postbuild />
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>17</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>rtthread.out</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\board\linker_scripts\link.icf</state>
+        </option>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state />
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state />
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state />
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state />
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state />
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state />
+        </option>
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+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
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+          <name>CrcFullSize</name>
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+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
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+          <name>IlinkLogAutoLibSelect</name>
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+          <name>IlinkLogRedirSymbols</name>
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+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
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+          <state>1</state>
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+          <state>1</state>
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+          <name>IlinkCmsis</name>
+          <state>1</state>
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+          <state>1</state>
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+          <name>IlinkStackControlFile</name>
+          <state />
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+          <state />
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+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
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+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_dma.c</name>
+    </file>
+  </group>
+  <group>
+    <name>POSIX</name>
+  </group>
+</project>

bsp/hc32/ev_hc32f460_lqfp100_v2/project.eww

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\project.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+

bsp/hc32/ev_hc32f460_lqfp100_v2/project.uvoptx

@@ -0,0 +1,189 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rt-thread</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\keil\List\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>255</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>3</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\CMSIS_AGDI.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>CMSIS_AGDI</Key>
+          <Name>-X"" -O206 -S0 -C0 -P00 -FO7 -FD1FFF8000 -FC1000 -FN2 -FF0HC32F460_512K -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM) -FF1HC32F460_otp -FS13000C00 -FL13FC -FP1($$Device:HC32F460PETB$FlashARM\HC32F460_otp.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD1FFF8000 -FC1000 -FN1 -FF0HC32F460_512K -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U261009725 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST2 -TO18 -TC10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD1FFF8000 -FC1000 -FN1 -FF0HC32F460_512K.FLM -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>0</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>1000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+</ProjectOpt>

bsp/hc32/ev_hc32f460_lqfp100_v2/project.uvprojx

@@ -0,0 +1,845 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+  <SchemaVersion>2.1</SchemaVersion>
+  <Header>### uVision Project, (C) Keil Software</Header>
+  <Targets>
+    <Target>
+      <TargetName>rt-thread</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>HC32F460PETB</Device>
+          <Vendor>HDSC</Vendor>
+          <PackID>HDSC.HC32F460.1.0.9</PackID>
+          <PackURL>https://raw.githubusercontent.com/hdscmcu/pack/master/</PackURL>
+          <Cpu>IROM1(0x00000000,0x80000) IROM2(0x03000C00,0x3FC) IRAM1(0x1FFF8000,0x2F000)  IRAM2(0x200F0000,0x1000) CPUTYPE("Cortex-M4") FPU2 CLOCK(8000000) ESEL ELITTLE</Cpu>
+          <FlashUtilSpec />
+          <StartupFile />
+          <FlashDriverDll>CMSIS_AGDI(-S0 -C0 -P0 -FD1FFF8000 -FC1000 -FN2 -FF0HC32F460_512K -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM) -FF1HC32F460_otp -FS103000C00 -FL13FC -FP1($$Device:HC32F460PETB$FlashARM\HC32F460_otp.FLM))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:HC32F460PETB$Device\Include\HC32F460PETB.h</RegisterFile>
+          <MemoryEnv />
+          <Cmp />
+          <Asm />
+          <Linker />
+          <OHString />
+          <InfinionOptionDll />
+          <SLE66CMisc />
+          <SLE66AMisc />
+          <SLE66LinkerMisc />
+          <SFDFile>../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HDSC_HC32F460.SFR</SFDFile>
+          <bCustSvd>1</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath />
+          <IncludePath />
+          <LibPath />
+          <RegisterFilePath />
+          <DBRegisterFilePath />
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\keil\Obj\</OutputDirectory>
+          <OutputName>rtthread</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath>.\build\keil\List\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name />
+            <UserProg2Name />
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name />
+            <UserProg2Name />
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
+            <UserProg2Name />
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString />
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument />
+          <IncludeLibraryModules />
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> -REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> -MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3 />
+          <Flash4 />
+          <pFcarmOut />
+          <pFcarmGrp />
+          <pFcArmRoot />
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName />
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>1</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>1</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>1</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x1FFF8000</StartAddress>
+                <Size>0x2F000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x03000C00</StartAddress>
+                <Size>0x3FC</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x1FFF8000</StartAddress>
+                <Size>0x2F000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x200F0000</StartAddress>
+                <Size>0x1000</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector />
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>0</v6Lang>
+            <v6LangP>0</v6LangP>
+            <vShortEn>0</vShortEn>
+            <vShortWch>0</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls />
+              <Define>RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, HC32F460, USE_DDL_DRIVER, __RTTHREAD__, RT_USING_ARM_LIBC</Define>
+              <Undefine />
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\spi;..\..\..\components\drivers\include;board;board\ports;board\config;..\libraries\hc32_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include;..\libraries\hc32f460_ddl\drivers\cmsis\Include;..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath />
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x1FFF8000</DataAddressRange>
+            <pXoBase />
+            <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
+            <IncludeLibs />
+            <IncludeLibsPath />
+            <Misc />
+            <LinkerInputFile />
+            <DisabledWarnings />
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Applications</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>applications\main.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Compiler</GroupName>
+          <Files>
+            <File>
+              <FileName>syscall_mem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>syscalls.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>stdlib.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\libc\compilers\common\stdlib.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>time.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>CPU</GroupName>
+          <Files>
+            <File>
+              <FileName>backtrace.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>div0.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>showmem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>context_rvds.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>cpuport.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>DeviceDrivers</GroupName>
+          <Files>
+            <File>
+              <FileName>completion.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>dataqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pipe.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>ringblk_buf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>ringbuffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>waitqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>workqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\workqueue.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pin.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>serial.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>spi_core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\spi\spi_core.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>spi_dev.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\spi\spi_dev.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers</GroupName>
+          <Files>
+            <File>
+              <FileName>board.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\board.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>board_config.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\board_config.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>startup_hc32f460.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\ARM\startup_hc32f460.s</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>drv_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_gpio.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>drv_irq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_irq.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>drv_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_spi.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>drv_usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_usart.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Finsh</GroupName>
+          <Files>
+            <File>
+              <FileName>shell.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\finsh\shell.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>msh.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\finsh\msh.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>cmd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Kernel</GroupName>
+          <Files>
+            <File>
+              <FileName>clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\clock.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\components.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\device.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>idle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\idle.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\ipc.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>irq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\irq.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kservice.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\kservice.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>mem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\mem.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>mempool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\mempool.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>object.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\object.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>scheduler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\scheduler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>thread.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\thread.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\timer.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Libraries</GroupName>
+          <Files>
+            <File>
+              <FileName>hc32_ll_clk.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_clk.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>system_hc32f460.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f460.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_icg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_icg.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_utility.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_utility.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_fcg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_fcg.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_interrupts.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_interrupts.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_pwc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_pwc.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_aos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_aos.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_sram.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_sram.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_usart.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_efm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_efm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_gpio.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32f460_ll_interrupts_share.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32f460_ll_interrupts_share.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_rmu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_rmu.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_spi.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_tmr0.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_tmr0.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_dma.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+  <RTE>
+    <apis />
+    <components />
+    <files />
+  </RTE>
+</Project>

bsp/hc32/ev_hc32f460_lqfp100_v2/rtconfig.h

@@ -0,0 +1,202 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 1000
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_HOOK_USING_FUNC_PTR
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 256
+
+/* kservice optimization */
+
+#define RT_DEBUG
+#define RT_DEBUG_COLOR
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_SMALL_MEM
+#define RT_USING_SMALL_MEM_AS_HEAP
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart4"
+#define RT_VER_NUM 0x40101
+#define ARCH_ARM
+#define RT_USING_CPU_FFS
+#define ARCH_ARM_CORTEX_M
+#define ARCH_ARM_CORTEX_M4
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
+#define RT_USING_MSH
+#define RT_USING_FINSH
+#define FINSH_USING_MSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_CMD_SIZE 80
+#define MSH_USING_BUILT_IN_COMMANDS
+#define FINSH_USING_DESCRIPTION
+#define FINSH_ARG_MAX 10
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_USING_SYSTEM_WORKQUEUE
+#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
+#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
+#define RT_USING_SERIAL
+#define RT_USING_SERIAL_V1
+#define RT_SERIAL_USING_DMA
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_PIN
+#define RT_USING_SPI
+
+/* Using USB */
+
+
+/* C/C++ and POSIX layer */
+
+#define RT_LIBC_DEFAULT_TIMEZONE 8
+
+/* POSIX (Portable Operating System Interface) layer */
+
+
+/* Interprocess Communication (IPC) */
+
+
+/* Socket is in the 'Network' category */
+
+
+/* Network */
+
+
+/* Utilities */
+
+
+/* RT-Thread Utestcases */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
+
+
+/* XML: Extensible Markup Language */
+
+
+/* multimedia packages */
+
+/* LVGL: powerful and easy-to-use embedded GUI library */
+
+
+/* u8g2: a monochrome graphic library */
+
+
+/* PainterEngine: A cross-platform graphics application framework written in C language */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+/* enhanced kernel services */
+
+
+/* POSIX extension functions */
+
+
+/* acceleration: Assembly language or algorithmic acceleration packages */
+
+
+/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
+
+
+/* Micrium: Micrium software products porting for RT-Thread */
+
+
+/* peripheral libraries and drivers */
+
+
+/* AI packages */
+
+
+/* miscellaneous packages */
+
+/* project laboratory */
+
+/* samples: kernel and components samples */
+
+
+/* entertainment: terminal games and other interesting software packages */
+
+#define SOC_FAMILY_HC32
+#define SOC_SERIES_HC32F4
+
+/* Hardware Drivers Config */
+
+#define SOC_HC32F460PE
+
+/* Onboard Peripheral Drivers */
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_GPIO
+#define BSP_USING_UART
+#define BSP_USING_UART4
+
+/* Board extended module Drivers */
+
+
+#endif

bsp/hc32/ev_hc32f460_lqfp100_v2/rtconfig.py

@@ -0,0 +1,150 @@
+import os
+
+# toolchains options
+ARCH='arm'
+CPU='cortex-m4'
+CROSS_TOOL='gcc'
+
+# bsp lib config
+BSP_LIBRARY_TYPE = None
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+
+# cross_tool provides the cross compiler
+# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'C:/Users/XXYYZZ'
+elif CROSS_TOOL == 'keil':
+    PLATFORM    = 'armcc'
+    EXEC_PATH   = r'C:/Keil_v5'
+elif CROSS_TOOL == 'iar':
+    PLATFORM    = 'iar'
+    EXEC_PATH   = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.4'
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX = 'arm-none-eabi-'
+    CC = PREFIX + 'gcc'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    CXX = PREFIX + 'g++'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
+    CFLAGS = DEVICE + ' -Dgcc'
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2 -g'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -O2'
+
+    CXXFLAGS = CFLAGS 
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+    # toolchains
+    CC = 'armcc'
+    CXX = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu Cortex-M4.fp '
+    CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
+    LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
+
+    CFLAGS += ' -D__MICROLIB '
+    AFLAGS += ' --pd "__MICROLIB SETA 1" '
+    LFLAGS += ' --library_type=microlib '
+    EXEC_PATH += '/ARM/ARMCC/bin/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    CXXFLAGS = CFLAGS 
+    CFLAGS += ' -std=c99'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'iar':
+    # toolchains
+    CC = 'iccarm'
+    CXX = 'iccarm'
+    AS = 'iasmarm'
+    AR = 'iarchive'
+    LINK = 'ilinkarm'
+    TARGET_EXT = 'out'
+
+    DEVICE = '-Dewarm'
+
+    CFLAGS = DEVICE
+    CFLAGS += ' --diag_suppress Pa050'
+    CFLAGS += ' --no_cse'
+    CFLAGS += ' --no_unroll'
+    CFLAGS += ' --no_inline'
+    CFLAGS += ' --no_code_motion'
+    CFLAGS += ' --no_tbaa'
+    CFLAGS += ' --no_clustering'
+    CFLAGS += ' --no_scheduling'
+    CFLAGS += ' --endian=little'
+    CFLAGS += ' --cpu=Cortex-M4'
+    CFLAGS += ' -e'
+    CFLAGS += ' --fpu=VFPv4_sp'
+    CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
+    CFLAGS += ' --silent'
+
+    AFLAGS = DEVICE
+    AFLAGS += ' -s+'
+    AFLAGS += ' -w+'
+    AFLAGS += ' -r'
+    AFLAGS += ' --cpu Cortex-M4'
+    AFLAGS += ' --fpu VFPv4_sp'
+    AFLAGS += ' -S'
+
+    if BUILD == 'debug':
+        CFLAGS += ' --debug'
+        CFLAGS += ' -On'
+    else:
+        CFLAGS += ' -Oh'
+
+    LFLAGS = ' --config "board/linker_scripts/link.icf"'
+    LFLAGS += ' --entry __iar_program_start'
+
+    CXXFLAGS = CFLAGS
+    
+    EXEC_PATH = EXEC_PATH + '/arm/bin/'
+    POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
+
+def dist_handle(BSP_ROOT, dist_dir):
+    import sys
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)

bsp/hc32/ev_hc32f460_lqfp100_v2/template.ewp

@@ -0,0 +1,1925 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>Debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>0</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>24</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>ExePath</name>
+          <state>build\iar\debug\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>build\iar\debug\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>build\iar\debug\List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>3</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>Automatic choice of formatter.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>Automatic choice of formatter.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>6.50.1.4445</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>7.70.1.11471</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>Default	None</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111011111111110111111111011011101111011111010110110011110101111110111111111111101111111111001101111110011110001111111011011111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>24</version>
+          <state>35</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>24</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state>Default	None</state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>4</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>24</version>
+          <state>39</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>31</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>CCDefines</name>
+          <state>__DEBUG</state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>00000000</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IInterwork2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>011111011111111110111111111011011101111011111011110110011111101111110111111111111101111111111001101111110111110001111111011111111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccExceptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccRTTI</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>9</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>rtthread.bin</state>
+        </option>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>3</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>17</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>rtthread.out</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\board\linker_scripts\link.icf</state>
+        </option>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
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+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
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+          <name>FillerStart</name>
+          <state>0x0</state>
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+          <name>FillerEnd</name>
+          <state>0x0</state>
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+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
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+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
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+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
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+    <name>Release</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>0</debug>
+    <settings>
+      <name>General</name>
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+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>Default	None</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state>Default	None</state>
+        </option>
+        <option>
+          <name>ExePath</name>
+          <state>build\iar\release\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>build\iar\release\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>build\iar\release\List</state>
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+          <state>0</state>
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+          <version>3</version>
+          <state>0</state>
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+          <version>2</version>
+          <state>0</state>
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+        <option>
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+          <state>Automatic choice of formatter.</state>
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+          <state>0</state>
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+          <name>OGCoreOrChip</name>
+          <state>0</state>
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+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>1</state>
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+          <name>RTDescription</name>
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
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+          <state>6.50.1.4445</state>
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+          <name>GeneralEnableMisra</name>
+          <state>0</state>
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+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
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+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
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+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
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+        <option>
+          <name>GBECoreSlave</name>
+          <version>24</version>
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+          <name>OGUseCmsis</name>
+          <state>0</state>
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+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
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+        <option>
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+          <state>0</state>
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+        <option>
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+          <version>24</version>
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+          <version>0</version>
+          <state>4</state>
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+          <version>0</version>
+          <state>0</state>
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+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>24</version>
+          <state>39</state>
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+        <wantNonLocal>1</wantNonLocal>
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+          <state></state>
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+          <state>0</state>
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+          <name>CCPreprocComments</name>
+          <state>0</state>
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+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
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+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
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+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
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+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
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+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
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+          <name>CCListAssSource</name>
+          <state>0</state>
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+          <state>0</state>
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+          <name>CCDiagSuppress</name>
+          <state></state>
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+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
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+          <name>CCDiagWarning</name>
+          <state></state>
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+        <option>
+          <name>CCDiagError</name>
+          <state></state>
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+        <option>
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+          <state>1</state>
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+          <version>1</version>
+          <state>11111110</state>
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+          <name>IExtraOptions</name>
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+          <name>CCDiagWarnAreErr</name>
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+        <option>
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+          <state>$FILE_BNAME$.o</state>
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+          <state>1</state>
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+          <state>.text</state>
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+          <state>0</state>
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+          <version>0</version>
+          <state>2</state>
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+          <state>0</state>
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+          <state>0</state>
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+          <name>IccCDialect</name>
+          <state>1</state>
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+          <name>IccCppDialect</name>
+          <state>1</state>
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+          <state>1</state>
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+          <name>IccRTTI</name>
+          <state>1</state>
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+          <state>1</state>
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+          <version>0</version>
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+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>3</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>rtthread.bin</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>17</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>rtthread.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\board\linker_scripts\link.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
+</project>
+
+

bsp/hc32/ev_hc32f460_lqfp100_v2/template.eww

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\template.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+

bsp/hc32/ev_hc32f460_lqfp100_v2/template.uvoptx

@@ -0,0 +1,189 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rt-thread</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\keil\List\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>255</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>3</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\CMSIS_AGDI.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>CMSIS_AGDI</Key>
+          <Name>-X"" -O206 -S0 -C0 -P00 -FO7 -FD1FFF8000 -FC1000 -FN2 -FF0HC32F460_512K -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM) -FF1HC32F460_otp -FS13000C00 -FL13FC -FP1($$Device:HC32F460PETB$FlashARM\HC32F460_otp.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD1FFF8000 -FC1000 -FN1 -FF0HC32F460_512K -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U261009725 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST2 -TO18 -TC10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD1FFF8000 -FC1000 -FN1 -FF0HC32F460_512K.FLM -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>0</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>1000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+</ProjectOpt>

bsp/hc32/ev_hc32f460_lqfp100_v2/template.uvprojx

@@ -0,0 +1,390 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>rt-thread</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>HC32F460PETB</Device>
+          <Vendor>HDSC</Vendor>
+          <PackID>HDSC.HC32F460.1.0.9</PackID>
+          <PackURL>https://raw.githubusercontent.com/hdscmcu/pack/master/</PackURL>
+          <Cpu>IROM1(0x00000000,0x80000) IROM2(0x03000C00,0x3FC) IRAM1(0x1FFF8000,0x2F000)  IRAM2(0x200F0000,0x1000) CPUTYPE("Cortex-M4") FPU2 CLOCK(8000000) ESEL ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>CMSIS_AGDI(-S0 -C0 -P0 -FD1FFF8000 -FC1000 -FN2 -FF0HC32F460_512K -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM) -FF1HC32F460_otp -FS103000C00 -FL13FC -FP1($$Device:HC32F460PETB$FlashARM\HC32F460_otp.FLM))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:HC32F460PETB$Device\Include\HC32F460PETB.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HDSC_HC32F460.SFR</SFDFile>
+          <bCustSvd>1</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\keil\Obj\</OutputDirectory>
+          <OutputName>rtthread</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath>.\build\keil\List\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> -REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> -MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>1</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>1</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>1</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x1FFF8000</StartAddress>
+                <Size>0x2F000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x03000C00</StartAddress>
+                <Size>0x3FC</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x1FFF8000</StartAddress>
+                <Size>0x2F000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x200F0000</StartAddress>
+                <Size>0x1000</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>0</v6Lang>
+            <v6LangP>0</v6LangP>
+            <vShortEn>0</vShortEn>
+            <vShortWch>0</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x1FFF8000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>

bsp/hc32/ev_hc32f4a0_lqfp176/.config

@@ -78,7 +78,7 @@ CONFIG_RT_USING_DEVICE=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
-CONFIG_RT_VER_NUM=0x40100
+CONFIG_RT_VER_NUM=0x40101
 CONFIG_ARCH_ARM=y
 CONFIG_RT_USING_CPU_FFS=y
 CONFIG_ARCH_ARM_CORTEX_M=y
@@ -274,6 +274,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
 # CONFIG_PKG_USING_JOYLINK is not set
 # CONFIG_PKG_USING_EZ_IOT_OS is not set
+# CONFIG_PKG_USING_IOTSHARP_SDK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
@@ -313,6 +314,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 #
 # CONFIG_PKG_USING_MBEDTLS is not set
 # CONFIG_PKG_USING_LIBSODIUM is not set
+# CONFIG_PKG_USING_LIBHYDROGEN is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
 # CONFIG_PKG_USING_YD_CRYPTO is not set
@@ -352,6 +354,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_LVGL is not set
 # CONFIG_PKG_USING_LITTLEVGL2RTT is not set
 # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
+# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
 
 #
 # u8g2: a monochrome graphic library
@@ -428,6 +431,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_CBOX is not set
 # CONFIG_PKG_USING_SNOWFLAKE is not set
 # CONFIG_PKG_USING_HASH_MATCH is not set
+# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
 
 #
 # system packages
@@ -459,6 +463,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
 #
 # CONFIG_PKG_USING_CMSIS_5 is not set
+# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
 # CONFIG_PKG_USING_CMSIS_RTOS2 is not set
 
 #
@@ -502,6 +507,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_CHERRYUSB is not set
 # CONFIG_PKG_USING_KMULTI_RTIMER is not set
 # CONFIG_PKG_USING_TFDB is not set
+# CONFIG_PKG_USING_QPC is not set
 
 #
 # peripheral libraries and drivers
@@ -656,6 +662,8 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_CONTROLLER is not set
 # CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
 # CONFIG_PKG_USING_MFBD is not set
+# CONFIG_PKG_USING_SLCAN2RTT is not set
+# CONFIG_PKG_USING_SOEM is not set
 CONFIG_SOC_FAMILY_HC32=y
 CONFIG_SOC_SERIES_HC32F4=y
 
@@ -669,7 +677,6 @@ CONFIG_SOC_HC32F4A0SI=y
 #
 # CONFIG_BSP_USING_ETH is not set
 # CONFIG_BSP_USING_TCA9539 is not set
-# CONFIG_BSP_USING_SPI_FLASH is not set
 
 #
 # On-chip Peripheral Drivers
@@ -690,10 +697,6 @@ CONFIG_BSP_USING_UART1=y
 # CONFIG_BSP_USING_UART10 is not set
 # CONFIG_BSP_USING_I2C1 is not set
 # CONFIG_BSP_USING_SPI is not set
-# CONFIG_BSP_USING_RTC is not set
-# CONFIG_BSP_USING_PWM is not set
-# CONFIG_BSP_USING_TIMER is not set
-# CONFIG_BSP_USING_PULSE_ENCODER is not set
 # CONFIG_BSP_USING_ADC is not set
 # CONFIG_BSP_USING_CAN is not set
 

bsp/hc32/ev_hc32f4a0_lqfp176/README.md

@@ -40,18 +40,16 @@ EV_F4A0_LQ176 开发板常用 **板载资源** 如下：
 | **板载外设**  | **支持情况** |               **备注**                |
 | :------------ | :-----------: | :-----------------------------------: |
 | USB 转串口    |      支持     |          使用 UART1                  |
-| SPI Flash     |     支持     |           使用 SPI1                   |
-| LED           |     支持     |           LED                   |
+| LED           |     支持     |           LED                        |
+| ETH           |     支持     |              					     |
+| ADC           |     支持     |                                       |
+| CAN           |     支持     |                                       |
 | **片上外设**  | **支持情况** |               **备注**                |
 | :------------ | :-----------: | :-----------------------------------: |
 | GPIO          |     支持     | PA0, PA1... PI13 ---> PIN: 0, 1...141 |
 | UART          |     支持     |              UART1~10                 |
 | SPI           |     支持     |              SPI1~6                   |
 | I2C           |     支持     |              软件 I2C                 |
-| RTC           |     支持     |      支持外部晶振和内部低速时钟         |
-| PWM           |     支持     |                                       |
-| HWTIMER       |     支持     |                                       |
-| LED           |     支持     |              LED11                    |
 
 
 ## 使用说明
@@ -79,7 +77,7 @@ EV_F4A0_LQ176 开发板常用 **板载资源** 如下：
 
 双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
 
-> 工程默认配置使用 J-LINK 下载程序，点击下载按钮即可下载程序到开发板。
+> 工程默认配置使用板载 DAP 下载程序，点击下载按钮即可下载程序到开发板。
 
 #### 运行结果
 

bsp/hc32/ev_hc32f4a0_lqfp176/applications/main.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig

@@ -40,12 +40,6 @@ menu "Onboard Peripheral Drivers"
         select BSP_USING_I2C1
         default n
 
-    config BSP_USING_SPI_FLASH
-        bool "Enable SPI FLASH (spi1)"
-        select BSP_USING_SPI
-        select BSP_USING_SPI1
-        default n
-
 endmenu
 
 menu "On-chip Peripheral Drivers"
@@ -223,116 +217,6 @@ menu "On-chip Peripheral Drivers"
                 default n
         endif
 
-    menuconfig BSP_USING_RTC
-        bool "Enable RTC"
-        select RT_USING_RTC
-        default n
-
-        if BSP_USING_RTC
-            choice
-                prompt "Select clock source"
-                default BSP_RTC_USING_LRC
-
-                config BSP_RTC_USING_XTAL32
-                    bool "RTC USING XTAL32"
-
-                config BSP_RTC_USING_LRC
-                    bool "RTC USING LRC"
-            endchoice
-        endif
-
-    menuconfig BSP_USING_PWM
-        bool "Enable PWM"
-        default n
-        select RT_USING_PWM
-        if BSP_USING_PWM
-        menuconfig BSP_USING_PWM1
-            bool "Enable timer1 output PWM"
-            default n
-            if BSP_USING_PWM1
-                config BSP_USING_PWM1_CH1
-                    bool "Enable PWM1 channel1"
-                    default n
-
-                config BSP_USING_PWM1_CH2
-                    bool "Enable PWM1 channel2"
-                    default n
-
-                config BSP_USING_PWM1_CH3
-                    bool "Enable PWM1 channel3"
-                    default n
-
-                config BSP_USING_PWM1_CH4
-                    bool "Enable PWM1 channel4"
-                    default n
-            endif
-
-        menuconfig BSP_USING_PWM2
-            bool "Enable timer2 output PWM"
-            default n
-            if BSP_USING_PWM2
-                config BSP_USING_PWM2_CH1
-                    bool "Enable PWM2 channel1"
-                    default n
-
-                config BSP_USING_PWM2_CH2
-                    bool "Enable PWM2 channel2"
-                    default n
-
-                config BSP_USING_PWM2_CH3
-                    bool "Enable PWM2 channel3"
-                    default n
-
-                config BSP_USING_PWM2_CH4
-                    bool "Enable PWM2 channel4"
-                    default n
-            endif
-        endif
-
-    menuconfig BSP_USING_TIMER
-        bool "Enable TIMER"
-        default n
-        select RT_USING_HWTIMER
-        if BSP_USING_TIMER
-            config BSP_USING_TIMER5
-                bool "Enable TIMER5"
-                default n
-
-            config BSP_USING_TIMER6
-                bool "Enable TIMER6"
-                default n
-
-            config BSP_USING_TIMER7
-                bool "Enable TIMER7"
-                default n
-
-            config BSP_USING_TIMER8
-                bool "Enable TIMER8"
-                default n
-        endif
-
-    menuconfig BSP_USING_PULSE_ENCODER
-        bool "Enable Pulse Encoder"
-        default n
-        select RT_USING_PULSE_ENCODER
-        if BSP_USING_PULSE_ENCODER
-            config BSP_USING_PULSE_ENCODER9
-                bool "Enable Pulse Encoder9"
-                default n
-
-            config BSP_USING_PULSE_ENCODER10
-                bool "Enable Pulse Encoder10"
-                default n
-
-            config BSP_USING_PULSE_ENCODER11
-                bool "Enable Pulse Encoder11"
-                default n
-
-            config BSP_USING_PULSE_ENCODER12
-                bool "Enable Pulse Encoder12"
-                default n
-        endif
-
     menuconfig BSP_USING_ADC
         bool "Enable ADC"
         default n

bsp/hc32/ev_hc32f4a0_lqfp176/board/SConscript

@@ -15,9 +15,6 @@ board_config.c
 if GetDepend(['BSP_USING_TCA9539']):
     src += Glob('ports/tca9539.c')
 
-if GetDepend(['BSP_USING_SPI_FLASH']):
-    src += Glob('ports/spi_flash.c')
-
 path =  [cwd]
 path += [cwd + '/ports']
 path += [cwd + '/config']

bsp/hc32/ev_hc32f4a0_lqfp176/board/board.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -134,7 +135,7 @@ void SysTick_Handler(void)
 }
 
 /**
- * This function will initial GD32 board.
+ * This function will initial HC32 board.
  */
 void rt_hw_board_init()
 {

bsp/hc32/ev_hc32f4a0_lqfp176/board/board.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/board_config.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -46,54 +47,6 @@ rt_err_t rt_hw_board_uart_init(CM_USART_TypeDef *USARTx)
 }
 #endif
 
-#if defined(RT_USING_PWM)
-rt_err_t rt_hw_board_pwm_init(CM_TMRA_TypeDef *TMRAx)
-{
-    rt_err_t result = RT_EOK;
-
-    switch ((rt_uint32_t)TMRAx)
-    {
-#if defined(BSP_USING_PWM1)
-    case (rt_uint32_t)CM_TMRA_1:
-#if defined(BSP_USING_PWM1_CH1)
-        GPIO_SetFunc(PWM1_CH1_PORT, PWM1_CH1_PIN, PWM1_CH1_FUNC);
-#endif
-#if defined(BSP_USING_PWM1_CH2)
-        GPIO_SetFunc(PWM1_CH2_PORT, PWM1_CH2_PIN, PWM1_CH2_FUNC);
-#endif
-        break;
-#endif
-    default:
-        result = -RT_ERROR;
-        break;
-    }
-
-    return result;
-}
-#endif
-
-#if defined(RT_USING_PULSE_ENCODER)
-rt_err_t rt_hw_board_pulse_encoder_init(CM_TMRA_TypeDef *TMRAx)
-{
-    rt_err_t result = RT_EOK;
-
-    switch ((rt_uint32_t)TMRAx)
-    {
-#if defined(BSP_USING_PULSE_ENCODER9)
-    case (rt_uint32_t)CM_TMRA_9:
-        GPIO_SetFunc(PULSE_ENCODER9_CLKA_PORT, PULSE_ENCODER9_CLKA_PIN, PULSE_ENCODER9_CLKA_FUNC);
-        GPIO_SetFunc(PULSE_ENCODER9_CLKB_PORT, PULSE_ENCODER9_CLKB_PIN, PULSE_ENCODER9_CLKB_FUNC);
-        break;
-#endif
-    default:
-        result = -RT_ERROR;
-        break;
-    }
-
-    return result;
-}
-#endif
-
 #if defined(RT_USING_ADC)
 rt_err_t rt_hw_board_adc_init(CM_ADC_TypeDef *ADCx)
 {

bsp/hc32/ev_hc32f4a0_lqfp176/board/board_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -34,34 +35,6 @@
     #define USART6_TX_PIN                   (GPIO_PIN_06)
 #endif
 
-/*********************** PWM port *************************/
-#if defined(BSP_USING_PWM1)
-
-    #if defined(BSP_USING_PWM1_CH1)
-        #define PWM1_CH1_PORT                   (GPIO_PORT_A)
-        #define PWM1_CH1_PIN                    (GPIO_PIN_08)
-        #define PWM1_CH1_FUNC                   (GPIO_FUNC_4)
-    #endif
-
-    #if defined(BSP_USING_PWM1_CH2)
-        #define PWM1_CH2_PORT                   (GPIO_PORT_A)
-        #define PWM1_CH2_PIN                    (GPIO_PIN_09)
-        #define PWM1_CH2_FUNC                   (GPIO_FUNC_4)
-    #endif
-
-#endif
-
-/****************** Pulse encoder port ********************/
-#if defined(BSP_USING_PULSE_ENCODER9)
-    #define PULSE_ENCODER9_CLKA_PORT        (GPIO_PORT_G)
-    #define PULSE_ENCODER9_CLKA_PIN         (GPIO_PIN_04)
-    #define PULSE_ENCODER9_CLKA_FUNC        (GPIO_FUNC_4)
-
-    #define PULSE_ENCODER9_CLKB_PORT        (GPIO_PORT_G)
-    #define PULSE_ENCODER9_CLKB_PIN         (GPIO_PIN_05)
-    #define PULSE_ENCODER9_CLKB_FUNC        (GPIO_FUNC_4)
-#endif
-
 /***********  ADC configure *********/
 #if defined(BSP_USING_ADC1)
     #define ADC1_CH_PORT                     (GPIO_PORT_C)

bsp/hc32/ev_hc32f4a0_lqfp176/board/config/adc_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/config/can_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/config/dma_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/config/eth_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/config/gpio_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/config/irq_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/config/spi_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/config/tim_config.h

@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#ifndef __TIM_CONFIG_H__
-#define __TIM_CONFIG_H__
-
-#include <rtthread.h>
-#include "irq_config.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-#ifndef TIM_DEV_INFO_CONFIG
-#define TIM_DEV_INFO_CONFIG                     \
-    {                                           \
-        .maxfreq = 1000000,                     \
-        .minfreq = 3000,                        \
-        .maxcnt  = 0xFFFF,                      \
-        .cntmode = HWTIMER_CNTMODE_UP,          \
-    }
-#endif /* TIM_DEV_INFO_CONFIG */
-
-#ifdef BSP_USING_TIM3
-#ifndef TIM3_CONFIG
-#define TIM3_CONFIG                                         \
-    {                                                       \
-       .tim_handle.Instance     = TIM3,                     \
-       .tim_irqn                = TIM3_IRQn,                \
-       .name                    = "timer3",                 \
-    }
-#endif /* TIM3_CONFIG */
-#endif /* BSP_USING_TIM3 */
-
-#ifdef BSP_USING_TIM11
-#ifndef TIM11_CONFIG
-#define TIM11_CONFIG                                        \
-    {                                                       \
-       .tim_handle.Instance     = TIM11,                    \
-       .tim_irqn                = TIM1_TRG_COM_TIM11_IRQn,  \
-       .name                    = "timer11",                \
-    }
-#endif /* TIM11_CONFIG */
-#endif /* BSP_USING_TIM11 */
-
-#ifdef BSP_USING_TIM13
-#ifndef TIM13_CONFIG
-#define TIM13_CONFIG                                        \
-    {                                                       \
-       .tim_handle.Instance     = TIM13,                    \
-       .tim_irqn                = TIM8_UP_TIM13_IRQn,       \
-       .name                    = "timer13",                \
-    }
-#endif /* TIM13_CONFIG */
-#endif /* BSP_USING_TIM13 */
-
-#ifdef BSP_USING_TIM14
-#ifndef TIM14_CONFIG
-#define TIM14_CONFIG                                        \
-    {                                                       \
-       .tim_handle.Instance     = TIM14,                    \
-       .tim_irqn                = TIM8_TRG_COM_TIM14_IRQn,  \
-       .name                    = "timer14",                \
-    }
-#endif /* TIM14_CONFIG */
-#endif /* BSP_USING_TIM14 */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __TIM_CONFIG_H__ */

bsp/hc32/ev_hc32f4a0_lqfp176/board/config/uart_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/drv_config.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -22,7 +23,6 @@ extern "C" {
 #include "uart_config.h"
 #include "spi_config.h"
 #include "adc_config.h"
-#include "tim_config.h"
 #include "gpio_config.h"
 #include "eth_config.h"
 #include "can_config.h"

bsp/hc32/ev_hc32f4a0_lqfp176/board/hc32f4xx_conf.h

@@ -8,7 +8,7 @@
    2022-04-28       CDT             First version
  @endverbatim
  *******************************************************************************
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. Ltd. All rights reserved.
+ * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
  *
  * This software component is licensed by XHSC under BSD 3-Clause license
  * (the "License"); You may not use this file except in compliance with the

bsp/hc32/ev_hc32f4a0_lqfp176/board/linker_scripts/link.ld

@@ -1,5 +1,5 @@
 /******************************************************************************
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. Ltd. All rights reserved.
+ * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
  *
  * This software component is licensed by XHSC under BSD 3-Clause license
  * (the "License"); You may not use this file except in compliance with the

bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/spi_flash.c

@@ -1,46 +0,0 @@
-/*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#include <rtthread.h>
-#include "drv_spi.h"
-
-#if defined(BSP_USING_SPI_FLASH)
-
-/*******************************************************************************
- * Local type definitions ('typedef')
- ******************************************************************************/
-
-/*******************************************************************************
- * Local pre-processor symbols/macros ('#define')
- ******************************************************************************/
-
-/*******************************************************************************
- * Global variable definitions (declared in header file with 'extern')
- ******************************************************************************/
-
-/*******************************************************************************
- * Local function prototypes ('static')
- ******************************************************************************/
-
-/*******************************************************************************
- * Local variable definitions ('static')
- ******************************************************************************/
-
-/*******************************************************************************
- * Function implementation - global ('extern') and local ('static')
- ******************************************************************************/
-static int rt_hw_spi_flash_init(void)
-{
-    rt_hw_spi_device_attach("spi1", "spi10", GPIO_PORT_C, GPIO_PIN_07);
-    return RT_EOK;
-}
-INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init);
-
-#endif

bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/tca9539.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/tca9539.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f4a0_lqfp176/project.ewp

@@ -180,7 +180,9 @@
         <option>
           <name>CCDefines</name>
           <state>__DEBUG</state>
+          <state>CLOCKS_PER_SEC=RT_TICK_PER_SECOND</state>
           <state>RT_USING_DLIBC</state>
+          <state>RT_USING_LIBC</state>
           <state>HC32F4A0</state>
           <state>__RTTHREAD__</state>
           <state>USE_DDL_DRIVER</state>
@@ -313,6 +315,7 @@
         <option>
           <name>CCIncludePath2</name>
           <state />
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\libraries\hc32f4a0_ddl\drivers\cmsis\Include</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
@@ -329,6 +332,7 @@
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\board\config</state>
           <state>$PROJ_DIR$\..\..\..\include</state>
           <state>$PROJ_DIR$\board</state>
         </option>
@@ -1161,7 +1165,9 @@
         <option>
           <name>CCDefines</name>
           <state />
+          <state>CLOCKS_PER_SEC=RT_TICK_PER_SECOND</state>
           <state>RT_USING_DLIBC</state>
+          <state>RT_USING_LIBC</state>
           <state>HC32F4A0</state>
           <state>__RTTHREAD__</state>
           <state>USE_DDL_DRIVER</state>
@@ -1294,6 +1300,7 @@
         <option>
           <name>CCIncludePath2</name>
           <state />
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\libraries\hc32f4a0_ddl\drivers\cmsis\Include</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
@@ -1310,6 +1317,7 @@
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\board\config</state>
           <state>$PROJ_DIR$\..\..\..\include</state>
           <state>$PROJ_DIR$\board</state>
         </option>
@@ -1980,25 +1988,25 @@
       <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscalls.c</name>
@@ -2007,43 +2015,43 @@
   <group>
     <name>CPU</name>
     <file>
-      <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c</name>
+      <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c</name>
+      <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\cpuport.c</name>
+      <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\context_iar.S</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\context_iar.S</name>
+      <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\cpuport.c</name>
     </file>
   </group>
   <group>
     <name>DeviceDrivers</name>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\dataqueue.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\ringbuffer.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\dataqueue.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\waitqueue.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\pipe.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\pipe.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\ringblk_buf.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\workqueue.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\ringbuffer.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\ringblk_buf.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\waitqueue.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\workqueue.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\components\drivers\misc\pin.c</name>
@@ -2055,13 +2063,13 @@
   <group>
     <name>Drivers</name>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f4a0_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\IAR\startup_hc32f4a0.s</name>
+      <name>$PROJ_DIR$\board\board.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\board\board_config.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\board\board.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f4a0_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\IAR\startup_hc32f4a0.s</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_gpio.c</name>
@@ -2088,13 +2096,13 @@
   <group>
     <name>Kernel</name>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\device.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\clock.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\irq.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\components.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\timer.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\device.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\src\idle.c</name>
@@ -2102,11 +2110,14 @@
     <file>
       <name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
     </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\irq.c</name>
+    </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\components.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\mem.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\src\mempool.c</name>
@@ -2121,10 +2132,7 @@
       <name>$PROJ_DIR$\..\..\..\src\thread.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\mem.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\..\..\..\src\clock.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\timer.c</name>
     </file>
   </group>
   <group>

bsp/hc32/ev_hc32f4a0_lqfp176/project.uvprojx

@@ -333,9 +333,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls />
-              <Define>USE_DDL_DRIVER, __RTTHREAD__, HC32F4A0, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND</Define>
+              <Define>RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, USE_DDL_DRIVER, HC32F4A0, __RTTHREAD__, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\ports;..\libraries\hc32_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\hc32f4a0_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include;..\libraries\hc32f4a0_ddl\drivers\cmsis\Include;..\libraries\hc32f4a0_ddl\drivers\hc32_ll_driver\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\ports;board\config;..\libraries\hc32_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\hc32f4a0_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include;..\libraries\hc32f4a0_ddl\drivers\cmsis\Include;..\libraries\hc32f4a0_ddl\drivers\hc32_ll_driver\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -404,21 +404,28 @@
           </Files>
           <Files>
             <File>
-              <FileName>time.c</FileName>
+              <FileName>stdlib.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath>
+              <FilePath>..\..\..\components\libc\compilers\common\stdlib.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>stdlib.c</FileName>
+              <FileName>time.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\libc\compilers\common\stdlib.c</FilePath>
+              <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
           <GroupName>CPU</GroupName>
+          <Files>
+            <File>
+              <FileName>backtrace.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
+            </File>
+          </Files>
           <Files>
             <File>
               <FileName>div0.c</FileName>
@@ -435,9 +442,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>backtrace.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FileName>context_rvds.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
             </File>
           </Files>
           <Files>
@@ -447,56 +454,49 @@
               <FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
             </File>
           </Files>
-          <Files>
-            <File>
-              <FileName>context_rvds.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
-            </File>
-          </Files>
         </Group>
         <Group>
           <GroupName>DeviceDrivers</GroupName>
           <Files>
             <File>
-              <FileName>ringbuffer.c</FileName>
+              <FileName>completion.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath>
+              <FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>completion.c</FileName>
+              <FileName>dataqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
+              <FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>ringblk_buf.c</FileName>
+              <FileName>pipe.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
+              <FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>pipe.c</FileName>
+              <FileName>ringblk_buf.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath>
+              <FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>waitqueue.c</FileName>
+              <FileName>ringbuffer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath>
+              <FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>dataqueue.c</FileName>
+              <FileName>waitqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath>
+              <FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath>
             </File>
           </Files>
           <Files>
@@ -525,9 +525,9 @@
           <GroupName>Drivers</GroupName>
           <Files>
             <File>
-              <FileName>startup_hc32f4a0.s</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\libraries\hc32f4a0_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\ARM\startup_hc32f4a0.s</FilePath>
+              <FileName>board.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\board.c</FilePath>
             </File>
           </Files>
           <Files>
@@ -539,9 +539,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>board.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>board\board.c</FilePath>
+              <FileName>startup_hc32f4a0.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\libraries\hc32f4a0_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\ARM\startup_hc32f4a0.s</FilePath>
             </File>
           </Files>
           <Files>
@@ -594,93 +594,93 @@
           <GroupName>Kernel</GroupName>
           <Files>
             <File>
-              <FileName>ipc.c</FileName>
+              <FileName>clock.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\ipc.c</FilePath>
+              <FilePath>..\..\..\src\clock.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>scheduler.c</FileName>
+              <FileName>components.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\scheduler.c</FilePath>
+              <FilePath>..\..\..\src\components.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>clock.c</FileName>
+              <FileName>device.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\clock.c</FilePath>
+              <FilePath>..\..\..\src\device.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>device.c</FileName>
+              <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\device.c</FilePath>
+              <FilePath>..\..\..\src\idle.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>irq.c</FileName>
+              <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\irq.c</FilePath>
+              <FilePath>..\..\..\src\ipc.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>idle.c</FileName>
+              <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\idle.c</FilePath>
+              <FilePath>..\..\..\src\irq.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>thread.c</FileName>
+              <FileName>kservice.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\thread.c</FilePath>
+              <FilePath>..\..\..\src\kservice.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>object.c</FileName>
+              <FileName>mem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\object.c</FilePath>
+              <FilePath>..\..\..\src\mem.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>components.c</FileName>
+              <FileName>mempool.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\components.c</FilePath>
+              <FilePath>..\..\..\src\mempool.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>kservice.c</FileName>
+              <FileName>object.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\kservice.c</FilePath>
+              <FilePath>..\..\..\src\object.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>timer.c</FileName>
+              <FileName>scheduler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\timer.c</FilePath>
+              <FilePath>..\..\..\src\scheduler.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>mempool.c</FileName>
+              <FileName>thread.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\mempool.c</FilePath>
+              <FilePath>..\..\..\src\thread.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>mem.c</FileName>
+              <FileName>timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\mem.c</FilePath>
+              <FilePath>..\..\..\src\timer.c</FilePath>
             </File>
           </Files>
         </Group>

bsp/hc32/ev_hc32f4a0_lqfp176/rtconfig.h

@@ -44,7 +44,7 @@
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
-#define RT_VER_NUM 0x40100
+#define RT_VER_NUM 0x40101
 #define ARCH_ARM
 #define RT_USING_CPU_FFS
 #define ARCH_ARM_CORTEX_M
@@ -81,7 +81,6 @@
 #define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_PIN
 
-
 /* Using USB */
 
 

bsp/hc32/libraries/.ignore_format.yml

@@ -4,3 +4,4 @@
 
 dir_path:
 - hc32f4a0_ddl
+- hc32f460_ddl

bsp/hc32/libraries/hc32_drivers/SConscript

@@ -15,21 +15,9 @@ if GetDepend(['RT_USING_PIN']):
 if GetDepend(['RT_USING_SERIAL']):
     src += ['drv_usart.c']
 
-if GetDepend(['RT_USING_HWTIMER']):
-    src += ['drv_hwtimer.c']
-
-if GetDepend(['RT_USING_PWM']):
-    src += ['drv_pwm.c']
-
-if GetDepend(['RT_USING_PULSE_ENCODER']):
-    src += ['drv_pulse_encoder.c']
-
 if GetDepend(['RT_USING_SPI']):
     src += ['drv_spi.c']
 
-if GetDepend(['RT_USING_QSPI']):
-    src += ['drv_qspi.c']
-
 if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
     src += ['drv_soft_i2c.c']
 
@@ -39,33 +27,9 @@ if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']):
 if GetDepend(['RT_USING_ADC']):
     src += ['drv_adc.c']
 
-if GetDepend(['RT_USING_DAC']):
-    src += ['drv_dac.c']
-
 if GetDepend(['RT_USING_CAN']):
     src += ['drv_can.c']
 
-if GetDepend(['RT_USING_PM']):
-    src += ['drv_pm.c']
-
-if GetDepend(['RT_USING_RTC']):
-    src += ['drv_rtc.c']
-
-if GetDepend(['RT_USING_ON_CHIP_FLASH']):
-    src += ['drv_flash.c']
-
-if GetDepend(['RT_USING_WDT']):
-    src += ['drv_wdt.c']
-
-if GetDepend(['RT_USING_SDIO']):
-    src += ['drv_sdio.c']
-
-if GetDepend(['RT_USING_USBD']):
-    src += ['drv_usbd.c']
-
-if GetDepend(['RT_USING_USBH']):
-    src += ['drv_usbh.c']
-
 
 path = [cwd]
 

bsp/hc32/libraries/hc32_drivers/drv_adc.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_adc.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_can.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_can.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_dma.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_eth.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_eth.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_gpio.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -22,6 +23,8 @@
 
 #if defined (HC32F4A0)
     #define PIN_MAX_NUM                     ((GPIO_PORT_I * 16) + (__CLZ(__RBIT(GPIO_PIN_13))) + 1)
+#elif defined (HC32F460)
+    #define PIN_MAX_NUM                     ((GPIO_PORT_H * 16) + (__CLZ(__RBIT(GPIO_PIN_02))) + 1)
 #endif
 
 #define ITEM_NUM(items)                 sizeof(items) / sizeof(items[0])

bsp/hc32/libraries/hc32_drivers/drv_gpio.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_hwtimer.c

@@ -1,551 +0,0 @@
-/*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#include <rtdevice.h>
-#include <rtdbg.h>
-
-#if defined(RT_USING_HWTIMER)
-
-#if defined(BSP_USING_TIMER1)  || defined(BSP_USING_TIMER2)  || defined(BSP_USING_TIMER3) || \
-    defined(BSP_USING_TIMER4)  || defined(BSP_USING_TIMER5)  || defined(BSP_USING_TIMER6) || \
-    defined(BSP_USING_TIMER7)  || defined(BSP_USING_TIMER8)  || defined(BSP_USING_TIMER9) || \
-    defined(BSP_USING_TIMER10) || defined(BSP_USING_TIMER11) || defined(BSP_USING_TIMER12)
-
-
-#include "drv_hwtimer.h"
-#include "drv_irq.h"
-
-enum
-{
-#ifdef BSP_USING_TIMER1
-    TIMER1_INDEX,
-#endif
-#ifdef BSP_USING_TIMER2
-    TIMER2_INDEX,
-#endif
-#ifdef BSP_USING_TIMER3
-    TIMER3_INDEX,
-#endif
-#ifdef BSP_USING_TIMER4
-    TIMER4_INDEX,
-#endif
-#ifdef BSP_USING_TIMER5
-    TIMER5_INDEX,
-#endif
-#ifdef BSP_USING_TIMER6
-    TIMER6_INDEX,
-#endif
-#ifdef BSP_USING_TIMER7
-    TIMER7_INDEX,
-#endif
-#ifdef BSP_USING_TIMER8
-    TIMER8_INDEX,
-#endif
-#ifdef BSP_USING_TIMER9
-    TIMER9_INDEX,
-#endif
-#ifdef BSP_USING_TIMER10
-    TIMER10_INDEX,
-#endif
-#ifdef BSP_USING_TIMER11
-    TIMER11_INDEX,
-#endif
-#ifdef BSP_USING_TIMER12
-    TIMER12_INDEX,
-#endif
-};
-
-#ifdef BSP_USING_TIMER1
-    static void timer1_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER2
-    static void timer2_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER3
-    static void timer3_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER4
-    static void timer4_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER5
-    static void timer5_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER6
-    static void timer6_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER7
-    static void timer7_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER8
-    static void timer8_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER9
-    static void timer9_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER10
-    static void timer10_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER11
-    static void timer11_irq_handler(void);
-#endif
-#ifdef BSP_USING_TIMER12
-    static void timer12_irq_handler(void);
-#endif
-
-struct hc32_hwtimer_config
-{
-    rt_hwtimer_t           time_device;
-    CM_TMRA_TypeDef        *timer_periph;
-    struct hc32_irq_config irq_config;
-    func_ptr_t             irq_callback;
-    uint32_t               extend_div;
-    uint32_t               extend_cnt;
-    char                   *name;
-};
-
-#ifndef HC32_TIMER_CONFIG
-#define HC32_TIMER_CONFIG(periph, irq, label, src, irq_info)                   \
-    {                                                                          \
-        .timer_periph       = periph,                                          \
-        .irq_callback       = irq,                                             \
-        .name               = label,                                           \
-        .irq_config         = irq_info,                                        \
-        .irq_config.int_src = src,                                             \
-    }
-#endif /* HC32_TIMER_CONFIG */
-
-static struct hc32_hwtimer_config hwtimer_obj[] =
-{
-#ifdef BSP_USING_TIMER1
-    HC32_TIMER_CONFIG(CM_TMRA_1,  timer1_irq_handler,  "timer1",  INT_SRC_TMRA_1_OVF,  TIMER1_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER2
-    HC32_TIMER_CONFIG(CM_TMRA_2,  timer2_irq_handler,  "timer2",  INT_SRC_TMRA_2_OVF,  TIMER2_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER3
-    HC32_TIMER_CONFIG(CM_TMRA_3,  timer3_irq_handler,  "timer3",  INT_SRC_TMRA_3_OVF,  TIMER3_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER4
-    HC32_TIMER_CONFIG(CM_TMRA_4,  timer4_irq_handler,  "timer4",  INT_SRC_TMRA_4_OVF,  TIMER4_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER5
-    HC32_TIMER_CONFIG(CM_TMRA_5,  timer5_irq_handler,  "timer5",  INT_SRC_TMRA_5_OVF,  TIMER5_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER6
-    HC32_TIMER_CONFIG(CM_TMRA_6,  timer6_irq_handler,  "timer6",  INT_SRC_TMRA_6_OVF,  TIMER6_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER7
-    HC32_TIMER_CONFIG(CM_TMRA_7,  timer7_irq_handler,  "timer7",  INT_SRC_TMRA_7_OVF,  TIMER7_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER8
-    HC32_TIMER_CONFIG(CM_TMRA_8,  timer8_irq_handler,  "timer8",  INT_SRC_TMRA_8_OVF,  TIMER8_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER9
-    HC32_TIMER_CONFIG(CM_TMRA_9,  timer9_irq_handler,  "timer9",  INT_SRC_TMRA_9_OVF,  TIMER9_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER10
-    HC32_TIMER_CONFIG(CM_TMRA_10, timer10_irq_handler, "timer10", INT_SRC_TMRA_10_OVF, TIMER10_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER11
-    HC32_TIMER_CONFIG(CM_TMRA_11, timer11_irq_handler, "timer11", INT_SRC_TMRA_11_OVF, TIMER11_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_TIMER12
-    HC32_TIMER_CONFIG(CM_TMRA_12, timer12_irq_handler, "timer12", INT_SRC_TMRA_12_OVF, TIMER12_IRQ_CONFIG),
-#endif
-};
-
-static void hc32_timer_irq_handler(struct hc32_hwtimer_config *timer_config)
-{
-    if ((++timer_config->extend_cnt) >= timer_config->extend_div)
-    {
-        timer_config->extend_cnt = 0;
-        rt_device_hwtimer_isr(&timer_config->time_device);
-    }
-    TMRA_ClearStatus(timer_config->timer_periph, (TMRA_FLAG_OVF | TMRA_FLAG_UDF));
-}
-
-#ifdef BSP_USING_TIMER1
-static void timer1_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER1_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER2
-static void timer2_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER2_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER3
-static void timer3_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER3_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER4
-static void timer4_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER4_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER5
-static void timer5_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER5_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER6
-static void timer6_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER6_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER7
-static void timer7_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER7_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER8
-static void timer8_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER8_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER9
-static void timer9_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER9_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER10
-static void timer10_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER10_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER11
-static void timer11_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER11_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_TIMER12
-static void timer12_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_timer_irq_handler(&hwtimer_obj[TIMER12_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-static rt_uint16_t hc32_timer_get_unit_number(CM_TMRA_TypeDef *TMRAx)
-{
-    rt_uint16_t unit_num;
-    const rt_uint32_t unit_step = 0x400U;
-
-    if (((rt_uint32_t)TMRAx) >= ((rt_uint32_t)CM_TMRA_1))
-    {
-        unit_num = (((rt_uint32_t)TMRAx) - ((rt_uint32_t)CM_TMRA_1)) / unit_step;
-    }
-    else
-    {
-        unit_num = (((rt_uint32_t)TMRAx) - ((rt_uint32_t)CM_TMRA_5)) / unit_step + 4;
-    }
-
-    return unit_num;
-}
-
-static void hc32_timer_clock_config(CM_TMRA_TypeDef *TMRAx, en_functional_state_t enNewState)
-{
-    rt_uint32_t timer_periph;
-    rt_uint16_t unit_num;
-
-    unit_num     = hc32_timer_get_unit_number(TMRAx);
-    timer_periph = PWC_FCG2_TMRA_1 << unit_num;
-    FCG_Fcg2PeriphClockCmd(timer_periph, enNewState);
-}
-
-static void hc32_timer_get_div_value(CM_TMRA_TypeDef *TMRAx, uint32_t freq, uint16_t *div, uint32_t *extend_div)
-{
-    stc_clock_freq_t stcClkFreq;
-    rt_uint32_t divisor, remainder;
-    rt_uint16_t div_val;
-    rt_uint32_t clk_freq;
-    rt_uint16_t unit_num;
-
-    CLK_GetClockFreq(&stcClkFreq);
-    unit_num = hc32_timer_get_unit_number(TMRAx);
-    if (unit_num >= 4)
-    {
-        clk_freq = stcClkFreq.u32Pclk1Freq;
-    }
-    else
-    {
-        clk_freq = stcClkFreq.u32Pclk0Freq;
-    }
-    divisor   = clk_freq / freq;
-    remainder = clk_freq % freq;
-    for (div_val = 1; div_val <= 1024; div_val <<= 1)
-    {
-        if (((divisor % 2) == 0) && (remainder == 0))
-        {
-            remainder = divisor % 2;
-            divisor   = divisor / 2;
-        }
-        else
-        {
-            break;
-        }
-    }
-    *extend_div = divisor;
-    *div        = (__CLZ(__RBIT(div_val))) << TMRA_BCSTR_CKDIV_POS;
-}
-
-static void hc32_timer_interrupt_config(struct rt_hwtimer_device *timer, en_functional_state_t enNewState)
-{
-    struct hc32_hwtimer_config *timer_config = RT_NULL;
-
-    timer_config = (struct hc32_hwtimer_config *)timer;
-    if (INT_SRC_MAX == timer_config->irq_config.int_src)
-    {
-        LOG_D("%s interrupt init failed", timer_config->name);
-        return;
-    }
-
-    if (ENABLE == enNewState)
-    {
-        /* Enable the specified interrupts of Timer */
-        hc32_install_irq_handler(&timer_config->irq_config, timer_config->irq_callback, RT_FALSE);
-        NVIC_EnableIRQ(timer_config->irq_config.irq_num);
-        TMRA_IntCmd(timer_config->timer_periph, TMRA_INT_OVF, ENABLE);
-    }
-    else
-    {
-        /* Disable the specified interrupts of Timer */
-        TMRA_IntCmd(timer_config->timer_periph, TMRA_INT_OVF, DISABLE);
-        NVIC_DisableIRQ(timer_config->irq_config.irq_num);
-    }
-}
-
-static void hc32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
-{
-    stc_tmra_init_t stcTmraInit;
-    struct hc32_hwtimer_config *timer_config = RT_NULL;
-
-    RT_ASSERT(timer != RT_NULL);
-    timer_config = (struct hc32_hwtimer_config *)timer;
-    if (state)
-    {
-        /* Enable Timer peripheral clock. */
-        hc32_timer_clock_config(timer_config->timer_periph, ENABLE);
-        TMRA_DeInit(timer_config->timer_periph);
-        TMRA_StructInit(&stcTmraInit);
-        stcTmraInit.sw_count.u16CountDir = TMRA_DIR_UP;
-        TMRA_Init(timer_config->timer_periph, &stcTmraInit);
-        LOG_D("%s init success", timer_config->name);
-    }
-    else
-    {
-        TMRA_DeInit(timer_config->timer_periph);
-        hc32_timer_interrupt_config(timer, DISABLE);
-        /* Disable Timer peripheral clock. */
-        hc32_timer_clock_config(timer_config->timer_periph, DISABLE);
-    }
-}
-
-static rt_err_t hc32_timer_start(struct rt_hwtimer_device *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
-{
-    rt_err_t result = RT_EOK;
-    struct hc32_hwtimer_config *timer_config = RT_NULL;
-
-    RT_ASSERT(timer != RT_NULL);
-    timer_config = (struct hc32_hwtimer_config *)timer;
-    if (mode == HWTIMER_MODE_ONESHOT)
-    {
-        TMRA_CountReloadCmd(timer_config->timer_periph, DISABLE);
-    }
-    else
-    {
-        TMRA_CountReloadCmd(timer_config->timer_periph, ENABLE);
-    }
-    timer_config->extend_cnt = 0;
-    TMRA_SetCountValue(timer_config->timer_periph, 0);
-    TMRA_SetPeriodValue(timer_config->timer_periph, cnt - 1);
-    hc32_timer_interrupt_config(timer, ENABLE);
-    TMRA_Start(timer_config->timer_periph);
-
-    return result;
-}
-
-static void hc32_timer_stop(struct rt_hwtimer_device *timer)
-{
-    struct hc32_hwtimer_config *timer_config = RT_NULL;
-
-    RT_ASSERT(timer != RT_NULL);
-    timer_config = (struct hc32_hwtimer_config *)timer;
-    /* stop timer */
-    TMRA_Stop(timer_config->timer_periph);
-    hc32_timer_interrupt_config(timer, DISABLE);
-    TMRA_SetCountValue(timer_config->timer_periph, 0);
-}
-
-static rt_uint32_t hc32_timer_get_counter(struct rt_hwtimer_device *timer)
-{
-    rt_uint32_t count_val;
-    rt_uint32_t period_val;
-    float temp;
-    struct hc32_hwtimer_config *timer_config = RT_NULL;
-
-    RT_ASSERT(timer != RT_NULL);
-    timer_config = (struct hc32_hwtimer_config *)timer;
-    period_val = TMRA_GetPeriodValue(timer_config->timer_periph);
-    count_val  = TMRA_GetCountValue(timer_config->timer_periph);
-    temp = (timer_config->extend_cnt * period_val + count_val);
-    temp = temp / (timer_config->extend_div * period_val) * period_val;
-    count_val = (rt_uint32_t)temp;
-
-    return count_val;
-}
-
-static rt_err_t hc32_timer_ctrl(struct rt_hwtimer_device *timer, rt_uint32_t cmd, void *args)
-{
-    struct hc32_hwtimer_config *timer_config = RT_NULL;
-    rt_err_t result = RT_EOK;
-
-    RT_ASSERT(timer != RT_NULL);
-    RT_ASSERT(args != RT_NULL);
-    timer_config = (struct hc32_hwtimer_config *)timer;
-    switch (cmd)
-    {
-    case HWTIMER_CTRL_FREQ_SET:
-    {
-        rt_uint32_t freq;
-        rt_uint16_t div_val;
-        rt_uint32_t extend_div_val;
-
-        /* set timer frequency */
-        freq = *((rt_uint32_t *)args);
-        hc32_timer_get_div_value(timer_config->timer_periph, freq, &div_val, &extend_div_val);
-        TMRA_SetClockDiv(timer_config->timer_periph, div_val);
-        timer_config->extend_div = extend_div_val;
-    }
-    break;
-    default:
-    {
-        result = -RT_ENOSYS;
-    }
-    break;
-    }
-
-    return result;
-}
-
-static const struct rt_hwtimer_ops hwtimer_ops =
-{
-    .init      = hc32_timer_init,
-    .start     = hc32_timer_start,
-    .stop      = hc32_timer_stop,
-    .count_get = hc32_timer_get_counter,
-    .control   = hc32_timer_ctrl,
-};
-
-static const struct rt_hwtimer_info hwtimer_info =
-{
-    .maxfreq = 30000000,
-    .minfreq = 1000,
-    .maxcnt  = 0xFFFF,
-    .cntmode = HWTIMER_CNTMODE_UP,
-};
-
-static int rt_hwtimer_init(void)
-{
-    int i = 0;
-    int result = RT_EOK;
-
-    for (i = 0; i < sizeof(hwtimer_obj) / sizeof(hwtimer_obj[0]); i++)
-    {
-        hwtimer_obj[i].time_device.info = &hwtimer_info;
-        hwtimer_obj[i].time_device.ops  = &hwtimer_ops;
-        if (rt_device_hwtimer_register(&hwtimer_obj[i].time_device, hwtimer_obj[i].name, hwtimer_obj[i].timer_periph) == RT_EOK)
-        {
-            LOG_D("%s register success", hwtimer_obj[i].name);
-        }
-        else
-        {
-            LOG_E("%s register failed", hwtimer_obj[i].name);
-            result = -RT_ERROR;
-        }
-    }
-
-    return result;
-}
-INIT_BOARD_EXPORT(rt_hwtimer_init);
-
-#endif
-
-#endif /* RT_USING_HWTIMER */

bsp/hc32/libraries/hc32_drivers/drv_hwtimer.h

@@ -1,145 +0,0 @@
-/*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#ifndef __DRV_HWTIMER_H__
-#define __DRV_HWTIMER_H__
-
-#include <rtthread.h>
-#include "board_config.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef BSP_USING_TIMER1
-#ifndef TIMER1_IRQ_CONFIG
-#define TIMER1_IRQ_CONFIG                       \
-    {                                           \
-        .irq_num        = TIMER1_CNT_INT_IRQn,      \
-        .irq_prio   = TIMER1_CNT_INT_PRIO,      \
-    }
-#endif /* TIMER1_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER1 */
-
-#ifdef BSP_USING_TIMER2
-#ifndef TIMER2_IRQ_CONFIG
-#define TIMER2_IRQ_CONFIG                       \
-    {                                           \
-        .irq_num        = TIMER2_CNT_INT_IRQn,      \
-        .irq_prio   = TIMER2_CNT_INT_PRIO,      \
-    }
-#endif /* TIMER2_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER2 */
-
-#ifdef BSP_USING_TIMER3
-#ifndef TIMER3_IRQ_CONFIG
-#define TIMER3_IRQ_CONFIG                       \
-    {                                           \
-        .irq_num        = TIMER3_CNT_INT_IRQn,      \
-        .irq_prio   = TIMER3_CNT_INT_PRIO,      \
-    }
-#endif /* TIMER3_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER3 */
-
-#ifdef BSP_USING_TIMER4
-#ifndef TIMER4_IRQ_CONFIG
-#define TIMER4_IRQ_CONFIG                       \
-    {                                           \
-        .irq_num        = TIMER4_CNT_INT_IRQn,      \
-        .irq_prio   = TIMER4_CNT_INT_PRIO,      \
-    }
-#endif /* TIMER4_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER4 */
-
-#ifdef BSP_USING_TIMER5
-#ifndef TIMER5_IRQ_CONFIG
-#define TIMER5_IRQ_CONFIG                       \
-    {                                           \
-        .irq_num        = TIMER5_CNT_INT_IRQn,      \
-        .irq_prio   = TIMER5_CNT_INT_PRIO,      \
-    }
-#endif /* TIMER5_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER5 */
-
-#ifdef BSP_USING_TIMER6
-#ifndef TIMER6_IRQ_CONFIG
-#define TIMER6_IRQ_CONFIG                       \
-    {                                           \
-        .irq_num        = TIMER6_CNT_INT_IRQn,      \
-        .irq_prio   = TIMER6_CNT_INT_PRIO,      \
-    }
-#endif /* TIMER6_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER6 */
-
-#ifdef BSP_USING_TIMER7
-#ifndef TIMER7_IRQ_CONFIG
-#define TIMER7_IRQ_CONFIG                       \
-    {                                           \
-        .irq_num        = TIMER7_CNT_INT_IRQn,      \
-        .irq_prio   = TIMER7_CNT_INT_PRIO,      \
-    }
-#endif /* TIMER7_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER7 */
-
-#ifdef BSP_USING_TIMER8
-#ifndef TIMER8_IRQ_CONFIG
-#define TIMER8_IRQ_CONFIG                       \
-    {                                           \
-        .irq_num        = TIMER8_CNT_INT_IRQn,      \
-        .irq_prio   = TIMER8_CNT_INT_PRIO,      \
-    }
-#endif /* TIMER8_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER8 */
-
-#ifdef BSP_USING_TIMER9
-#ifndef TIMER9_IRQ_CONFIG
-#define TIMER9_IRQ_CONFIG                       \
-    {                                           \
-        .irq_num        = TIMER9_CNT_INT_IRQn,      \
-        .irq_prio   = TIMER9_CNT_INT_PRIO,      \
-    }
-#endif /* TIMER9_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER9 */
-
-#ifdef BSP_USING_TIMER10
-#ifndef TIMER10_IRQ_CONFIG
-#define TIMER10_IRQ_CONFIG                      \
-    {                                           \
-        .irq_num        = TIMER10_CNT_INT_IRQn,     \
-        .irq_prio   = TIMER10_CNT_INT_PRIO,     \
-    }
-#endif /* TIMER10_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER10 */
-
-#ifdef BSP_USING_TIMER11
-#ifndef TIMER11_IRQ_CONFIG
-#define TIMER11_IRQ_CONFIG                      \
-    {                                           \
-        .irq_num        = TIMER11_CNT_INT_IRQn,     \
-        .irq_prio   = TIMER11_CNT_INT_PRIO,     \
-    }
-#endif /* TIMER11_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER11 */
-
-#ifdef BSP_USING_TIMER12
-#ifndef TIMER12_IRQ_CONFIG
-#define TIMER12_IRQ_CONFIG                      \
-    {                                           \
-        .irq_num        = TIMER12_CNT_INT_IRQn,     \
-        .irq_prio   = TIMER12_CNT_INT_PRIO,     \
-    }
-#endif /* TIMER12_IRQ_CONFIG */
-#endif /* BSP_USING_TIMER12 */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __DRV_HWTIMER_H__ */

bsp/hc32/libraries/hc32_drivers/drv_irq.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_irq.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_log.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_pulse_encoder.c

@@ -1,472 +0,0 @@
-/*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#include <rtdevice.h>
-#include <rtdbg.h>
-
-#ifdef RT_USING_PULSE_ENCODER
-
-#if defined(BSP_USING_PULSE_ENCODER1)  || defined(BSP_USING_PULSE_ENCODER2)  || defined(BSP_USING_PULSE_ENCODER3) || \
-    defined(BSP_USING_PULSE_ENCODER4)  || defined(BSP_USING_PULSE_ENCODER5)  || defined(BSP_USING_PULSE_ENCODER6) || \
-    defined(BSP_USING_PULSE_ENCODER7)  || defined(BSP_USING_PULSE_ENCODER8)  || defined(BSP_USING_PULSE_ENCODER9) || \
-    defined(BSP_USING_PULSE_ENCODER10) || defined(BSP_USING_PULSE_ENCODER11) || defined(BSP_USING_PULSE_ENCODER12)
-
-#include "drv_pulse_encoder.h"
-#include "drv_irq.h"
-
-#define TIMER_AUTO_RELOAD_VALUE         (0xFFFFU)
-
-enum
-{
-#ifdef BSP_USING_PULSE_ENCODER1
-    PULSE_ENCODER1_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER2
-    PULSE_ENCODER2_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER3
-    PULSE_ENCODER3_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER4
-    PULSE_ENCODER4_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER5
-    PULSE_ENCODER5_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER6
-    PULSE_ENCODER6_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER7
-    PULSE_ENCODER7_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER8
-    PULSE_ENCODER8_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER9
-    PULSE_ENCODER9_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER10
-    PULSE_ENCODER10_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER11
-    PULSE_ENCODER11_INDEX,
-#endif
-#ifdef BSP_USING_PULSE_ENCODER12
-    PULSE_ENCODER12_INDEX,
-#endif
-};
-
-#ifdef BSP_USING_PULSE_ENCODER1
-    static void pulse_encoder1_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER2
-    static void pulse_encoder2_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER3
-    static void pulse_encoder3_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER4
-    static void pulse_encoder4_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER5
-    static void pulse_encoder5_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER6
-    static void pulse_encoder6_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER7
-    static void pulse_encoder7_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER8
-    static void pulse_encoder8_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER9
-    static void pulse_encoder9_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER10
-    static void pulse_encoder10_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER11
-    static void pulse_encoder11_irq_handler(void);
-#endif
-#ifdef BSP_USING_PULSE_ENCODER12
-    static void pulse_encoder12_irq_handler(void);
-#endif
-
-struct hc32_pulse_encoder_config
-{
-    struct rt_pulse_encoder_device pulse_encoder;
-    CM_TMRA_TypeDef        *timer_periph;
-    struct hc32_irq_config ovf_irq_config;
-    struct hc32_irq_config udf_irq_config;
-    func_ptr_t             irq_callback;
-    rt_int32_t             ovf_udf_count;
-    char                   *name;
-};
-
-#ifndef HC32_PULSE_ENCODER_CONFIG
-#define HC32_PULSE_ENCODER_CONFIG(periph, irq, label, ovf_src, udf_src,        \
-                                  ovf_irq_info, udf_irq_info)                  \
-    {                                                                          \
-        .timer_periph           = periph,                                      \
-        .irq_callback           = irq,                                         \
-        .name                   = label,                                       \
-        .ovf_irq_config         = ovf_irq_info,                                \
-        .udf_irq_config         = udf_irq_info,                                \
-        .ovf_irq_config.int_src = ovf_src,                                     \
-        .udf_irq_config.int_src = udf_src,                                     \
-    }
-#endif /* HC32_PULSE_ENCODER_CONFIG */
-
-static struct hc32_pulse_encoder_config pulse_encoder_obj[] =
-{
-#ifdef BSP_USING_PULSE_ENCODER1
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_1,  pulse_encoder1_irq_handler,  "pulse1",  INT_SRC_TMRA_1_OVF,  INT_SRC_TMRA_1_UDF,
-                              PULSE_ENCODER1_OVF_IRQ_CONFIG,  PULSE_ENCODER1_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER2
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_2,  pulse_encoder2_irq_handler,  "pulse2",  INT_SRC_TMRA_2_OVF,  INT_SRC_TMRA_2_UDF,
-                              PULSE_ENCODER2_OVF_IRQ_CONFIG,  PULSE_ENCODER2_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER3
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_3,  pulse_encoder3_irq_handler,  "pulse3",  INT_SRC_TMRA_3_OVF,  INT_SRC_TMRA_3_UDF,
-                              PULSE_ENCODER3_OVF_IRQ_CONFIG,  PULSE_ENCODER3_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER4
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_4,  pulse_encoder4_irq_handler,  "pulse4",  INT_SRC_TMRA_4_OVF,  INT_SRC_TMRA_4_UDF,
-                              PULSE_ENCODER4_OVF_IRQ_CONFIG,  PULSE_ENCODER4_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER5
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_5,  pulse_encoder5_irq_handler,  "pulse5",  INT_SRC_TMRA_5_OVF,  INT_SRC_TMRA_5_UDF,
-                              PULSE_ENCODER5_OVF_IRQ_CONFIG,  PULSE_ENCODER5_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER6
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_6,  pulse_encoder6_irq_handler,  "pulse6",  INT_SRC_TMRA_6_OVF,  INT_SRC_TMRA_6_UDF,
-                              PULSE_ENCODER6_OVF_IRQ_CONFIG,  PULSE_ENCODER6_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER7
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_7,  pulse_encoder7_irq_handler,  "pulse7",  INT_SRC_TMRA_7_OVF,  INT_SRC_TMRA_7_UDF,
-                              PULSE_ENCODER7_OVF_IRQ_CONFIG,  PULSE_ENCODER7_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER8
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_8,  pulse_encoder8_irq_handler,  "pulse8",  INT_SRC_TMRA_8_OVF,  INT_SRC_TMRA_8_UDF,
-                              PULSE_ENCODER8_OVF_IRQ_CONFIG,  PULSE_ENCODER8_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER9
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_9,  pulse_encoder9_irq_handler,  "pulse9",  INT_SRC_TMRA_9_OVF,  INT_SRC_TMRA_9_UDF,
-                              PULSE_ENCODER9_OVF_IRQ_CONFIG,  PULSE_ENCODER9_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER10
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_10, pulse_encoder10_irq_handler, "pulse10", INT_SRC_TMRA_10_OVF, INT_SRC_TMRA_10_UDF,
-                              PULSE_ENCODER10_OVF_IRQ_CONFIG,  PULSE_ENCODER10_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER11
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_11, pulse_encoder11_irq_handler, "pulse11", INT_SRC_TMRA_11_OVF, INT_SRC_TMRA_11_UDF,
-                              PULSE_ENCODER11_OVF_IRQ_CONFIG,  PULSE_ENCODER11_UDF_IRQ_CONFIG),
-#endif
-#ifdef BSP_USING_PULSE_ENCODER12
-    HC32_PULSE_ENCODER_CONFIG(CM_TMRA_12, pulse_encoder12_irq_handler, "pulse12", INT_SRC_TMRA_12_OVF, INT_SRC_TMRA_12_UDF,
-                              PULSE_ENCODER12_OVF_IRQ_CONFIG,  PULSE_ENCODER12_UDF_IRQ_CONFIG),
-#endif
-};
-
-static void hc32_pulse_encoder_irq_handler(struct hc32_pulse_encoder_config *pulse_encoder_config)
-{
-    if (SET == TMRA_GetStatus(pulse_encoder_config->timer_periph, TMRA_FLAG_OVF))
-    {
-        pulse_encoder_config->ovf_udf_count++;
-        TMRA_ClearStatus(pulse_encoder_config->timer_periph, TMRA_FLAG_OVF);
-    }
-    if (SET == TMRA_GetStatus(pulse_encoder_config->timer_periph, TMRA_FLAG_UDF))
-    {
-        pulse_encoder_config->ovf_udf_count--;
-        TMRA_ClearStatus(pulse_encoder_config->timer_periph, TMRA_FLAG_UDF);
-    }
-}
-
-#ifdef BSP_USING_PULSE_ENCODER1
-static void pulse_encoder1_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER1_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER2
-static void pulse_encoder2_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER2_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER3
-static void pulse_encoder3_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER3_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER4
-static void pulse_encoder4_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER4_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER5
-static void pulse_encoder5_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER5_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER6
-static void pulse_encoder6_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER6_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER7
-static void pulse_encoder7_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER7_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER8
-static void pulse_encoder8_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER8_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER9
-static void pulse_encoder9_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER9_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER10
-static void pulse_encoder10_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER10_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER11
-static void pulse_encoder11_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER11_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER12
-static void pulse_encoder12_irq_handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-    hc32_pulse_encoder_irq_handler(&pulse_encoder_obj[PULSE_ENCODER12_INDEX]);
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-static rt_uint16_t hc32_timer_get_unit_number(CM_TMRA_TypeDef *TMRAx)
-{
-    rt_uint16_t unit_num;
-    const rt_uint32_t unit_step = 0x400U;
-
-    if (((rt_uint32_t)TMRAx) >= ((rt_uint32_t)CM_TMRA_1))
-    {
-        unit_num = (((rt_uint32_t)TMRAx) - ((rt_uint32_t)CM_TMRA_1)) / unit_step;
-    }
-    else
-    {
-        unit_num = (((rt_uint32_t)TMRAx) - ((rt_uint32_t)CM_TMRA_5)) / unit_step + 4;
-    }
-
-    return unit_num;
-}
-
-static void hc32_timer_clock_config(CM_TMRA_TypeDef *TMRAx, en_functional_state_t enNewState)
-{
-    rt_uint32_t timer_periph;
-    rt_uint16_t unit_num;
-
-    unit_num     = hc32_timer_get_unit_number(TMRAx);
-    timer_periph = PWC_FCG2_TMRA_1 << unit_num;
-    FCG_Fcg2PeriphClockCmd(timer_periph, enNewState);
-}
-
-extern rt_err_t rt_hw_board_pulse_encoder_init(CM_TMRA_TypeDef *TMRAx);
-
-rt_err_t hc32_pulse_encoder_init(struct rt_pulse_encoder_device *pulse_encoder)
-{
-    struct hc32_pulse_encoder_config *pulse_encoder_device;
-    stc_tmra_init_t stcTmraInit;
-    rt_err_t result;
-
-    RT_ASSERT(pulse_encoder != RT_NULL);
-    pulse_encoder_device = (struct hc32_pulse_encoder_config *)pulse_encoder;
-    /* Enable Timer peripheral clock. */
-    hc32_timer_clock_config(pulse_encoder_device->timer_periph, ENABLE);
-    /* pwm pin configuration */
-    result = rt_hw_board_pulse_encoder_init(pulse_encoder_device->timer_periph);
-    if (RT_EOK == result)
-    {
-        TMRA_DeInit(pulse_encoder_device->timer_periph);
-        TMRA_StructInit(&stcTmraInit);
-        stcTmraInit.u32PeriodValue = TIMER_AUTO_RELOAD_VALUE;
-        stcTmraInit.u8CountSrc = TMRA_CNT_SRC_HW;
-        stcTmraInit.hw_count.u16CountUpCond = TMRA_CNT_UP_COND_CLKB_HIGH_CLKA_RISING;
-        stcTmraInit.hw_count.u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_LOW_CLKA_RISING;
-        TMRA_Init(pulse_encoder_device->timer_periph, &stcTmraInit);
-        LOG_D("%s init success", pulse_encoder_device->name);
-
-        hc32_install_irq_handler(&pulse_encoder_device->ovf_irq_config, pulse_encoder_device->irq_callback, RT_FALSE);
-        NVIC_EnableIRQ(pulse_encoder_device->ovf_irq_config.irq);
-        hc32_install_irq_handler(&pulse_encoder_device->udf_irq_config, pulse_encoder_device->irq_callback, RT_FALSE);
-        NVIC_EnableIRQ(pulse_encoder_device->udf_irq_config.irq);
-        /* clear update flag */
-        TMRA_ClearStatus(pulse_encoder_device->timer_periph, (TMRA_FLAG_OVF | TMRA_FLAG_UDF));
-    }
-
-    return result;
-}
-
-rt_err_t hc32_pulse_encoder_clear_count(struct rt_pulse_encoder_device *pulse_encoder)
-{
-    struct hc32_pulse_encoder_config *pulse_encoder_device;
-
-    pulse_encoder_device = (struct hc32_pulse_encoder_config *)pulse_encoder;
-    pulse_encoder_device->ovf_udf_count = 0;
-    TMRA_Stop(pulse_encoder_device->timer_periph);
-    TMRA_SetCountValue(pulse_encoder_device->timer_periph, 0);
-    TMRA_ClearStatus(pulse_encoder_device->timer_periph, (TMRA_FLAG_OVF | TMRA_FLAG_UDF));
-    TMRA_Start(pulse_encoder_device->timer_periph);
-
-    return RT_EOK;
-}
-
-rt_int32_t hc32_pulse_encoder_get_count(struct rt_pulse_encoder_device *pulse_encoder)
-{
-    struct hc32_pulse_encoder_config *pulse_encoder_device;
-    rt_int32_t period_val;
-    rt_int32_t count_val;
-
-    pulse_encoder_device = (struct hc32_pulse_encoder_config *)pulse_encoder;
-    period_val = TMRA_GetCountValue(pulse_encoder_device->timer_periph);
-    count_val = period_val + pulse_encoder_device->ovf_udf_count * TIMER_AUTO_RELOAD_VALUE;
-
-    return count_val;
-}
-
-rt_err_t hc32_pulse_encoder_control(struct rt_pulse_encoder_device *pulse_encoder, rt_uint32_t cmd, void *args)
-{
-    rt_err_t result = RT_EOK;
-    struct hc32_pulse_encoder_config *pulse_encoder_device;
-    pulse_encoder_device = (struct hc32_pulse_encoder_config *)pulse_encoder;
-
-    switch (cmd)
-    {
-    case PULSE_ENCODER_CMD_ENABLE:
-        TMRA_IntCmd(pulse_encoder_device->timer_periph, (TMRA_INT_OVF | TMRA_INT_UDF), ENABLE);
-        TMRA_Start(pulse_encoder_device->timer_periph);
-        break;
-    case PULSE_ENCODER_CMD_DISABLE:
-        TMRA_Stop(pulse_encoder_device->timer_periph);
-        TMRA_IntCmd(pulse_encoder_device->timer_periph, (TMRA_INT_OVF | TMRA_INT_UDF), DISABLE);
-        break;
-    default:
-        result = -RT_ENOSYS;
-        break;
-    }
-
-    return result;
-}
-
-static const struct rt_pulse_encoder_ops pulse_encoder_ops =
-{
-    .init        = hc32_pulse_encoder_init,
-    .get_count   = hc32_pulse_encoder_get_count,
-    .clear_count = hc32_pulse_encoder_clear_count,
-    .control     = hc32_pulse_encoder_control,
-};
-
-int hw_pulse_encoder_init(void)
-{
-    int i;
-    int result;
-
-    result = RT_EOK;
-    for (i = 0; i < sizeof(pulse_encoder_obj) / sizeof(pulse_encoder_obj[0]); i++)
-    {
-        pulse_encoder_obj[i].pulse_encoder.type = AB_PHASE_PULSE_ENCODER;
-        pulse_encoder_obj[i].pulse_encoder.ops  = &pulse_encoder_ops;
-
-        if (rt_device_pulse_encoder_register(&pulse_encoder_obj[i].pulse_encoder, pulse_encoder_obj[i].name, pulse_encoder_obj[i].timer_periph) != RT_EOK)
-        {
-            LOG_E("%s register failed", pulse_encoder_obj[i].name);
-            result = -RT_ERROR;
-        }
-    }
-
-    return result;
-}
-INIT_BOARD_EXPORT(hw_pulse_encoder_init);
-
-#endif
-
-#endif

bsp/hc32/libraries/hc32_drivers/drv_pulse_encoder.h

@@ -1,241 +0,0 @@
-/*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#ifndef __DRV_PULSE_ENCODER_H__
-#define __DRV_PULSE_ENCODER_H__
-
-#include <rtthread.h>
-#include "board_config.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef BSP_USING_PULSE_ENCODER1
-#ifndef PULSE_ENCODER1_OVF_IRQ_CONFIG
-#define PULSE_ENCODER1_OVF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER1_OVF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER1_OVF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER1_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER1_UDF_IRQ_CONFIG
-#define PULSE_ENCODER1_UDF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER1_UNF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER1_UNF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER1_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER1 */
-
-#ifdef BSP_USING_PULSE_ENCODER2
-#ifndef PULSE_ENCODER2_OVF_IRQ_CONFIG
-#define PULSE_ENCODER2_OVF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER2_OVF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER2_OVF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER2_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER2_UDF_IRQ_CONFIG
-#define PULSE_ENCODER2_UDF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER2_UNF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER2_UNF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER2_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER2 */
-
-#ifdef BSP_USING_PULSE_ENCODER3
-#ifndef PULSE_ENCODER3_OVF_IRQ_CONFIG
-#define PULSE_ENCODER3_OVF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER3_OVF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER3_OVF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER3_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER3_UDF_IRQ_CONFIG
-#define PULSE_ENCODER3_UDF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER3_UNF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER3_UNF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER3_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER3 */
-
-#ifdef BSP_USING_PULSE_ENCODER4
-#ifndef PULSE_ENCODER4_OVF_IRQ_CONFIG
-#define PULSE_ENCODER4_OVF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER4_OVF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER4_OVF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER4_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER4_UDF_IRQ_CONFIG
-#define PULSE_ENCODER4_UDF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER4_UNF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER4_UNF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER4_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER4 */
-
-#ifdef BSP_USING_PULSE_ENCODER5
-#ifndef PULSE_ENCODER5_OVF_IRQ_CONFIG
-#define PULSE_ENCODER5_OVF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER5_OVF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER5_OVF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER5_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER5_UDF_IRQ_CONFIG
-#define PULSE_ENCODER5_UDF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER5_UNF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER5_UNF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER5_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER5 */
-
-#ifdef BSP_USING_PULSE_ENCODER6
-#ifndef PULSE_ENCODER6_OVF_IRQ_CONFIG
-#define PULSE_ENCODER6_OVF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER6_OVF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER6_OVF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER6_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER6_UDF_IRQ_CONFIG
-#define PULSE_ENCODER6_UDF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER6_UNF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER6_UNF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER6_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER6 */
-
-#ifdef BSP_USING_PULSE_ENCODER7
-#ifndef PULSE_ENCODER7_OVF_IRQ_CONFIG
-#define PULSE_ENCODER7_OVF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER7_OVF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER7_OVF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER7_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER7_UDF_IRQ_CONFIG
-#define PULSE_ENCODER7_UDF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER7_UNF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER7_UNF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER7_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER7 */
-
-#ifdef BSP_USING_PULSE_ENCODER8
-#ifndef PULSE_ENCODER8_OVF_IRQ_CONFIG
-#define PULSE_ENCODER8_OVF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER8_OVF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER8_OVF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER8_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER8_UDF_IRQ_CONFIG
-#define PULSE_ENCODER8_UDF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER8_UNF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER8_UNF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER8_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER8 */
-
-#ifdef BSP_USING_PULSE_ENCODER9
-#ifndef PULSE_ENCODER9_OVF_IRQ_CONFIG
-#define PULSE_ENCODER9_OVF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER9_OVF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER9_OVF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER9_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER9_UDF_IRQ_CONFIG
-#define PULSE_ENCODER9_UDF_IRQ_CONFIG                                          \
-    {                                                                          \
-        .irq        = PULSE_ENCODER9_UNF_INT_IRQn,                             \
-        .irq_prio   = PULSE_ENCODER9_UNF_INT_PRIO,                             \
-    }
-#endif /* PULSE_ENCODER9_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER9 */
-
-#ifdef BSP_USING_PULSE_ENCODER10
-#ifndef PULSE_ENCODER10_OVF_IRQ_CONFIG
-#define PULSE_ENCODER10_OVF_IRQ_CONFIG                                         \
-    {                                                                          \
-        .irq        = PULSE_ENCODER10_OVF_INT_IRQn,                            \
-        .irq_prio   = PULSE_ENCODER10_OVF_INT_PRIO,                            \
-    }
-#endif /* PULSE_ENCODER10_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER10_UDF_IRQ_CONFIG
-#define PULSE_ENCODER10_UDF_IRQ_CONFIG                                         \
-    {                                                                          \
-        .irq        = PULSE_ENCODER10_UNF_INT_IRQn,                            \
-        .irq_prio   = PULSE_ENCODER10_UNF_INT_PRIO,                            \
-    }
-#endif /* PULSE_ENCODER10_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER10 */
-
-#ifdef BSP_USING_PULSE_ENCODER11
-#ifndef PULSE_ENCODER11_OVF_IRQ_CONFIG
-#define PULSE_ENCODER11_OVF_IRQ_CONFIG                                         \
-    {                                                                          \
-        .irq        = PULSE_ENCODER11_OVF_INT_IRQn,                            \
-        .irq_prio   = PULSE_ENCODER11_OVF_INT_PRIO,                            \
-    }
-#endif /* PULSE_ENCODER11_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER11_UDF_IRQ_CONFIG
-#define PULSE_ENCODER11_UDF_IRQ_CONFIG                                         \
-    {                                                                          \
-        .irq        = PULSE_ENCODER11_UNF_INT_IRQn,                            \
-        .irq_prio   = PULSE_ENCODER11_UNF_INT_PRIO,                            \
-    }
-#endif /* PULSE_ENCODER11_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER11 */
-
-#ifdef BSP_USING_PULSE_ENCODER12
-#ifndef PULSE_ENCODER12_OVF_IRQ_CONFIG
-#define PULSE_ENCODER12_OVF_IRQ_CONFIG                                         \
-    {                                                                          \
-        .irq        = PULSE_ENCODER12_OVF_INT_IRQn,                            \
-        .irq_prio   = PULSE_ENCODER12_OVF_INT_PRIO,                            \
-    }
-#endif /* PULSE_ENCODER12_OVF_IRQ_CONFIG */
-
-#ifndef PULSE_ENCODER12_UDF_IRQ_CONFIG
-#define PULSE_ENCODER12_UDF_IRQ_CONFIG                                         \
-    {                                                                          \
-        .irq        = PULSE_ENCODER12_UNF_INT_IRQn,                            \
-        .irq_prio   = PULSE_ENCODER12_UNF_INT_PRIO,                            \
-    }
-#endif /* PULSE_ENCODER12_UDF_IRQ_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER12 */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __DRV_PULSE_ENCODER_H__ */

bsp/hc32/libraries/hc32_drivers/drv_pwm.c

@@ -1,525 +0,0 @@
-/*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#include <board.h>
-#include <rtdbg.h>
-
-#if defined(RT_USING_PWM)
-
-#if defined(BSP_USING_PWM1)  || defined(BSP_USING_PWM2)  || defined(BSP_USING_PWM3) || \
-    defined(BSP_USING_PWM4)  || defined(BSP_USING_PWM5)  || defined(BSP_USING_PWM6) || \
-    defined(BSP_USING_PWM7)  || defined(BSP_USING_PWM8)  || defined(BSP_USING_PWM9) || \
-    defined(BSP_USING_PWM10) || defined(BSP_USING_PWM11) || defined(BSP_USING_PWM12)
-#define PWM_MAX_PERIOD                  (65535U)
-#define PWM_MIN_PERIOD                  (1U)
-#define PWM_MIN_PULSE                   (1U)
-
-#define PWM_MAX_CHANNEL                 (TMRA_CH4)
-
-enum
-{
-#ifdef BSP_USING_PWM1
-    PWM1_INDEX,
-#endif
-#ifdef BSP_USING_PWM2
-    PWM2_INDEX,
-#endif
-#ifdef BSP_USING_PWM3
-    PWM3_INDEX,
-#endif
-#ifdef BSP_USING_PWM4
-    PWCM_INDEX,
-#endif
-#ifdef BSP_USING_PWM5
-    PWM5_INDEX,
-#endif
-#ifdef BSP_USING_PWM6
-    PWM6_INDEX,
-#endif
-#ifdef BSP_USING_PWM7
-    PWM7_INDEX,
-#endif
-#ifdef BSP_USING_PWM8
-    PWM8_INDEX,
-#endif
-#ifdef BSP_USING_PWM9
-    PWM9_INDEX,
-#endif
-#ifdef BSP_USING_PWM10
-    PWM10_INDEX,
-#endif
-#ifdef BSP_USING_PWM11
-    PWM11_INDEX,
-#endif
-#ifdef BSP_USING_PWM12
-    PWM12_INDEX,
-#endif
-};
-
-struct hc32_pwm_config
-{
-    struct rt_device_pwm pwm_device;
-    CM_TMRA_TypeDef      *timer_periph;
-    rt_uint8_t           channel;
-    char                 *name;
-};
-
-#ifndef HC32_PWM_CONFIG
-#define HC32_PWM_CONFIG(periph, ch, label)      \
-    {                                           \
-        .timer_periph   = periph,               \
-        .channel        = ch,                   \
-        .name           = label                 \
-    }
-#endif /* HC32_PWM_CONFIG */
-
-static struct hc32_pwm_config pwm_obj[] =
-{
-#ifdef BSP_USING_PWM1
-    HC32_PWM_CONFIG(CM_TMRA_1, 0, "pwm1"),
-#endif
-#ifdef BSP_USING_PWM2
-    HC32_PWM_CONFIG(CM_TMRA_2, 0, "pwm2"),
-#endif
-#ifdef BSP_USING_PWM3
-    HC32_PWM_CONFIG(CM_TMRA_3, 0, "pwm3"),
-#endif
-#ifdef BSP_USING_PWM4
-    HC32_PWM_CONFIG(CM_TMRA_4, 0, "pwm4"),
-#endif
-#ifdef BSP_USING_PWM5
-    HC32_PWM_CONFIG(CM_TMRA_5, 0, "pwm5"),
-#endif
-#ifdef BSP_USING_PWM6
-    HC32_PWM_CONFIG(CM_TMRA_6, 0, "pwm6"),
-#endif
-#ifdef BSP_USING_PWM7
-    HC32_PWM_CONFIG(CM_TMRA_7, 0, "pwm7"),
-#endif
-#ifdef BSP_USING_PWM8
-    HC32_PWM_CONFIG(CM_TMRA_8, 0, "pwm8"),
-#endif
-#ifdef BSP_USING_PWM9
-    HC32_PWM_CONFIG(CM_TMRA_9, 0, "pwm9"),
-#endif
-#ifdef BSP_USING_PWM10
-    HC32_PWM_CONFIG(CM_TMRA_10, 0, "pwm10"),
-#endif
-#ifdef BSP_USING_PWM11
-    HC32_PWM_CONFIG(CM_TMRA_11, 0, "pwm11"),
-#endif
-#ifdef BSP_USING_PWM12
-    HC32_PWM_CONFIG(CM_TMRA_12, 0, "pwm12"),
-#endif
-};
-
-static rt_uint16_t hc32_pwm_get_unit_number(CM_TMRA_TypeDef *TMRAx)
-{
-    rt_uint16_t unit_num;
-    const rt_uint32_t unit_step = 0x400U;
-
-    if (((rt_uint32_t)TMRAx) >= ((rt_uint32_t)CM_TMRA_1))
-    {
-        unit_num = (((rt_uint32_t)TMRAx) - ((rt_uint32_t)CM_TMRA_1)) / unit_step;
-    }
-    else
-    {
-        unit_num = (((rt_uint32_t)TMRAx) - ((rt_uint32_t)CM_TMRA_5)) / unit_step + 4;
-    }
-
-    return unit_num;
-}
-
-static void hc32_pwm_clock_config(CM_TMRA_TypeDef *TMRAx, en_functional_state_t enNewState)
-{
-    rt_uint32_t timer_periph;
-    rt_uint16_t unit_num;
-
-    unit_num     = hc32_pwm_get_unit_number(TMRAx);
-    timer_periph = PWC_FCG2_TMRA_1 << unit_num;
-    FCG_Fcg2PeriphClockCmd(timer_periph, enNewState);
-}
-
-static rt_err_t hc32_pwm_enable(CM_TMRA_TypeDef *TMRAx, struct rt_pwm_configuration *configuration, rt_bool_t enable)
-{
-    if (configuration->channel > PWM_MAX_CHANNEL)
-    {
-        return RT_EINVAL;
-    }
-
-    if (!enable)
-    {
-        TMRA_PWM_OutputCmd(TMRAx, configuration->channel, DISABLE);
-    }
-    else
-    {
-        TMRA_PWM_OutputCmd(TMRAx, configuration->channel, ENABLE);
-    }
-
-    return RT_EOK;
-}
-
-static rt_err_t hc32_pwm_get(CM_TMRA_TypeDef *TMRAx, struct rt_pwm_configuration *configuration)
-{
-    stc_clock_freq_t stcClkFreq;
-    rt_uint32_t clk_freq;
-    rt_uint16_t unit_num;
-    rt_uint16_t div_val;
-
-    CLK_GetClockFreq(&stcClkFreq);
-    unit_num = hc32_pwm_get_unit_number(TMRAx);
-    if (unit_num >= 4)
-    {
-        clk_freq = stcClkFreq.u32Pclk1Freq;
-    }
-    else
-    {
-        clk_freq = stcClkFreq.u32Pclk0Freq;
-    }
-
-    /* Convert nanosecond to frequency and duty cycle */
-    div_val = 0x01 << (READ_REG32_BIT(TMRAx->BCSTR, TMRA_BCSTR_CKDIV) >> TMRA_BCSTR_CKDIV_POS);
-    clk_freq /= 1000000UL;
-    configuration->period = (TMRA_GetPeriodValue(TMRAx) + 1) * div_val * 1000UL / clk_freq;
-    configuration->pulse = (TMRA_GetCompareValue(TMRAx, configuration->channel) + 1) * div_val * 1000UL / clk_freq;
-
-    return RT_EOK;
-}
-
-static rt_err_t hc32_pwm_set(CM_TMRA_TypeDef *TMRAx, struct rt_pwm_configuration *configuration)
-{
-    rt_uint32_t period, pulse;
-    rt_uint64_t clk_div;
-    stc_clock_freq_t stcClkFreq;
-    rt_uint32_t clk_freq;
-    rt_uint16_t unit_num;
-    rt_uint16_t div_val;
-
-    CLK_GetClockFreq(&stcClkFreq);
-    unit_num = hc32_pwm_get_unit_number(TMRAx);
-    if (unit_num >= 4)
-    {
-        clk_freq = stcClkFreq.u32Pclk1Freq;
-    }
-    else
-    {
-        clk_freq = stcClkFreq.u32Pclk0Freq;
-    }
-    /* Convert nanosecond to frequency and duty cycle */
-    clk_freq /= 1000000UL;
-    period = (unsigned long long)configuration->period * clk_freq / 1000UL;
-    clk_div = period / PWM_MAX_PERIOD + 1;
-
-    if (clk_div > 1024)
-    {
-        return RT_EINVAL;
-    }
-    else if (clk_div != 1)
-    {
-        for (div_val = 512; div_val > 1; div_val >>= 1)
-        {
-            if (clk_div > div_val)
-            {
-                clk_div = div_val << 1;
-                break;
-            }
-        }
-    }
-    period = period / clk_div;
-    TMRA_SetClockDiv(TMRAx, ((__CLZ(__RBIT(clk_div))) << TMRA_BCSTR_CKDIV_POS));
-
-    if (period < PWM_MIN_PERIOD)
-    {
-        period = PWM_MIN_PERIOD;
-    }
-    TMRA_SetPeriodValue(TMRAx, period - 1);
-
-    pulse = (unsigned long long)configuration->pulse * clk_freq / clk_div / 1000UL;
-    if (pulse < PWM_MIN_PULSE)
-    {
-        pulse = PWM_MIN_PULSE;
-    }
-    else if (pulse > period)
-    {
-        pulse = period;
-    }
-    TMRA_SetCompareValue(TMRAx, configuration->channel, pulse - 1);
-    TMRA_SetCountValue(TMRAx, 0);
-
-    return RT_EOK;
-}
-
-static rt_err_t hc32_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
-{
-    struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
-    CM_TMRA_TypeDef *timer_periph = (CM_TMRA_TypeDef *)device->parent.user_data;
-
-    switch (cmd)
-    {
-    case PWM_CMD_ENABLE:
-        return hc32_pwm_enable(timer_periph, configuration, RT_TRUE);
-    case PWM_CMD_DISABLE:
-        return hc32_pwm_enable(timer_periph, configuration, RT_FALSE);
-    case PWM_CMD_SET:
-        return hc32_pwm_set(timer_periph, configuration);
-    case PWM_CMD_GET:
-        return hc32_pwm_get(timer_periph, configuration);
-    default:
-        return RT_EINVAL;
-    }
-}
-
-extern rt_err_t rt_hw_board_pwm_init(CM_TMRA_TypeDef *TMRAx);
-
-static rt_err_t hc32_pwm_init(struct hc32_pwm_config *device)
-{
-    rt_err_t result = RT_EOK;
-    stc_tmra_init_t stcTmraInit;
-    stc_tmra_pwm_init_t stcPwmCfg;
-
-    RT_ASSERT(device != RT_NULL);
-
-    /* ENABLE Timer peripheral clock. */
-    hc32_pwm_clock_config(device->timer_periph, ENABLE);
-    /* pwm pin configuration */
-    result = rt_hw_board_pwm_init(device->timer_periph);
-    if (RT_EOK == result)
-    {
-        TMRA_DeInit(device->timer_periph);
-        TMRA_StructInit(&stcTmraInit);
-        stcTmraInit.sw_count.u16ClockDiv   = TMRA_CLK_DIV1;
-        stcTmraInit.u16CountReload  = TMRA_CNT_RELOAD_ENABLE;
-        stcTmraInit.u32PeriodValue = 0xFFFF;
-        TMRA_Init(device->timer_periph, &stcTmraInit);
-
-        /* Set the comparison reference value */
-        TMRA_PWM_StructInit(&stcPwmCfg);
-        stcPwmCfg.u16StartPolarity  = TMRA_PWM_HIGH;
-        stcPwmCfg.u16StopPolarity   = TMRA_PWM_LOW;
-        stcPwmCfg.u16CompareMatchPolarity    = TMRA_PWM_LOW;
-        stcPwmCfg.u16PeriodMatchPolarity = TMRA_PWM_HIGH;
-
-        /* config pwm channel */
-        if (0 != (device->channel & 0x01))
-        {
-            TMRA_PWM_Init(device->timer_periph, TMRA_CH1, &stcPwmCfg);
-            TMRA_SetCompareValue(device->timer_periph, TMRA_CH1, 0x7FFF);
-        }
-        if (0 != (device->channel & 0x02))
-        {
-            TMRA_PWM_Init(device->timer_periph, TMRA_CH2, &stcPwmCfg);
-            TMRA_SetCompareValue(device->timer_periph, TMRA_CH2, 0x7FFF);
-        }
-        if (0 != (device->channel & 0x04))
-        {
-            TMRA_PWM_Init(device->timer_periph, TMRA_CH3, &stcPwmCfg);
-            TMRA_SetCompareValue(device->timer_periph, TMRA_CH3, 0x7FFF);
-        }
-        if (0 != (device->channel & 0x08))
-        {
-            TMRA_PWM_Init(device->timer_periph, TMRA_CH4, &stcPwmCfg);
-            TMRA_SetCompareValue(device->timer_periph, TMRA_CH4, 0x7FFF);
-        }
-        /* start timer */
-        TMRA_Start(device->timer_periph);
-    }
-
-    return result;
-}
-
-static void hc32_pwm_get_channel(void)
-{
-#ifdef BSP_USING_PWM1_CH1
-    pwm_obj[PWM1_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM1_CH2
-    pwm_obj[PWM1_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM1_CH3
-    pwm_obj[PWM1_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM1_CH4
-    pwm_obj[PWM1_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM2_CH1
-    pwm_obj[PWM2_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM2_CH2
-    pwm_obj[PWM2_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM2_CH3
-    pwm_obj[PWM2_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM2_CH4
-    pwm_obj[PWM2_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM3_CH1
-    pwm_obj[PWM3_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM3_CH2
-    pwm_obj[PWM3_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM3_CH3
-    pwm_obj[PWM3_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM3_CH4
-    pwm_obj[PWM3_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWCM_CH1
-    pwm_obj[PWCM_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWCM_CH2
-    pwm_obj[PWCM_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWCM_CH3
-    pwm_obj[PWCM_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWCM_CH4
-    pwm_obj[PWCM_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM5_CH1
-    pwm_obj[PWM5_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM5_CH2
-    pwm_obj[PWM5_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM5_CH3
-    pwm_obj[PWM5_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM5_CH4
-    pwm_obj[PWM5_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM6_CH1
-    pwm_obj[PWM6_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM6_CH2
-    pwm_obj[PWM6_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM6_CH3
-    pwm_obj[PWM6_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM6_CH4
-    pwm_obj[PWM6_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM7_CH1
-    pwm_obj[PWM7_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM7_CH2
-    pwm_obj[PWM7_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM7_CH3
-    pwm_obj[PWM7_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM7_CH4
-    pwm_obj[PWM7_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM8_CH1
-    pwm_obj[PWM8_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM8_CH2
-    pwm_obj[PWM8_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM8_CH3
-    pwm_obj[PWM8_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM8_CH4
-    pwm_obj[PWM8_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM9_CH1
-    pwm_obj[PWM9_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM9_CH2
-    pwm_obj[PWM9_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM9_CH3
-    pwm_obj[PWM9_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM9_CH4
-    pwm_obj[PWM9_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM10_CH1
-    pwm_obj[PWM10_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM10_CH2
-    pwm_obj[PWM10_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM10_CH3
-    pwm_obj[PWM10_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM10_CH4
-    pwm_obj[PWM10_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM11_CH1
-    pwm_obj[PWM11_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM11_CH2
-    pwm_obj[PWM11_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM11_CH3
-    pwm_obj[PWM11_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM11_CH4
-    pwm_obj[PWM11_INDEX].channel |= (0x01 << 3);
-#endif
-#ifdef BSP_USING_PWM12_CH1
-    pwm_obj[PWM12_INDEX].channel |= (0x01 << 0);
-#endif
-#ifdef BSP_USING_PWM12_CH2
-    pwm_obj[PWM12_INDEX].channel |= (0x01 << 1);
-#endif
-#ifdef BSP_USING_PWM12_CH3
-    pwm_obj[PWM12_INDEX].channel |= (0x01 << 2);
-#endif
-#ifdef BSP_USING_PWM12_CH4
-    pwm_obj[PWM12_INDEX].channel |= (0x01 << 3);
-#endif
-}
-
-static struct rt_pwm_ops pwm_ops =
-{
-    .control = hc32_pwm_control
-};
-
-static int rt_hw_pwm_init(void)
-{
-    int i = 0;
-    int result = RT_EOK;
-
-    hc32_pwm_get_channel();
-    for (i = 0; i < sizeof(pwm_obj) / sizeof(pwm_obj[0]); i++)
-    {
-        if (hc32_pwm_init(&pwm_obj[i]) != RT_EOK)
-        {
-            LOG_E("%s init failed", pwm_obj[i].name);
-            result = -RT_ERROR;
-        }
-        else
-        {
-            LOG_D("%s init success", pwm_obj[i].name);
-            /* register pwm device */
-            if (rt_device_pwm_register(&pwm_obj[i].pwm_device, pwm_obj[i].name, &pwm_ops, pwm_obj[i].timer_periph) == RT_EOK)
-            {
-                LOG_D("%s register success", pwm_obj[i].name);
-            }
-            else
-            {
-                LOG_E("%s register failed", pwm_obj[i].name);
-                result = -RT_ERROR;
-            }
-        }
-    }
-
-    return result;
-}
-INIT_DEVICE_EXPORT(rt_hw_pwm_init);
-
-#endif
-
-#endif /* RT_USING_PWM */

bsp/hc32/libraries/hc32_drivers/drv_rtc.c

@@ -1,195 +0,0 @@
-/*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#include <board.h>
-#include <rtdbg.h>
-#include <rtthread.h>
-#include <rtdevice.h>
-#include <sys/time.h>
-
-#ifdef BSP_USING_RTC
-
-static struct rt_device rtc;
-
-static time_t hc32_rtc_get_time_stamp(void)
-{
-    stc_rtc_time_t stcRtcTime = {0};
-    stc_rtc_date_t stcRtcDate = {0};
-    struct tm tm_new = {0};
-
-    RTC_GetTime(RTC_DATA_FMT_DEC, &stcRtcTime);
-    RTC_GetDate(RTC_DATA_FMT_DEC, &stcRtcDate);
-
-    tm_new.tm_sec  = stcRtcTime.u8Second;
-    tm_new.tm_min  = stcRtcTime.u8Minute;
-    tm_new.tm_hour = stcRtcTime.u8Hour;
-    tm_new.tm_mday = stcRtcDate.u8Day;
-    tm_new.tm_mon  = stcRtcDate.u8Month - 1;
-    tm_new.tm_year = stcRtcDate.u8Year + 100;
-    tm_new.tm_wday = stcRtcDate.u8Weekday;
-
-    LOG_D("get rtc time.");
-    return timegm(&tm_new);
-}
-
-static rt_err_t hc32_rtc_set_time_stamp(time_t time_stamp)
-{
-    stc_rtc_time_t stcRtcTime = {0};
-    stc_rtc_date_t stcRtcDate = {0};
-    struct tm *p_tm;
-
-    p_tm = gmtime(&time_stamp);
-    if (p_tm->tm_year < 100)
-    {
-        return -RT_ERROR;
-    }
-
-    stcRtcTime.u8Second  = p_tm->tm_sec ;
-    stcRtcTime.u8Minute  = p_tm->tm_min ;
-    stcRtcTime.u8Hour    = p_tm->tm_hour;
-    stcRtcDate.u8Day     = p_tm->tm_mday;
-    stcRtcDate.u8Month   = p_tm->tm_mon + 1 ;
-    stcRtcDate.u8Year    = p_tm->tm_year - 100;
-    stcRtcDate.u8Weekday = p_tm->tm_wday;
-
-    if (LL_OK != RTC_SetTime(RTC_DATA_FMT_DEC, &stcRtcTime))
-    {
-        return -RT_ERROR;
-    }
-    if (LL_OK != RTC_SetDate(RTC_DATA_FMT_DEC, &stcRtcDate))
-    {
-        return -RT_ERROR;
-    }
-
-    LOG_D("set rtc time.");
-    return RT_EOK;
-}
-
-static rt_err_t hc32_rtc_init(struct rt_device *dev)
-{
-    stc_rtc_init_t stcRtcInit;
-
-#ifdef BSP_RTC_USING_XTAL32
-    stc_clk_xtal32_init_t stcXtal32Init;
-
-    /* Xtal32 config */
-    stcXtal32Init.u8Xtal32State = CLK_XTAL32_ON;
-    stcXtal32Init.u8Xtal32Drv   = CLK_XTAL32DRV_HIGH;
-    stcXtal32Init.u8Xtal32NF    = CLK_XTAL32NF_PART;
-    (void)CLK_Xtal32Init(&stcXtal32Init);
-    /* Waiting for XTAL32 stabilization */
-    rt_thread_delay(1000);
-#endif
-
-    /* Reset RTC counter */
-    if (LL_ERR_TIMEOUT == RTC_DeInit())
-    {
-        return -RT_ERROR;
-    }
-    else
-    {
-        /* Configure structure initialization */
-        (void)RTC_StructInit(&stcRtcInit);
-        /* Configuration RTC structure */
-#ifdef BSP_RTC_USING_XTAL32
-        stcRtcInit.u8ClockSrc = RTC_CLK_SRC_XTAL32;
-#else
-        stcRtcInit.u8ClockSrc = RTC_CLK_SRC_LRC;
-#endif
-        stcRtcInit.u8HourFormat  = RTC_HOUR_FMT_24H;
-        (void)RTC_Init(&stcRtcInit);
-        /* Startup RTC count */
-        RTC_Cmd(ENABLE);
-    }
-
-    return RT_EOK;
-}
-
-static rt_err_t hc32_rtc_control(rt_device_t dev, int cmd, void *args)
-{
-    rt_err_t result = RT_EOK;
-
-    RT_ASSERT(dev != RT_NULL);
-    switch (cmd)
-    {
-    case RT_DEVICE_CTRL_RTC_GET_TIME:
-        *(rt_uint32_t *)args = hc32_rtc_get_time_stamp();
-        LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
-        break;
-
-    case RT_DEVICE_CTRL_RTC_SET_TIME:
-        if (hc32_rtc_set_time_stamp(*(rt_uint32_t *)args))
-        {
-            result = -RT_ERROR;
-        }
-        LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
-        break;
-    default:
-        return RT_EINVAL;
-    }
-
-    return result;
-}
-
-#ifdef RT_USING_DEVICE_OPS
-const static struct rt_device_ops rtc_ops =
-{
-    RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    hc32_rtc_control
-};
-#endif
-
-//static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint32_t flag)
-//{
-//    RT_ASSERT(device != RT_NULL);
-
-//    if (hc32_rtc_init(device) != RT_EOK)
-//    {
-//        return -RT_ERROR;
-//    }
-//#ifdef RT_USING_DEVICE_OPS
-//    device->ops         = &rtc_ops;
-//#else
-//    device->init        = RT_NULL;
-//    device->open        = RT_NULL;
-//    device->close       = RT_NULL;
-//    device->read        = RT_NULL;
-//    device->write       = RT_NULL;
-//    device->control     = hc32_rtc_control;
-//#endif
-//    device->type        = RT_Device_Class_RTC;
-//    device->rx_indicate = RT_NULL;
-//    device->tx_complete = RT_NULL;
-//    device->user_data   = RT_NULL;
-
-//    /* register a character device */
-//    return rt_device_register(device, name, flag);
-//}
-
-int rt_hw_rtc_init(void)
-{
-//    rt_err_t result;
-
-//    result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
-//    if (result != RT_EOK)
-//    {
-//        LOG_E("rtc register err code: %d", result);
-//        return result;
-//    }
-//    LOG_D("rtc init success");
-    return RT_EOK;
-}
-INIT_DEVICE_EXPORT(rt_hw_rtc_init);
-
-#endif /* BSP_USING_RTC */

bsp/hc32/libraries/hc32_drivers/drv_soft_i2c.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_soft_i2c.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_spi.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_spi.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32_drivers/drv_usart.c

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -44,6 +45,16 @@
 
 #define UART_BAUDRATE_ERR_MAX           (0.025F)
 
+#if defined (HC32F460)
+    #define FCG_USART_CLK               FCG_Fcg1PeriphClockCmd
+
+#elif defined (HC32F4A0)
+    #define FCG_USART_CLK               FCG_Fcg3PeriphClockCmd
+#endif
+
+#define FCG_TMR0_CLK                    FCG_Fcg2PeriphClockCmd
+#define FCG_DMA_CLK                     FCG_Fcg0PeriphClockCmd
+
 /*******************************************************************************
  * Global variable definitions (declared in header file with 'extern')
  ******************************************************************************/
@@ -145,8 +156,13 @@ static rt_err_t hc32_configure(struct rt_serial_device *serial, struct serial_co
     uart_init.u32OverSampleBit = USART_OVER_SAMPLE_8BIT;
     uart_init.u32Baudrate = cfg->baud_rate;
     uart_init.u32ClockSrc = USART_CLK_SRC_INTERNCLK;
+#if defined (HC32F4A0)
     if ((CM_USART1 == uart->config->Instance) || (CM_USART2 == uart->config->Instance) || \
             (CM_USART6 == uart->config->Instance) || (CM_USART7 == uart->config->Instance))
+#elif defined (HC32F460)
+    if ((CM_USART1 == uart->config->Instance) || (CM_USART2 == uart->config->Instance) || \
+            (CM_USART3 == uart->config->Instance) || (CM_USART4 == uart->config->Instance))
+#endif
     {
         uart_init.u32CKOutput = USART_CK_OUTPUT_ENABLE;
     }
@@ -201,7 +217,7 @@ static rt_err_t hc32_configure(struct rt_serial_device *serial, struct serial_co
     {
         uart_init.u32FirstBit = USART_FIRST_BIT_MSB;
     }
-
+#if defined (HC32F4A0)
     switch (cfg->flowcontrol)
     {
     case RT_SERIAL_FLOWCONTROL_NONE:
@@ -214,12 +230,13 @@ static rt_err_t hc32_configure(struct rt_serial_device *serial, struct serial_co
         uart_init.u32HWFlowControl = USART_HW_FLOWCTRL_NONE;
         break;
     }
+#endif
 
 #ifdef RT_SERIAL_USING_DMA
     uart->dma_rx_last_index = 0;
 #endif
     /* Enable USART clock */
-    FCG_Fcg3PeriphClockCmd(uart->config->clock, ENABLE);
+    FCG_USART_CLK(uart->config->clock, ENABLE);
     if (RT_EOK != rt_hw_board_uart_init(uart->config->Instance))
     {
         return -RT_ERROR;
@@ -292,13 +309,14 @@ static rt_err_t hc32_control(struct rt_serial_device *serial, int cmd, void *arg
     case RT_DEVICE_CTRL_SET_INT:
         if (RT_DEVICE_FLAG_INT_RX == ctrl_arg)
         {
-            USART_FuncCmd(uart->config->Instance, USART_INT_RX, ENABLE);
             hc32_install_irq_handler(&uart->config->rx_irq.irq_config, uart->config->rx_irq.irq_callback, RT_TRUE);
+            USART_FuncCmd(uart->config->Instance, USART_INT_RX, ENABLE);
         }
         else
         {
-            USART_FuncCmd(uart->config->Instance, USART_INT_TX_EMPTY, ENABLE);
             hc32_install_irq_handler(&uart->config->tx_irq.irq_config, uart->config->tx_irq.irq_callback, RT_TRUE);
+            USART_FuncCmd(uart->config->Instance, USART_TX, DISABLE);
+            USART_FuncCmd(uart->config->Instance, USART_TX | USART_INT_TX_EMPTY, ENABLE);
         }
         break;
 #ifdef RT_SERIAL_USING_DMA
@@ -436,7 +454,16 @@ static void hc32_uart_rx_timeout(struct rt_serial_device *serial)
     TMR0_Instance = uart->config->rx_timeout->TMR0_Instance;
     ch            = uart->config->rx_timeout->channel;
     timeout_bits  = uart->config->rx_timeout->timeout_bits;
-
+#if defined (HC32F460)
+    if ((CM_USART1 == uart->config->Instance) || (CM_USART3 == uart->config->Instance))
+    {
+        RT_ASSERT(TMR0_CH_A == ch);
+    }
+    else if ((CM_USART2 == uart->config->Instance) || (CM_USART4 == uart->config->Instance))
+    {
+        RT_ASSERT(TMR0_CH_B == ch);
+    }
+#elif defined (HC32F4A0)
     if ((CM_USART1 == uart->config->Instance) || (CM_USART6 == uart->config->Instance))
     {
         RT_ASSERT(TMR0_CH_A == ch);
@@ -445,7 +472,9 @@ static void hc32_uart_rx_timeout(struct rt_serial_device *serial)
     {
         RT_ASSERT(TMR0_CH_B == ch);
     }
-    FCG_Fcg2PeriphClockCmd(uart->config->rx_timeout->clock, ENABLE);
+#endif
+
+    FCG_TMR0_CLK(uart->config->rx_timeout->clock, ENABLE);
 
     /* TIMER0 basetimer function initialize */
     TMR0_DeInit(TMR0_Instance);
@@ -500,7 +529,7 @@ static void hc32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
         /* Initialization uart rx timeout for DMA */
         hc32_uart_rx_timeout(serial);
         /* Enable DMA clock */
-        FCG_Fcg0PeriphClockCmd(uart_dma->clock, ENABLE);
+        FCG_DMA_CLK(uart_dma->clock, ENABLE);
         DMA_ChCmd(uart_dma->Instance, uart_dma->channel, DISABLE);
 
         /* Initialize DMA */
@@ -543,7 +572,7 @@ static void hc32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
 
         uart_dma = uart->config->dma_tx;
         /* Enable DMA clock */
-        FCG_Fcg0PeriphClockCmd(uart_dma->clock, ENABLE);
+        FCG_DMA_CLK(uart_dma->clock, ENABLE);
         DMA_ChCmd(uart_dma->Instance, uart_dma->channel, DISABLE);
 
         /* Initialize DMA */
@@ -806,6 +835,46 @@ static void hc32_uart3_rxerr_irq_handler(void)
     /* leave interrupt */
     rt_interrupt_leave();
 }
+
+#if defined(RT_SERIAL_USING_DMA)
+#if defined(BSP_UART3_TX_USING_DMA)
+static void hc32_uart3_tc_irq_handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    hc32_uart_tc_irq_handler(&uart_obj[UART3_INDEX]);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* BSP_UART3_TX_USING_DMA */
+
+#if defined(BSP_UART3_RX_USING_DMA)
+static void hc32_uart3_rxto_irq_handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    hc32_uart_rxto_irq_handler(&uart_obj[UART3_INDEX]);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+static void hc32_uart3_dma_rx_irq_handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    hc32_uart_dma_rx_irq_handler(&uart_obj[UART3_INDEX]);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+
+}
+#endif /* BSP_UART3_RX_USING_DMA */
+#endif /* RT_SERIAL_USING_DMA */
 #endif /* BSP_USING_UART3 */
 
 #if defined(BSP_USING_UART4)
@@ -841,6 +910,45 @@ static void hc32_uart4_rxerr_irq_handler(void)
     /* leave interrupt */
     rt_interrupt_leave();
 }
+#if defined(RT_SERIAL_USING_DMA)
+#if defined(BSP_UART4_TX_USING_DMA)
+static void hc32_uart4_tc_irq_handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    hc32_uart_tc_irq_handler(&uart_obj[UART4_INDEX]);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* BSP_UART4_TX_USING_DMA */
+
+#if defined(BSP_UART4_RX_USING_DMA)
+static void hc32_uart4_rxto_irq_handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    hc32_uart_rxto_irq_handler(&uart_obj[UART4_INDEX]);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+static void hc32_uart4_dma_rx_irq_handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    hc32_uart_dma_rx_irq_handler(&uart_obj[UART4_INDEX]);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+
+}
+#endif /* BSP_UART4_RX_USING_DMA */
+#endif /* RT_SERIAL_USING_DMA */
 #endif /* BSP_USING_UART4 */
 
 #if defined(BSP_USING_UART5)
@@ -1181,6 +1289,48 @@ static void hc32_uart_get_dma_info(void)
 #endif
 #endif
 
+#ifdef BSP_USING_UART3
+    uart_obj[UART3_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART3_RX_USING_DMA
+    uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart3_dma_rx = UART3_DMA_RX_CONFIG;
+    static struct hc32_uart_rxto uart3_rx_timeout = UART3_RXTO_CONFIG;
+    uart3_dma_rx.irq_callback = hc32_uart3_dma_rx_irq_handler;
+    uart3_rx_timeout.irq_callback = hc32_uart3_rxto_irq_handler;
+    uart_config[UART3_INDEX].rx_timeout = &uart3_rx_timeout;
+    uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
+#endif
+#ifdef BSP_UART3_TX_USING_DMA
+    uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart3_dma_tx = UART3_DMA_TX_CONFIG;
+    uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
+    static struct hc32_uart_irq_config uart3_tc_irq = UART3_TX_CPLT_CONFIG;
+    uart3_tc_irq.irq_callback = hc32_uart3_tc_irq_handler;
+    uart_config[UART3_INDEX].tc_irq = &uart3_tc_irq;
+#endif
+#endif
+
+#ifdef BSP_USING_UART4
+    uart_obj[UART4_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART4_RX_USING_DMA
+    uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart4_dma_rx = UART4_DMA_RX_CONFIG;
+    static struct hc32_uart_rxto uart4_rx_timeout = UART4_RXTO_CONFIG;
+    uart4_dma_rx.irq_callback = hc32_uart4_dma_rx_irq_handler;
+    uart4_rx_timeout.irq_callback = hc32_uart4_rxto_irq_handler;
+    uart_config[UART4_INDEX].rx_timeout = &uart4_rx_timeout;
+    uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
+#endif
+#ifdef BSP_UART4_TX_USING_DMA
+    uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart4_dma_tx = UART4_DMA_TX_CONFIG;
+    uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
+    static struct hc32_uart_irq_config uart4_tc_irq = UART4_TX_CPLT_CONFIG;
+    uart4_tc_irq.irq_callback = hc32_uart4_tc_irq_handler;
+    uart_config[UART4_INDEX].tc_irq = &uart4_tc_irq;
+#endif
+#endif
+
 #ifdef BSP_USING_UART6
     uart_obj[UART6_INDEX].uart_dma_flag = 0;
 #ifdef BSP_UART6_RX_USING_DMA

bsp/hc32/libraries/hc32_drivers/drv_usart.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/libraries/hc32f460_ddl/LICENSE

@@ -0,0 +1,29 @@
+BSD 3-Clause License
+
+Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd. ("XHSC")
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+  list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright notice,
+  this list of conditions and the following disclaimer in the documentation
+  and/or other materials provided with the distribution.
+
+* Neither the name of the copyright holder nor the names of its
+  contributors may be used to endorse or promote products derived from
+  this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

bsp/hc32/libraries/hc32f460_ddl/README.txt

@@ -0,0 +1,4 @@
+version     date            comment
+ 3.0.0
+            Mar 31, 2022    Initial release.
+EOF

bsp/hc32/libraries/hc32f460_ddl/SConscript

@@ -0,0 +1,74 @@
+import rtconfig
+from building import *
+
+# get current directory
+cwd = GetCurrentDir()
+
+# The set of source files associated with this SConscript file.
+
+src = Split('''
+drivers/cmsis/Device/HDSC/hc32f4xx/Source/system_hc32f460.c
+drivers/hc32_ll_driver/src/hc32_ll.c
+drivers/hc32_ll_driver/src/hc32_ll_aos.c
+drivers/hc32_ll_driver/src/hc32_ll_clk.c
+drivers/hc32_ll_driver/src/hc32_ll_dma.c
+drivers/hc32_ll_driver/src/hc32_ll_efm.c
+drivers/hc32_ll_driver/src/hc32_ll_fcg.c
+drivers/hc32_ll_driver/src/hc32_ll_gpio.c
+drivers/hc32_ll_driver/src/hc32_ll_icg.c
+drivers/hc32_ll_driver/src/hc32_ll_interrupts.c
+drivers/hc32_ll_driver/src/hc32_ll_pwc.c
+drivers/hc32_ll_driver/src/hc32_ll_rmu.c
+drivers/hc32_ll_driver/src/hc32_ll_sram.c
+drivers/hc32_ll_driver/src/hc32_ll_utility.c
+drivers/hc32_ll_driver/src/hc32f460_ll_interrupts_share.c
+''')
+    
+if GetDepend(['RT_USING_SERIAL']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_usart.c']
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_tmr0.c']
+    
+if GetDepend(['RT_USING_I2C']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_i2c.c']
+
+if GetDepend(['RT_USING_SPI']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_spi.c']
+
+if GetDepend(['RT_USING_CAN']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_can.c']
+
+if GetDepend(['BSP_USING_ETH']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_eth.c']
+
+if GetDepend(['RT_USING_ADC']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_adc.c']
+
+if GetDepend(['RT_USING_DAC']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_dac.c']
+
+if GetDepend(['RT_USING_RTC']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_rtc.c']
+
+if GetDepend(['RT_USING_WDT']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_swdt.c']
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_wdt.c']
+
+if GetDepend(['RT_USING_SDIO']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_sdioc.c']
+
+if GetDepend(['RT_USING_ON_CHIP_FLASH']):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_efm.c']
+
+if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM'] or GetDepend(['RT_USING_PULSE_ENCODER'])):
+    src += ['drivers/hc32_ll_driver/src/hc32_ll_tmra.c']
+    
+path = [
+    cwd + '/drivers/cmsis/Device/HDSC/hc32f4xx/Include',
+    cwd + '/drivers/cmsis/Include',
+    cwd + '/drivers/hc32_ll_driver/inc',]
+
+CPPDEFINES = ['USE_DDL_DRIVER']
+
+group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+
+Return('group')

bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460.mac

@@ -0,0 +1,16 @@
+setup()
+{
+  ;
+}
+
+execUserPreload()
+{
+  __message "----- Prepare hardware for Flashloader -----\n";
+  setup();
+}
+execUserFlashInit()  // Called by debugger before loading flash loader in RAM.
+{
+  __message "----- Prepare hardware for Flashloader -----\n";
+  setup();
+}
+

bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460_otp.flash

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<flash_device>
+  <exe>$PROJ_DIR$\..\libraries\hc32f460_ddl\config\flashloader\FlashHC32F460_otp.out</exe>
+  <page>4</page>
+  <block>64 0x10</block>
+  <flash_base>0x03000C00</flash_base>
+  <macro>$PROJ_DIR$\..\libraries\hc32f460_ddl\config\flashloader\FlashHC32F460_otp.mac</macro>
+  <aggregate>0</aggregate>
+</flash_device>

bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460_otp.mac

@@ -0,0 +1,16 @@
+setup()
+{
+  ;
+}
+
+execUserPreload()
+{
+  __message "----- Prepare hardware for Flashloader -----\n";
+  setup();
+}
+execUserFlashInit()  // Called by debugger before loading flash loader in RAM.
+{
+  __message "----- Prepare hardware for Flashloader -----\n";
+  setup();
+}
+

bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460xC.flash

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<flash_device>
+  <exe>$PROJ_DIR$\..\libraries\hc32f460_ddl\config\flashloader\FlashHC32F460.out</exe>
+  <page>4</page>
+  <block>32 0x2000</block>
+  <flash_base>0x00000000</flash_base>
+  <macro>$PROJ_DIR$\..\libraries\hc32f460_ddl\config\flashloader\FlashHC32F460.mac</macro>
+  <aggregate>0</aggregate>
+</flash_device>

bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460xE.flash

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<flash_device>
+  <exe>$PROJ_DIR$\..\libraries\hc32f460_ddl\config\flashloader\FlashHC32F460.out</exe>
+  <page>4</page>
+  <block>64 0x2000</block>
+  <flash_base>0x00000000</flash_base>
+  <macro>$PROJ_DIR$\..\libraries\hc32f460_ddl\config\flashloader\FlashHC32F460.mac</macro>
+  <aggregate>0</aggregate>
+</flash_device>

bsp/hc32/libraries/hc32f460_ddl/config/flashloader/HC32F460xC.board

@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<flash_board>
+  <pass>
+    <loader>$PROJ_DIR$\..\libraries\hc32f460_ddl\config\flashloader\FlashHC32F460xC.flash</loader>
+    <range>CODE 0x0 0x3FFFF</range>
+  </pass>
+  <pass>
+    <loader>$PROJ_DIR$\..\libraries\hc32f460_ddl\config\flashloader\FlashHC32F460_otp.flash</loader>
+    <range>CODE 0x03000C00 0x03000FFB</range>
+  </pass>
+</flash_board>