[bsp\fm33lc026] *增加gpio支持 *更新libraries\FM33LC0xx_FL_Driver FL库到V2.3.1 (#6175)

* [bsp\fm33lc026] *增加gpio支持 *更新libraries\FM33LC0xx_FL_Driver到2021年新版本

bsp/fm33lc026/.config

@@ -1,4 +1,7 @@
-# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib)
+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
 
 #
 # RT-Thread Kernel
@@ -14,6 +17,7 @@ CONFIG_RT_THREAD_PRIORITY_MAX=32
 CONFIG_RT_TICK_PER_SECOND=500
 CONFIG_RT_USING_OVERFLOW_CHECK=y
 CONFIG_RT_USING_HOOK=y
+CONFIG_RT_HOOK_USING_FUNC_PTR=y
 CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=256
@@ -25,9 +29,7 @@ CONFIG_IDLE_THREAD_STACK_SIZE=256
 # CONFIG_RT_KSERVICE_USING_STDLIB is not set
 # CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
 # CONFIG_RT_USING_TINY_FFS is not set
-# CONFIG_RT_PRINTF_LONGLONG is not set
-# end of kservice optimization
-
+# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
 CONFIG_RT_DEBUG=y
 CONFIG_RT_DEBUG_COLOR=y
 # CONFIG_RT_DEBUG_INIT_CONFIG is not set
@@ -50,7 +52,6 @@ CONFIG_RT_USING_EVENT=y
 CONFIG_RT_USING_MAILBOX=y
 CONFIG_RT_USING_MESSAGEQUEUE=y
 # CONFIG_RT_USING_SIGNALS is not set
-# end of Inter-Thread communication
 
 #
 # Memory Management
@@ -67,7 +68,6 @@ CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
 # CONFIG_RT_USING_MEMTRACE is not set
 # CONFIG_RT_USING_HEAP_ISR is not set
 CONFIG_RT_USING_HEAP=y
-# end of Memory Management
 
 #
 # Kernel Device Object
@@ -78,14 +78,12 @@ CONFIG_RT_USING_DEVICE=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
-# end of Kernel Device Object
-
-CONFIG_RT_VER_NUM=0x40100
-# end of RT-Thread Kernel
-
+CONFIG_RT_VER_NUM=0x40101
 CONFIG_ARCH_ARM=y
+# CONFIG_RT_USING_CPU_FFS is not set
 CONFIG_ARCH_ARM_CORTEX_M=y
 CONFIG_ARCH_ARM_CORTEX_M0=y
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
 
 #
 # RT-Thread Components
@@ -95,18 +93,8 @@ CONFIG_RT_USING_USER_MAIN=y
 CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
 CONFIG_RT_MAIN_THREAD_PRIORITY=10
 # CONFIG_RT_USING_LEGACY is not set
-
-#
-# C++ features
-#
-# CONFIG_RT_USING_CPLUSPLUS is not set
-# end of C++ features
-
-#
-# Command shell
-#
-CONFIG_RT_USING_FINSH=y
 CONFIG_RT_USING_MSH=y
+CONFIG_RT_USING_FINSH=y
 CONFIG_FINSH_USING_MSH=y
 CONFIG_FINSH_THREAD_NAME="tshell"
 CONFIG_FINSH_THREAD_PRIORITY=20
@@ -120,13 +108,9 @@ CONFIG_FINSH_USING_DESCRIPTION=y
 # CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
 # CONFIG_FINSH_USING_AUTH is not set
 CONFIG_FINSH_ARG_MAX=10
-# end of Command shell
-
-#
-# Device virtual file system
-#
 # CONFIG_RT_USING_DFS is not set
-# end of Device virtual file system
+# CONFIG_RT_USING_FAL is not set
+# CONFIG_RT_USING_LWP is not set
 
 #
 # Device Drivers
@@ -141,9 +125,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+CONFIG_RT_USING_I2C_BITOPS=y
+# CONFIG_RT_I2C_BITOPS_DEBUG is not set
 # CONFIG_RT_USING_PHY is not set
-# CONFIG_RT_USING_PIN is not set
+CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_PWM is not set
@@ -165,16 +152,14 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 #
 # Using USB
 #
+# CONFIG_RT_USING_USB is not set
 # CONFIG_RT_USING_USB_HOST is not set
 # CONFIG_RT_USING_USB_DEVICE is not set
-# end of Using USB
-# end of Device Drivers
 
 #
-# POSIX layer and C standard library
+# C/C++ and POSIX layer
 #
-# CONFIG_RT_USING_LIBC is not set
-# CONFIG_RT_LIBC_USING_TIME is not set
+CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 
 #
 # POSIX (Portable Operating System Interface) layer
@@ -182,8 +167,9 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_POSIX_FS is not set
 # CONFIG_RT_USING_POSIX_DELAY is not set
 # CONFIG_RT_USING_POSIX_CLOCK is not set
-# CONFIG_RT_USING_POSIX_GETLINE is not set
+# CONFIG_RT_USING_POSIX_TIMER is not set
 # CONFIG_RT_USING_PTHREADS is not set
+# CONFIG_RT_USING_MODULE is not set
 
 #
 # Interprocess Communication (IPC)
@@ -195,44 +181,15 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 #
 # Socket is in the 'Network' category
 #
-# end of Interprocess Communication (IPC)
-# end of POSIX (Portable Operating System Interface) layer
-# end of POSIX layer and C standard library
+# CONFIG_RT_USING_CPLUSPLUS is not set
 
 #
 # Network
 #
-
-#
-# Socket abstraction layer
-#
 # CONFIG_RT_USING_SAL is not set
-# end of Socket abstraction layer
-
-#
-# Network interface device
-#
 # CONFIG_RT_USING_NETDEV is not set
-# end of Network interface device
-
-#
-# light weight TCP/IP stack
-#
 # CONFIG_RT_USING_LWIP is not set
-# end of light weight TCP/IP stack
-
-#
-# AT commands
-#
 # CONFIG_RT_USING_AT is not set
-# end of AT commands
-# end of Network
-
-#
-# VBUS(Virtual Software BUS)
-#
-# CONFIG_RT_USING_VBUS is not set
-# end of VBUS(Virtual Software BUS)
 
 #
 # Utilities
@@ -242,16 +199,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_UTEST is not set
 # CONFIG_RT_USING_VAR_EXPORT is not set
 # CONFIG_RT_USING_RT_LINK is not set
-# end of Utilities
-
-# CONFIG_RT_USING_LWP is not set
-# end of RT-Thread Components
+# CONFIG_RT_USING_VBUS is not set
 
 #
 # RT-Thread Utestcases
 #
 # CONFIG_RT_USING_UTESTCASES is not set
-# end of RT-Thread Utestcases
 
 #
 # RT-Thread online packages
@@ -260,6 +213,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 #
 # IoT - internet of things
 #
+# CONFIG_PKG_USING_LWIP is not set
 # CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
 # CONFIG_PKG_USING_UMQTT is not set
@@ -270,12 +224,8 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_KAWAII_MQTT is not set
 # CONFIG_PKG_USING_BC28_MQTT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
-# CONFIG_PKG_USING_CJSON is not set
-# CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
-# CONFIG_PKG_USING_LJSON is not set
-# CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
 
 #
@@ -286,17 +236,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # Marvell WiFi
 #
 # CONFIG_PKG_USING_WLANMARVELL is not set
-# end of Marvell WiFi
 
 #
 # Wiced WiFi
 #
 # CONFIG_PKG_USING_WLAN_WICED is not set
-# end of Wiced WiFi
-
 # CONFIG_PKG_USING_RW007 is not set
-# end of Wi-Fi
-
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
@@ -318,9 +263,10 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
 # CONFIG_PKG_USING_JOYLINK is not set
-# end of IoT Cloud
-
+# CONFIG_PKG_USING_EZ_IOT_OS is not set
+# CONFIG_PKG_USING_IOTSHARP_SDK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
 # CONFIG_PKG_USING_LSSDP is not set
@@ -334,16 +280,13 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_ABUP_FOTA is not set
 # CONFIG_PKG_USING_LIBCURL2RTT is not set
 # CONFIG_PKG_USING_CAPNP is not set
-# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
 # CONFIG_PKG_USING_AGILE_TELNET is not set
 # CONFIG_PKG_USING_NMEALIB is not set
-# CONFIG_PKG_USING_AGILE_JSMN is not set
 # CONFIG_PKG_USING_PDULIB is not set
 # CONFIG_PKG_USING_BTSTACK is not set
 # CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
 # CONFIG_PKG_USING_WAYZ_IOTKIT is not set
 # CONFIG_PKG_USING_MAVLINK is not set
-# CONFIG_PKG_USING_RAPIDJSON is not set
 # CONFIG_PKG_USING_BSAL is not set
 # CONFIG_PKG_USING_AGILE_MODBUS is not set
 # CONFIG_PKG_USING_AGILE_FTP is not set
@@ -354,26 +297,45 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
 # CONFIG_PKG_USING_HM is not set
 # CONFIG_PKG_USING_SMALL_MODBUS is not set
-# end of IoT - internet of things
+# CONFIG_PKG_USING_NET_SERVER is not set
+# CONFIG_PKG_USING_ZFTP is not set
 
 #
 # security packages
 #
 # CONFIG_PKG_USING_MBEDTLS is not set
 # CONFIG_PKG_USING_LIBSODIUM is not set
+# CONFIG_PKG_USING_LIBHYDROGEN is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
 # CONFIG_PKG_USING_YD_CRYPTO is not set
-# end of security packages
 
 #
 # language packages
 #
+
+#
+# JSON: JavaScript Object Notation, a lightweight data-interchange format
+#
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PARSON is not set
+
+#
+# XML: Extensible Markup Language
+#
+# CONFIG_PKG_USING_SIMPLE_XML is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
 # CONFIG_PKG_USING_PIKASCRIPT is not set
-# end of language packages
+# CONFIG_PKG_USING_RTT_RUST is not set
 
 #
 # multimedia packages
@@ -385,15 +347,13 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_LVGL is not set
 # CONFIG_PKG_USING_LITTLEVGL2RTT is not set
 # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
-# end of LVGL: powerful and easy-to-use embedded GUI library
+# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
 
 #
 # u8g2: a monochrome graphic library
 #
 # CONFIG_PKG_USING_U8G2_OFFICIAL is not set
 # CONFIG_PKG_USING_U8G2 is not set
-# end of u8g2: a monochrome graphic library
-
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
@@ -413,8 +373,11 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 #
 # CONFIG_PKG_USING_PAINTERENGINE is not set
 # CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
-# end of PainterEngine: A cross-platform graphics application framework written in C language
-# end of multimedia packages
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_TERMBOX is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
 
 #
 # tools packages
@@ -425,7 +388,6 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
 # CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
-# CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
 # CONFIG_PKG_USING_ULOG_FILE is not set
 # CONFIG_PKG_USING_LOGMGR is not set
@@ -458,7 +420,11 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_SOLAR_TERMS is not set
 # CONFIG_PKG_USING_GAN_ZHI is not set
 # CONFIG_PKG_USING_FDT is not set
-# end of tools packages
+# CONFIG_PKG_USING_CBOX is not set
+# CONFIG_PKG_USING_SNOWFLAKE is not set
+# CONFIG_PKG_USING_HASH_MATCH is not set
+# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
+# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 
 #
 # system packages
@@ -470,7 +436,6 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_RT_MEMCPY_CM is not set
 # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
 # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
-# end of enhanced kernel services
 
 #
 # acceleration: Assembly language or algorithmic acceleration packages
@@ -478,14 +443,13 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
 # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
 # CONFIG_PKG_USING_QFPLIB_M3 is not set
-# end of acceleration: Assembly language or algorithmic acceleration packages
 
 #
 # CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
 #
 # CONFIG_PKG_USING_CMSIS_5 is not set
+# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
 # CONFIG_PKG_USING_CMSIS_RTOS2 is not set
-# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
 
 #
 # Micrium: Micrium software products porting for RT-Thread
@@ -496,14 +460,11 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_UC_CLK is not set
 # CONFIG_PKG_USING_UC_COMMON is not set
 # CONFIG_PKG_USING_UC_MODBUS is not set
-# end of Micrium: Micrium software products porting for RT-Thread
-
-# CONFIG_RT_USING_ARDUINO is not set
-# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_RTDUINO is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
 # CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_PERF_COUNTER is not set
 # CONFIG_PKG_USING_FLASHDB is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
@@ -527,11 +488,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_TLSF is not set
 # CONFIG_PKG_USING_EVENT_RECORDER is not set
 # CONFIG_PKG_USING_ARM_2D is not set
-# CONFIG_PKG_USING_WCWIDTH is not set
 # CONFIG_PKG_USING_MCUBOOT is not set
 # CONFIG_PKG_USING_TINYUSB is not set
-# CONFIG_PKG_USING_USB_STACK is not set
-# end of system packages
+# CONFIG_PKG_USING_CHERRYUSB is not set
+# CONFIG_PKG_USING_KMULTI_RTIMER is not set
+# CONFIG_PKG_USING_TFDB is not set
+# CONFIG_PKG_USING_QPC is not set
 
 #
 # peripheral libraries and drivers
@@ -540,8 +502,10 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_ADT74XX is not set
 # CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_RTT_ESP_IDF is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
@@ -555,6 +519,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_MULTI_INFRARED is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
 # CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
@@ -588,6 +553,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_SSD1306 is not set
 # CONFIG_PKG_USING_QKEY is not set
 # CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_RS232 is not set
 # CONFIG_PKG_USING_NES is not set
 # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
 # CONFIG_PKG_USING_VDEVICE is not set
@@ -605,10 +571,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_BLUETRUM_SDK is not set
 # CONFIG_PKG_USING_MISAKA_AT24CXX is not set
 # CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
+# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
 # CONFIG_PKG_USING_BL_MCU_SDK is not set
 # CONFIG_PKG_USING_SOFT_SERIAL is not set
 # CONFIG_PKG_USING_MB85RS16 is not set
-# end of peripheral libraries and drivers
+# CONFIG_PKG_USING_CW2015 is not set
+# CONFIG_PKG_USING_RFM300 is not set
 
 #
 # AI packages
@@ -622,12 +590,15 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_QUEST is not set
 # CONFIG_PKG_USING_NAXOS is not set
-# end of AI packages
 
 #
 # miscellaneous packages
 #
 
+#
+# project laboratory
+#
+
 #
 # samples: kernel and components samples
 #
@@ -635,7 +606,6 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
 # CONFIG_PKG_USING_NETWORK_SAMPLES is not set
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
-# end of samples: kernel and components samples
 
 #
 # entertainment: terminal games and other interesting software packages
@@ -649,8 +619,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_SNAKE is not set
 # CONFIG_PKG_USING_TETRIS is not set
 # CONFIG_PKG_USING_DONUT is not set
-# end of entertainment: terminal games and other interesting software packages
-
+# CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
@@ -662,6 +631,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
 # CONFIG_PKG_USING_MINIZIP is not set
+# CONFIG_PKG_USING_HEATSHRINK is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
 # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
@@ -672,17 +642,16 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_PKG_USING_VI is not set
 # CONFIG_PKG_USING_KI is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
-# CONFIG_PKG_USING_VT100 is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_CRCLIB is not set
 # CONFIG_PKG_USING_LWGPS is not set
 # CONFIG_PKG_USING_STATE_MACHINE is not set
-# CONFIG_PKG_USING_MCURSES is not set
-# CONFIG_PKG_USING_COWSAY is not set
-# CONFIG_PKG_USING_TERMBOX is not set
-# end of miscellaneous packages
-# end of RT-Thread online packages
-
+# CONFIG_PKG_USING_DESIGN_PATTERN is not set
+# CONFIG_PKG_USING_CONTROLLER is not set
+# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
+# CONFIG_PKG_USING_MFBD is not set
+# CONFIG_PKG_USING_SLCAN2RTT is not set
+# CONFIG_PKG_USING_SOEM is not set
 CONFIG_SOC_FAMILY_FM33=y
 CONFIG_SOC_SERIES_FM33LC0XX=y
 
@@ -694,10 +663,9 @@ CONFIG_SOC_FM33LC0XX=y
 #
 # On-chip Peripheral Drivers
 #
+CONFIG_BSP_USING_GPIO=y
 CONFIG_BSP_USING_UART=y
 CONFIG_BSP_USING_UART0=y
 CONFIG_BSP_USING_UART1=y
 CONFIG_BSP_USING_UART4=y
 # CONFIG_BSP_USING_UART5 is not set
-# end of On-chip Peripheral Drivers
-# end of Hardware Drivers Config

bsp/fm33lc026/applications/main.c

@@ -1,31 +1,30 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
- * Date           Author       Notes
- * 2021-08-27     Jiao         first version
+ * Date           Author         Notes
+ * 2021-08-27     Jiao           first version
+ * 2022-07-20     wudiyidashi    support gpio
  */
 
 #include <rtthread.h>
 #include "board.h"
 
+#define LED1    GET_PIN(D, 4)
+
 int main(void)
+
 {
-    FL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+        rt_pin_mode(LED1, PIN_MODE_OUTPUT);
+        rt_pin_write(LED1, PIN_HIGH);
 
-    FL_GPIO_SetOutputPin(GPIOD, FL_GPIO_PIN_4);
-    GPIO_InitStruct.pin = FL_GPIO_PIN_4;
-    GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT;
-    GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
-    GPIO_InitStruct.pull = FL_DISABLE;
-    FL_GPIO_Init(GPIOD, &GPIO_InitStruct);
     while (1)
     {
-        FL_GPIO_SetOutputPin(GPIOD, FL_GPIO_PIN_4);
+        rt_pin_write(LED1, PIN_HIGH);
         rt_thread_mdelay(500);
-        FL_GPIO_ResetOutputPin(GPIOD, FL_GPIO_PIN_4);
+        rt_pin_write(LED1, PIN_LOW);
         rt_thread_mdelay(500);
     }
 

bsp/fm33lc026/board/Kconfig

@@ -9,6 +9,11 @@ config SOC_FM33LC0XX
 
 menu "On-chip Peripheral Drivers"
 
+    menuconfig BSP_USING_GPIO
+        bool "Enable GPIO"
+        select RT_USING_PIN
+        default y
+
     menuconfig BSP_USING_UART
         bool "Enable UART"
         default y
@@ -29,10 +34,11 @@ menu "On-chip Peripheral Drivers"
             config BSP_USING_UART5
                 bool "Enable UART5"
                 default y
+            
         endif
-    source "../libraries/HAL_Drivers/Kconfig"
-    
+        endmenu
 endmenu
 
+   
+
 
-endmenu

bsp/fm33lc026/board/board.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -71,7 +71,33 @@ FL_ErrorStatus FL_UART_GPIO_Init(UART_Type *UARTx)
     return status;
 }
 
+FL_ErrorStatus FL_SPI_GPIO_Init(SPI_Type *SPIx)
+{
+    FL_ErrorStatus status = FL_FAIL;
+    FL_GPIO_InitTypeDef GPIO_InitStruct;
+    if (SPIx == SPI1)
+    {
+        GPIO_InitStruct.pin = FL_GPIO_PIN_11 | FL_GPIO_PIN_10 | FL_GPIO_PIN_9;
+        GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
+        GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+        GPIO_InitStruct.pull = FL_DISABLE;
+        GPIO_InitStruct.remapPin = FL_DISABLE;
 
+        status=FL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+    }
+    else if (SPIx == SPI2)
+    {
+        GPIO_InitStruct.pin = FL_GPIO_PIN_8 | FL_GPIO_PIN_10 | FL_GPIO_PIN_9;
+        GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
+        GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+        GPIO_InitStruct.pull = FL_DISABLE;
+        GPIO_InitStruct.remapPin = FL_DISABLE;
+        
+        status=FL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+    }
+
+    return status;
+}
 
 static void RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLL_R, uint32_t PLL_DB, uint32_t PLL_O)
 {

bsp/fm33lc026/board/board.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -13,6 +13,7 @@
 
 #include <rtthread.h>
 #include "fm33lc0xx_fl.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/fm33lc026/libraries/FM/FM33xx/Include/core_cm0plus.h

@@ -22,7 +22,7 @@
  * limitations under the License.
  */
 
-#if   defined ( __ICCARM__ ) 
+#if   defined ( __ICCARM__ )
  #pragma system_include         /* treat file as system include file for MISRA check */
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
   #pragma clang system_header   /* treat file as system include file */

bsp/fm33lc026/libraries/FM/FM33xx/Include/core_cmFunc.h

@@ -552,7 +552,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t v
 /** \brief  Set Base Priority with condition
 
     This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-	or the new value increases the BASEPRI priority level.
+    or the new value increases the BASEPRI priority level.
 
     \param [in]    basePri  Base Priority value to set
  */

bsp/fm33lc026/libraries/FM/FM33xx/Include/fm33_assert.h

@@ -24,8 +24,8 @@
 #ifdef __cplusplus
  extern "C" {
 #endif
-     
-     
+
+
 #ifdef  USE_FULL_ASSERT
 #define assert_param(expr) do{if((expr) == 0)for(;;);}while(0)
 #else

bsp/fm33lc026/libraries/FM/FM33xx/Include/fm33lc0xx.h

@@ -8,19 +8,19 @@
  * @version  V0.0.1
  * @date     13. august 2019
  *
- * @note     Generated with SVDConv V2.87e 
+ * @note     Generated with SVDConv V2.87e
  *           from CMSIS SVD File 'FM33LC0XX.SVD' Version 1.0,
  *
  * @par      ARM Limited (ARM) is supplying this software for use with Cortex-M
  *           processor based microcontroller, but can be equally used for other
  *           suitable processor architectures. This file can be freely distributed.
  *           Modifications to this file shall be clearly marked.
- *           
+ *
  *           THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  *           OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  *           MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  *           ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- *           CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. 
+ *           CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  *
  *******************************************************************************************************/
 
@@ -41,7 +41,7 @@ extern "C" {
 #endif /* __cplusplus */
 
 /**
-  * @brief Configuration of the Cortex-M0 Processor and Core Peripherals 
+  * @brief Configuration of the Cortex-M0 Processor and Core Peripherals
   */
 #define __CM0_REV                    0x0100U /*!< Cortex-M0 Core Revision                                               */
 #define __MPU_PRESENT                0U      /*!< MPU present or not                                                    */
@@ -51,8 +51,8 @@ extern "C" {
 
 
 /**
- * @brief FM33LC0XX Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
+ * @brief FM33LC0XX Interrupt Number Definition, according to the selected device
+ *        in @ref Library_configuration_section
  */
 typedef enum {
 /******  Cortex-M0 Processor Exceptions Numbers ****************************************************************/
@@ -66,7 +66,7 @@ typedef enum {
   WWDT_IRQn                     = 0,       /*!<  0    Window WatchDog Interrupt                                */
   SVD_IRQn                      = 1,       /*!<  1    SVD Interrupt                                            */
   RTC_IRQn                      = 2,       /*!<  2    RTC Interrupt                                            */
-  FLASH_IRQn                    = 3,       /*!<  3    FLASH global Interrupt                                   */ 
+  FLASH_IRQn                    = 3,       /*!<  3    FLASH global Interrupt                                   */
   LFDET_IRQn                    = 4,       /*!<  4    LFDET Interrupt                                          */
   ADC_IRQn                      = 5,       /*!<  5    ADC Interrupt                                            */
   IWDT_IRQn                     = 6,       /*!<  6    IWDT Interrupt                                           */
@@ -76,13 +76,13 @@ typedef enum {
   UART0_IRQn                    = 10,      /*!<  10   UART0 global Interrupt                                   */
   UART1_IRQn                    = 11,      /*!<  11   UART1 global Interrupt                                   */
   UART4_IRQn                    = 12,      /*!<  12   UART4 global Interrupt                                   */
-  UART5_IRQn                    = 13,      /*!<  13   UART5 global Interrupt                                   */ 
+  UART5_IRQn                    = 13,      /*!<  13   UART5 global Interrupt                                   */
   HFDET_IRQn                    = 14,      /*!<  14   HFDET Interrupt                                          */
   U7816_IRQn                    = 15,      /*!<  15   U7816 Interrupt                                          */
   LPUART1_IRQn                  = 16,      /*!<  16   LPUART1 Interrupt                                        */
   I2C_IRQn                      = 17,      /*!<  17   I2C global Interrupt                                     */
   USB_IRQn                      = 18,      /*!<  18   USB Interrupt                                            */
-  AES_IRQn                      = 19,      /*!<  19   AES Interrupt                                            */ 
+  AES_IRQn                      = 19,      /*!<  19   AES Interrupt                                            */
   LPTIM_IRQn                    = 20,      /*!<  20   LPTIM Interrupt                                          */
   DMA_IRQn                      = 21,      /*!<  21   DMA Interrupt                                            */
   WKUP_IRQn                     = 22,      /*!<  22   WKUP Interrupt                                           */
@@ -114,10 +114,10 @@ typedef enum {
 
 /** @addtogroup Peripheral_registers_structures
   * @{
-  */   
+  */
 
-/** 
-  * @brief Analog to Digital Converter  
+/**
+  * @brief Analog to Digital Converter
   */
 typedef struct
 {
@@ -142,9 +142,9 @@ typedef struct
   __IO uint32_t KEY0;             /*!< AES Key Register 0,                                  Address offset: 0x14 */
   __IO uint32_t KEY1;             /*!< AES Key Register 1,                                  Address offset: 0x18 */
   __IO uint32_t KEY2;             /*!< AES Key Register 2,                                  Address offset: 0x1C */
-  __IO uint32_t KEY3;             /*!< AES Key Register 3,                                  Address offset: 0x20 */    
-  __IO uint32_t KEY4;             /*!< AES Key Register 4,                                  Address offset: 0x24 */    
-  __IO uint32_t KEY5;             /*!< AES Key Register 5,                                  Address offset: 0x28 */    
+  __IO uint32_t KEY3;             /*!< AES Key Register 3,                                  Address offset: 0x20 */
+  __IO uint32_t KEY4;             /*!< AES Key Register 4,                                  Address offset: 0x24 */
+  __IO uint32_t KEY5;             /*!< AES Key Register 5,                                  Address offset: 0x28 */
   __IO uint32_t KEY6;             /*!< AES Key Register 6,                                  Address offset: 0x2C */
   __IO uint32_t KEY7;             /*!< AES Key Register 7,                                  Address offset: 0x30 */
   __IO uint32_t IVR0;             /*!< AES Initial Vector Register 0,                       Address offset: 0x34 */
@@ -227,7 +227,7 @@ typedef struct
   __IO uint32_t RSV;
   __IO uint32_t CR;               /*!< Debug Configuration Register */
   __IO uint32_t HDFR;             /*!< HardFault Flag Register*/
-    
+
 } DBG_Type;
 
 typedef struct
@@ -236,7 +236,7 @@ typedef struct
   __IO uint32_t CH0CR;            /*!< Channel 0 Control Register          ,                Address offset: 0x04 */
   __IO uint32_t CH0MAD;           /*!< Channel 0 Memory Address Register   ,                Address offset: 0x08 */
   __IO uint32_t CH1CR;            /*!< Channel 1 Control Register          ,                Address offset: 0x0C */
-  __IO uint32_t CH1MAD;           /*!< Channel 1 Memory Address Register   ,                Address offset: 0x10 */    
+  __IO uint32_t CH1MAD;           /*!< Channel 1 Memory Address Register   ,                Address offset: 0x10 */
   __IO uint32_t CH2CR;            /*!< Channel 2 Control Register          ,                Address offset: 0x14 */
   __IO uint32_t CH2MAD;           /*!< Channel 2 Memory Address Register   ,                Address offset: 0x18 */
   __IO uint32_t CH3CR;            /*!< Channel 3 Control Register          ,                Address offset: 0x1C */
@@ -270,7 +270,7 @@ typedef struct
   __IO uint32_t EPCR;             /*!< Flash Erase/Program Control Register,                Address offset: 0x14 */
   __IO uint32_t KEY;              /*!< Flash Key Register,                                  Address offset: 0x18 */
   __IO uint32_t IER;              /*!< Flash Interrupt Enable Register,                     Address offset: 0x1C */
-  __IO uint32_t ISR;              /*!< Flash Interrupt Status Register,                     Address offset: 0x20 */    
+  __IO uint32_t ISR;              /*!< Flash Interrupt Status Register,                     Address offset: 0x20 */
 } FLASH_Type;
 
 typedef struct
@@ -279,7 +279,7 @@ typedef struct
   __IO uint32_t PUEN;             /*!< Pull-Up Enable Register        */
   __IO uint32_t ODEN;             /*!< Open-Drain Enable Register     */
   __IO uint32_t FCR;              /*!< Function Control Register      */
-  __IO uint32_t DO;               /*!< Data Output Register           */    
+  __IO uint32_t DO;               /*!< Data Output Register           */
   __O  uint32_t DSET;             /*!< Data Set Register              */
   __O  uint32_t DRST;             /*!< Data Reset Register            */
   __I uint32_t  DIN;              /*!< Data Input RegisterR           */
@@ -294,7 +294,7 @@ typedef struct
   __IO uint32_t EXTIEDS;          /*!< External Interrupt Edge Select and Enable Register  */
   __IO uint32_t EXTIDF;           /*!< External Interrupt Digital Filter Register          */
   __IO uint32_t EXTIISR;          /*!< External Interrupt and Status Register              */
-  __IO uint32_t EXTIDI;           /*!< External Interrupt Data Input Register              */    
+  __IO uint32_t EXTIDI;           /*!< External Interrupt Data Input Register              */
   __IO uint32_t RSV0[59];         /*!< RESERVED REGISTER                                   */
   __IO uint32_t FOUTSEL;          /*!< Frequency Output Select Register                    */
   __IO uint32_t RSV1[63];         /*!< RESERVED REGISTER                                   */
@@ -336,7 +336,7 @@ typedef struct
   __IO uint32_t SOR;              /*!< Divisor Regsiter,                                    Address offset: 0x04 */
   __IO uint32_t QUOT;             /*!< Quotient Register,                                   Address offset: 0x08 */
   __IO uint32_t REMD;             /*!< Reminder Register,                                   Address offset: 0x0C */
-  __IO uint32_t SR;               /*!< Status Register,                                     Address offset: 0x10 */   
+  __IO uint32_t SR;               /*!< Status Register,                                     Address offset: 0x10 */
 } DIV_Type;
 
 
@@ -349,14 +349,14 @@ typedef struct
   __IO uint32_t MSPSR;            /*!< I2C Master Status Register,                          Address offset: 0x10 */
   __IO uint32_t MSPBGR;           /*!< I2C Master Baud rate Generator Register,             Address offset: 0x14 */
   __IO uint32_t MSPBUF;           /*!< I2C Master transfer Buffer,                          Address offset: 0x18 */
-  __IO uint32_t MSPTCR;           /*!< I2C Master Timing Control Register,                  Address offset: 0x1C */    
-  __IO uint32_t MSPTOR;           /*!< I2C Master Time-Out Register,                        Address offset: 0x20 */    
-  __IO uint32_t SSPCR;            /*!< I2C Slave Control Register,                          Address offset: 0x24 */        
-  __IO uint32_t SSPIER;           /*!< I2C Slave Interrupt Enable Register,                 Address offset: 0x28 */        
-  __IO uint32_t SSPISR;           /*!< I2C Slave Interrupt Status Register,                 Address offset: 0x2C */        
-  __IO uint32_t SSPSR;            /*!< I2C Slave Status Register,                           Address offset: 0x30 */    
+  __IO uint32_t MSPTCR;           /*!< I2C Master Timing Control Register,                  Address offset: 0x1C */
+  __IO uint32_t MSPTOR;           /*!< I2C Master Time-Out Register,                        Address offset: 0x20 */
+  __IO uint32_t SSPCR;            /*!< I2C Slave Control Register,                          Address offset: 0x24 */
+  __IO uint32_t SSPIER;           /*!< I2C Slave Interrupt Enable Register,                 Address offset: 0x28 */
+  __IO uint32_t SSPISR;           /*!< I2C Slave Interrupt Status Register,                 Address offset: 0x2C */
+  __IO uint32_t SSPSR;            /*!< I2C Slave Status Register,                           Address offset: 0x30 */
   __IO uint32_t SSPBUF;           /*!< I2C Slave transfer Buffer,                           Address offset: 0x34 */
-  __IO uint32_t SSPADR;           /*!< I2C Slave Address Register,                          Address offset: 0x38 */        
+  __IO uint32_t SSPADR;           /*!< I2C Slave Address Register,                          Address offset: 0x38 */
 } I2C_Type;
 
 typedef struct
@@ -374,13 +374,13 @@ typedef struct
   __IO uint32_t CR;               /*!< LCD Control Register,                                Address offset: 0x00 */
   __IO uint32_t TEST;             /*!< LCD test Register,                                   Address offset: 0x04 */
   __IO uint32_t FCR;              /*!< LCD Frequency Control Register,                      Address offset: 0x08 */
-  __IO uint32_t FLKT;             /*!< LCD Flick Time Register,                             Address offset: 0x0C */  
+  __IO uint32_t FLKT;             /*!< LCD Flick Time Register,                             Address offset: 0x0C */
   __IO uint32_t RSV0;             /*!< NULL,                                                Address offset: 0x10 */
   __IO uint32_t IER;              /*!< LCD Interrupt Enable Register,                       Address offset: 0x14 */
   __IO uint32_t ISR;              /*!< LCD Interrupt Status Register,                       Address offset: 0x18 */
-  __IO uint32_t RSV1;             /*!< NULL,                                                Address offset: 0x1C */    
-  __IO uint32_t RSV2;             /*!< NULL,                                                Address offset: 0x20 */    
-  __IO uint32_t DATA0;            /*!< LCD data buffer registers 0,                         Address offset: 0x24 */    
+  __IO uint32_t RSV1;             /*!< NULL,                                                Address offset: 0x1C */
+  __IO uint32_t RSV2;             /*!< NULL,                                                Address offset: 0x20 */
+  __IO uint32_t DATA0;            /*!< LCD data buffer registers 0,                         Address offset: 0x24 */
   __IO uint32_t DATA1;            /*!< LCD data buffer registers 1,                         Address offset: 0x28 */
   __IO uint32_t DATA2;            /*!< LCD data buffer registers 2,                         Address offset: 0x2C */
   __IO uint32_t DATA3;            /*!< LCD data buffer registers 3,                         Address offset: 0x30 */
@@ -403,7 +403,7 @@ typedef struct
   __IO uint32_t ARR;              /*!< LPTIM Auto-Reload Register,                          Address offset: 0x0C */
   __IO uint32_t IER;              /*!< LPTIM Interrupt Enable Register,                     Address offset: 0x10 */
   __IO uint32_t ISR;              /*!< LPTIM Interrupt Status Register,                     Address offset: 0x14 */
-  __IO uint32_t CR;               /*!< LPTIM Control Register,                              Address offset: 0x18 */    
+  __IO uint32_t CR;               /*!< LPTIM Control Register,                              Address offset: 0x18 */
   __IO uint32_t RSV;              /*!< RESERVED REGISTER,                                   Address offset: 0x1C */
   __IO uint32_t CCR1;             /*!< LPTIM Capture/Compare Register1,                     Address offset: 0x20 */
   __IO uint32_t CCR2;             /*!< LPTIM Capture/Compare Register2,                     Address offset: 0x24 */
@@ -417,7 +417,7 @@ typedef struct
   __IO uint32_t BMR;              /*!< LPUART Baud rate Modulation Register,                Address offset: 0x0C */
   __IO uint32_t RXBUF;            /*!< LPUART Receive Buffer Register,                      Address offset: 0x10 */
   __IO uint32_t TXBUF;            /*!< LPUART Transmit Buffer Register,                     Address offset: 0x14 */
-  __IO uint32_t DMR;              /*!< LPUART  data Matching Register,                      Address offset: 0x18 */    
+  __IO uint32_t DMR;              /*!< LPUART  data Matching Register,                      Address offset: 0x18 */
 } LPUART_Type;
 
 
@@ -466,8 +466,8 @@ typedef struct
   __IO uint32_t APBRSTCR2;        /*!< APB Peripherals Reset Control Register2     ,        Address offset: 0x5C */
   __IO uint32_t XTHFCR;           /*!< XTHF Control Register                       ,        Address offset: 0x60 */
   __IO uint32_t RCMFCR;           /*!< RCMF Control Register                       ,        Address offset: 0x64 */
-  __IO uint32_t RCMFTR;           /*!< RCHF Trim Register                          ,        Address offset: 0x68 */    
-  __IO uint32_t OPCCR1;           /*!< Peripheral Operation Clock Control Register1,        Address offset: 0x6C */    
+  __IO uint32_t RCMFTR;           /*!< RCHF Trim Register                          ,        Address offset: 0x68 */
+  __IO uint32_t OPCCR1;           /*!< Peripheral Operation Clock Control Register1,        Address offset: 0x6C */
   __IO uint32_t OPCCR2;           /*!< Peripheral Operation Clock Control Register2,        Address offset: 0x70 */
   __IO uint32_t PHYCR;            /*!< PHY Control Register                        ,        Address offset: 0x74 */
   __IO uint32_t PHYBCKCR;         /*!< PHY BCK Control Register                    ,        Address offset: 0x78 */
@@ -491,10 +491,10 @@ typedef struct
   __IO uint32_t DOR;              /*!< RNG OUTPUT REGISTER,                                 Address offset: 0x04 */
   __IO uint32_t RSV1;             /*!< RESERVED REGISTER,                                   Address offset: 0x08 */
   __IO uint32_t RSV2;             /*!< RESERVED REGISTER,                                   Address offset: 0x0C */
-  __IO uint32_t SR;               /*!< RNG FLAG REGISTER,                                   Address offset: 0x10 */    
-  __IO uint32_t CRCCR;            /*!< RNG CRC CONTROL REGISTER,                            Address offset: 0x14 */    
-  __IO uint32_t CRCDIR;           /*!< RNG CRC INPUT REGISTER,                              Address offset: 0x18 */    
-  __IO uint32_t CRCSR;            /*!< RNG CRC FLAG REGISTER,                               Address offset: 0x1C */        
+  __IO uint32_t SR;               /*!< RNG FLAG REGISTER,                                   Address offset: 0x10 */
+  __IO uint32_t CRCCR;            /*!< RNG CRC CONTROL REGISTER,                            Address offset: 0x14 */
+  __IO uint32_t CRCDIR;           /*!< RNG CRC INPUT REGISTER,                              Address offset: 0x18 */
+  __IO uint32_t CRCSR;            /*!< RNG CRC FLAG REGISTER,                               Address offset: 0x1C */
 } RNG_Type;
 
 typedef struct
@@ -506,9 +506,9 @@ typedef struct
   __IO uint32_t BCDMIN;           /*!< RTC MINITE IN BCD REGISTER,                          Address offset: 0x10 */
   __IO uint32_t BCDHOUR;          /*!< RTC HOUR IN BCD REGISTER,                            Address offset: 0x14 */
   __IO uint32_t BCDDAY;           /*!< RTC DAY IN BCD REGISTER,                             Address offset: 0x18 */
-  __IO uint32_t BCDWEEK;          /*!< RTC WEEK IN BCD REGISTER,                            Address offset: 0x1C */    
-  __IO uint32_t BCDMONTH;         /*!< RTC MONTH IN BCD REGISTER,                           Address offset: 0x20 */    
-  __IO uint32_t BCDYEAR;          /*!< RTC YEAR IN BCD REGISTER,                            Address offset: 0x24 */    
+  __IO uint32_t BCDWEEK;          /*!< RTC WEEK IN BCD REGISTER,                            Address offset: 0x1C */
+  __IO uint32_t BCDMONTH;         /*!< RTC MONTH IN BCD REGISTER,                           Address offset: 0x20 */
+  __IO uint32_t BCDYEAR;          /*!< RTC YEAR IN BCD REGISTER,                            Address offset: 0x24 */
   __IO uint32_t ALARM;            /*!< RTC Alarm Register,                                  Address offset: 0x28 */
   __IO uint32_t TMSEL;            /*!< RTC Time Mark Select,                                Address offset: 0x2C */
   __IO uint32_t ADJUST;           /*!< RTC time Adjust Register,                            Address offset: 0x30 */
@@ -532,7 +532,7 @@ typedef struct
   __IO uint32_t CR2;              /*!< SPI1 Control Register2         */
   __IO uint32_t CR3;              /*!< SPI1 Control Register3         */
   __IO uint32_t IER;              /*!< SPI1 Interrupt Enable Register */
-  __IO uint32_t ISR;              /*!< SPI1 Status Register           */    
+  __IO uint32_t ISR;              /*!< SPI1 Status Register           */
   __IO uint32_t TXBUF;            /*!< SPI1 Transmit Buffer           */
   __IO uint32_t RXBUF;            /*!< SPI1 Receive Buffer            */
 } SPI_Type;
@@ -571,10 +571,10 @@ typedef struct
   __IO uint32_t GINTMSK;          /*!< USB Global Interrupt Mask Register,                  Address offset: 0x18 */
   __IO uint32_t GRXSTSR;          /*!< USB Receive Status Debug Read Register,              Address offset: 0x1C */
   __IO uint32_t GRXSTSP;          /*!< USB Receive Status and Pop Register,                 Address offset: 0x20 */
-  __IO uint32_t GRXFSIZ;          /*!< USB Receive FIFO size Register,                      Address offset: 0x24 */    
-  __IO uint32_t GNPTXFSIZ;        /*!< USB Non-Periodic Transmit FIFO size Register,        Address offset: 0x28 */    
+  __IO uint32_t GRXFSIZ;          /*!< USB Receive FIFO size Register,                      Address offset: 0x24 */
+  __IO uint32_t GNPTXFSIZ;        /*!< USB Non-Periodic Transmit FIFO size Register,        Address offset: 0x28 */
   __IO uint32_t RSV2[10];         /*!< Reserved                                                                  */
-  __IO uint32_t GLPMCFG;          /*!< USB Low-Power-Mode config Register,                  Address offset: 0x54 */    
+  __IO uint32_t GLPMCFG;          /*!< USB Low-Power-Mode config Register,                  Address offset: 0x54 */
   __IO uint32_t RSV3[490];        /*!< Reserved                                                                  */
   __IO uint32_t DCFG;             /*!< USB Device Config Register,                          Address offset: 0x800*/
   __IO uint32_t DCTL;             /*!< USB Device Control Register,                         Address offset: 0x804*/
@@ -635,12 +635,12 @@ typedef struct
   __IO uint32_t PCGCCTL;          /*!< USB Power Control Global Control Register,           Address offset: 0xE00*/
 } USB_Type;
 
-typedef struct 
+typedef struct
 {
-  __IO uint32_t IRCR;             /*!< Infrared modulation Control Register */          
+  __IO uint32_t IRCR;             /*!< Infrared modulation Control Register */
 } UART_COMMON_Type;
-     
-typedef struct 
+
+typedef struct
 {
   __IO uint32_t CSR;              /*!< UART Control Status Register      */
   __IO uint32_t IER;              /*!< UART  Interrupt Enable Register   */
@@ -649,7 +649,7 @@ typedef struct
   __IO uint32_t RXBUF;            /*!< UART  Receive Buffer              */
   __IO uint32_t TXBUF;            /*!< UART Transmit Buffer              */
   __IO uint32_t BGR;              /*!< UART Baud rate Generator Register */
-} UART_Type; 
+} UART_Type;
 
 
 typedef struct
@@ -667,15 +667,15 @@ typedef struct
   __IO uint32_t CNT;              /*!< WWDT Counter Register,                               Address offset: 0x08 */
   __IO uint32_t IER;              /*!< WWDT Interrupt Enable Register,                      Address offset: 0x0C */
   __IO uint32_t ISR;              /*!< WWDT Interrupt Status Register,                      Address offset: 0x10 */
-  __IO uint32_t PSC;              /*!< WWDT Prescaler Register,                             Address offset: 0x14 */    
+  __IO uint32_t PSC;              /*!< WWDT Prescaler Register,                             Address offset: 0x14 */
 } WWDT_Type;
 
 
 
 /** @addtogroup Peripheral_memory_map
   * @{
-  */       
-#define FLASH_BASE            0x00000000UL /*!< FLASH(up to 1 MB) base address in the alias region      */    
+  */
+#define FLASH_BASE            0x00000000UL /*!< FLASH(up to 1 MB) base address in the alias region      */
 #define SRAM_BASE             0x20000000UL
 #define PERIPH_BASE           0x40000000UL
 
@@ -697,9 +697,9 @@ typedef struct
 #define U7816_BASE            (PERIPH_BASE + 0x00010000UL)
 #define LPUART0_BASE          (PERIPH_BASE + 0x00010400UL)
 #define SPI2_BASE             (PERIPH_BASE + 0x00010800UL)
-#define LCD_BASE              (PERIPH_BASE + 0x00010C00UL)    
+#define LCD_BASE              (PERIPH_BASE + 0x00010C00UL)
 #define RTC_BASE              (PERIPH_BASE + 0x00011000UL)
-#define IWDT_BASE             (PERIPH_BASE + 0x00011400UL)    
+#define IWDT_BASE             (PERIPH_BASE + 0x00011400UL)
 #define WWDT_BASE             (PERIPH_BASE + 0x00011800UL)
 #define UART0_BASE            (PERIPH_BASE + 0x00011C00UL)
 #define UART1_BASE            (PERIPH_BASE + 0x00012000UL)
@@ -707,13 +707,13 @@ typedef struct
 #define LPTIM32_BASE          (PERIPH_BASE + 0x00013400UL)
 #define GPTIM0_BASE           (PERIPH_BASE + 0x00013800UL)
 #define GPTIM1_BASE           (PERIPH_BASE + 0x00013C00UL)
-#define CRC_BASE              (PERIPH_BASE + 0x00018000UL)    
+#define CRC_BASE              (PERIPH_BASE + 0x00018000UL)
 #define LPUART1_BASE          (PERIPH_BASE + 0x00018400UL)
 #define SPI1_BASE             (PERIPH_BASE + 0x00018C00UL)
 #define DIVAS_BASE            (PERIPH_BASE + 0x00019000UL)
-#define UART_COMMON_BASE      (PERIPH_BASE + 0x00019C00UL)    
-#define UART4_BASE            (PERIPH_BASE + 0x0001A000UL)    
-#define UART5_BASE            (PERIPH_BASE + 0x0001A400UL)    
+#define UART_COMMON_BASE      (PERIPH_BASE + 0x00019C00UL)
+#define UART4_BASE            (PERIPH_BASE + 0x0001A000UL)
+#define UART5_BASE            (PERIPH_BASE + 0x0001A400UL)
 #define RMU_BASE              (PERIPH_BASE + 0x0001A800UL)
 #define VREF_BASE             (PERIPH_BASE + 0x0001A80CUL)
 #define SVD_BASE              (PERIPH_BASE + 0x0001A824UL)

bsp/fm33lc026/libraries/FM/FM33xx/Include/fm33lg0xx.h

@@ -6,7 +6,7 @@
  * @version  V0.0.1
  * @date     14 july 2020
  *
- * @note     Generated with SVDConv V2.87e 
+ * @note     Generated with SVDConv V2.87e
  *           from CMSIS SVD File 'FM33LG0XX.SVD' Version 1.0,
  *
  * @par      ARM Limited (ARM) is supplying this software for use with Cortex-M
@@ -45,7 +45,7 @@ extern "C" {
 #define __XTLF_CLOCK                (32768)          /* Value of the EXTERNAL oscillator in Hz */
 
 /**
-  * @brief Configuration of the Cortex-M0 Processor and Core Peripherals 
+  * @brief Configuration of the Cortex-M0 Processor and Core Peripherals
   */
 #define __CM0_REV                    0x0100U /*!< Cortex-M0 Core Revision                                               */
 #define __MPU_PRESENT                1U      /*!< MPU present or not                                                    */
@@ -55,10 +55,10 @@ extern "C" {
 /* -------------------------  Interrupt Number Definition  ------------------------ */
 
 /**
- * @brief FM33LG0XX Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
+ * @brief FM33LG0XX Interrupt Number Definition, according to the selected device
+ *        in @ref Library_configuration_section
  */
- 
+
 typedef enum {
 /******  Cortex-M0 Processor Exceptions Numbers ****************************************************************/
   Reset_IRQn                    = -15,              /*!<   1  复位向量 */
@@ -71,7 +71,7 @@ typedef enum {
 /* --------------------  FM33LG0XX specific Interrupt Numbers  --------------------*/
   WWDT_IRQn                     = 0,                /*!<   0  窗口看门狗或独立看门狗中断 */
   SVD_IRQn                      = 1,                /*!<   1  电源监测报警中断 */
-  RTCx_IRQn            		      = 2,                /*!<   2  实时时钟中断 */
+  RTCx_IRQn                       = 2,                /*!<   2  实时时钟中断 */
   FLASH_IRQn                    = 3,                /*!<   3  NVMIF中断 */
   FDET_IRQn                     = 4,                /*!<   4  XTLF或XTHF停振检测中断、系统时钟选择错误中断 */
   ADC_IRQn                      = 5,                /*!<   5  ADC转换完成中断 */
@@ -769,7 +769,7 @@ typedef struct
   __IO uint32_t TMSEL;                  /*!<  RTCA Time Mark Select,                                Address offset: 0x2C */
   __IO uint32_t ADJUST;                 /*!<  RTCA time Adjust Register,                            Address offset: 0x30 */
   __IO uint32_t ADSIGN;                 /*!<  RTCA time Adjust Sign Register,                       Address offset: 0x34 */
-  __IO uint32_t RSV1;                   /*!<  RESERVED REGISTER,                                    Address offset: 0x38 */  
+  __IO uint32_t RSV1;                   /*!<  RESERVED REGISTER,                                    Address offset: 0x38 */
   __IO uint32_t SBSCNT;                 /*!<  RTCA Sub-Second Counter,                              Address offset: 0x3C */
   __IO uint32_t CR;                     /*!<  RTCA Control Register,                                Address offset: 0x40 */
 }RTCA_Type;

bsp/fm33lc026/libraries/FM/FM33xx/Include/fm33xx.h

@@ -17,24 +17,24 @@
   * See the Mulan PSL v1 for more details.
   *
   ****************************************************************************************************
-  */ 
+  */
 
 /** @addtogroup CMSIS
   * @{
   */
-    
+
 #ifndef __FM33xx_H
 #define __FM33xx_H
 
 #ifdef __cplusplus
  extern "C" {
 #endif /* __cplusplus */
-   
+
 /** @addtogroup Library_configuration_section
   * @{
   */
-         
-     
+
+
 /**
   * @brief FM33 Family
   */
@@ -52,7 +52,7 @@
                                          |(__FM33x0xx_CMSIS_VERSION_SUB1 << 16)\
                                          |(__FM33x0xx_CMSIS_VERSION_SUB2 << 8 )\
                                          |(__FM33x0xx_CMSIS_VERSION_RC))
-                                             
+
 /**
   * @}
   */
@@ -105,6 +105,6 @@
 /**
   * @}
   */
-  
+
 
 /************************ (C) COPYRIGHT Fudan Microelectronics *****END OF FILE****/

bsp/fm33lc026/libraries/FM/FM33xx/Include/system_fm33lc0xx.h

@@ -46,7 +46,7 @@ extern "C" {
 #include <stdint.h>
 #include <stdio.h>
 #include "fm33lc0xx.h"
-    
+
 #define   USE_LSCLK_CLOCK_SRC_XTLF
 
 //#define   SYSCLK_SRC_RC4M
@@ -54,8 +54,8 @@ extern "C" {
 #define   SYSCLK_SRC_RCHF
 //#define   SYSCLK_SRC_PLL
 
-    
-    
+
+
 //#define   USE_PLL_CLOCK_SRC_RCHF
 //#define   USE_PLL_CLOCK_SRC_XTHF
 
@@ -77,11 +77,11 @@ extern "C" {
 
 #if !defined  (XTHF_VALUE)
     #define XTHF_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* XTHF_VALUE */    
+#endif /* XTHF_VALUE */
 
 #if !defined  (XTLF_VALUE)
     #define XTLF_VALUE    ((uint32_t)32768U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* XTLF_VALUE */         
+#endif /* XTLF_VALUE */
 
 
 #define LDT_CHECK(_N_VALUE_, _T_VALUE_)                         \
@@ -89,9 +89,9 @@ extern "C" {
                             ((~_N_VALUE_) & 0xffff)) ? _N_VALUE_ : _T_VALUE_)
 
 #define LPOSC_LDT_TRIM      (*(uint32_t *)0x1FFFFB20)   // LPOSC 常温校准值
-#define RCHF8M_LDT_TRIM     (*(uint32_t *)0x1FFFFB40)	// RC8M 常温校准值
-#define RCHF16M_LDT_TRIM 	(*(uint32_t *)0x1FFFFB3C)	// RC16M 常温校准值
-#define RCHF24M_LDT_TRIM 	(*(uint32_t *)0x1FFFFB38)	// RC24M 常温校准值
+#define RCHF8M_LDT_TRIM     (*(uint32_t *)0x1FFFFB40)   // RC8M 常温校准值
+#define RCHF16M_LDT_TRIM    (*(uint32_t *)0x1FFFFB3C)   // RC16M 常温校准值
+#define RCHF24M_LDT_TRIM    (*(uint32_t *)0x1FFFFB38)   // RC24M 常温校准值
 #define RCMF4M_LDT_TRIM     (*(uint32_t *)0x1FFFFB44)   // RCMF 常温校准值
 
 #define LPOSC_TRIM          (LDT_CHECK(LPOSC_LDT_TRIM, 0x80) & 0xff)
@@ -99,7 +99,7 @@ extern "C" {
 #define RCHF8M_TRIM         (LDT_CHECK(RCHF8M_LDT_TRIM, 0x40) & 0x7f)
 #define RCHF16M_TRIM        (LDT_CHECK(RCHF16M_LDT_TRIM, 0x40) & 0x7f)
 #define RCHF24M_TRIM        (LDT_CHECK(RCHF24M_LDT_TRIM, 0x40) & 0x7f)
-         
+
 
 #define __SYSTEM_CLOCK      (8000000)
 
@@ -111,7 +111,7 @@ typedef  struct
 {
     /* 中断抢占优先级 */
     uint32_t preemptPriority;
-    
+
 }NVIC_ConfigTypeDef;
 
 
@@ -138,13 +138,13 @@ void SystemInit (void);
 extern uint32_t SystemCoreClock;
 void SystemCoreClockUpdate (void);
 /**
-  * @brief	NVIC_Init config NVIC
+  * @brief  NVIC_Init config NVIC
   *
-  * @param 	NVIC_configStruct configParams
+  * @param  NVIC_configStruct configParams
   *
-  * @param 	IRQn Interrupt number
+  * @param  IRQn Interrupt number
   *
-  * @retval	None
+  * @retval None
   */
 void NVIC_Init(NVIC_ConfigTypeDef  *NVIC_configStruct,IRQn_Type IRQn);
 

bsp/fm33lc026/libraries/FM/FM33xx/Include/system_fm33lg0xx.h

@@ -46,17 +46,17 @@ extern "C" {
 #include <stdint.h>
 #include <stdio.h>
 #include "fm33lg0xx.h"
-            
+
 
 #if !defined  (XTHF_VALUE)
     #define XTHF_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* XTHF_VALUE */    
+#endif /* XTHF_VALUE */
 
 #if !defined  (XTLF_VALUE)
     #define XTLF_VALUE    ((uint32_t)32768U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* XTLF_VALUE */        
-    
-    
+#endif /* XTLF_VALUE */
+
+
 #define __SYSTEM_CLOCK          (8000000)
 #define DELAY_US                (__SYSTEM_CLOCK/1000000)
 #define DELAY_MS                (__SYSTEM_CLOCK/1000)
@@ -64,12 +64,12 @@ extern "C" {
 
 #define Do_DelayStart()  { \
                         uint32_t LastTick = SysTick->VAL;   do {
-                        
+
 #define While_DelayMsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_MS*Count); \
                       }
-                      
+
 #define While_DelayUsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_US*Count); \
-}            
+}
 
 /**
  * Initialize the system

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/core_cm0plus.h

@@ -22,7 +22,7 @@
  * limitations under the License.
  */
 
-#if   defined ( __ICCARM__ ) 
+#if   defined ( __ICCARM__ )
  #pragma system_include         /* treat file as system include file for MISRA check */
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
   #pragma clang system_header   /* treat file as system include file */

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/core_cmFunc.h

@@ -552,7 +552,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t v
 /** \brief  Set Base Priority with condition
 
     This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-	or the new value increases the BASEPRI priority level.
+    or the new value increases the BASEPRI priority level.
 
     \param [in]    basePri  Base Priority value to set
  */

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/fm33_assert.h

@@ -24,8 +24,8 @@
 #ifdef __cplusplus
  extern "C" {
 #endif
-     
-     
+
+
 #ifdef  USE_FULL_ASSERT
 #define assert_param(expr) do{if((expr) == 0)for(;;);}while(0)
 #else

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/fm33lc0xx.h

@@ -8,24 +8,24 @@
  * @version  V0.0.1
  * @date     13. august 2019
  *
- * @note     Generated with SVDConv V2.87e 
+ * @note     Generated with SVDConv V2.87e
  *           from CMSIS SVD File 'FM33LC0XX.SVD' Version 1.0,
  *
  * @par      ARM Limited (ARM) is supplying this software for use with Cortex-M
  *           processor based microcontroller, but can be equally used for other
  *           suitable processor architectures. This file can be freely distributed.
  *           Modifications to this file shall be clearly marked.
- *           
+ *
  *           THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  *           OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  *           MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  *           ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- *           CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. 
+ *           CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  *
  *******************************************************************************************************/
 
 
-/** @addtogroup Keil
+/** @addtogroup CMSIS
   * @{
   */
 
@@ -41,7 +41,7 @@ extern "C" {
 #endif /* __cplusplus */
 
 /**
-  * @brief Configuration of the Cortex-M0 Processor and Core Peripherals 
+  * @brief Configuration of the Cortex-M0 Processor and Core Peripherals
   */
 #define __CM0_REV                    0x0100U /*!< Cortex-M0 Core Revision                                               */
 #define __MPU_PRESENT                0U      /*!< MPU present or not                                                    */
@@ -51,8 +51,8 @@ extern "C" {
 
 
 /**
- * @brief FM33LC0XX Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
+ * @brief FM33LC0XX Interrupt Number Definition, according to the selected device
+ *        in @ref Library_configuration_section
  */
 typedef enum {
 /******  Cortex-M0 Processor Exceptions Numbers ****************************************************************/
@@ -66,7 +66,7 @@ typedef enum {
   WWDT_IRQn                     = 0,       /*!<  0    Window WatchDog Interrupt                                */
   SVD_IRQn                      = 1,       /*!<  1    SVD Interrupt                                            */
   RTC_IRQn                      = 2,       /*!<  2    RTC Interrupt                                            */
-  FLASH_IRQn                    = 3,       /*!<  3    FLASH global Interrupt                                   */ 
+  FLASH_IRQn                    = 3,       /*!<  3    FLASH global Interrupt                                   */
   LFDET_IRQn                    = 4,       /*!<  4    LFDET Interrupt                                          */
   ADC_IRQn                      = 5,       /*!<  5    ADC Interrupt                                            */
   IWDT_IRQn                     = 6,       /*!<  6    IWDT Interrupt                                           */
@@ -76,13 +76,13 @@ typedef enum {
   UART0_IRQn                    = 10,      /*!<  10   UART0 global Interrupt                                   */
   UART1_IRQn                    = 11,      /*!<  11   UART1 global Interrupt                                   */
   UART4_IRQn                    = 12,      /*!<  12   UART4 global Interrupt                                   */
-  UART5_IRQn                    = 13,      /*!<  13   UART5 global Interrupt                                   */ 
+  UART5_IRQn                    = 13,      /*!<  13   UART5 global Interrupt                                   */
   HFDET_IRQn                    = 14,      /*!<  14   HFDET Interrupt                                          */
   U7816_IRQn                    = 15,      /*!<  15   U7816 Interrupt                                          */
   LPUART1_IRQn                  = 16,      /*!<  16   LPUART1 Interrupt                                        */
   I2C_IRQn                      = 17,      /*!<  17   I2C global Interrupt                                     */
   USB_IRQn                      = 18,      /*!<  18   USB Interrupt                                            */
-  AES_IRQn                      = 19,      /*!<  19   AES Interrupt                                            */ 
+  AES_IRQn                      = 19,      /*!<  19   AES Interrupt                                            */
   LPTIM_IRQn                    = 20,      /*!<  20   LPTIM Interrupt                                          */
   DMA_IRQn                      = 21,      /*!<  21   DMA Interrupt                                            */
   WKUP_IRQn                     = 22,      /*!<  22   WKUP Interrupt                                           */
@@ -108,16 +108,16 @@ typedef enum {
 /* ================================================================================ */
 
 
-#include "core_cm0plus.h"                            /*!< Cortex-M0 processor and core peripherals                           */
-#include "system_fm33lc0xx.h"                        /*!< FM33LC0XX System                                                        */
+#include "core_cm0plus.h"                            /*!< Cortex-M0 processor and core peripherals             */
+#include "system_fm33lc0xx.h"                        /*!< FM33LC0XX System                                     */
 #include <stdint.h>
 
 /** @addtogroup Peripheral_registers_structures
   * @{
-  */   
+  */
 
-/** 
-  * @brief Analog to Digital Converter  
+/**
+  * @brief Analog to Digital Converter
   */
 typedef struct
 {
@@ -142,9 +142,9 @@ typedef struct
   __IO uint32_t KEY0;             /*!< AES Key Register 0,                                  Address offset: 0x14 */
   __IO uint32_t KEY1;             /*!< AES Key Register 1,                                  Address offset: 0x18 */
   __IO uint32_t KEY2;             /*!< AES Key Register 2,                                  Address offset: 0x1C */
-  __IO uint32_t KEY3;             /*!< AES Key Register 3,                                  Address offset: 0x20 */    
-  __IO uint32_t KEY4;             /*!< AES Key Register 4,                                  Address offset: 0x24 */    
-  __IO uint32_t KEY5;             /*!< AES Key Register 5,                                  Address offset: 0x28 */    
+  __IO uint32_t KEY3;             /*!< AES Key Register 3,                                  Address offset: 0x20 */
+  __IO uint32_t KEY4;             /*!< AES Key Register 4,                                  Address offset: 0x24 */
+  __IO uint32_t KEY5;             /*!< AES Key Register 5,                                  Address offset: 0x28 */
   __IO uint32_t KEY6;             /*!< AES Key Register 6,                                  Address offset: 0x2C */
   __IO uint32_t KEY7;             /*!< AES Key Register 7,                                  Address offset: 0x30 */
   __IO uint32_t IVR0;             /*!< AES Initial Vector Register 0,                       Address offset: 0x34 */
@@ -227,7 +227,7 @@ typedef struct
   __IO uint32_t RSV;
   __IO uint32_t CR;               /*!< Debug Configuration Register */
   __IO uint32_t HDFR;             /*!< HardFault Flag Register*/
-    
+
 } DBG_Type;
 
 typedef struct
@@ -236,7 +236,7 @@ typedef struct
   __IO uint32_t CH0CR;            /*!< Channel 0 Control Register          ,                Address offset: 0x04 */
   __IO uint32_t CH0MAD;           /*!< Channel 0 Memory Address Register   ,                Address offset: 0x08 */
   __IO uint32_t CH1CR;            /*!< Channel 1 Control Register          ,                Address offset: 0x0C */
-  __IO uint32_t CH1MAD;           /*!< Channel 1 Memory Address Register   ,                Address offset: 0x10 */    
+  __IO uint32_t CH1MAD;           /*!< Channel 1 Memory Address Register   ,                Address offset: 0x10 */
   __IO uint32_t CH2CR;            /*!< Channel 2 Control Register          ,                Address offset: 0x14 */
   __IO uint32_t CH2MAD;           /*!< Channel 2 Memory Address Register   ,                Address offset: 0x18 */
   __IO uint32_t CH3CR;            /*!< Channel 3 Control Register          ,                Address offset: 0x1C */
@@ -270,7 +270,7 @@ typedef struct
   __IO uint32_t EPCR;             /*!< Flash Erase/Program Control Register,                Address offset: 0x14 */
   __IO uint32_t KEY;              /*!< Flash Key Register,                                  Address offset: 0x18 */
   __IO uint32_t IER;              /*!< Flash Interrupt Enable Register,                     Address offset: 0x1C */
-  __IO uint32_t ISR;              /*!< Flash Interrupt Status Register,                     Address offset: 0x20 */    
+  __IO uint32_t ISR;              /*!< Flash Interrupt Status Register,                     Address offset: 0x20 */
 } FLASH_Type;
 
 typedef struct
@@ -279,7 +279,7 @@ typedef struct
   __IO uint32_t PUEN;             /*!< Pull-Up Enable Register        */
   __IO uint32_t ODEN;             /*!< Open-Drain Enable Register     */
   __IO uint32_t FCR;              /*!< Function Control Register      */
-  __IO uint32_t DO;               /*!< Data Output Register           */    
+  __IO uint32_t DO;               /*!< Data Output Register           */
   __O  uint32_t DSET;             /*!< Data Set Register              */
   __O  uint32_t DRST;             /*!< Data Reset Register            */
   __I uint32_t  DIN;              /*!< Data Input RegisterR           */
@@ -294,7 +294,7 @@ typedef struct
   __IO uint32_t EXTIEDS;          /*!< External Interrupt Edge Select and Enable Register  */
   __IO uint32_t EXTIDF;           /*!< External Interrupt Digital Filter Register          */
   __IO uint32_t EXTIISR;          /*!< External Interrupt and Status Register              */
-  __IO uint32_t EXTIDI;           /*!< External Interrupt Data Input Register              */    
+  __IO uint32_t EXTIDI;           /*!< External Interrupt Data Input Register              */
   __IO uint32_t RSV0[59];         /*!< RESERVED REGISTER                                   */
   __IO uint32_t FOUTSEL;          /*!< Frequency Output Select Register                    */
   __IO uint32_t RSV1[63];         /*!< RESERVED REGISTER                                   */
@@ -336,7 +336,7 @@ typedef struct
   __IO uint32_t SOR;              /*!< Divisor Regsiter,                                    Address offset: 0x04 */
   __IO uint32_t QUOT;             /*!< Quotient Register,                                   Address offset: 0x08 */
   __IO uint32_t REMD;             /*!< Reminder Register,                                   Address offset: 0x0C */
-  __IO uint32_t SR;               /*!< Status Register,                                     Address offset: 0x10 */   
+  __IO uint32_t SR;               /*!< Status Register,                                     Address offset: 0x10 */
 } DIV_Type;
 
 
@@ -349,14 +349,14 @@ typedef struct
   __IO uint32_t MSPSR;            /*!< I2C Master Status Register,                          Address offset: 0x10 */
   __IO uint32_t MSPBGR;           /*!< I2C Master Baud rate Generator Register,             Address offset: 0x14 */
   __IO uint32_t MSPBUF;           /*!< I2C Master transfer Buffer,                          Address offset: 0x18 */
-  __IO uint32_t MSPTCR;           /*!< I2C Master Timing Control Register,                  Address offset: 0x1C */    
-  __IO uint32_t MSPTOR;           /*!< I2C Master Time-Out Register,                        Address offset: 0x20 */    
-  __IO uint32_t SSPCR;            /*!< I2C Slave Control Register,                          Address offset: 0x24 */        
-  __IO uint32_t SSPIER;           /*!< I2C Slave Interrupt Enable Register,                 Address offset: 0x28 */        
-  __IO uint32_t SSPISR;           /*!< I2C Slave Interrupt Status Register,                 Address offset: 0x2C */        
-  __IO uint32_t SSPSR;            /*!< I2C Slave Status Register,                           Address offset: 0x30 */    
+  __IO uint32_t MSPTCR;           /*!< I2C Master Timing Control Register,                  Address offset: 0x1C */
+  __IO uint32_t MSPTOR;           /*!< I2C Master Time-Out Register,                        Address offset: 0x20 */
+  __IO uint32_t SSPCR;            /*!< I2C Slave Control Register,                          Address offset: 0x24 */
+  __IO uint32_t SSPIER;           /*!< I2C Slave Interrupt Enable Register,                 Address offset: 0x28 */
+  __IO uint32_t SSPISR;           /*!< I2C Slave Interrupt Status Register,                 Address offset: 0x2C */
+  __IO uint32_t SSPSR;            /*!< I2C Slave Status Register,                           Address offset: 0x30 */
   __IO uint32_t SSPBUF;           /*!< I2C Slave transfer Buffer,                           Address offset: 0x34 */
-  __IO uint32_t SSPADR;           /*!< I2C Slave Address Register,                          Address offset: 0x38 */        
+  __IO uint32_t SSPADR;           /*!< I2C Slave Address Register,                          Address offset: 0x38 */
 } I2C_Type;
 
 typedef struct
@@ -374,13 +374,13 @@ typedef struct
   __IO uint32_t CR;               /*!< LCD Control Register,                                Address offset: 0x00 */
   __IO uint32_t TEST;             /*!< LCD test Register,                                   Address offset: 0x04 */
   __IO uint32_t FCR;              /*!< LCD Frequency Control Register,                      Address offset: 0x08 */
-  __IO uint32_t FLKT;             /*!< LCD Flick Time Register,                             Address offset: 0x0C */  
+  __IO uint32_t FLKT;             /*!< LCD Flick Time Register,                             Address offset: 0x0C */
   __IO uint32_t RSV0;             /*!< NULL,                                                Address offset: 0x10 */
   __IO uint32_t IER;              /*!< LCD Interrupt Enable Register,                       Address offset: 0x14 */
   __IO uint32_t ISR;              /*!< LCD Interrupt Status Register,                       Address offset: 0x18 */
-  __IO uint32_t RSV1;             /*!< NULL,                                                Address offset: 0x1C */    
-  __IO uint32_t RSV2;             /*!< NULL,                                                Address offset: 0x20 */    
-  __IO uint32_t DATA0;            /*!< LCD data buffer registers 0,                         Address offset: 0x24 */    
+  __IO uint32_t RSV1;             /*!< NULL,                                                Address offset: 0x1C */
+  __IO uint32_t RSV2;             /*!< NULL,                                                Address offset: 0x20 */
+  __IO uint32_t DATA0;            /*!< LCD data buffer registers 0,                         Address offset: 0x24 */
   __IO uint32_t DATA1;            /*!< LCD data buffer registers 1,                         Address offset: 0x28 */
   __IO uint32_t DATA2;            /*!< LCD data buffer registers 2,                         Address offset: 0x2C */
   __IO uint32_t DATA3;            /*!< LCD data buffer registers 3,                         Address offset: 0x30 */
@@ -403,7 +403,7 @@ typedef struct
   __IO uint32_t ARR;              /*!< LPTIM Auto-Reload Register,                          Address offset: 0x0C */
   __IO uint32_t IER;              /*!< LPTIM Interrupt Enable Register,                     Address offset: 0x10 */
   __IO uint32_t ISR;              /*!< LPTIM Interrupt Status Register,                     Address offset: 0x14 */
-  __IO uint32_t CR;               /*!< LPTIM Control Register,                              Address offset: 0x18 */    
+  __IO uint32_t CR;               /*!< LPTIM Control Register,                              Address offset: 0x18 */
   __IO uint32_t RSV;              /*!< RESERVED REGISTER,                                   Address offset: 0x1C */
   __IO uint32_t CCR1;             /*!< LPTIM Capture/Compare Register1,                     Address offset: 0x20 */
   __IO uint32_t CCR2;             /*!< LPTIM Capture/Compare Register2,                     Address offset: 0x24 */
@@ -417,7 +417,7 @@ typedef struct
   __IO uint32_t BMR;              /*!< LPUART Baud rate Modulation Register,                Address offset: 0x0C */
   __IO uint32_t RXBUF;            /*!< LPUART Receive Buffer Register,                      Address offset: 0x10 */
   __IO uint32_t TXBUF;            /*!< LPUART Transmit Buffer Register,                     Address offset: 0x14 */
-  __IO uint32_t DMR;              /*!< LPUART  data Matching Register,                      Address offset: 0x18 */    
+  __IO uint32_t DMR;              /*!< LPUART  data Matching Register,                      Address offset: 0x18 */
 } LPUART_Type;
 
 
@@ -466,8 +466,8 @@ typedef struct
   __IO uint32_t APBRSTCR2;        /*!< APB Peripherals Reset Control Register2     ,        Address offset: 0x5C */
   __IO uint32_t XTHFCR;           /*!< XTHF Control Register                       ,        Address offset: 0x60 */
   __IO uint32_t RCMFCR;           /*!< RCMF Control Register                       ,        Address offset: 0x64 */
-  __IO uint32_t RCMFTR;           /*!< RCHF Trim Register                          ,        Address offset: 0x68 */    
-  __IO uint32_t OPCCR1;           /*!< Peripheral Operation Clock Control Register1,        Address offset: 0x6C */    
+  __IO uint32_t RCMFTR;           /*!< RCHF Trim Register                          ,        Address offset: 0x68 */
+  __IO uint32_t OPCCR1;           /*!< Peripheral Operation Clock Control Register1,        Address offset: 0x6C */
   __IO uint32_t OPCCR2;           /*!< Peripheral Operation Clock Control Register2,        Address offset: 0x70 */
   __IO uint32_t PHYCR;            /*!< PHY Control Register                        ,        Address offset: 0x74 */
   __IO uint32_t PHYBCKCR;         /*!< PHY BCK Control Register                    ,        Address offset: 0x78 */
@@ -491,10 +491,10 @@ typedef struct
   __IO uint32_t DOR;              /*!< RNG OUTPUT REGISTER,                                 Address offset: 0x04 */
   __IO uint32_t RSV1;             /*!< RESERVED REGISTER,                                   Address offset: 0x08 */
   __IO uint32_t RSV2;             /*!< RESERVED REGISTER,                                   Address offset: 0x0C */
-  __IO uint32_t SR;               /*!< RNG FLAG REGISTER,                                   Address offset: 0x10 */    
-  __IO uint32_t CRCCR;            /*!< RNG CRC CONTROL REGISTER,                            Address offset: 0x14 */    
-  __IO uint32_t CRCDIR;           /*!< RNG CRC INPUT REGISTER,                              Address offset: 0x18 */    
-  __IO uint32_t CRCSR;            /*!< RNG CRC FLAG REGISTER,                               Address offset: 0x1C */        
+  __IO uint32_t SR;               /*!< RNG FLAG REGISTER,                                   Address offset: 0x10 */
+  __IO uint32_t CRCCR;            /*!< RNG CRC CONTROL REGISTER,                            Address offset: 0x14 */
+  __IO uint32_t CRCDIR;           /*!< RNG CRC INPUT REGISTER,                              Address offset: 0x18 */
+  __IO uint32_t CRCSR;            /*!< RNG CRC FLAG REGISTER,                               Address offset: 0x1C */
 } RNG_Type;
 
 typedef struct
@@ -506,9 +506,9 @@ typedef struct
   __IO uint32_t BCDMIN;           /*!< RTC MINITE IN BCD REGISTER,                          Address offset: 0x10 */
   __IO uint32_t BCDHOUR;          /*!< RTC HOUR IN BCD REGISTER,                            Address offset: 0x14 */
   __IO uint32_t BCDDAY;           /*!< RTC DAY IN BCD REGISTER,                             Address offset: 0x18 */
-  __IO uint32_t BCDWEEK;          /*!< RTC WEEK IN BCD REGISTER,                            Address offset: 0x1C */    
-  __IO uint32_t BCDMONTH;         /*!< RTC MONTH IN BCD REGISTER,                           Address offset: 0x20 */    
-  __IO uint32_t BCDYEAR;          /*!< RTC YEAR IN BCD REGISTER,                            Address offset: 0x24 */    
+  __IO uint32_t BCDWEEK;          /*!< RTC WEEK IN BCD REGISTER,                            Address offset: 0x1C */
+  __IO uint32_t BCDMONTH;         /*!< RTC MONTH IN BCD REGISTER,                           Address offset: 0x20 */
+  __IO uint32_t BCDYEAR;          /*!< RTC YEAR IN BCD REGISTER,                            Address offset: 0x24 */
   __IO uint32_t ALARM;            /*!< RTC Alarm Register,                                  Address offset: 0x28 */
   __IO uint32_t TMSEL;            /*!< RTC Time Mark Select,                                Address offset: 0x2C */
   __IO uint32_t ADJUST;           /*!< RTC time Adjust Register,                            Address offset: 0x30 */
@@ -532,7 +532,7 @@ typedef struct
   __IO uint32_t CR2;              /*!< SPI1 Control Register2         */
   __IO uint32_t CR3;              /*!< SPI1 Control Register3         */
   __IO uint32_t IER;              /*!< SPI1 Interrupt Enable Register */
-  __IO uint32_t ISR;              /*!< SPI1 Status Register           */    
+  __IO uint32_t ISR;              /*!< SPI1 Status Register           */
   __IO uint32_t TXBUF;            /*!< SPI1 Transmit Buffer           */
   __IO uint32_t RXBUF;            /*!< SPI1 Receive Buffer            */
 } SPI_Type;
@@ -571,14 +571,15 @@ typedef struct
   __IO uint32_t GINTMSK;          /*!< USB Global Interrupt Mask Register,                  Address offset: 0x18 */
   __IO uint32_t GRXSTSR;          /*!< USB Receive Status Debug Read Register,              Address offset: 0x1C */
   __IO uint32_t GRXSTSP;          /*!< USB Receive Status and Pop Register,                 Address offset: 0x20 */
-  __IO uint32_t GRXFSIZ;          /*!< USB Receive FIFO size Register,                      Address offset: 0x24 */    
-  __IO uint32_t GNPTXFSIZ;        /*!< USB Non-Periodic Transmit FIFO size Register,        Address offset: 0x28 */    
+  __IO uint32_t GRXFSIZ;          /*!< USB Receive FIFO size Register,                      Address offset: 0x24 */
+  __IO uint32_t GNPTXFSIZ;        /*!< USB Non-Periodic Transmit FIFO size Register,        Address offset: 0x28 */
   __IO uint32_t RSV2[10];         /*!< Reserved                                                                  */
-  __IO uint32_t GLPMCFG;          /*!< USB Low-Power-Mode config Register,                  Address offset: 0x54 */    
+  __IO uint32_t GLPMCFG;          /*!< USB Low-Power-Mode config Register,                  Address offset: 0x54 */
   __IO uint32_t RSV3[490];        /*!< Reserved                                                                  */
   __IO uint32_t DCFG;             /*!< USB Device Config Register,                          Address offset: 0x800*/
   __IO uint32_t DCTL;             /*!< USB Device Control Register,                         Address offset: 0x804*/
   __IO uint32_t DSTS;             /*!< USB Device Status Register,                          Address offset: 0x808*/
+  __IO uint32_t RSV31;            /*!< Reserved ,                                          Address offset: 0x80C*/
   __IO uint32_t DIEPMSK;          /*!< USB Device In Endpoint Interrupt Mask Register,      Address offset: 0x810*/
   __IO uint32_t DOEPMSK;          /*!< USB Device OUT Endpoint Interrupt Mask Registe,      Address offset: 0x814*/
   __IO uint32_t DAINT;            /*!< USB Device All Endpoint Interrupt Register,          Address offset: 0x818*/
@@ -635,12 +636,12 @@ typedef struct
   __IO uint32_t PCGCCTL;          /*!< USB Power Control Global Control Register,           Address offset: 0xE00*/
 } USB_Type;
 
-typedef struct 
+typedef struct
 {
-  __IO uint32_t IRCR;             /*!< Infrared modulation Control Register */          
+  __IO uint32_t IRCR;             /*!< Infrared modulation Control Register */
 } UART_COMMON_Type;
-     
-typedef struct 
+
+typedef struct
 {
   __IO uint32_t CSR;              /*!< UART Control Status Register      */
   __IO uint32_t IER;              /*!< UART  Interrupt Enable Register   */
@@ -649,7 +650,7 @@ typedef struct
   __IO uint32_t RXBUF;            /*!< UART  Receive Buffer              */
   __IO uint32_t TXBUF;            /*!< UART Transmit Buffer              */
   __IO uint32_t BGR;              /*!< UART Baud rate Generator Register */
-} UART_Type; 
+} UART_Type;
 
 
 typedef struct
@@ -667,15 +668,15 @@ typedef struct
   __IO uint32_t CNT;              /*!< WWDT Counter Register,                               Address offset: 0x08 */
   __IO uint32_t IER;              /*!< WWDT Interrupt Enable Register,                      Address offset: 0x0C */
   __IO uint32_t ISR;              /*!< WWDT Interrupt Status Register,                      Address offset: 0x10 */
-  __IO uint32_t PSC;              /*!< WWDT Prescaler Register,                             Address offset: 0x14 */    
+  __IO uint32_t PSC;              /*!< WWDT Prescaler Register,                             Address offset: 0x14 */
 } WWDT_Type;
 
 
 
 /** @addtogroup Peripheral_memory_map
   * @{
-  */       
-#define FLASH_BASE            0x00000000UL /*!< FLASH(up to 1 MB) base address in the alias region      */    
+  */
+#define FLASH_BASE            0x00000000UL /*!< FLASH(up to 1 MB) base address in the alias region      */
 #define SRAM_BASE             0x20000000UL
 #define PERIPH_BASE           0x40000000UL
 
@@ -697,9 +698,9 @@ typedef struct
 #define U7816_BASE            (PERIPH_BASE + 0x00010000UL)
 #define LPUART0_BASE          (PERIPH_BASE + 0x00010400UL)
 #define SPI2_BASE             (PERIPH_BASE + 0x00010800UL)
-#define LCD_BASE              (PERIPH_BASE + 0x00010C00UL)    
+#define LCD_BASE              (PERIPH_BASE + 0x00010C00UL)
 #define RTC_BASE              (PERIPH_BASE + 0x00011000UL)
-#define IWDT_BASE             (PERIPH_BASE + 0x00011400UL)    
+#define IWDT_BASE             (PERIPH_BASE + 0x00011400UL)
 #define WWDT_BASE             (PERIPH_BASE + 0x00011800UL)
 #define UART0_BASE            (PERIPH_BASE + 0x00011C00UL)
 #define UART1_BASE            (PERIPH_BASE + 0x00012000UL)
@@ -707,13 +708,13 @@ typedef struct
 #define LPTIM32_BASE          (PERIPH_BASE + 0x00013400UL)
 #define GPTIM0_BASE           (PERIPH_BASE + 0x00013800UL)
 #define GPTIM1_BASE           (PERIPH_BASE + 0x00013C00UL)
-#define CRC_BASE              (PERIPH_BASE + 0x00018000UL)    
+#define CRC_BASE              (PERIPH_BASE + 0x00018000UL)
 #define LPUART1_BASE          (PERIPH_BASE + 0x00018400UL)
 #define SPI1_BASE             (PERIPH_BASE + 0x00018C00UL)
 #define DIVAS_BASE            (PERIPH_BASE + 0x00019000UL)
-#define UART_COMMON_BASE      (PERIPH_BASE + 0x00019C00UL)    
-#define UART4_BASE            (PERIPH_BASE + 0x0001A000UL)    
-#define UART5_BASE            (PERIPH_BASE + 0x0001A400UL)    
+#define UART_COMMON_BASE      (PERIPH_BASE + 0x00019C00UL)
+#define UART4_BASE            (PERIPH_BASE + 0x0001A000UL)
+#define UART5_BASE            (PERIPH_BASE + 0x0001A400UL)
 #define RMU_BASE              (PERIPH_BASE + 0x0001A800UL)
 #define VREF_BASE             (PERIPH_BASE + 0x0001A80CUL)
 #define SVD_BASE              (PERIPH_BASE + 0x0001A824UL)

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/fm33lg0xx.h

@@ -6,7 +6,7 @@
  * @version  V0.0.1
  * @date     14 july 2020
  *
- * @note     Generated with SVDConv V2.87e 
+ * @note     Generated with SVDConv V2.87e
  *           from CMSIS SVD File 'FM33LG0XX.SVD' Version 1.0,
  *
  * @par      ARM Limited (ARM) is supplying this software for use with Cortex-M
@@ -45,7 +45,7 @@ extern "C" {
 #define __XTLF_CLOCK                (32768)          /* Value of the EXTERNAL oscillator in Hz */
 
 /**
-  * @brief Configuration of the Cortex-M0 Processor and Core Peripherals 
+  * @brief Configuration of the Cortex-M0 Processor and Core Peripherals
   */
 #define __CM0_REV                    0x0100U /*!< Cortex-M0 Core Revision                                               */
 #define __MPU_PRESENT                1U      /*!< MPU present or not                                                    */
@@ -55,10 +55,10 @@ extern "C" {
 /* -------------------------  Interrupt Number Definition  ------------------------ */
 
 /**
- * @brief FM33LG0XX Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
+ * @brief FM33LG0XX Interrupt Number Definition, according to the selected device
+ *        in @ref Library_configuration_section
  */
- 
+
 typedef enum {
 /******  Cortex-M0 Processor Exceptions Numbers ****************************************************************/
   Reset_IRQn                    = -15,              /*!<   1  复位向量 */
@@ -71,7 +71,7 @@ typedef enum {
 /* --------------------  FM33LG0XX specific Interrupt Numbers  --------------------*/
   WWDT_IRQn                     = 0,                /*!<   0  窗口看门狗或独立看门狗中断 */
   SVD_IRQn                      = 1,                /*!<   1  电源监测报警中断 */
-  RTCx_IRQn            		      = 2,                /*!<   2  实时时钟中断 */
+  RTCx_IRQn                       = 2,                /*!<   2  实时时钟中断 */
   FLASH_IRQn                    = 3,                /*!<   3  NVMIF中断 */
   FDET_IRQn                     = 4,                /*!<   4  XTLF或XTHF停振检测中断、系统时钟选择错误中断 */
   ADC_IRQn                      = 5,                /*!<   5  ADC转换完成中断 */
@@ -769,7 +769,7 @@ typedef struct
   __IO uint32_t TMSEL;                  /*!<  RTCA Time Mark Select,                                Address offset: 0x2C */
   __IO uint32_t ADJUST;                 /*!<  RTCA time Adjust Register,                            Address offset: 0x30 */
   __IO uint32_t ADSIGN;                 /*!<  RTCA time Adjust Sign Register,                       Address offset: 0x34 */
-  __IO uint32_t RSV1;                   /*!<  RESERVED REGISTER,                                    Address offset: 0x38 */  
+  __IO uint32_t RSV1;                   /*!<  RESERVED REGISTER,                                    Address offset: 0x38 */
   __IO uint32_t SBSCNT;                 /*!<  RTCA Sub-Second Counter,                              Address offset: 0x3C */
   __IO uint32_t CR;                     /*!<  RTCA Control Register,                                Address offset: 0x40 */
 }RTCA_Type;

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/fm33xx.h

@@ -17,24 +17,24 @@
   * See the Mulan PSL v1 for more details.
   *
   ****************************************************************************************************
-  */ 
+  */
 
 /** @addtogroup CMSIS
   * @{
   */
-    
+
 #ifndef __FM33xx_H
 #define __FM33xx_H
 
 #ifdef __cplusplus
  extern "C" {
 #endif /* __cplusplus */
-   
+
 /** @addtogroup Library_configuration_section
   * @{
   */
-         
-     
+
+
 /**
   * @brief FM33 Family
   */
@@ -52,7 +52,7 @@
                                          |(__FM33x0xx_CMSIS_VERSION_SUB1 << 16)\
                                          |(__FM33x0xx_CMSIS_VERSION_SUB2 << 8 )\
                                          |(__FM33x0xx_CMSIS_VERSION_RC))
-                                             
+
 /**
   * @}
   */
@@ -105,6 +105,6 @@
 /**
   * @}
   */
-  
+
 
 /************************ (C) COPYRIGHT Fudan Microelectronics *****END OF FILE****/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/system_fm33lc0xx.h

@@ -2,8 +2,8 @@
  * @file     system_fm33lc0xx.h
  * @brief    CMSIS Cortex-M0 Device Peripheral Access Layer Header File for
  *           Device FM33LC0XX
- * @version  V2.00
- * @date     15. March 2021
+ * @version  V2.0.0
+ * @date     15. Mar 2021
  *
  * @note
  *
@@ -35,7 +35,6 @@
    POSSIBILITY OF SUCH DAMAGE.
    ---------------------------------------------------------------------------*/
 
-
 #ifndef SYSTEM_FM33LC0XX_H
 #define SYSTEM_FM33LC0XX_H
 
@@ -43,110 +42,119 @@
 extern "C" {
 #endif
 
-#include <stdint.h>
-#include <stdio.h>
-#include "fm33lc0xx.h"
-    
-#define   USE_LSCLK_CLOCK_SRC_XTLF
-
-//#define   SYSCLK_SRC_RC4M
-//#define   SYSCLK_SRC_XTHF
-#define   SYSCLK_SRC_RCHF
-//#define   SYSCLK_SRC_PLL
-
-    
-    
-//#define   USE_PLL_CLOCK_SRC_RCHF
-//#define   USE_PLL_CLOCK_SRC_XTHF
-
-
-#if ((!defined(SYSCLK_SRC_RC4M)) && (!defined(SYSCLK_SRC_XTHF))&&(!defined(SYSCLK_SRC_PLL))&&(!defined(SYSCLK_SRC_RCHF)))
-    #error "Must select a clock source form the SYSCLK_SRC_RC4M or SYSCLK_SRC_XTHF or SYSCLK_SRC_PLL or SYSCLK_SRC_RCHF as the master clock."
-#elif (((defined(SYSCLK_SRC_RC4M)) && ((defined(SYSCLK_SRC_XTHF))||(defined(SYSCLK_SRC_PLL))||(defined(SYSCLK_SRC_RCHF))))||\
-     ((defined(SYSCLK_SRC_XTHF)) && ((defined(SYSCLK_SRC_RC4M))||(defined(SYSCLK_SRC_PLL))||(defined(SYSCLK_SRC_RCHF))))||\
-     ((defined(SYSCLK_SRC_PLL)) && ((defined(SYSCLK_SRC_XTHF))||(defined(SYSCLK_SRC_RC4M))||(defined(SYSCLK_SRC_RCHF))))||\
-     ((defined(SYSCLK_SRC_RCHF)) && ((defined(SYSCLK_SRC_XTHF))||(defined(SYSCLK_SRC_PLL))||(defined(SYSCLK_SRC_RC4M)))))
-    #error "Only one clock source can be selected as the master clock."
-#endif
-
-#if defined(SYSCLK_SRC_PLL) && !defined(USE_PLL_CLOCK_SRC_RCHF) && !defined(USE_PLL_CLOCK_SRC_XTHF)
-    #error "You have chosen to enable the PLL, so you need to specify the clock source for the PLL.."
-#elif defined(SYSCLK_SRC_PLL) && (defined(USE_PLL_CLOCK_SRC_RCHF) && defined(USE_PLL_CLOCK_SRC_XTHF))
-    #error "Please select one of the USE_PLL_CLOCK_SRC_RCHF and USE_PLL_CLOCK_SRC_XTHF in your application"
-#endif
-
-#if !defined  (XTHF_VALUE)
-    #define XTHF_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* XTHF_VALUE */    
-
-#if !defined  (XTLF_VALUE)
-    #define XTLF_VALUE    ((uint32_t)32768U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* XTLF_VALUE */         
-
+/**
+  * @brief CMSIS Device version number
+  */
+#define __FM33LC0xx_CMSIS_VERSION_MAIN      (0x02) /*!< [31:24] main version */
+#define __FM33LC0xx_CMSIS_VERSION_SUB1      (0x03) /*!< [23:16] sub1 version */
+#define __FM33LC0xx_CMSIS_VERSION_SUB2      (0x01) /*!< [15:0]  sub2 version */
+#define __FM33LC0xx_CMSIS_VERSION           ((__FM33LC0xx_CMSIS_VERSION_MAIN  << 24)\
+                                             |(__FM33LC0xx_CMSIS_VERSION_SUB1 << 16)\
+                                             |(__FM33LC0xx_CMSIS_VERSION_SUB2))
+
+/* Configurations ------------------------------------------------------------*/
+/**
+ *  @brief LSCLK source
+ *  @note  Comment the following line to use only LPOSC as LSCLK source, and also
+ *         disable LSCLK auto switch function.
+ */
+#define USE_LSCLK_CLOCK_SRC_XTLF
 
-#define LDT_CHECK(_N_VALUE_, _T_VALUE_)                         \
-                            ((((_N_VALUE_ >> 16) & 0xffff) ==   \
-                            ((~_N_VALUE_) & 0xffff)) ? _N_VALUE_ : _T_VALUE_)
+#ifdef USE_LSCLK_CLOCK_SRC_XTLF
 
-#define LPOSC_LDT_TRIM      (*(uint32_t *)0x1FFFFB20)   // LPOSC 常温校准值
-#define RCHF8M_LDT_TRIM     (*(uint32_t *)0x1FFFFB40)	// RC8M 常温校准值
-#define RCHF16M_LDT_TRIM 	(*(uint32_t *)0x1FFFFB3C)	// RC16M 常温校准值
-#define RCHF24M_LDT_TRIM 	(*(uint32_t *)0x1FFFFB38)	// RC24M 常温校准值
-#define RCMF4M_LDT_TRIM     (*(uint32_t *)0x1FFFFB44)   // RCMF 常温校准值
+/**
+ *  @brief LSCLK source
+ *  @note  Comment the following line to disable LSCLK auto switch function.
+ */
+#define USE_LSCLK_AUTO_SWITCH
 
-#define LPOSC_TRIM          (LDT_CHECK(LPOSC_LDT_TRIM, 0x80) & 0xff)
-#define RCMF4M_TRIM         (LDT_CHECK(RCMF4M_LDT_TRIM, 0x40) & 0x7f)
-#define RCHF8M_TRIM         (LDT_CHECK(RCHF8M_LDT_TRIM, 0x40) & 0x7f)
-#define RCHF16M_TRIM        (LDT_CHECK(RCHF16M_LDT_TRIM, 0x40) & 0x7f)
-#define RCHF24M_TRIM        (LDT_CHECK(RCHF24M_LDT_TRIM, 0x40) & 0x7f)
-         
+#endif  /* USE_LSCLK_CLOCK_SRC_XTLF */
 
-#define __SYSTEM_CLOCK      (8000000)
+/**
+ *  @brief Open IWDT on program startup
+ *  @note  Uncomment the following line to use IWDT on startup. User can modify
+ *         the IWDT_OVERFLOW_PERIOD to change the IDWT overflow period.
+ */
+/* #define USE_IWDT_ON_STARTUP */
+
+#ifdef USE_IWDT_ON_STARTUP
+/*
+    Valid value of IWDT_OVERFLOW_PERIOD:
+    - 0x0: 125ms
+    - 0x1: 250ms
+    - 0x2: 500ms
+    - 0x3: 1s
+    - 0x4: 2s
+    - 0x5: 4s
+    - 0x6: 8s
+    - 0x7: 16s
+ */
+#define IWDT_OVERFLOW_PERIOD  0x7
+#endif
 
+/* Includes ------------------------------------------------------------------*/
+#include <stdint.h>
 
-/**
-  * @brief FL NVIC Init Sturcture definition
-  */
-typedef  struct
-{
-    /* 中断抢占优先级 */
-    uint32_t preemptPriority;
-    
-}NVIC_ConfigTypeDef;
+/* Device Includes -----------------------------------------------------------*/
+#include "fm33lc0xx.h"
 
+/* Trim Values ---------------------------------------------------------------*/
+/* Validate Function */
+#define LDT_CHECK(_N_VALUE_, _T_VALUE_)                         \
+                            ((((_N_VALUE_ >> 16) & 0xFFFFU) ==   \
+                            (~(_N_VALUE_) & 0xFFFFU)) ? (_N_VALUE_) : (_T_VALUE_))
+
+/* Trim Values Address */
+#define LPOSC_LDT_TRIM      (*(uint32_t *)0x1FFFFB20U)   /* LPOSC trim value */
+#define RCHF8M_LDT_TRIM     (*(uint32_t *)0x1FFFFB40U)   /* RC8M  trim value */
+#define RCHF16M_LDT_TRIM    (*(uint32_t *)0x1FFFFB3CU)   /* RC16M trim value */
+#define RCHF24M_LDT_TRIM    (*(uint32_t *)0x1FFFFB38U)   /* RC24M trim value */
+#define RCMF4M_LDT_TRIM     (*(uint32_t *)0x1FFFFB44U)   /* RCMF  trim value */
+
+/* Trim Values */
+#define LPOSC_TRIM          (LDT_CHECK(LPOSC_LDT_TRIM,   0x80) & 0xFFU)
+#define RCMF4M_TRIM         (LDT_CHECK(RCMF4M_LDT_TRIM,  0x40) & 0x7FU)
+#define RCHF8M_TRIM         (LDT_CHECK(RCHF8M_LDT_TRIM,  0x40) & 0x7FU)
+#define RCHF16M_TRIM        (LDT_CHECK(RCHF16M_LDT_TRIM, 0x40) & 0x7FU)
+#define RCHF24M_TRIM        (LDT_CHECK(RCHF24M_LDT_TRIM, 0x40) & 0x7FU)
+
+/* Default Clock Frequency Values --------------------------------------------*/
+
+#define XTHF_DEFAULT_VALUE    ((uint32_t)8000000U)  /*!< Default value of XTHF in Hz */
+#define XTLF_DEFAULT_VALUE    ((uint32_t)32768U)    /*!< Default value of XTLF in Hz */
+
+/* Default system core clock value */
+#define HCLK_DEFAULT_VALUE    ((uint32_t)8000000U)
+
+/* Exported Clock Frequency Variables --------------------------------------- */
+/*
+    - [SystemCoreClock] holds the value of CPU operation clock freqency, and is initialized
+        to HCLK_DEFAULT_VALUE;
+    - [XTLFClock] holds the value of external low-frequency oscillator(XTLF),
+        and is initialized to XTLF_DEFAULT_VALUE;
+    - [XTHFClock] holds the value of external high_frequency oscillator(XTHF),
+        and is initialized to XTHF_DEFAULT_VALUE;
+
+    NOTE: If users are using these two external oscillators, they should modify the
+    value of XTLFClock and XTHFClock to the correct value, and call the SystemCoreClockUpdate()
+    to update the SystemCoreClock variable, otherwise those codes which rely on
+    the SystemCoreClock variable will fail to run.
+ */
+extern uint32_t XTLFClock;        /*!< External Low-freq Osc Clock Frequency (XTLF) */
+extern uint32_t XTHFClock;        /*!< External High-freq Osc Clock Frequency (XTHF) */
+extern uint32_t SystemCoreClock;  /*!< System Clock Frequency (Core Clock) */
 
 /**
- * Initialize the system
- *
- * @param  none
- * @return none
- *
  * @brief  Setup the microcontroller system.
- *         Initialize the System and update the SystemCoreClock variable.
+ *         Initialize the System.
  */
-void SystemInit (void);
+void SystemInit(void);
 
 /**
- * Update SystemCoreClock variable
- *
- * @param  none
- * @return none
- *
  * @brief  Updates the SystemCoreClock with current core Clock
  *         retrieved from cpu registers.
  */
-extern uint32_t SystemCoreClock;
-void SystemCoreClockUpdate (void);
-/**
-  * @brief	NVIC_Init config NVIC
-  *
-  * @param 	NVIC_configStruct configParams
-  *
-  * @param 	IRQn Interrupt number
-  *
-  * @retval	None
-  */
-void NVIC_Init(NVIC_ConfigTypeDef  *NVIC_configStruct,IRQn_Type IRQn);
+void SystemCoreClockUpdate(void);
 
 #ifdef __cplusplus
 }

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/system_fm33lg0xx.h

@@ -46,17 +46,17 @@ extern "C" {
 #include <stdint.h>
 #include <stdio.h>
 #include "fm33lg0xx.h"
-            
+
 
 #if !defined  (XTHF_VALUE)
     #define XTHF_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* XTHF_VALUE */    
+#endif /* XTHF_VALUE */
 
 #if !defined  (XTLF_VALUE)
     #define XTLF_VALUE    ((uint32_t)32768U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* XTLF_VALUE */        
-    
-    
+#endif /* XTLF_VALUE */
+
+
 #define __SYSTEM_CLOCK          (8000000)
 #define DELAY_US                (__SYSTEM_CLOCK/1000000)
 #define DELAY_MS                (__SYSTEM_CLOCK/1000)
@@ -64,12 +64,12 @@ extern "C" {
 
 #define Do_DelayStart()  { \
                         uint32_t LastTick = SysTick->VAL;   do {
-                        
+
 #define While_DelayMsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_MS*Count); \
                       }
-                      
+
 #define While_DelayUsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_US*Count); \
-}            
+}
 
 /**
  * Initialize the system

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/system_fm33lc0xx.c

@@ -2,8 +2,8 @@
  * @file     system_fm33lc0xx.c
  * @brief    CMSIS Cortex-M0 Device Peripheral Access Layer Source File for
  *           Device FM33LC0XX
- * @version  V2.00
- * @date     15. March 2021
+ * @version  V2.0.0
+ * @date     15. Mar 2021
  *
  * @note
  *
@@ -35,170 +35,171 @@
    POSSIBILITY OF SUCH DAMAGE.
    ---------------------------------------------------------------------------*/
 
-
 #include "system_fm33lc0xx.h"
-/*----------------------------------------------------------------------------
-  DEFINES
- *----------------------------------------------------------------------------*/
-
-/*----------------------------------------------------------------------------
-  Define clocks
- *----------------------------------------------------------------------------*/
-/* ToDo: add here your necessary defines for device initialization
-         following is an example for different system frequencies             */
-
-/*----------------------------------------------------------------------------
-  Clock Variable definitions
- *----------------------------------------------------------------------------*/
-/* ToDo: initialize SystemCoreClock with the system core clock frequency value
-         achieved after system intitialization.
-         This means system core clock frequency after call to SystemInit()    */
-uint32_t SystemCoreClock = __SYSTEM_CLOCK;  /*!< System Clock Frequency (Core Clock)*/
-
-/*----------------------------------------------------------------------------
-  Clock functions
- *----------------------------------------------------------------------------*/
+
+/* Clock Variable definitions ------------------------------------------------*/
+uint32_t XTLFClock = XTLF_DEFAULT_VALUE;        /*!< External Low-freq Osc Clock Frequency (XTLF) */
+uint32_t XTHFClock = XTHF_DEFAULT_VALUE;        /*!< External High-freq Osc Clock Frequency (XTHF) */
+uint32_t SystemCoreClock = HCLK_DEFAULT_VALUE;  /*!< System Clock Frequency (Core Clock) */
+
+/* Clock functions -----------------------------------------------------------*/
+/**
+ *  @brief Retrieve the PLL clock frequency
+ *
+ *  @retval PLL clock frequency
+ */
 static uint32_t SystemPLLClockUpdate(void)
 {
     uint32_t clock = 0;
-    
-    // 时钟源
+
+    /* Acquire PLL clock source */
     switch ((RCC->PLLCR >> 1) & 0x1)
     {
         case 0:
-            switch ((RCC->RCHFCR >> 16) & 0xf)
+            switch ((RCC->RCHFCR >> 16) & 0xFU)
             {
-                case 1: // 16M
+                case 1: /* 16MHz */
                     clock = 16000000;
                     break;
-                
-                case 2: // 24M
+
+                case 2: /* 24MHz */
                     clock = 24000000;
                     break;
-                
-                case 0: // 8M
+
+                case 0: /* 8MHz */
                 default:
                     clock = 8000000;
                     break;
             }
             break;
-        
+
         case 1:
-            clock = XTHF_VALUE;
+            clock = XTHFClock;
             break;
     }
-    
-    // 分频
+
+    /* Acquire PLL prescaler */
     switch ((RCC->PLLCR >> 0x4) & 0x7)
     {
-        case 0: // 不分频
+        case 0: /* input divided by 1 */
             clock /= 1;
             break;
-        
-        case 1: // 2分频
-            clock /= 2; 
+
+        case 1: /* input divided by 2 */
+            clock /= 2;
             break;
-        
-        case 2: // 4分频
+
+        case 2: /* input divided by 4 */
             clock /= 4;
             break;
-        
-        case 3: // 8分频
+
+        case 3: /* input divided by 8 */
             clock /= 8;
             break;
-        
-        case 4: // 12分频
+
+        case 4: /* input divided by 12 */
             clock /= 12;
             break;
-        
-        case 5: // 16分频
+
+        case 5: /* input divided by 16 */
             clock /= 16;
             break;
-        
-        case 6: // 24分频
+
+        case 6: /* input divided by 24 */
             clock /= 24;
             break;
-        
-        case 7: // 32分频
+
+        case 7: /* input divided by 32 */
             clock /= 32;
             break;
     }
-    
-    // 倍频比
-    clock = clock * (((RCC->PLLCR >> 16) & 0x7f) + 1);
-    
-    // 输出选择
+
+    /* Acquire PLL multiplier and calculate PLL frequency */
+    clock = clock * (((RCC->PLLCR >> 16) & 0x7F) + 1);
+
+    /* Acquire PLL output channel(PLLx1 or PLLx2) */
     if ((RCC->PLLCR >> 3) & 0x1)
     {
         clock *= 2;
     }
-        
+
     return clock;
 }
- 
-void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
+
+/**
+ *  @brief Update the core clock frequency variable: SystemCoreClock
+ *
+ */
+void SystemCoreClockUpdate(void)
 {
     switch ((RCC->SYSCLKCR >> 0) & 0x7)
-    {        
-        case 1: // XTHF
-            SystemCoreClock = XTHF_VALUE;
+    {
+        case 1: /* XTHF */
+            SystemCoreClock = XTHFClock;
             break;
-        
-        case 2: // PLL
+
+        case 2: /* PLL */
             SystemCoreClock = SystemPLLClockUpdate();
             break;
-        
-        case 4: // RCMF
+
+        case 4: /* RCMF */
             switch ((RCC->RCMFCR >> 16) & 0x3)
             {
-                case 0: // 不分频
+                case 0: /* output divided by 1 */
                     SystemCoreClock = 4000000;
                     break;
-                
-                case 1: // 4分频
+
+                case 1: /* output divided by 4 */
                     SystemCoreClock = 1000000;
                     break;
-                
-                case 2: // 8分频
+
+                case 2: /* output divided by 8 */
                     SystemCoreClock = 500000;
                     break;
-                
-                case 3: // 16分频
+
+                case 3: /* output divided by 16 */
                     SystemCoreClock = 250000;
                     break;
             }
             break;
-        
-        case 5: // LSCLK
-        case 6: // LPOSC
-            SystemCoreClock = 32768;
+
+        case 5: /* LSCLK */
+            #ifdef USE_LSCLK_CLOCK_SRC_LPOSC
+                SystemCoreClock = 32000;
+            #else
+                SystemCoreClock = XTLFClock;
+            #endif
+            break;
+
+        case 6: /* LPOSC */
+            SystemCoreClock = 32000;
             break;
-        
-        case 7: // USBBCK
+
+        case 7: /* USBBCK */
             switch ((RCC->SYSCLKCR >> 3) & 0x1)
             {
-                case 0: // USBBCK 48M
+                case 0: /* USBBCK 48MHz */
                     SystemCoreClock = 48000000;
                     break;
-                
-                case 1: // USBBCK 120M 2分频
+
+                case 1: /* USBBCK 120MHz/2 */
                     SystemCoreClock = 60000000;
                     break;
             }
             break;
-        
+
         default:
             switch ((RCC->RCHFCR >> 16) & 0xf)
             {
-                case 1: // 16M
+                case 1: /* 16MHz */
                     SystemCoreClock = 16000000;
                     break;
-                
-                case 2: // 24M
+
+                case 2: /* 24MHz */
                     SystemCoreClock = 24000000;
                     break;
-                
-                case 0: // 8M
+
+                case 0: /* 8MHz */
                 default:
                     SystemCoreClock = 8000000;
                     break;
@@ -208,79 +209,94 @@ void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
 }
 
 /**
-  * @brief	NVIC_Init config NVIC
-  *
-  * @param 	NVIC_configStruct configParams
-  *
-  * @param 	IRQn Interrupt number
-  *
-  * @retval	None
-  */
-void NVIC_Init(NVIC_ConfigTypeDef  *NVIC_configStruct,IRQn_Type IRQn)
-{
-    /* Params Check */
-    if(NVIC_configStruct->preemptPriority>3)
-    {
-        NVIC_configStruct->preemptPriority = 3;
-    }
-    
-	NVIC_DisableIRQ(IRQn);
-	NVIC_SetPriority(IRQn,NVIC_configStruct->preemptPriority);
-	NVIC_EnableIRQ(IRQn);
-}
-
-/**
- * Initialize the system
- *
- * @param  none
- * @return none
- *
  * @brief  Setup the microcontroller system.
  *         Initialize the System.
  */
-void SystemInit (void)
+void SystemInit(void)
 {
+    #if !defined(MFANG) && defined(USE_LSCLK_CLOCK_SRC_XTLF)
     uint32_t temp;
-    
-    /*  */
-    RCC->PLLCR = (uint32_t)0x00000000U;
-    RCC->SYSCLKCR = (uint32_t)0x0A000000U;
-     /* PAD RCC*/
-    RCC->PCLKCR1 |=  (0x1U << 7U);
-    #ifdef USE_LSCLK_CLOCK_SRC_XTLF           
-        GPIOD->FCR |= 0x3C0000; 
-        /* XTLF*/
-        RCC->XTLFCR  = (uint32_t)(0x00000000U);
-        /* XTLF*/
-        RCC->XTLFCR  |= (uint32_t)(0x00000005U<<8);
-        for(temp = 2000;temp>0;temp--);
-        /* LSCLKXTLF*/
-        RCC->LSCLKSEL = 0xAA;
-        /* LSCXTLF*/
+    #endif
+
+    #if defined(USE_IWDT_ON_STARTUP)
+    RCC->PCLKCR1 |= 0x20U;              /* Enable IWDT Operation Clock */
+    IWDT->CR = IWDT_OVERFLOW_PERIOD;    /* Configure IWDT overflow period */
+    IWDT->SERV = 0x12345A5AU;           /* Enable IWDT */
+    #endif
+
+    /* Reset PLL & SYSCLK selection */
+    RCC->PLLCR = 0x00000000U;
+    RCC->SYSCLKCR = 0x0A000000U;
+
+    /* Enable PAD Operation Clock */
+    RCC->PCLKCR1 |= (0x1U << 7);
+
+    #ifndef MFANG   /* MFANG handles clock configurations by itself */
+    #ifdef USE_LSCLK_CLOCK_SRC_XTLF
+
+        /* XTLF IO configuration */
+        GPIOD->FCR |= 0x003C0000U;
+
+        /* Enable XTLF */
+        RCC->XTLFCR = 0x00000000U;
+        RCC->XTLFCR |= (uint32_t)(0x5U << 8);
+        for(temp = 2000U; temp > 0U; temp--);
+
+    #ifdef USE_LSCLK_AUTO_SWITCH
+
+        /* Enable LSCLK auto switch */
         RCC->SYSCLKCR |= 0x8000000U;
+
+        /* LSCLK from XTLF */
+        RCC->LSCLKSEL = 0xAAU;
+
+    #else
+
+        /* Disable LSCLK auto switch */
+        CMU->SYSCLKCR &= 0x7FFFFFFU;
+
+        /* LSCLK from XTLF */
+        CMU->LSCLKSEL = 0xAAU;
+
+    #endif  /* USE_LSCLK_AUTO_SWITCH */
     #else
+
+        /* Disable LSCLK auto switch */
         RCC->SYSCLKCR &= 0x7FFFFFFU;
-        RCC->LSCLKSEL = 0x55;
-    #endif
-    /*PDR*/
-    RMU->PDRCR |=0x01;
-    /*BOR*/
-    RMU->BORCR &=0xFE;
-    
-    /* DEBUG IWDT WWDT */
-    DBG->CR =0x03;
-    
-    RCC->RCHFTR = RCHF24M_TRIM;
+
+        /* LSCLK from LPOSC */
+        RCC->LSCLKSEL = 0x55U;
+
+    #endif  /* USE_LSCLK_CLOCK_SRC_XTLF */
+    #endif  /* MFANG */
+
+    /* PDR & BOR Configuration */
+    RMU->PDRCR = 0x1U;
+    RMU->BORCR = 0xEU;
+
+    /* Disable IWDT & WWDT, enable other peripherals(e.g. timers) under Debug Mode */
+    DBG->CR = 0x3U;
+
+    /* Load clock trim value */
+    RCC->RCHFTR = RCHF8M_TRIM;
     RCC->RCMFTR = RCMF4M_TRIM;
     RCC->LPOSCTR = LPOSC_TRIM;
-    
-    GPIOD->PUEN |= 0x3 << 7;
-    
+
+    /* Enable SWD port pull up */
+    GPIOD->PUEN |= (0x3U << 7U);
+
     /* DMA Flash Channel: Flash->RAM */
-    RCC->PCLKCR2 |= 0x1 << 4;
-    DMA->CH7CR |= 0x1 << 10;
-    RCC->PCLKCR2 &= ~(0x1 << 4);
-} 
+    RCC->PCLKCR2 |= (0x1U << 4U);
+    DMA->CH7CR |= (0x1U << 10U);
+    RCC->PCLKCR2 &= ~(0x1U << 4U);
+
+    /* Update System Core Clock */
+    SystemCoreClockUpdate();
+
+    #if defined(USE_IWDT_ON_STARTUP)
+    IWDT->SERV = 0x12345A5AU; /* Feed IWDT */
+    #endif
+}
 
 
 

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/system_fm33lg0xx.c

@@ -61,7 +61,7 @@ uint32_t SystemCoreClock = __SYSTEM_CLOCK;  /*!< System Clock Frequency (Core Cl
  *----------------------------------------------------------------------------*/
 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
 {
-    
+
 }
 /**
  * Initialize the system
@@ -74,8 +74,8 @@ void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
  */
 void SystemInit (void)
 {
-    
-} 
+
+}
 
 
 

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33_assert.h

@@ -0,0 +1,40 @@
+/**
+  ****************************************************************************************************
+  * @file    fm33_assert.h
+  * @author  FMSH Application Team
+  * @brief   Assert function define
+  ****************************************************************************************************
+  * @attention
+  *
+  * Copyright (c) [2019] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under the Mulan PSL v1.
+  * can use this software according to the terms and conditions of the Mulan PSL v1.
+  * You may obtain a copy of Mulan PSL v1 at:
+  * http://license.coscl.org.cn/MulanPSL
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
+  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
+  * PURPOSE.
+  * See the Mulan PSL v1 for more details.
+  *
+  ****************************************************************************************************
+  */
+#ifndef __FM33_ASSERT_H
+#define __FM33_ASSERT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef  USE_FULL_ASSERT
+#define assert_param(expr) do{if((expr) == 0)for(;;);}while(0)
+#else
+#define assert_param(expr) ((void)0U)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
+

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl.h

@@ -6,20 +6,20 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
 
-/* Define to prevent recursive inclusion -------------------------------------------------------------*/
+/* Define to prevent recursive inclusion --------------------------------------------------------------*/
 #ifndef __FM33LC0XX_FL_H
 #define __FM33LC0XX_FL_H
 
@@ -27,64 +27,12 @@
 extern "C" {
 #endif
 
-/**
-  * @brief Select FM33LC0XX Device
-  */
-#if !defined  (FM33LC0XX)
-#define FM33LC0XX
-#endif /* FM33LC0XX */
-
-/* Defines -------------------------------------------------------------------------------------------*/
-
-/**
-  * @brief List of drivers to be used.
-  *
-  * @note Uncomment following lines to disable specified driver.
-  */
-
-#ifndef MFANG
-
-#define FL_ADC_DRIVER_ENABLED
-#define FL_AES_DRIVER_ENABLED
-#define FL_ATIM_DRIVER_ENABLED
-#define FL_BSTIM32_DRIVER_ENABLED
-#define FL_COMP_DRIVER_ENABLED
-#define FL_CRC_DRIVER_ENABLED
-#define FL_DIVAS_DRIVER_ENABLED
-#define FL_DMA_DRIVER_ENABLED
-#define FL_EXTI_DRIVER_ENABLED
-#define FL_FLASH_DRIVER_ENABLED
-#define FL_GPIO_DRIVER_ENABLED
-#define FL_GPTIM_DRIVER_ENABLED
-#define FL_I2C_DRIVER_ENABLED
-#define FL_IWDT_DRIVER_ENABLED
-#define FL_LCD_DRIVER_ENABLED
-#define FL_LPTIM32_DRIVER_ENABLED
-#define FL_LPUART_DRIVER_ENABLED
-#define FL_OPA_DRIVER_ENABLED
-#define FL_PMU_DRIVER_ENABLED
-#define FL_RCC_DRIVER_ENABLED
-#define FL_RMU_DRIVER_ENABLED
-#define FL_RNG_DRIVER_ENABLED
-#define FL_RTC_DRIVER_ENABLED
-#define FL_SPI_DRIVER_ENABLED
-#define FL_SVD_DRIVER_ENABLED
-#define FL_U7816_DRIVER_ENABLED
-#define FL_UART_DRIVER_ENABLED
-#define FL_VREF_DRIVER_ENABLED
-#define FL_WWDT_DRIVER_ENABLED
-
-#endif
-
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33xx.h"
-#include "fm33_assert.h"
-#include <stdbool.h>
-#include <stddef.h>
-#include <stdint.h>
+#include "fm33lc0xx_fl_conf.h"
+#include "fm33lc0xx_fl_def.h"
 
 /* Macros ---------------------------------------------------------------------------------------------*/
-/** @defgroup FL_Private_Macros FL Driver Library Private Macros
+/** @defgroup FL_Exported_Macros FL Driver Library Exported Macros
   * @{
   */
 
@@ -92,7 +40,7 @@ extern "C" {
   * @brief FM33LC0xx FL Driver Library version number
   */
 #define __FM33LC0xx_FL_VERSION_MAIN   (0x02) /*!< [31:24] main version */
-#define __FM33LC0xx_FL_VERSION_SUB1   (0x01) /*!< [23:16] sub1 version */
+#define __FM33LC0xx_FL_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
 #define __FM33LC0xx_FL_VERSION_SUB2   (0x01) /*!< [15:0]  sub2 version */
 #define __FM33LC0xx_FL_VERSION        ((__FM33LC0xx_FL_VERSION_MAIN  << 24)\
                                          |(__FM33LC0xx_FL_VERSION_SUB1 << 16)\
@@ -108,44 +56,39 @@ extern "C" {
   * @}
   */
 
-/* Types ----------------------------------------------------------------------------------------------*/
-/** @defgroup FL_ET_Return FL Exported Return Type Defines
+/* Struct Defines -------------------------------------------------------------------------------------*/
+/** @defgroup FL_ET_NVIC FL Driver Library NVIC Init Sturcture Defines
   * @{
   */
 
-typedef enum
+typedef struct
 {
-    FL_RESET = 0U,
-    FL_SET = !FL_RESET
-} FL_FlagStatus, FL_ITStatus;
+    /** 中断抢占优先级 */
+    uint32_t preemptPriority;
 
-typedef enum
-{
-    FL_DISABLE = 0U,
-    FL_ENABLE = !FL_DISABLE
-} FL_FunState;
-#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == FL_DISABLE) || ((STATE) == FL_ENABLE))
-
-typedef enum
-{
-    FL_FAIL = 0U,
-    FL_PASS = !FL_FAIL
-} FL_ErrorStatus;
+} FL_NVIC_ConfigTypeDef;
 
 /**
   * @}
   */
 
 /* Exported Functions ---------------------------------------------------------------------------------*/
-/** @defgroup FL_EF_DELAY   Exported FL Driver Library Delay Support Functions
+/** @defgroup FL_EF_DELAY   FL Driver Library Exported Delay Support Functions
   * @{
   */
 
+void FL_DelayInit(void);
+void FL_DelayUs(uint32_t count);
+void FL_DelayMs(uint32_t count);
+void FL_DelayUsStart(uint32_t count);
+void FL_DelayMsStart(uint32_t count);
+bool FL_DelayEnd(void);
+
 /**
   * @}
   */
 
-/** @defgroup FL_EF_INIT   Exported FL Driver Library Init Functions
+/** @defgroup FL_EF_INIT   FL Driver Library Exported Init Functions
   * @{
   */
 
@@ -155,130 +98,15 @@ void FL_Init(void);
   * @}
   */
 
-/* Post Includes --------------------------------------------------------------------------------------*/
-/**
-  * @brief Include peripheral's header file
+/** @defgroup FL_EF_NVIC   FL Driver Library Exported NVIC Configuration Functions
+  * @{
   */
 
-#if defined(USE_FULL_ASSERT)
-#include "fm33_assert.h"
-#endif /* USE_FULL_ASSERT */
-
-#if defined(FL_ADC_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_adc.h"
-#endif /* FL_ADC_DRIVER_ENABLED */
-
-#if defined(FL_AES_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_aes.h"
-#endif /* FL_AES_DRIVER_ENABLED */
-
-#if defined(FL_ATIM_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_atim.h"
-#endif /* FL_ATIM_DRIVER_ENABLED */
-
-#if defined(FL_BSTIM32_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_bstim32.h"
-#endif /* FL_BSTIM32_DRIVER_ENABLED */
-
-#if defined(FL_COMP_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_comp.h"
-#endif /* FL_COMP_DRIVER_ENABLED */
-
-#if defined(FL_CRC_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_crc.h"
-#endif /* FL_CRC_DRIVER_ENABLED */
-
-#if defined(FL_DIVAS_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_divas.h"
-#endif /* FL_DIVAS_DRIVER_ENABLED */
+void FL_NVIC_Init(FL_NVIC_ConfigTypeDef *configStruct, IRQn_Type irq);
 
-#if defined(FL_DMA_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_dma.h"
-#endif /* FL_DMA_DRIVER_ENABLED */
-
-#if defined(FL_EXTI_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_exti.h"
-#endif /* FL_EXTI_DRIVER_ENABLED */
-
-#if defined(FL_FLASH_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_flash.h"
-#endif /* FL_FLASH_DRIVER_ENABLED */
-
-#if defined(FL_GPIO_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_gpio.h"
-#endif /* FL_GPIO_DRIVER_ENABLED */
-
-#if defined(FL_GPTIM_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_gptim.h"
-#endif /* FL_GPTIM_DRIVER_ENABLED */
-
-#if defined(FL_I2C_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_i2c.h"
-#endif /* FL_I2C_DRIVER_ENABLED */
-
-#if defined(FL_IWDT_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_iwdt.h"
-#endif /* FL_IWDT_DRIVER_ENABLED */
-
-#if defined(FL_LCD_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_lcd.h"
-#endif /* FL_LCD_DRIVER_ENABLED */
-
-#if defined(FL_LPTIM32_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_lptim32.h"
-#endif /* FL_LPTIM32_DRIVER_ENABLED */
-
-#if defined(FL_LPUART_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_lpuart.h"
-#endif /* FL_LPUART_DRIVER_ENABLED */
-
-#if defined(FL_OPA_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_opa.h"
-#endif /* FL_OPA_DRIVER_ENABLED */
-
-#if defined(FL_PMU_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_pmu.h"
-#endif /* FL_PMU_DRIVER_ENABLED */
-
-#if defined(FL_RCC_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_rcc.h"
-#endif /* FL_RCC_DRIVER_ENABLED */
-
-#if defined(FL_RMU_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_rmu.h"
-#endif /* FL_RMU_DRIVER_ENABLED */
-
-#if defined(FL_RNG_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_rng.h"
-#endif /* FL_RNG_DRIVER_ENABLED */
-
-#if defined(FL_RTC_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_rtc.h"
-#endif /* FL_RTC_DRIVER_ENABLED */
-
-#if defined(FL_SPI_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_spi.h"
-#endif /* FL_SPI_DRIVER_ENABLED */
-
-#if defined(FL_SVD_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_svd.h"
-#endif /* FL_SVD_DRIVER_ENABLED */
-
-#if defined(FL_U7816_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_u7816.h"
-#endif /* FL_U7816_DRIVER_ENABLED */
-
-#if defined(FL_UART_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_uart.h"
-#endif /* FL_UART_DRIVER_ENABLED */
-
-#if defined(FL_VREF_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_vref.h"
-#endif /* FL_VREF_DRIVER_ENABLED */
-
-#if defined(FL_WWDT_DRIVER_ENABLED)
-#include "fm33lc0xx_fl_wwdt.h"
-#endif /* FL_WWDT_DRIVER_ENABLED */
+/**
+  * @}
+  */
 
 #ifdef __cplusplus
 }
@@ -286,4 +114,4 @@ void FL_Init(void);
 
 #endif /* __FM33LC0XX_FL_H */
 
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_adc.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -271,6 +271,7 @@ typedef struct
 #define    FL_ADC_INTERNAL_VREF1P2                                (0x1U << 17U)
 #define    FL_ADC_INTERNAL_OPA1                                   (0x1U << 18U)
 #define    FL_ADC_INTERNAL_OPA2                                   (0x1U << 19U)
+#define    FL_ADC_ALL_CHANNEL                                     (0xfffffU << 0U)
 
 
 
@@ -1488,6 +1489,7 @@ __STATIC_INLINE uint32_t FL_ADC_GetSamplingInterval(ADC_Type *ADCx)
   *           @arg @ref FL_ADC_INTERNAL_VREF1P2
   *           @arg @ref FL_ADC_INTERNAL_OPA1
   *           @arg @ref FL_ADC_INTERNAL_OPA2
+  *           @arg @ref FL_ADC_ALL_CHANNEL
   * @retval   None
   */
 __STATIC_INLINE void FL_ADC_EnableSequencerChannel(ADC_Type *ADCx, uint32_t channel)
@@ -1516,6 +1518,7 @@ __STATIC_INLINE void FL_ADC_EnableSequencerChannel(ADC_Type *ADCx, uint32_t chan
   *           @arg @ref FL_ADC_INTERNAL_VREF1P2
   *           @arg @ref FL_ADC_INTERNAL_OPA1
   *           @arg @ref FL_ADC_INTERNAL_OPA2
+  *           @arg @ref FL_ADC_ALL_CHANNEL
   * @retval   None
   */
 __STATIC_INLINE void FL_ADC_DisableSequencerChannel(ADC_Type *ADCx, uint32_t channel)
@@ -1616,14 +1619,14 @@ __STATIC_INLINE void FL_ADC_WriteAnalogWDGHighThreshold(ADC_Type *ADCx, uint32_t
   */
 __STATIC_INLINE uint32_t FL_ADC_ReadAnalogWDGHighThreshold(ADC_Type *ADCx)
 {
-    return (uint32_t)(READ_BIT(ADCx->HLTR, 0xfffU) >> 16U);
+    return (uint32_t)(READ_BIT(ADCx->HLTR, (0xfffU << 16U)) >> 16U);
 }
 
 /**
   * @}
   */
 
-/** @defgroup ADC_FL_EF_Init Initialization and de-initialization functions
+/** @defgroup ADC_FL_EF_Init ADC Initialization and de-initialization Functions
   * @{
   */
 FL_ErrorStatus FL_ADC_CommonDeInit(void);
@@ -1652,4 +1655,4 @@ FL_ErrorStatus FL_ADC_CommonInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
 #endif /* __FM33LC0XX_FL_ADC_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_aes.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -698,4 +698,4 @@ FL_ErrorStatus FL_AES_Init(AES_Type *AESx, FL_AES_InitTypeDef *AES_InitStructer)
 #endif /* __FM33LC0XX_FL_AES_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_atim.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -3787,4 +3787,4 @@ FL_ErrorStatus FL_ATIM_BDTR_Init(ATIM_Type *TIMx, FL_ATIM_BDTR_InitTypeDef *TIM_
 #endif /* __FM33LC0XX_FL_ATIM_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_bstim32.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -480,4 +480,4 @@ void FL_BSTIM32_StructInit(FL_BSTIM32_InitTypeDef *initStruct);
 #endif /* __FM33LC0XX_FL_BSTIM32_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_comp.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -64,7 +64,7 @@ typedef struct
     uint32_t digitalFilter;
 
     /** 数字滤波器长度 */
-    uint32_t digitalFilterLen; //此芯片不可设
+    uint32_t digitalFilterLen;  /* 此芯片不可设 */
 
 } FL_COMP_InitTypeDef;
 
@@ -569,4 +569,4 @@ FL_ErrorStatus FL_COMP_Init(COMP_Type *COMPx, FL_COMP_InitTypeDef *initStruct);
 #endif /* __FM33LC0XX_FL_COMP_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_conf.h

@@ -0,0 +1,195 @@
+/**
+  *******************************************************************************************************
+  * @file    fm33lc0xx_fl_conf.h
+  * @author  FMSH Application Team
+  * @brief   Header file of FL Driver Library Configurations
+  *******************************************************************************************************
+  * @attention
+  *
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
+  *
+  *******************************************************************************************************
+  */
+
+
+/* Define to prevent recursive inclusion --------------------------------------------------------------*/
+#ifndef __FM33LC0XX_FL_CONF_H
+#define __FM33LC0XX_FL_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Defines --------------------------------------------------------------------------------------------*/
+
+/**
+  * @brief List of drivers to be used.
+  *
+  * @note Uncomment following lines to disable specified driver.
+  */
+#define FL_ADC_DRIVER_ENABLED
+#define FL_AES_DRIVER_ENABLED
+#define FL_ATIM_DRIVER_ENABLED
+#define FL_BSTIM32_DRIVER_ENABLED
+#define FL_COMP_DRIVER_ENABLED
+#define FL_CRC_DRIVER_ENABLED
+#define FL_DIVAS_DRIVER_ENABLED
+#define FL_DMA_DRIVER_ENABLED
+#define FL_EXTI_DRIVER_ENABLED
+#define FL_FLASH_DRIVER_ENABLED
+#define FL_GPIO_DRIVER_ENABLED
+#define FL_GPTIM_DRIVER_ENABLED
+#define FL_I2C_DRIVER_ENABLED
+#define FL_IWDT_DRIVER_ENABLED
+#define FL_LCD_DRIVER_ENABLED
+#define FL_LPTIM32_DRIVER_ENABLED
+#define FL_LPUART_DRIVER_ENABLED
+#define FL_OPA_DRIVER_ENABLED
+#define FL_PMU_DRIVER_ENABLED
+#define FL_RCC_DRIVER_ENABLED
+#define FL_RMU_DRIVER_ENABLED
+#define FL_RNG_DRIVER_ENABLED
+#define FL_RTC_DRIVER_ENABLED
+#define FL_SPI_DRIVER_ENABLED
+#define FL_SVD_DRIVER_ENABLED
+#define FL_U7816_DRIVER_ENABLED
+#define FL_UART_DRIVER_ENABLED
+#define FL_VREF_DRIVER_ENABLED
+#define FL_WWDT_DRIVER_ENABLED
+
+/* Device Includes ------------------------------------------------------------------------------------*/
+/**
+  * @brief Include peripheral's header file
+  */
+
+#if defined(FL_ADC_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_adc.h"
+#endif /* FL_ADC_DRIVER_ENABLED */
+
+#if defined(FL_AES_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_aes.h"
+#endif /* FL_AES_DRIVER_ENABLED */
+
+#if defined(FL_ATIM_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_atim.h"
+#endif /* FL_ATIM_DRIVER_ENABLED */
+
+#if defined(FL_BSTIM32_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_bstim32.h"
+#endif /* FL_BSTIM32_DRIVER_ENABLED */
+
+#if defined(FL_COMP_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_comp.h"
+#endif /* FL_COMP_DRIVER_ENABLED */
+
+#if defined(FL_CRC_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_crc.h"
+#endif /* FL_CRC_DRIVER_ENABLED */
+
+#if defined(FL_DIVAS_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_divas.h"
+#endif /* FL_DIVAS_DRIVER_ENABLED */
+
+#if defined(FL_DMA_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_dma.h"
+#endif /* FL_DMA_DRIVER_ENABLED */
+
+#if defined(FL_EXTI_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_exti.h"
+#endif /* FL_EXTI_DRIVER_ENABLED */
+
+#if defined(FL_FLASH_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_flash.h"
+#endif /* FL_FLASH_DRIVER_ENABLED */
+
+#if defined(FL_GPIO_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_gpio.h"
+#endif /* FL_GPIO_DRIVER_ENABLED */
+
+#if defined(FL_GPTIM_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_gptim.h"
+#endif /* FL_GPTIM_DRIVER_ENABLED */
+
+#if defined(FL_I2C_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_i2c.h"
+#endif /* FL_I2C_DRIVER_ENABLED */
+
+#if defined(FL_IWDT_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_iwdt.h"
+#endif /* FL_IWDT_DRIVER_ENABLED */
+
+#if defined(FL_LCD_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_lcd.h"
+#endif /* FL_LCD_DRIVER_ENABLED */
+
+#if defined(FL_LPTIM32_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_lptim32.h"
+#endif /* FL_LPTIM32_DRIVER_ENABLED */
+
+#if defined(FL_LPUART_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_lpuart.h"
+#endif /* FL_LPUART_DRIVER_ENABLED */
+
+#if defined(FL_OPA_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_opa.h"
+#endif /* FL_OPA_DRIVER_ENABLED */
+
+#if defined(FL_PMU_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_pmu.h"
+#endif /* FL_PMU_DRIVER_ENABLED */
+
+#if defined(FL_RCC_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_rcc.h"
+#endif /* FL_RCC_DRIVER_ENABLED */
+
+#if defined(FL_RMU_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_rmu.h"
+#endif /* FL_RMU_DRIVER_ENABLED */
+
+#if defined(FL_RNG_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_rng.h"
+#endif /* FL_RNG_DRIVER_ENABLED */
+
+#if defined(FL_RTC_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_rtc.h"
+#endif /* FL_RTC_DRIVER_ENABLED */
+
+#if defined(FL_SPI_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_spi.h"
+#endif /* FL_SPI_DRIVER_ENABLED */
+
+#if defined(FL_SVD_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_svd.h"
+#endif /* FL_SVD_DRIVER_ENABLED */
+
+#if defined(FL_U7816_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_u7816.h"
+#endif /* FL_U7816_DRIVER_ENABLED */
+
+#if defined(FL_UART_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_uart.h"
+#endif /* FL_UART_DRIVER_ENABLED */
+
+#if defined(FL_VREF_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_vref.h"
+#endif /* FL_VREF_DRIVER_ENABLED */
+
+#if defined(FL_WWDT_DRIVER_ENABLED)
+#include "fm33lc0xx_fl_wwdt.h"
+#endif /* FL_WWDT_DRIVER_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __FM33LC0XX_FL_CONF_H */
+
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_crc.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -471,4 +471,4 @@ FL_ErrorStatus FL_CRC_Init(CRC_Type *CRCx, FL_CRC_InitTypeDef *CRC_InitStruct);
 #endif /* __FM33LC0XX_FL_CRC_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_def.h

@@ -0,0 +1,92 @@
+/**
+  *******************************************************************************************************
+  * @file    fm33lc0xx_fl_def.h
+  * @author  FMSH Application Team
+  * @brief   Header file of FL Driver Library Defines
+  *******************************************************************************************************
+  * @attention
+  *
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
+  *
+  *******************************************************************************************************
+  */
+
+
+/* Define to prevent recursive inclusion --------------------------------------------------------------*/
+#ifndef __FM33LC0XX_FL_DEF_H
+#define __FM33LC0XX_FL_DEF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes -------------------------------------------------------------------------------------------*/
+#include "fm33lc0xx.h"
+#include "fm33_assert.h"
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+/* Macros ---------------------------------------------------------------------------------------------*/
+/** @defgroup FL_Exported_Macros FL Driver Library Private Macros
+  * @{
+  */
+
+/**
+  * @brief Bit-wise operation macros used by FL driver library functions
+  */
+#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
+#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
+#define READ_BIT(REG, BIT)    ((REG) & (BIT))
+#define CLEAR_REG(REG)        ((REG) = (0x0))
+#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
+#define READ_REG(REG)         ((REG))
+#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
+
+/**
+  * @}
+  */
+
+/* Types ----------------------------------------------------------------------------------------------*/
+/** @defgroup FL_PT_Return FL Driver Library Private Return Type Defines
+  * @{
+  */
+
+typedef enum
+{
+    FL_RESET = 0U,
+    FL_SET = !FL_RESET
+} FL_FlagStatus, FL_ITStatus;
+
+typedef enum
+{
+    FL_DISABLE = 0U,
+    FL_ENABLE = !FL_DISABLE
+} FL_FunState;
+#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == FL_DISABLE) || ((STATE) == FL_ENABLE))
+
+typedef enum
+{
+    FL_FAIL = 0U,
+    FL_PASS = !FL_FAIL
+} FL_ErrorStatus;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __FM33LC0XX_FL_DEF_H */
+
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_divas.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -203,4 +203,4 @@ uint32_t FL_DIVAS_Hdiv_Calculation(DIV_Type *DIVx, int32_t DivisorEnd, int16_t D
 #endif /* __FM33LC0XX_FL_DIVAS_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_dma.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -50,7 +50,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -1284,4 +1284,4 @@ FL_ErrorStatus FL_DMA_StartTransmission(DMA_Type *DMAx, FL_DMA_ConfigTypeDef *co
 #endif /* __FM33LC0XX_FL_DMA_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2020-10-20*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_exti.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,10 +28,16 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
+
+/** @defgroup EXTI EXTI
+  * @brief EXTI FL driver
+  * @{
+  */
+
 /* Exported types -------------------------------------------------------------------------------------*/
 /** @defgroup EXTI_FL_ES_INIT EXTI Exported Init structures
   * @{
@@ -108,6 +114,9 @@ void            FL_EXTI_StructInit(FL_EXTI_InitTypeDef *init);
   * @}
   */
 
+/**
+  * @}
+  */
 
 /**
   * @}
@@ -120,4 +129,4 @@ void            FL_EXTI_StructInit(FL_EXTI_InitTypeDef *init);
 #endif /* __FM33LC0XX_FL_EXTI_H */
 
 /*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2021-03-16*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_flash.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -978,4 +978,4 @@ FL_ErrorStatus FL_FLASH_Program_Sector(FLASH_Type *FLASHx, uint32_t sectorNum, u
 #endif /* __FM33LC0XX_FL_FLASH_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2020-12-15*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_gpio.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -289,37 +289,37 @@ typedef struct
 
 
 #define    FL_GPIO_FOUT0_SELECT_XTLF                              (0x0U << GPIO_FOUTSEL_FOUT0_Pos)
-#define    FL_GPIO_FOUT0_SELECT_RCLP                              (0x1U << GPIO_FOUTSEL_FOUT0_Pos)
+#define    FL_GPIO_FOUT0_SELECT_LPOSC                             (0x1U << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_RCHF_DIV64                        (0x2U << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_LSCLK                             (0x3U << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64                      (0x4U << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_RTCTM                             (0x5U << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64                   (0x6U << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_RTCCLK64Hz                        (0x7U << GPIO_FOUTSEL_FOUT0_Pos)
-#define    FL_GPIO_FOUT0_SELECT_APBCLK_DIV64                      (0x8U << GPIO_FOUTSEL_FOUT0_Pos)
+#define    FL_GPIO_FOUT0_SELECT_APB1CLK_DIV64                     (0x8U << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_PLLOUTPUT                         (0x9U << GPIO_FOUTSEL_FOUT0_Pos)
-#define    FL_GPIO_FOUT0_SELECT_RC4M_PSC                          (0xaU << GPIO_FOUTSEL_FOUT0_Pos)
+#define    FL_GPIO_FOUT0_SELECT_RCMF_PSC                          (0xaU << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_RCHF                              (0xbU << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_XTHF_DIV64                        (0xcU << GPIO_FOUTSEL_FOUT0_Pos)
-#define    FL_GPIO_FOUT0_SELECT_ADCCLK_DIV64                      (0xdU << GPIO_FOUTSEL_FOUT0_Pos)
+#define    FL_GPIO_FOUT0_SELECT_COMP1_OUTPUT                      (0xdU << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_CLK_8K                            (0xeU << GPIO_FOUTSEL_FOUT0_Pos)
 #define    FL_GPIO_FOUT0_SELECT_ADC_CLK                           (0xfU << GPIO_FOUTSEL_FOUT0_Pos)
 
 
 #define    FL_GPIO_FOUT1_SELECT_XTLF                              (0x0U << GPIO_FOUTSEL_FOUT1_Pos)
-#define    FL_GPIO_FOUT1_SELECT_RCLP                              (0x1U << GPIO_FOUTSEL_FOUT1_Pos)
+#define    FL_GPIO_FOUT1_SELECT_LPOSC                             (0x1U << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_RCHF_DIV64                        (0x2U << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_LSCLK                             (0x3U << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_AHBCLK_DIV64                      (0x4U << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_RTCTM                             (0x5U << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64                   (0x6U << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_RTCCLK64Hz                        (0x7U << GPIO_FOUTSEL_FOUT1_Pos)
-#define    FL_GPIO_FOUT1_SELECT_APBCLK_DIV64                      (0x8U << GPIO_FOUTSEL_FOUT1_Pos)
+#define    FL_GPIO_FOUT1_SELECT_APB1CLK_DIV64                     (0x8U << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_PLLOUTPUT                         (0x9U << GPIO_FOUTSEL_FOUT1_Pos)
-#define    FL_GPIO_FOUT1_SELECT_RC4M_PSC                          (0xaU << GPIO_FOUTSEL_FOUT1_Pos)
+#define    FL_GPIO_FOUT1_SELECT_RCMF_PSC                          (0xaU << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_RCHF                              (0xbU << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_XTHF_DIV64                        (0xcU << GPIO_FOUTSEL_FOUT1_Pos)
-#define    FL_GPIO_FOUT1_SELECT_COMP1_OUTPUT                      (0xdU << GPIO_FOUTSEL_FOUT1_Pos)
+#define    FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64                      (0xdU << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_CLK_8K                            (0xeU << GPIO_FOUTSEL_FOUT1_Pos)
 #define    FL_GPIO_FOUT1_SELECT_COMP2_OUTPUT                      (0xfU << GPIO_FOUTSEL_FOUT1_Pos)
 
@@ -921,7 +921,14 @@ __STATIC_INLINE uint32_t FL_GPIO_GetOutputPin(GPIO_Type *GPIOx, uint32_t pin)
   */
 __STATIC_INLINE void FL_GPIO_ToggleOutputPin(GPIO_Type *GPIOx, uint32_t pin)
 {
-    WRITE_REG(GPIOx->DO, READ_REG(GPIOx->DO) ^ pin);
+    if(pin&GPIOx->DO)
+    {
+      WRITE_REG(GPIOx->DRST, pin);
+    }
+    else
+    {
+      WRITE_REG(GPIOx->DSET, pin);
+    }
 }
 
 /**
@@ -1274,19 +1281,19 @@ __STATIC_INLINE uint32_t FL_GPIO_ReadEXTILines(GPIO_COMMON_Type *GPIOx)
   * @param    GPIOx GPIO Port
   * @param    select This parameter can be one of the following values:
   *           @arg @ref FL_GPIO_FOUT0_SELECT_XTLF
-  *           @arg @ref FL_GPIO_FOUT0_SELECT_RCLP
+  *           @arg @ref FL_GPIO_FOUT0_SELECT_LPOSC
   *           @arg @ref FL_GPIO_FOUT0_SELECT_RCHF_DIV64
   *           @arg @ref FL_GPIO_FOUT0_SELECT_LSCLK
   *           @arg @ref FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64
   *           @arg @ref FL_GPIO_FOUT0_SELECT_RTCTM
   *           @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64
   *           @arg @ref FL_GPIO_FOUT0_SELECT_RTCCLK64Hz
-  *           @arg @ref FL_GPIO_FOUT0_SELECT_APBCLK_DIV64
+  *           @arg @ref FL_GPIO_FOUT0_SELECT_APB1CLK_DIV64
   *           @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT
-  *           @arg @ref FL_GPIO_FOUT0_SELECT_RC4M_PSC
+  *           @arg @ref FL_GPIO_FOUT0_SELECT_RCMF_PSC
   *           @arg @ref FL_GPIO_FOUT0_SELECT_RCHF
   *           @arg @ref FL_GPIO_FOUT0_SELECT_XTHF_DIV64
-  *           @arg @ref FL_GPIO_FOUT0_SELECT_ADCCLK_DIV64
+  *           @arg @ref FL_GPIO_FOUT0_SELECT_COMP1_OUTPUT
   *           @arg @ref FL_GPIO_FOUT0_SELECT_CLK_8K
   *           @arg @ref FL_GPIO_FOUT0_SELECT_ADC_CLK
   * @retval   None
@@ -1302,19 +1309,19 @@ __STATIC_INLINE void FL_GPIO_SetFOUT0(GPIO_COMMON_Type *GPIOx, uint32_t select)
   * @param    GPIOx GPIO Port
   * @retval   Returned value can be one of the following values:
   *           @arg @ref FL_GPIO_FOUT0_SELECT_XTLF
-  *           @arg @ref FL_GPIO_FOUT0_SELECT_RCLP
+  *           @arg @ref FL_GPIO_FOUT0_SELECT_LPOSC
   *           @arg @ref FL_GPIO_FOUT0_SELECT_RCHF_DIV64
   *           @arg @ref FL_GPIO_FOUT0_SELECT_LSCLK
   *           @arg @ref FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64
   *           @arg @ref FL_GPIO_FOUT0_SELECT_RTCTM
   *           @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64
   *           @arg @ref FL_GPIO_FOUT0_SELECT_RTCCLK64Hz
-  *           @arg @ref FL_GPIO_FOUT0_SELECT_APBCLK_DIV64
+  *           @arg @ref FL_GPIO_FOUT0_SELECT_APB1CLK_DIV64
   *           @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT
-  *           @arg @ref FL_GPIO_FOUT0_SELECT_RC4M_PSC
+  *           @arg @ref FL_GPIO_FOUT0_SELECT_RCMF_PSC
   *           @arg @ref FL_GPIO_FOUT0_SELECT_RCHF
   *           @arg @ref FL_GPIO_FOUT0_SELECT_XTHF_DIV64
-  *           @arg @ref FL_GPIO_FOUT0_SELECT_ADCCLK_DIV64
+  *           @arg @ref FL_GPIO_FOUT0_SELECT_COMP1_OUTPUT
   *           @arg @ref FL_GPIO_FOUT0_SELECT_CLK_8K
   *           @arg @ref FL_GPIO_FOUT0_SELECT_ADC_CLK
   */
@@ -1329,19 +1336,19 @@ __STATIC_INLINE uint32_t FL_GPIO_GetFOUT0(GPIO_COMMON_Type *GPIOx)
   * @param    GPIOx GPIO Port
   * @param    select This parameter can be one of the following values:
   *           @arg @ref FL_GPIO_FOUT1_SELECT_XTLF
-  *           @arg @ref FL_GPIO_FOUT1_SELECT_RCLP
+  *           @arg @ref FL_GPIO_FOUT1_SELECT_LPOSC
   *           @arg @ref FL_GPIO_FOUT1_SELECT_RCHF_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_LSCLK
   *           @arg @ref FL_GPIO_FOUT1_SELECT_AHBCLK_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_RTCTM
   *           @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_RTCCLK64Hz
-  *           @arg @ref FL_GPIO_FOUT1_SELECT_APBCLK_DIV64
+  *           @arg @ref FL_GPIO_FOUT1_SELECT_APB1CLK_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT
-  *           @arg @ref FL_GPIO_FOUT1_SELECT_RC4M_PSC
+  *           @arg @ref FL_GPIO_FOUT1_SELECT_RCMF_PSC
   *           @arg @ref FL_GPIO_FOUT1_SELECT_RCHF
   *           @arg @ref FL_GPIO_FOUT1_SELECT_XTHF_DIV64
-  *           @arg @ref FL_GPIO_FOUT1_SELECT_COMP1_OUTPUT
+  *           @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_CLK_8K
   *           @arg @ref FL_GPIO_FOUT1_SELECT_COMP2_OUTPUT
   * @retval   None
@@ -1357,19 +1364,19 @@ __STATIC_INLINE void FL_GPIO_SetFOUT1(GPIO_COMMON_Type *GPIOx, uint32_t select)
   * @param    GPIOx GPIO Port
   * @retval   Returned value can be one of the following values:
   *           @arg @ref FL_GPIO_FOUT1_SELECT_XTLF
-  *           @arg @ref FL_GPIO_FOUT1_SELECT_RCLP
+  *           @arg @ref FL_GPIO_FOUT1_SELECT_LPOSC
   *           @arg @ref FL_GPIO_FOUT1_SELECT_RCHF_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_LSCLK
   *           @arg @ref FL_GPIO_FOUT1_SELECT_AHBCLK_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_RTCTM
   *           @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_RTCCLK64Hz
-  *           @arg @ref FL_GPIO_FOUT1_SELECT_APBCLK_DIV64
+  *           @arg @ref FL_GPIO_FOUT1_SELECT_APB1CLK_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT
-  *           @arg @ref FL_GPIO_FOUT1_SELECT_RC4M_PSC
+  *           @arg @ref FL_GPIO_FOUT1_SELECT_RCMF_PSC
   *           @arg @ref FL_GPIO_FOUT1_SELECT_RCHF
   *           @arg @ref FL_GPIO_FOUT1_SELECT_XTHF_DIV64
-  *           @arg @ref FL_GPIO_FOUT1_SELECT_COMP1_OUTPUT
+  *           @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64
   *           @arg @ref FL_GPIO_FOUT1_SELECT_CLK_8K
   *           @arg @ref FL_GPIO_FOUT1_SELECT_COMP2_OUTPUT
   */
@@ -1955,5 +1962,5 @@ void FL_GPIO_ALLPIN_LPM_MODE(void);
 
 #endif /* __FM33LC0XX_FL_GPIO_H*/
 
-/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2021-08-19*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_gptim.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -173,7 +173,7 @@ typedef struct
   * ---------------------------------------------------
   * ITR2   | 0      | BSTIM32_TRGO  | 计数触发
   *        | 1      | LPUART2_RX    | 宽度捕捉
-  *        | 2      | RCLP          | 周期捕捉
+  *        | 2      | LPOSC         | 周期捕捉
   *        | 3      | XTLF          | 周期捕捉
   * ---------------------------------------------------
   * ITR3   | 0      | COMP1_TRGO    | 计数触发
@@ -198,7 +198,7 @@ typedef struct
   * ---------------------------------------------------
   * ITR2   | 0      | BSTIM32_TRGO  | 计数触发
   *        | 1      | LSCLK         | 周期捕捉
-  *        | 2      | RCLP          | 周期捕捉
+  *        | 2      | LPOSC         | 周期捕捉
   *        | 3      | XTLF          | 周期捕捉
   * ---------------------------------------------------
   * ITR3   | 0      | COMP1_TRGO    | 计数触发
@@ -2955,4 +2955,4 @@ FL_ErrorStatus FL_GPTIM_ETR_Init(GPTIM_Type *TIMx, FL_GPTIM_ETR_InitTypeDef *etr
 #endif /* __FM33LC0XX_FL_GPTIM_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_i2c.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -1862,4 +1862,4 @@ FL_ErrorStatus FL_I2C_MasterMode_Init(I2C_Type *I2Cx, FL_I2C_MasterMode_InitType
 #endif /* __FM33LC0XX_FL_I2C_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_iwdt.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -306,4 +306,4 @@ FL_ErrorStatus FL_IWDT_Init(IWDT_Type *IWDTx, FL_IWDT_InitTypeDef *IWDT_InitStru
 #endif /* __FM33LC0XX_FL_IWDT_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-27*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_lcd.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -1012,4 +1012,4 @@ void FL_LCD_8COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t sta
 #endif /* __FM33LC0XX_FL_LCD_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2021-02-02*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_lptim32.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -1170,4 +1170,4 @@ void FL_LPTIM32_OC_StructInit(FL_LPTIM32_OC_InitTypeDef *initStruct_OC);
 #endif /* __FM33LC0XX_FL_LPTIM32_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_lpuart.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -1089,4 +1089,4 @@ FL_ErrorStatus FL_LPUART_Init(LPUART_Type *LPUARTx, FL_LPUART_InitTypeDef *initS
 #endif /* __FM33LC0XX_FL_LPUART_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_opa.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -782,4 +782,4 @@ FL_ErrorStatus FL_OPA_Init(OPA_Type *OPAx, FL_OPA_InitTypeDef *initStruct);
 #endif /* __FM33LC0XX_FL_OPA_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_pmu.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -953,4 +953,4 @@ void FL_PMU_StructInit(FL_PMU_SleepInitTypeDef *LPM_InitStruct);
 #endif /* __FM33LC0XX_FL_PMU_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_rcc.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -223,8 +223,8 @@ extern "C" {
 #define    RCC_OPCCR2_ADCPRSC_Msk                                 (0x7U << RCC_OPCCR2_ADCPRSC_Pos)
 #define    RCC_OPCCR2_ADCPRSC                                     RCC_OPCCR2_ADCPRSC_Msk
 
-#define    RCC_OPCCR2_USBCKS_Pos                                  (23U)
-#define    RCC_OPCCR2_USBCKS_Msk                                  (0x1U << RCC_OPCCR2_USBCKS_Pos)
+#define    RCC_OPCCR2_USBCKS_Pos                                  (18U)
+#define    RCC_OPCCR2_USBCKS_Msk                                  (0x3U << RCC_OPCCR2_USBCKS_Pos)
 #define    RCC_OPCCR2_USBCKS                                      RCC_OPCCR2_USBCKS_Msk
 
 #define    RCC_OPCCR2_ADCCKS_Pos                                  (16U)
@@ -247,6 +247,38 @@ extern "C" {
 #define    RCC_LSCLKSEL_SEL_Msk                                   (0xffU << RCC_LSCLKSEL_SEL_Pos)
 #define    RCC_LSCLKSEL_SEL                                       RCC_LSCLKSEL_SEL_Msk
 
+#define    RCC_PHYCR_PHYRST_Pos                                   (4U)
+#define    RCC_PHYCR_PHYRST_Msk                                   (0x1U << RCC_PHYCR_PHYRST_Pos)
+#define    RCC_PHYCR_PHYRST                                       RCC_PHYCR_PHYRST_Msk
+
+#define    RCC_PHYCR_PD_Pos                                       (3U)
+#define    RCC_PHYCR_PD_Msk                                       (0x1U << RCC_PHYCR_PD_Pos)
+#define    RCC_PHYCR_PD                                           RCC_PHYCR_PD_Msk
+
+#define    RCC_PHYCR_PLVREADY_Pos                                 (2U)
+#define    RCC_PHYCR_PLVREADY_Msk                                 (0x1U << RCC_PHYCR_PLVREADY_Pos)
+#define    RCC_PHYCR_PLVREADY                                     RCC_PHYCR_PLVREADY_Msk
+
+#define    RCC_PHYCR_BCKPD_Pos                                    (1U)
+#define    RCC_PHYCR_BCKPD_Msk                                    (0x1U << RCC_PHYCR_BCKPD_Pos)
+#define    RCC_PHYCR_BCKPD                                        RCC_PHYCR_BCKPD_Msk
+
+#define    RCC_PHYCR_BCKRST_Pos                                   (0U)
+#define    RCC_PHYCR_BCKRST_Msk                                   (0x1U << RCC_PHYCR_BCKRST_Pos)
+#define    RCC_PHYCR_BCKRST                                       RCC_PHYCR_BCKRST_Msk
+
+#define    RCC_PHYBCKCR_CK48M_EN_Pos                              (8U)
+#define    RCC_PHYBCKCR_CK48M_EN_Msk                              (0x1U << RCC_PHYBCKCR_CK48M_EN_Pos)
+#define    RCC_PHYBCKCR_CK48M_EN                                  RCC_PHYBCKCR_CK48M_EN_Msk
+
+#define    RCC_PHYBCKCR_CLKRDY_Pos                                (7U)
+#define    RCC_PHYBCKCR_CLKRDY_Msk                                (0x1U << RCC_PHYBCKCR_CLKRDY_Pos)
+#define    RCC_PHYBCKCR_CLKRDY                                    RCC_PHYBCKCR_CLKRDY_Msk
+
+#define    RCC_PHYBCKCR_OUTCLKSEL_Pos                             (0U)
+#define    RCC_PHYBCKCR_OUTCLKSEL_Msk                             (0x1U << RCC_PHYBCKCR_OUTCLKSEL_Pos)
+#define    RCC_PHYBCKCR_OUTCLKSEL                                 RCC_PHYBCKCR_OUTCLKSEL_Msk
+
 #define    RCC_LKPCR_RST_EN_Pos                                   (1U)
 #define    RCC_LKPCR_RST_EN_Msk                                   (0x1U << RCC_LKPCR_RST_EN_Pos)
 #define    RCC_LKPCR_RST_EN                                       RCC_LKPCR_RST_EN_Msk
@@ -401,16 +433,16 @@ extern "C" {
 #define    FL_RCC_SYSTICK_CLK_SOURCE_SYSCLK                       (0x3U << RCC_SYSCLKCR_STCLKSEL_Pos)
 
 
-#define    FL_RCC_USB_CLOCK_SELECT_48M                            (0x0U << RCC_SYSCLKCR_BCKOSEL_Pos)
-#define    FL_RCC_USB_CLOCK_SELECT_120M                           (0x1U << RCC_SYSCLKCR_BCKOSEL_Pos)
+#define    FL_RCC_USB_CLK_OUT_48M                                 (0x0U << RCC_SYSCLKCR_BCKOSEL_Pos)
+#define    FL_RCC_USB_CLK_OUT_120M                                (0x1U << RCC_SYSCLKCR_BCKOSEL_Pos)
 
 
 #define    FL_RCC_SYSTEM_CLK_SOURCE_RCHF                          (0x0U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
 #define    FL_RCC_SYSTEM_CLK_SOURCE_XTHF                          (0x1U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
 #define    FL_RCC_SYSTEM_CLK_SOURCE_PLL                           (0x2U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
-#define    FL_RCC_SYSTEM_CLK_SOURCE_RCMFPSC                       (0x4U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
-#define    FL_RCC_SYSTEM_CLK_SOURCE_XTLF                          (0x5U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
-#define    FL_RCC_SYSTEM_CLK_SOURCE_RCLP                          (0x6U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
+#define    FL_RCC_SYSTEM_CLK_SOURCE_RCMF_PSC                      (0x4U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
+#define    FL_RCC_SYSTEM_CLK_SOURCE_LSCLK                         (0x5U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
+#define    FL_RCC_SYSTEM_CLK_SOURCE_LPOSC                         (0x6U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
 #define    FL_RCC_SYSTEM_CLK_SOURCE_USBCLK                        (0x7U << RCC_SYSCLKCR_SYSCLKSEL_Pos)
 
 
@@ -513,8 +545,9 @@ extern "C" {
 #define    FL_RCC_ADC_PSC_DIV32                                   (0x5U << RCC_OPCCR2_ADCPRSC_Pos)
 
 
-#define    FL_RCC_USB_CLK_SOURCE_XTLF                             (0x0U << RCC_OPCCR2_USBCKS_Pos)
-#define    FL_RCC_USB_CLK_SOURCE_XTHF                             (0x1U << RCC_OPCCR2_USBCKS_Pos)
+#define    FL_RCC_USB_CLK_REF_XTLF                                (0x0U << RCC_OPCCR2_USBCKS_Pos)
+#define    FL_RCC_USB_CLK_REF_XTHF                                (0x1U << RCC_OPCCR2_USBCKS_Pos)
+#define    FL_RCC_USB_CLK_REF_RCHF                                (0x2U << RCC_OPCCR2_USBCKS_Pos)
 
 
 #define    FL_RCC_ADC_CLK_SOURCE_RCMF_PSC                         (0x0U << RCC_OPCCR2_ADCCKS_Pos)
@@ -525,13 +558,13 @@ extern "C" {
 
 #define    FL_RCC_LPTIM32_CLK_SOURCE_APB1CLK                      (0x0U << RCC_OPCCR2_LPT32CKS_Pos)
 #define    FL_RCC_LPTIM32_CLK_SOURCE_LSCLK                        (0x1U << RCC_OPCCR2_LPT32CKS_Pos)
-#define    FL_RCC_LPTIM32_CLK_SOURCE_RCLP                         (0x2U << RCC_OPCCR2_LPT32CKS_Pos)
+#define    FL_RCC_LPTIM32_CLK_SOURCE_LPOSC                        (0x2U << RCC_OPCCR2_LPT32CKS_Pos)
 #define    FL_RCC_LPTIM32_CLK_SOURCE_RCMF_PSC                     (0x3U << RCC_OPCCR2_LPT32CKS_Pos)
 
 
-#define    FL_RCC_BSTIM32_CLK_SOURCE_APB1CLK                      (0x0U << RCC_OPCCR2_BT32CKS_Pos)
+#define    FL_RCC_BSTIM32_CLK_SOURCE_APB2CLK                      (0x0U << RCC_OPCCR2_BT32CKS_Pos)
 #define    FL_RCC_BSTIM32_CLK_SOURCE_LSCLK                        (0x1U << RCC_OPCCR2_BT32CKS_Pos)
-#define    FL_RCC_BSTIM32_CLK_SOURCE_RCLP                         (0x2U << RCC_OPCCR2_BT32CKS_Pos)
+#define    FL_RCC_BSTIM32_CLK_SOURCE_LPOSC                        (0x2U << RCC_OPCCR2_BT32CKS_Pos)
 #define    FL_RCC_BSTIM32_CLK_SOURCE_RCMF_PSC                     (0x3U << RCC_OPCCR2_BT32CKS_Pos)
 
 
@@ -539,9 +572,13 @@ extern "C" {
 #define    FL_RCC_AHB_MASTER_PRIORITY_CPU_FIRST                   (0x1U << RCC_AHBMCR_MPRIL_Pos)
 
 
-#define    FL_RCC_LSCLK_CLK_SOURCE_RCLP                           (0x55U << RCC_LSCLKSEL_SEL_Pos)
+#define    FL_RCC_LSCLK_CLK_SOURCE_LPOSC                          (0x55U << RCC_LSCLKSEL_SEL_Pos)
 #define    FL_RCC_LSCLK_CLK_SOURCE_XTLF                           (0xAAU << RCC_LSCLKSEL_SEL_Pos)
 
+#define    FL_RCC_USB_CLK_REF_SOURCE_SOF                          (0x0U << RCC_PHYBCKCR_OUTCLKSEL_Pos)
+#define    FL_RCC_USB_CLK_REF_SOURCE_CORECLKIN                    (0x1U << RCC_PHYBCKCR_OUTCLKSEL_Pos)
+
+
 /**
   * @}
   */
@@ -825,25 +862,25 @@ __STATIC_INLINE uint32_t FL_RCC_GetAHBPrescaler(void)
 
 /**
   * @brief    Set USB PHY BCK Output Clock Source
-  * @rmtoll   SYSCLKCR    BCKOSEL    FL_RCC_SetUSBClockSource
-  * @param    source This parameter can be one of the following values:
-  *           @arg @ref FL_RCC_USB_CLOCK_SELECT_48M
-  *           @arg @ref FL_RCC_USB_CLOCK_SELECT_120M
+  * @rmtoll   SYSCLKCR    BCKOSEL    FL_RCC_SetUSBClockOutput
+  * @param    output This parameter can be one of the following values:
+  *           @arg @ref FL_RCC_USB_CLK_OUT_48M
+  *           @arg @ref FL_RCC_USB_CLK_OUT_120M
   * @retval   None
   */
-__STATIC_INLINE void FL_RCC_SetUSBClockSource(uint32_t source)
+__STATIC_INLINE void FL_RCC_SetUSBClockOutput(uint32_t output)
 {
-    MODIFY_REG(RCC->SYSCLKCR, RCC_SYSCLKCR_BCKOSEL_Msk, source);
+    MODIFY_REG(RCC->SYSCLKCR, RCC_SYSCLKCR_BCKOSEL_Msk, output);
 }
 
 /**
   * @brief    Get USB PHY BCK Output Clock Source Setting
-  * @rmtoll   SYSCLKCR    BCKOSEL    FL_RCC_GetUSBClockSource
+  * @rmtoll   SYSCLKCR    BCKOSEL    FL_RCC_GetUSBClockOutput
   * @retval   Returned value can be one of the following values:
-  *           @arg @ref FL_RCC_USB_CLOCK_SELECT_48M
-  *           @arg @ref FL_RCC_USB_CLOCK_SELECT_120M
+  *           @arg @ref FL_RCC_USB_CLK_OUT_48M
+  *           @arg @ref FL_RCC_USB_CLK_OUT_120M
   */
-__STATIC_INLINE uint32_t FL_RCC_GetUSBClockSource(void)
+__STATIC_INLINE uint32_t FL_RCC_GetUSBClockOutput(void)
 {
     return (uint32_t)(READ_BIT(RCC->SYSCLKCR, RCC_SYSCLKCR_BCKOSEL_Msk));
 }
@@ -855,9 +892,9 @@ __STATIC_INLINE uint32_t FL_RCC_GetUSBClockSource(void)
   *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_RCHF
   *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_XTHF
   *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_PLL
-  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_RCMFPSC
-  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_XTLF
-  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_RCLP
+  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_RCMF_PSC
+  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_LSCLK
+  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_LPOSC
   *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_USBCLK
   * @retval   None
   */
@@ -873,9 +910,9 @@ __STATIC_INLINE void FL_RCC_SetSystemClockSource(uint32_t clock)
   *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_RCHF
   *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_XTHF
   *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_PLL
-  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_RCMFPSC
-  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_XTLF
-  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_RCLP
+  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_RCMF_PSC
+  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_LSCLK
+  *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_LPOSC
   *           @arg @ref FL_RCC_SYSTEM_CLK_SOURCE_USBCLK
   */
 __STATIC_INLINE uint32_t FL_RCC_GetSystemClockSource(void)
@@ -954,7 +991,7 @@ __STATIC_INLINE void FL_RCC_RCMF_WriteTrimValue(uint32_t value)
 /**
   * @brief    Get RCMF Frequency Trim Value
   * @rmtoll   RCMFTR    TRIM    FL_RCC_RCMF_ReadTrimValue
-  * @retval   The Value of RC4M trim
+  * @retval   The Value of RCMF trim
   */
 __STATIC_INLINE uint32_t FL_RCC_RCMF_ReadTrimValue(void)
 {
@@ -1182,7 +1219,7 @@ __STATIC_INLINE void FL_RCC_LPOSC_DisableChopper(void)
 /**
   * @brief    Set LPOSC Frequency Trim Value
   * @rmtoll   LPOSCTR    TRIM    FL_RCC_LPOSC_WriteTrimValue
-  * @param    value TrimValue The value of RCLP trim
+  * @param    value TrimValue The value of LPOSC trim
   * @retval   None
   */
 __STATIC_INLINE void FL_RCC_LPOSC_WriteTrimValue(uint32_t value)
@@ -1193,7 +1230,7 @@ __STATIC_INLINE void FL_RCC_LPOSC_WriteTrimValue(uint32_t value)
 /**
   * @brief    Get LPOSC Frequency Trim Value
   * @rmtoll   LPOSCTR    TRIM    FL_RCC_LPOSC_ReadTrimValue
-  * @retval   The Value of RCLP trim
+  * @retval   The Value of LPOSC trim
   */
 __STATIC_INLINE uint32_t FL_RCC_LPOSC_ReadTrimValue(void)
 {
@@ -1275,7 +1312,7 @@ __STATIC_INLINE void FL_RCC_XTHF_WriteDriverStrength(uint32_t strength)
   */
 __STATIC_INLINE uint32_t FL_RCC_XTHF_ReadDriverStrength(void)
 {
-    return (uint32_t)(READ_BIT(RCC->XTHFCR, 0x7U) >> 8U);
+    return (uint32_t)(READ_BIT(RCC->XTHFCR, (0x7U << 8U)) >> 8U);
 }
 
 /**
@@ -1643,6 +1680,7 @@ __STATIC_INLINE void FL_RCC_EnableGroup1OperationClock(uint32_t Peripheral)
   * @brief    Enable Group2 Periph Operation Clock
   * @rmtoll   OPCCR2        FL_RCC_EnableGroup2OperationClock
   * @param    Peripheral This parameter can be one of the following values:
+  *           @arg @ref FL_RCC_GROUP2_OPCLK_USB
   *           @arg @ref FL_RCC_GROUP2_OPCLK_FLASH
   *           @arg @ref FL_RCC_GROUP2_OPCLK_RNG
   *           @arg @ref FL_RCC_GROUP2_OPCLK_ADC
@@ -1676,6 +1714,7 @@ __STATIC_INLINE void FL_RCC_DisableGroup1OperationClock(uint32_t Peripheral)
   * @brief    Disable Group2 Periph Operation Clock
   * @rmtoll   OPCCR2        FL_RCC_DisableGroup2OperationClock
   * @param    Peripheral This parameter can be one of the following values:
+  *           @arg @ref FL_RCC_GROUP2_OPCLK_USB
   *           @arg @ref FL_RCC_GROUP2_OPCLK_FLASH
   *           @arg @ref FL_RCC_GROUP2_OPCLK_RNG
   *           @arg @ref FL_RCC_GROUP2_OPCLK_ADC
@@ -1710,6 +1749,7 @@ __STATIC_INLINE uint32_t FL_RCC_IsEnabledGroup1OperationClock(uint32_t Periphera
   * @brief    Get Group2 Periph Operation Clock Enable Status
   * @rmtoll   OPCCR2        FL_RCC_IsEnabledGroup2OperationClock
   * @param    Peripheral This parameter can be one of the following values:
+  *           @arg @ref FL_RCC_GROUP2_OPCLK_USB
   *           @arg @ref FL_RCC_GROUP2_OPCLK_FLASH
   *           @arg @ref FL_RCC_GROUP2_OPCLK_RNG
   *           @arg @ref FL_RCC_GROUP2_OPCLK_ADC
@@ -1981,6 +2021,33 @@ __STATIC_INLINE uint32_t FL_RCC_GetADCPrescaler(void)
     return (uint32_t)(READ_BIT(RCC->OPCCR2, RCC_OPCCR2_ADCPRSC_Msk));
 }
 
+/**
+  * @brief    Set USB Reference Clock
+  * @rmtoll   OPCCR2    USBCKS    FL_RCC_SetUSBClockReference
+  * @param    ref This parameter can be one of the following values:
+  *           @arg @ref FL_RCC_USB_CLK_REF_XTLF
+  *           @arg @ref FL_RCC_USB_CLK_REF_XTHF
+  *           @arg @ref FL_RCC_USB_CLK_REF_RCHF
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_SetUSBClockReference(uint32_t ref)
+{
+    MODIFY_REG(RCC->OPCCR2, RCC_OPCCR2_USBCKS_Msk, ref);
+}
+
+/**
+  * @brief    Get USB Reference Clock Setting
+  * @rmtoll   OPCCR2    USBCKS    FL_RCC_GetUSBClockReference
+  * @retval   Returned value can be one of the following values:
+  *           @arg @ref FL_RCC_USB_CLK_REF_XTLF
+  *           @arg @ref FL_RCC_USB_CLK_REF_XTHF
+  *           @arg @ref FL_RCC_USB_CLK_REF_RCHF
+  */
+__STATIC_INLINE uint32_t FL_RCC_GetUSBClockReference(void)
+{
+    return (uint32_t)(READ_BIT(RCC->OPCCR2, RCC_OPCCR2_USBCKS_Msk));
+}
+
 /**
   * @brief    Set ADC Clock Source
   * @rmtoll   OPCCR2    ADCCKS    FL_RCC_SetADCClockSource
@@ -2016,7 +2083,7 @@ __STATIC_INLINE uint32_t FL_RCC_GetADCClockSource(void)
   * @param    clock This parameter can be one of the following values:
   *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_APB1CLK
   *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_LSCLK
-  *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_RCLP
+  *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_LPOSC
   *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_RCMF_PSC
   * @retval   None
   */
@@ -2031,7 +2098,7 @@ __STATIC_INLINE void FL_RCC_SetLPTIM32ClockSource(uint32_t clock)
   * @retval   Returned value can be one of the following values:
   *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_APB1CLK
   *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_LSCLK
-  *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_RCLP
+  *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_LPOSC
   *           @arg @ref FL_RCC_LPTIM32_CLK_SOURCE_RCMF_PSC
   */
 __STATIC_INLINE uint32_t FL_RCC_GetLPTIM32ClockSource(void)
@@ -2043,9 +2110,9 @@ __STATIC_INLINE uint32_t FL_RCC_GetLPTIM32ClockSource(void)
   * @brief    Set BSTIM Clock Source
   * @rmtoll   OPCCR2    BT32CKS    FL_RCC_SetBSTIM32ClockSource
   * @param    clock This parameter can be one of the following values:
-  *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_APB1CLK
+  *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_APB2CLK
   *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_LSCLK
-  *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_RCLP
+  *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_LPOSC
   *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_RCMF_PSC
   * @retval   None
   */
@@ -2058,9 +2125,9 @@ __STATIC_INLINE void FL_RCC_SetBSTIM32ClockSource(uint32_t clock)
   * @brief    Get BSTIM Clock Source Setting
   * @rmtoll   OPCCR2    BT32CKS    FL_RCC_GetBSTIM32ClockSource
   * @retval   Returned value can be one of the following values:
-  *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_APB1CLK
+  *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_APB2CLK
   *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_LSCLK
-  *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_RCLP
+  *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_LPOSC
   *           @arg @ref FL_RCC_BSTIM32_CLK_SOURCE_RCMF_PSC
   */
 __STATIC_INLINE uint32_t FL_RCC_GetBSTIM32ClockSource(void)
@@ -2097,7 +2164,7 @@ __STATIC_INLINE uint32_t FL_RCC_GetAHBMasterPriority(void)
   * @brief    Set LSCLK Clock Source
   * @rmtoll   LSCLKSEL    SEL    FL_RCC_SetLSCLKClockSource
   * @param    clock This parameter can be one of the following values:
-  *           @arg @ref FL_RCC_LSCLK_CLK_SOURCE_RCLP
+  *           @arg @ref FL_RCC_LSCLK_CLK_SOURCE_LPOSC
   *           @arg @ref FL_RCC_LSCLK_CLK_SOURCE_XTLF
   * @retval   None
   */
@@ -2106,6 +2173,211 @@ __STATIC_INLINE void FL_RCC_SetLSCLKClockSource(uint32_t clock)
     MODIFY_REG(RCC->LSCLKSEL, RCC_LSCLKSEL_SEL_Msk, clock);
 }
 
+/**
+  * @brief    Enable USB PHY Reset
+  * @rmtoll   PHYCR    PHYRST    FL_RCC_EnableUSBPHYReset
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_EnableUSBPHYReset(void)
+{
+    CLEAR_BIT(RCC->PHYCR, RCC_PHYCR_PHYRST_Msk);
+}
+
+/**
+  * @brief    Get USB PHY Enable Status
+  * @rmtoll   PHYCR    PHYRST    FL_RCC_IsEnabledUSBPHYReset
+  * @retval   State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t FL_RCC_IsEnabledUSBPHYReset(void)
+{
+    return (uint32_t)!(READ_BIT(RCC->PHYCR, RCC_PHYCR_PHYRST_Msk) == RCC_PHYCR_PHYRST_Msk);
+}
+
+/**
+  * @brief    Disable USB PHY Reset
+  * @rmtoll   PHYCR    PHYRST    FL_RCC_DisableUSBPHYReset
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_DisableUSBPHYReset(void)
+{
+    SET_BIT(RCC->PHYCR, RCC_PHYCR_PHYRST_Msk);
+}
+
+/**
+  * @brief    Enable USB PHY Power Down
+  * @rmtoll   PHYCR    PD    FL_RCC_EnableUSBPHYPowerDown
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_EnableUSBPHYPowerDown(void)
+{
+    SET_BIT(RCC->PHYCR, RCC_PHYCR_PD_Msk);
+}
+
+/**
+  * @brief    Get USB PHY Power Down Enable Status
+  * @rmtoll   PHYCR    PD    FL_RCC_IsEnabledUSBPHYPowerDown
+  * @retval   State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t FL_RCC_IsEnabledUSBPHYPowerDown(void)
+{
+    return (uint32_t)(READ_BIT(RCC->PHYCR, RCC_PHYCR_PD_Msk) == RCC_PHYCR_PD_Msk);
+}
+
+/**
+  * @brief    Disable USB PHY Power Down
+  * @rmtoll   PHYCR    PD    FL_RCC_DisableUSBPHYPowerDown
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_DisableUSBPHYPowerDown(void)
+{
+    CLEAR_BIT(RCC->PHYCR, RCC_PHYCR_PD_Msk);
+}
+
+/**
+  * @brief    Set USB PHY Power Ready Flag
+  * @rmtoll   PHYCR    PLVREADY    FL_RCC_SetUSBPHYPowerReadyFlag
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_SetUSBPHYPowerReadyFlag(void)
+{
+    SET_BIT(RCC->PHYCR, RCC_PHYCR_PLVREADY_Msk);
+}
+
+/**
+  * @brief    Reset USB PHY Power Ready Flag
+  * @rmtoll   PHYCR    PLVREADY    FL_RCC_ResetUSBPHYPowerReadyFlag
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_ResetUSBPHYPowerReadyFlag(void)
+{
+    CLEAR_BIT(RCC->PHYCR, RCC_PHYCR_PLVREADY_Msk);
+}
+
+/**
+  * @brief    Enable USB BCK
+  * @rmtoll   PHYCR    BCKPD    FL_RCC_EnableUSBBCK
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_EnableUSBBCK(void)
+{
+    CLEAR_BIT(RCC->PHYCR, RCC_PHYCR_BCKPD_Msk);
+}
+
+/**
+  * @brief    Get USB BCK Enable Status
+  * @rmtoll   PHYCR    BCKPD    FL_RCC_IsEnabledUSBBCK
+  * @retval   State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t FL_RCC_IsEnabledUSBBCK(void)
+{
+    return (uint32_t)(READ_BIT(RCC->PHYCR, RCC_PHYCR_BCKPD_Msk) == RCC_PHYCR_BCKPD_Msk);
+}
+
+/**
+  * @brief    Disable USB BCK
+  * @rmtoll   PHYCR    BCKPD    FL_RCC_DisableUSBBCK
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_DisableUSBBCK(void)
+{
+    SET_BIT(RCC->PHYCR, RCC_PHYCR_BCKPD_Msk);
+}
+
+/**
+  * @brief    Enable USB BCK Reset
+  * @rmtoll   PHYCR    BCKRST    FL_RCC_EnableUSBBCKReset
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_EnableUSBBCKReset(void)
+{
+    CLEAR_BIT(RCC->PHYCR, RCC_PHYCR_BCKRST_Msk);
+}
+
+/**
+  * @brief    Get USB BCK Reset Enable Status
+  * @rmtoll   PHYCR    BCKRST    FL_RCC_IsEnabledUSBBCKReset
+  * @retval   State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t FL_RCC_IsEnabledUSBBCKReset(void)
+{
+    return (uint32_t)!(READ_BIT(RCC->PHYCR, RCC_PHYCR_BCKRST_Msk) == RCC_PHYCR_BCKRST_Msk);
+}
+
+/**
+  * @brief    Disable USB BCK Reset
+  * @rmtoll   PHYCR    BCKRST    FL_RCC_DisableUSBBCKReset
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_DisableUSBBCKReset(void)
+{
+    SET_BIT(RCC->PHYCR, RCC_PHYCR_BCKRST_Msk);
+}
+
+/**
+  * @brief    Enable USB 48M Clock
+  * @rmtoll   PHYBCKCR    CK48M_EN    FL_RCC_EnableUSB48MClock
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_EnableUSB48MClock(void)
+{
+    SET_BIT(RCC->PHYBCKCR, RCC_PHYBCKCR_CK48M_EN_Msk);
+}
+
+/**
+  * @brief    Get USB 48M Clock  Enable Status
+  * @rmtoll   PHYBCKCR    CK48M_EN    FL_RCC_IsEnabledUSB48MClock
+  * @retval   State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t FL_RCC_IsEnabledUSB48MClock(void)
+{
+    return (uint32_t)(READ_BIT(RCC->PHYBCKCR, RCC_PHYBCKCR_CK48M_EN_Msk) == RCC_PHYBCKCR_CK48M_EN_Msk);
+}
+
+/**
+  * @brief    Disable USB 48M Clock
+  * @rmtoll   PHYBCKCR    CK48M_EN    FL_RCC_DisableUSB48MClock
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_DisableUSB48MClock(void)
+{
+    CLEAR_BIT(RCC->PHYBCKCR, RCC_PHYBCKCR_CK48M_EN_Msk);
+}
+
+/**
+  * @brief    Get USB Clock Ready Flag
+  * @rmtoll   PHYBCKCR    CLKRDY    FL_RCC_IsActiveFlag_USBClockReady
+  * @retval   State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t FL_RCC_IsActiveFlag_USBClockReady(void)
+{
+    return (uint32_t)(READ_BIT(RCC->PHYBCKCR, RCC_PHYBCKCR_CLKRDY_Msk) == RCC_PHYBCKCR_CLKRDY_Msk);
+}
+
+/**
+  * @brief    Set USB Reference Clock Source
+  * @rmtoll   PHYBCKCR    OUTCLKSEL    FL_RCC_SetUSBClockReferenceSource
+  * @param    clock This parameter can be one of the following values:
+  *           @arg @ref FL_RCC_USB_CLK_REF_SOURCE_SOF
+  *           @arg @ref FL_RCC_USB_CLK_REF_SOURCE_CORECLKIN
+  * @retval   None
+  */
+__STATIC_INLINE void FL_RCC_SetUSBClockReferenceSource(uint32_t clock)
+{
+    MODIFY_REG(RCC->PHYBCKCR, RCC_PHYBCKCR_OUTCLKSEL_Msk, clock);
+}
+
+/**
+  * @brief    Get USB Reference Clock Source
+  * @rmtoll   PHYBCKCR    OUTCLKSEL    FL_RCC_GetUSBClockReferenceSource
+  * @retval   Returned value can be one of the following values:
+  *           @arg @ref FL_RCC_USB_CLK_REF_SOURCE_SOF
+  *           @arg @ref FL_RCC_USB_CLK_REF_SOURCE_CORECLKIN
+  */
+__STATIC_INLINE uint32_t FL_RCC_GetUSBClockReferenceSource(void)
+{
+    return (uint32_t)(READ_BIT(RCC->PHYBCKCR, RCC_PHYBCKCR_OUTCLKSEL_Msk));
+}
+
 /**
   * @brief    Get LockUp Reset Enable Status
   * @rmtoll   LKPCR    RST_EN    FL_RCC_IsEnabledLockUpReset
@@ -2506,7 +2778,7 @@ uint32_t FL_RCC_GetAHBClockFreq(void);
 uint32_t FL_RCC_GetAPB1ClockFreq(void);
 uint32_t FL_RCC_GetAPB2ClockFreq(void);
 
-uint32_t FL_RCC_GetRC4MClockFreq(void);
+uint32_t FL_RCC_GetRCMFClockFreq(void);
 uint32_t FL_RCC_GetRCHFClockFreq(void);
 uint32_t FL_RCC_GetPLLClockFreq(void);
 
@@ -2528,5 +2800,5 @@ uint32_t FL_RCC_GetPLLClockFreq(void);
 
 #endif /* __FM33LC0XX_FL_RCC_H*/
 
-/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-27*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2021-07-08*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_rmu.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -59,7 +59,7 @@ extern "C" {
 #define    RMU_PDRCR_EN_Msk                                       (0x1U << RMU_PDRCR_EN_Pos)
 #define    RMU_PDRCR_EN                                           RMU_PDRCR_EN_Msk
 
-#define    RMU_BORCR_CFG_Pos                                      (1U)
+#define    RMU_BORCR_CFG_Pos                                      (2U)
 #define    RMU_BORCR_CFG_Msk                                      (0x3U << RMU_BORCR_CFG_Pos)
 #define    RMU_BORCR_CFG                                          RMU_BORCR_CFG_Msk
 
@@ -284,4 +284,4 @@ __STATIC_INLINE void FL_RMU_BORPowerUp_Enable(RMU_Type *RMUx)
 #endif /* __FM33LC0XX_FL_RMU_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_rng.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -261,4 +261,4 @@ uint32_t GetCrc32(uint32_t dataIn);
 #endif /* __FM33LC0XX_FL_RNG_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_rtc.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -1386,4 +1386,4 @@ FL_ErrorStatus FL_RTC_ConfigTime(RTC_Type *RTCx, FL_RTC_InitTypeDef *initStruct)
 #endif /* __FM33LC0XX_FL_RTC_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_spi.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -1080,7 +1080,7 @@ __STATIC_INLINE uint32_t FL_SPI_IsEnabledIT_RXComplete(SPI_Type *SPIx)
   */
 __STATIC_INLINE void FL_SPI_SetFrameMode(SPI_Type *SPIx, uint32_t mode)
 {
-    MODIFY_REG(SPIx->ISR, SPI_ISR_DCN_TX_Msk, mode);
+    WRITE_REG(SPIx->ISR, mode);
 }
 
 /**
@@ -1249,4 +1249,4 @@ void FL_SPI_StructInit(FL_SPI_InitTypeDef *initStruct);
 #endif /* __FM33LC0XX_FL_SPI_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_svd.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -676,4 +676,4 @@ void FL_SVD_StructInit(FL_SVD_InitTypeDef *initStruct);
 #endif /* __FM33LC0XX_FL_SVD_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-25*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_u7816.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -1068,4 +1068,4 @@ void FL_U7816_StructInit(FL_U7816_InitTypeDef *U7816_InitStruct);
 #endif /* __FM33LC0XX_FL_U7816_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-27*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_uart.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -1250,4 +1250,4 @@ void FL_UART_StructInit(FL_UART_InitTypeDef *initStruct);
 #endif /* __FM33LC0XX_FL_UART_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-27*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_vref.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -407,4 +407,4 @@ __STATIC_INLINE void FL_VREF_DisableVREFBuffer(VREF_Type *VREFx)
 #endif /* __FM33LC0XX_FL_VREF_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_wwdt.h

@@ -6,15 +6,15 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
@@ -28,7 +28,7 @@
 extern "C" {
 #endif
 /* Includes -------------------------------------------------------------------------------------------*/
-#include "fm33lc0xx_fl.h"
+#include "fm33lc0xx_fl_def.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -262,4 +262,4 @@ void FL_WWDT_StructInit(FL_WWDT_InitTypeDef *WWDT_InitStruct);
 #endif /* __FM33LC0XX_FL_WWDT_H*/
 
 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/SConscript

@@ -14,6 +14,9 @@ Src/fm33lc0xx_fl_rcc.c
 Src/fm33lc0xx_fl_gpio.c
 """)
 
+if GetDepend(['RT_USING_PIN']):
+    src += ['Src/fm33lc0xx_fl_exti.c']
+
 if GetDepend(['RT_USING_SERIAL']):
     src += ['Src/fm33lc0xx_fl_uart.c']
     src += ['Src/fm33lc0xx_fl_lpuart.c']

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl.c

@@ -6,20 +6,21 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
 
-/* Includes -------------------------------------------------------------------------------------------*/
+
+/* Includes ----------------------------------------------------------------------------------------*/
 #include "fm33lc0xx_fl.h"
 
 /** @addtogroup FL_EF_DELAY
@@ -43,7 +44,7 @@ __WEAK void FL_DelayInit(void)
   * @brief  Provide block delay in microseconds.
   * @note   The function is declared as __WEAK to be overwritten in case of other
   *         implementation in user file.
-  * @param  count specifies the delay count in microseconds.
+  * @param  count   specifies the delay count in microseconds.
   * @retval None
   */
 __WEAK void FL_DelayUs(uint32_t count)
@@ -59,7 +60,7 @@ __WEAK void FL_DelayUs(uint32_t count)
   * @brief  Provide blocking delay in milliseconds.
   * @note   The function is declared as __WEAK to be overwritten in case of other
   *         implementation in user file.
-  * @param  count specifies the delay count in milliseconds.
+  * @param  count   specifies the delay count in milliseconds.
   * @retval None
   */
 __WEAK void FL_DelayMs(uint32_t count)
@@ -73,9 +74,9 @@ __WEAK void FL_DelayMs(uint32_t count)
 /**
   * @brief  Provide no-blocking delay initialization in microseconds.
   * @note   Should be follow By while(!FL_DelayEnd()){ ** user code ** } immediately.
-            The function is declared as __WEAK to be overwritten in case of other
+  *         The function is declared as __WEAK to be overwritten in case of other
   *         implementation in user file.
-  * @param  count specifies the delay count in microseconds.
+  * @param  count   specifies the delay count in microseconds.
   * @retval None
   */
 __WEAK void FL_DelayUsStart(uint32_t count)
@@ -91,7 +92,7 @@ __WEAK void FL_DelayUsStart(uint32_t count)
   * @note   Should be followed By while(!FL_DelayEnd()){ ** user code ** }.
   *         The function is declared as __WEAK to be overwritten in case of other
   *         implementation in user file.
-  * @param  count specifies the delay count in milliseconds.
+  * @param  count   specifies the delay count in milliseconds.
   * @retval None
   */
 __WEAK void FL_DelayMsStart(uint32_t count)
@@ -102,9 +103,9 @@ __WEAK void FL_DelayMsStart(uint32_t count)
 /**
   * @brief  Showing if the no-blocking delay has ended.
   * @note   Should be used with FL_DelayMs/UsStart() function.
-            The function is declared as __WEAK to be overwritten in case of other
+  *         The function is declared as __WEAK to be overwritten in case of other
   *         implementation in user file.
-  * @param  count specifies the delay count in milliseconds.
+  * @param  count   specifies the delay count in milliseconds.
   * @retval true  - delay has ended
   *         false - delay is in progress
   */
@@ -114,7 +115,7 @@ __WEAK bool FL_DelayEnd(void)
 }
 
 /**
-  *@}
+  * @}
   */
 
 /** @addtogroup FL_EF_DELAY
@@ -123,15 +124,41 @@ __WEAK bool FL_DelayEnd(void)
 
 void FL_Init(void)
 {
-    // Init delay support function
+    /* Init delay support function */
     FL_DelayInit();
 }
 
 /**
-  *@}
+  * @}
+  */
+
+/** @addtogroup FL_EF_NVIC
+  * @{
+  */
+
+/**
+  * @brief  Configure NVIC for specified Interrupt.
+  * @param  configStruct    NVIC configuration.
+  * @param  irq             Interrupt number.
+  * @retval None
+  */
+void FL_NVIC_Init(FL_NVIC_ConfigTypeDef *configStruct, IRQn_Type irq)
+{
+    /* Check parameter */
+    if(configStruct->preemptPriority > 3)
+    {
+        configStruct->preemptPriority = 3;
+    }
+    NVIC_DisableIRQ(irq);
+    NVIC_SetPriority(irq, configStruct->preemptPriority);
+    NVIC_EnableIRQ(irq);
+}
+
+/**
+  * @}
   */
 
-/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
 
 
 

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_adc.c

@@ -6,25 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_adc.h"
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_svd.h"
-#include "fm33lc0xx_fl_vref.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -34,8 +31,10 @@
   * @{
   */
 
+#ifdef FL_ADC_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
-/** @addtogroup ADC_FL_Private_Macros
+/** @addtogroup ADC_FL_PM ADC Private Macros
   * @{
   */
 
@@ -143,10 +142,10 @@
   */
 
 /**
-  * @brief  ADC外设寄存器值为复位值
-  * @param  外设入口地址
-  * @retval 返回错误状态，可能值：
-  *         -FL_PASS 外设寄存器值恢复复位值
+  * @brief  恢复ADC公用寄存器到复位值
+  * @param  None
+  * @retval 执行结果
+  *         -FL_PASS ADC公用寄存器值恢复复位值
   *         -FL_FAIL 未成功执行
   */
 FL_ErrorStatus FL_ADC_CommonDeInit(void)
@@ -158,16 +157,11 @@ FL_ErrorStatus FL_ADC_CommonDeInit(void)
     return FL_PASS;
 }
 /**
-  * @brief  ADC共用寄存器设置以配置外设工作时钟
-  *
-  * @note   其中LL_LPTIM_OPERATION_MODE_EXTERNAL_ASYN_PAUSE_CNT 模式需要外部脉冲提供给LPTIM模块作为工作时钟，此时
-  *         LPTIM完全工作在异步模式下。
-  * @param  LPTIM  外设入口地址
-  * @param  LPTIM_InitStruct指向LL_LPTIM_TimeInitTypeDef类的结构体，它包含指定LPTIM外设的配置信息
-  *
-  * @retval ErrorStatus枚举值
+  * @brief  配置ADC公用寄存器
+  * @param  ADC_CommonInitStruct 指向 @ref FL_ADC_CommonInitTypeDef 的结构体，它包含ADC公用寄存器的配置信息
+  * @retval 执行结果
   *         -FL_FAIL 配置过程发生错误
-  *         -FL_PASS LPUART配置成功
+  *         -FL_PASS ADC公用寄存器配置成功
   */
 FL_ErrorStatus FL_ADC_CommonInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
 {
@@ -186,27 +180,24 @@ FL_ErrorStatus FL_ADC_CommonInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
     return status;
 }
 /**
-  * @brief  设置 ADC_CommonInitStruct 为默认配置
-  * @param  ADC_CommonInitStruct 指向需要将值设置为默认配置的结构体 @ref LL_ADC_CommonInitTypeDef 结构体
-  *
+  * @brief  初始化 @ref FL_ADC_CommonInitTypeDef 配置结构体
+  * @param  ADC_CommonInitStruct 指向需要初始化的 @ref FL_ADC_CommonInitTypeDef 结构体
   * @retval None
   */
 void FL_ADC_CommonStructInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
 {
     /*默认使用RCHF作为ADC时钟模块时钟源，预分频系数16*/
-    ADC_CommonInitStruct->clockSource               = FL_RCC_ADC_CLK_SOURCE_RCHF;
-    ADC_CommonInitStruct->clockPrescaler        = FL_RCC_ADC_PSC_DIV16;
+    ADC_CommonInitStruct->clockSource     = FL_RCC_ADC_CLK_SOURCE_RCHF;
+    ADC_CommonInitStruct->clockPrescaler  = FL_RCC_ADC_PSC_DIV16;
 }
 /**
-  * @brief  恢复对应的ADC入口地址寄存器为默认值
-  *
+  * @brief  恢复ADC外设寄存器到复位值
   * @param  ADCx  外设入口地址
-  *
-  * @retval ErrorStatus枚举值
-  *         -FL_FAIL 配置过程发生错误
-  *         -FL_PASS LPUART配置成功
+  * @retval 执行结果
+  *         -FL_PASS ADC外设寄存器值恢复复位值
+  *         -FL_FAIL 未成功执行
   */
-FL_ErrorStatus  FL_ADC_DeInit(ADC_Type *ADCx)
+FL_ErrorStatus FL_ADC_DeInit(ADC_Type *ADCx)
 {
     FL_ErrorStatus status = FL_PASS;
     /* 入口合法性检查 */
@@ -221,16 +212,14 @@ FL_ErrorStatus  FL_ADC_DeInit(ADC_Type *ADCx)
     return status;
 }
 /**
-  * @brief  初始化ADCx指定的入口地址的外设寄存器
-  *
+  * @brief  配置指定的ADC外设
   * @note   用户必须检查此函数的返回值，以确保自校准完成，否则转换结果精度无法保证，除此之外ADC使能过采样实际不会增加ADC的
   *         转换精度只会提高转换结果的稳定性（同时配置移位寄存器的情况下），同时过采样会降低转换速度。
   * @param  ADCx  外设入口地址
-  * @param  ADC_InitStruct 向一FL_ADC_InitTypeDef结构体，它包含指定ADC外设的配置信息
-  *
-  * @retval ErrorStatus枚举值
+  * @param  ADC_InitStruct 指向 @ref FL_ADC_InitTypeDef 的结构体，它包含ADC外设寄存器的配置信息
+  * @retval 执行结果
   *         -FL_FAIL 配置过程发生错误
-  *         -FL_PASS LPUART配置成功
+  *         -FL_PASS ADC外设寄存器配置成功
   */
 FL_ErrorStatus FL_ADC_Init(ADC_Type *ADCx, FL_ADC_InitTypeDef  *ADC_InitStruct)
 {
@@ -245,15 +234,15 @@ FL_ErrorStatus FL_ADC_Init(ADC_Type *ADCx, FL_ADC_InitTypeDef  *ADC_InitStruct)
     assert_param(IS_FL_ADC_OVERSAMPCOFIG(ADC_InitStruct->oversamplingMode));
     assert_param(IS_FL_ADC_OVERSAMPINGRATIO(ADC_InitStruct->overSampingMultiplier));
     assert_param(IS_FL_ADC_OVERSAMPINGSHIFT(ADC_InitStruct->oversamplingShift));
-    /* 使能a工作时钟 */
+    /* 使能ADC工作时钟 */
     FL_RCC_EnableGroup1BusClock(FL_RCC_GROUP1_BUSCLK_ANAC);
     FL_SVD_EnableADCMonitor(SVD);
     if(!FL_VREF_IsEnabled(VREF))
     {
         FL_VREF_ClearFlag_Ready(VREF);
-        FL_VREF_Enable(VREF);//置位VREF_EN寄存器，使能VREF1p2模块
+        FL_VREF_Enable(VREF);   /* 置位VREF_EN寄存器，使能VREF1p2模块 */
     }
-    FL_VREF_EnableTemperatureSensor(VREF);//置位PTAT_EN寄存器
+    FL_VREF_EnableTemperatureSensor(VREF);  /* 置位PTAT_EN寄存器 */
     while(FL_VREF_IsActiveFlag_Ready(VREF) == 0)
     {
         if(i >= 128000)
@@ -321,32 +310,32 @@ FL_ErrorStatus FL_ADC_Init(ADC_Type *ADCx, FL_ADC_InitTypeDef  *ADC_InitStruct)
     }
     return status;
 }
-
 /**
-  * @brief  设置 ADC_InitStruct 为默认配置
-  * @param  ADC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ADC_InitTypeDef 结构体
-  *
+  * @brief  初始化 @ref FL_ADC_InitTypeDef 配置结构体
+  * @param  ADC_InitStruct 指向需要初始化的 @ref FL_ADC_InitTypeDef 结构体
   * @retval None
   */
 void FL_ADC_StructInit(FL_ADC_InitTypeDef *ADC_InitStruct)
 {
-    ADC_InitStruct->conversionMode                  = FL_ADC_CONV_MODE_SINGLE;
-    ADC_InitStruct->autoMode                    = FL_ADC_SINGLE_CONV_MODE_AUTO;
-    ADC_InitStruct->scanDirection               = FL_ADC_SEQ_SCAN_DIR_FORWARD;
-    ADC_InitStruct->externalTrigConv            = FL_ADC_TRIGGER_EDGE_NONE;
-    ADC_InitStruct->overrunMode                 = FL_ENABLE;
-    ADC_InitStruct->waitMode                    = FL_ENABLE;
-    ADC_InitStruct->fastChannelTime             = FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK;
-    ADC_InitStruct->lowChannelTime                  = FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK;
-    ADC_InitStruct->oversamplingMode            = FL_ENABLE;
-    ADC_InitStruct->overSampingMultiplier   = FL_ADC_OVERSAMPLING_MUL_16X;
-    ADC_InitStruct->oversamplingShift           = FL_ADC_OVERSAMPLING_SHIFT_4B;
+    ADC_InitStruct->conversionMode        = FL_ADC_CONV_MODE_SINGLE;
+    ADC_InitStruct->autoMode              = FL_ADC_SINGLE_CONV_MODE_AUTO;
+    ADC_InitStruct->scanDirection         = FL_ADC_SEQ_SCAN_DIR_FORWARD;
+    ADC_InitStruct->externalTrigConv      = FL_ADC_TRIGGER_EDGE_NONE;
+    ADC_InitStruct->overrunMode           = FL_ENABLE;
+    ADC_InitStruct->waitMode              = FL_ENABLE;
+    ADC_InitStruct->fastChannelTime       = FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK;
+    ADC_InitStruct->lowChannelTime        = FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK;
+    ADC_InitStruct->oversamplingMode      = FL_ENABLE;
+    ADC_InitStruct->overSampingMultiplier = FL_ADC_OVERSAMPLING_MUL_16X;
+    ADC_InitStruct->oversamplingShift     = FL_ADC_OVERSAMPLING_SHIFT_4B;
 }
 
 /**
   * @}
   */
 
+#endif /* FL_ADC_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -355,7 +344,4 @@ void FL_ADC_StructInit(FL_ADC_InitTypeDef *ADC_InitStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
-
-
-
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_aes.c

@@ -6,22 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_aes.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_AES_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup AES_FL_Private_Macros
   * @{
@@ -140,6 +142,8 @@ void FL_AES_StructInit(FL_AES_InitTypeDef *AES_InitStructer)
   * @}
   */
 
+#endif /* FL_AES_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -148,5 +152,4 @@ void FL_AES_StructInit(FL_AES_InitTypeDef *AES_InitStructer)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
-
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_atim.c

@@ -6,23 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_atim.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -32,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_ATIM_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------------*/
 /** @addtogroup ATIM_FL_Private_Macros
   * @{
@@ -421,7 +422,7 @@ FL_ErrorStatus FL_ATIM_Init(ATIM_Type *TIMx, FL_ATIM_InitTypeDef *TIM_InitStruct
     }
     /* 手动触发更新事件，将配置值写入 */
     FL_ATIM_GenerateUpdateEvent(TIMx);
-    while((!FL_ATIM_IsActiveFlag_Update(ATIM))&i)
+    while((!FL_ATIM_IsActiveFlag_Update(ATIM))&&i)
     {
         i--;
     }
@@ -649,7 +650,7 @@ FL_ErrorStatus FL_ATIM_OC_Init(ATIM_Type *TIMx, uint32_t channel, FL_ATIM_OC_Ini
     OCConfig(TIMx, channel, TIM_OC_InitStruct);
     /* 手动触发更新事件，将配置值写入 */
     FL_ATIM_GenerateUpdateEvent(TIMx);
-    while((!FL_ATIM_IsActiveFlag_Update(ATIM))&i)
+    while((!FL_ATIM_IsActiveFlag_Update(ATIM))&&i)
     {
         i--;
     }
@@ -766,6 +767,8 @@ void FL_ATIM_BDTR_StructInit(FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct)
   * @}
   */
 
+#endif /* FL_ATIM_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -774,4 +777,4 @@ void FL_ATIM_BDTR_StructInit(FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_bstim32.c

@@ -6,23 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_bstim32.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -32,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_BSTIM32_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------------*/
 /** @addtogroup BSTIM32_FL_Private_Macros
   * @{
@@ -42,9 +43,9 @@
 #define         IS_FL_BSTIM32_AUTORELOAD_MODE(__VALUE__)           (((__VALUE__) == FL_ENABLE)||\
                                                                     ((__VALUE__) == FL_DISABLE))
 
-#define         IS_FL_BSTIM32_CLOCK_SRC(__VALUE__)                 (((__VALUE__) == FL_RCC_BSTIM32_CLK_SOURCE_APB1CLK)||\
+#define         IS_FL_BSTIM32_CLOCK_SRC(__VALUE__)                 (((__VALUE__) == FL_RCC_BSTIM32_CLK_SOURCE_APB2CLK)||\
                                                                     ((__VALUE__) == FL_RCC_BSTIM32_CLK_SOURCE_LSCLK)||\
-                                                                    ((__VALUE__) == FL_RCC_BSTIM32_CLK_SOURCE_RCLP)||\
+                                                                    ((__VALUE__) == FL_RCC_BSTIM32_CLK_SOURCE_LPOSC)||\
                                                                     ((__VALUE__) == FL_RCC_BSTIM32_CLK_SOURCE_RCMF_PSC))
 
 /**
@@ -113,7 +114,7 @@ FL_ErrorStatus FL_BSTIM32_Init(BSTIM32_Type *BSTIM32x, FL_BSTIM32_InitTypeDef *i
     }
     /* 手动触发更新事件，将配置值写入 */
     FL_BSTIM32_GenerateUpdateEvent(BSTIM32x);
-    while((!FL_BSTIM32_IsActiveFlag_Update(BSTIM32x))&i)
+    while((!FL_BSTIM32_IsActiveFlag_Update(BSTIM32x))&&i)
     {
         i--;
     }
@@ -133,13 +134,15 @@ void FL_BSTIM32_StructInit(FL_BSTIM32_InitTypeDef *initStruct)
     initStruct->prescaler         = 0;
     initStruct->autoReload        = 0xFFFFFFFF;
     initStruct->autoReloadState   = FL_ENABLE;
-    initStruct->clockSource       = FL_RCC_BSTIM32_CLK_SOURCE_APB1CLK;
+    initStruct->clockSource       = FL_RCC_BSTIM32_CLK_SOURCE_APB2CLK;
 }
 
 /**
   * @}
   */
 
+#endif /* FL_BSTIM32_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -148,4 +151,4 @@ void FL_BSTIM32_StructInit(FL_BSTIM32_InitTypeDef *initStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_comp.c

@@ -6,24 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_comp.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_opa.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -33,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_COMP_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup COMP_FL_Private_Macros
   * @{
@@ -116,8 +116,8 @@ FL_ErrorStatus FL_COMP_Init(COMP_Type *COMPx, FL_COMP_InitTypeDef *initStruct)
     /* 比较器使用vref 打开vref_buf */
     if((initStruct->negativeInput == FL_COMP_INN_SOURCE_VREF) || (initStruct->negativeInput == FL_COMP_INN_SOURCE_VREF_DIV_2))
     {
-        FL_OPA_EnableVrefBuffer(OPA1);//使能
-        FL_OPA_DisableBypassVrefBuffer(OPA1);//不bypass
+        FL_OPA_EnableVrefBuffer(OPA1);  /* 使能 */
+        FL_OPA_DisableBypassVrefBuffer(OPA1);   /* 不bypass */
     }
     if(COMPx == COMP1)
     {
@@ -167,6 +167,8 @@ void FL_COMP_StructInit(FL_COMP_InitTypeDef *initStruct)
   * @}
   */
 
+#endif /* FL_COMP_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -175,4 +177,4 @@ void FL_COMP_StructInit(FL_COMP_InitTypeDef *initStruct)
   * @}
   */
 
-/*************************************************************END OF FILE************************************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_crc.c

@@ -6,21 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_crc.h"
-#include "fm33_assert.h"
+
+
+/* Includes ------------------------------------------------------------------*/
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -30,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_CRC_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup CRC_FL_Private_Macros
   * @{
@@ -150,6 +153,8 @@ void FL_CRC_StructInit(FL_CRC_InitTypeDef *CRC_InitStruct)
   * @}
   */
 
+#endif /* FL_CRC_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -158,4 +163,4 @@ void FL_CRC_StructInit(FL_CRC_InitTypeDef *CRC_InitStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_divas.c

@@ -6,22 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_divas.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_DIVAS_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup DIVAS_FL_Private_Macros
   * @{
@@ -144,6 +146,8 @@ uint32_t FL_DIVAS_Hdiv_Calculation(DIV_Type *DIVx, int32_t DivisorEnd, int16_t D
   * @}
   */
 
+#endif /* FL_DIVAS_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -152,4 +156,4 @@ uint32_t FL_DIVAS_Hdiv_Calculation(DIV_Type *DIVx, int32_t DivisorEnd, int16_t D
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_dma.c

@@ -6,22 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_dma.h"
-#include "fm33_assert.h"
+
+
+/* Includes ------------------------------------------------------------------*/
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_DMA_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup DMA_FL_Private_Macros
   * @{
@@ -226,6 +228,8 @@ FL_ErrorStatus FL_DMA_StartTransmission(DMA_Type *DMAx, FL_DMA_ConfigTypeDef *co
   * @}
   */
 
+#endif /* FL_DMA_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -235,4 +239,4 @@ FL_ErrorStatus FL_DMA_StartTransmission(DMA_Type *DMAx, FL_DMA_ConfigTypeDef *co
   */
 
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_exti.c

@@ -6,26 +6,33 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_exti.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
+
+/** @addtogroup FM33LC0XX_FL_Driver
+  * @{
+  */
 
-/** @addtogroup FM33LC0XX_FL_Driver_EXTI
+/** @addtogroup EXTI
   * @{
   */
 
+#ifdef FL_EXTI_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup EXTI_FL_Private_Macros
   * @{
@@ -66,7 +73,7 @@
   * @}
   */
 
-/* Private macros ------------------------------------------------------------*/
+/* Private consts ------------------------------------------------------------*/
 /** @addtogroup EXTI_FL_Private_Consts
   * @{
   */
@@ -117,9 +124,9 @@ static const pSetTrigEdgeFunc setTrigEdgeFuncs[] =
 FL_ErrorStatus FL_EXTI_CommonInit(FL_EXTI_CommonInitTypeDef *EXTI_CommonInitStruct)
 {
     assert_param(IS_EXTI_CLK_SOURCE(EXTI_CommonInitStruct->clockSource));
-    // 使能IO时钟寄存器总线时钟
+    /* 使能IO时钟寄存器总线时钟 */
     FL_RCC_EnableGroup1BusClock(FL_RCC_GROUP1_BUSCLK_PAD);
-    // 使能并配置外部中断时钟源
+    /* 使能并配置外部中断时钟源 */
     FL_RCC_EnableGroup1OperationClock(FL_RCC_GROUP1_OPCLK_EXTI);
     FL_RCC_SetEXTIClockSource(EXTI_CommonInitStruct->clockSource);
     return FL_PASS;
@@ -128,13 +135,13 @@ FL_ErrorStatus FL_EXTI_CommonInit(FL_EXTI_CommonInitTypeDef *EXTI_CommonInitStru
 /**
   * @brief  复位EXTI通用配置设置
   *
-  * @retval ErrorStatus枚举值
-  *         -FL_FAIL 发生错误
-  *         -FL_PASS EXTI通用设置复位成功
+  * @retval 执行结果
+  *         -FL_PASS 外设寄存器值恢复复位值
+  *         -FL_FAIL 未成功执行
   */
 FL_ErrorStatus FL_EXTI_CommonDeinit(void)
 {
-    // 关闭外部中断时钟源
+    /* 关闭外部中断时钟源 */
     FL_RCC_DisableGroup1OperationClock(FL_RCC_GROUP1_OPCLK_EXTI);
     return FL_PASS;
 }
@@ -164,25 +171,28 @@ FL_ErrorStatus FL_EXTI_Init(uint32_t extiLineX, FL_EXTI_InitTypeDef *EXTI_InitSt
 {
     uint8_t extiLineId;
     uint32_t tmpExtiLineX;
-    // 检查参数合法性
+    /* 检查参数合法性 */
     assert_param(IS_EXTI_ALL_INSTANCE(extiLineX));
     assert_param(IS_EXTI_INPUT_GROUP(EXTI_InitStruct->input));
     assert_param(IS_EXTI_TRIG_EDGE(EXTI_InitStruct->triggerEdge));
     assert_param(IS_EXTI_FILTER(EXTI_InitStruct->filter));
-    // 获取EXTI中断线对应id号
+    /* 获取EXTI中断线对应id号 */
     tmpExtiLineX = extiLineX;
     for(extiLineId = 0; tmpExtiLineX != FL_GPIO_EXTI_LINE_0; tmpExtiLineX >>= 1, extiLineId++);
-    // 设置中断线连接的IO
+    /* 设置中断线连接的IO */
     setExtiLineFuncs[extiLineId](GPIO, EXTI_InitStruct->input << (2 * extiLineId));
-    // 设置数字滤波
+    /* 设置数字滤波 */
     EXTI_InitStruct->filter == FL_ENABLE ? FL_GPIO_EnableDigitalFilter(GPIO, extiLineX) : FL_GPIO_DisableDigitalFilter(GPIO, extiLineX);
-    // 设置中断线触发边沿
+    /* 设置中断线触发边沿 */
     setTrigEdgeFuncs[extiLineId / 16](GPIO, extiLineX, EXTI_InitStruct->triggerEdge);
-    // 延时需要大于1个32K的周期
-    FL_DelayUs(50);
-    // 清除外部中断标志
+    /* 延时需要大于3个32K的周期 */
+        for(uint16_t i;i<1000;++i)
+        {
+            __NOP();
+        }
+    /* 清除外部中断标志 */
     FL_GPIO_ClearFlag_EXTI(GPIO, extiLineX);
-    // 清除中断挂起
+    /* 清除中断挂起 */
     NVIC_ClearPendingIRQ(GPIO_IRQn);
     return FL_PASS;
 }
@@ -198,16 +208,16 @@ FL_ErrorStatus FL_EXTI_DeInit(uint32_t extiLineX)
 {
     uint8_t extiLineId;
     uint32_t tmpExtiLineX;
-    // 检查参数合法性
+    /* 检查参数合法性 */
     assert_param(IS_EXTI_ALL_INSTANCE(extiLineX));
-    // 获取EXTI中断线对应id号
+    /* 获取EXTI中断线对应id号 */
     tmpExtiLineX = extiLineX;
     for(extiLineId = 0; tmpExtiLineX != FL_GPIO_EXTI_LINE_0; tmpExtiLineX >>= 1, extiLineId++);
-    // 清除外部中断标志
+    /* 清除外部中断标志 */
     FL_GPIO_ClearFlag_EXTI(GPIO, extiLineX);
-    // 中断线触发边沿禁止
+    /* 中断线触发边沿禁止 */
     setTrigEdgeFuncs[extiLineId / 16](GPIO, extiLineX, FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE);
-    // 禁止数字滤波
+    /* 禁止数字滤波 */
     FL_GPIO_DisableDigitalFilter(GPIO, extiLineX);
     return FL_PASS;
 }
@@ -229,7 +239,14 @@ void FL_EXTI_StructInit(FL_EXTI_InitTypeDef *EXTI_InitStruct)
   * @}
   */
 
+#endif /* FL_EXTI_DRIVER_ENABLED */
+
 /**
   * @}
   */
-/*************************************************************END OF FILE************************************************************/
+
+/**
+  * @}
+  */
+
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_flash.c

@@ -6,23 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_flash.h"
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_dma.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -32,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_FLASH_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup FLASH_FL_Private_Macros
   * @{
@@ -551,6 +552,8 @@ FL_ErrorStatus FL_FLASH_Read_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t
   * @}
   */
 
+#endif /* FL_FLASH_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -559,13 +562,4 @@ FL_ErrorStatus FL_FLASH_Read_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t
   * @}
   */
 
-/*************************************************************END OF FILE************************************************************/
-
-
-
-
-
-
-
-
-
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_gpio.c

@@ -1,27 +1,27 @@
 /**
   ****************************************************************************************************
-  * @file    fm33lC0xx_fl_gpio.c
+  * @file    fm33lc0xx_fl_gpio.c
   * @author  FMSH Application Team
   * @brief   Src file of GPIO FL Module
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_gpio.h"
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_GPIO_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup GPIO_FL_Private_Macros
   * @{
@@ -307,6 +309,8 @@ void FL_GPIO_ALLPIN_LPM_MODE(void)
   * @}
   */
 
+#endif /* FL_GPIO_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -315,4 +319,4 @@ void FL_GPIO_ALLPIN_LPM_MODE(void)
   * @}
   */
 
-/*************************************************************END OF FILE************************************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_gptim.c

@@ -6,23 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_gptim.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -32,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_GPTIM_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------------*/
 /** @addtogroup GPTIM_FL_Private_Macros
   * @{
@@ -286,7 +287,7 @@ FL_ErrorStatus FL_GPTIM_Init(GPTIM_Type *TIMx, FL_GPTIM_InitTypeDef *init)
     }
     /* 手动触发更新事件，将配置值写入 */
     FL_GPTIM_GenerateUpdateEvent(TIMx);
-    while((!FL_GPTIM_IsActiveFlag_Update(TIMx))&i)
+    while((!FL_GPTIM_IsActiveFlag_Update(TIMx))&&i)
     {
         i--;
     }
@@ -607,6 +608,8 @@ void FL_GPTIM_IC_StructInit(FL_GPTIM_IC_InitTypeDef *ic_init)
   * @}
   */
 
+#endif /* FL_GPTIM_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -614,4 +617,4 @@ void FL_GPTIM_IC_StructInit(FL_GPTIM_IC_InitTypeDef *ic_init)
 /**
   * @}
   */
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_i2c.c

@@ -6,24 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
 
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_i2c.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -33,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_I2C_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup I2C_FL_Private_Macros
   * @{
@@ -128,7 +128,7 @@ FL_ErrorStatus FL_I2C_MasterMode_Init(I2C_Type *I2Cx, FL_I2C_MasterMode_InitType
             I2C_Clk_Freq = FL_RCC_GetSystemClockFreq();
             break;
         case FL_RCC_I2C_CLK_SOURCE_RCMF_PSC:
-            I2C_Clk_Freq = FL_RCC_GetRC4MClockFreq();
+            I2C_Clk_Freq = FL_RCC_GetRCMFClockFreq();
             break;
         default:
             break;
@@ -229,6 +229,8 @@ void FL_I2C_SlaveMode_StructInit(FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct)
   * @}
   */
 
+#endif /* FL_I2C_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -237,7 +239,4 @@ void FL_I2C_SlaveMode_StructInit(FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
-
-
-
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_iwdt.c

@@ -6,22 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_iwdt.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_IWDT_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup IWDT_FL_Private_Macros
   * @{
@@ -117,15 +119,17 @@ void FL_IWDT_StructInit(FL_IWDT_InitTypeDef *IWDT_InitStruct)
 }
 
 /**
-  *@}
+  * @}
   */
 
+#endif /* FL_IWDT_DRIVER_ENABLED */
+
 /**
-  *@}
+  * @}
   */
 
 /**
-  *@}
+  * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_lcd.c

@@ -6,22 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_lcd.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_LCD_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup Private_Macros
   * @{
@@ -290,6 +292,8 @@ void FL_LCD_8COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t sta
   * @}
   */
 
+#endif /* FL_LCD_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -298,4 +302,4 @@ void FL_LCD_8COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t sta
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_lptim32.c

@@ -6,22 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_lptim32.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_LPTIM32_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup LPTIM32_FL_Private_Macros
   * @{
@@ -40,7 +42,7 @@
 
 #define         IS_FL_LPTIM32_OPCLK_SOURCE(__VALUE__)                   (((__VALUE__) == FL_RCC_LPTIM32_CLK_SOURCE_APB1CLK)||\
                                                                          ((__VALUE__) == FL_RCC_LPTIM32_CLK_SOURCE_LSCLK)||\
-                                                                         ((__VALUE__) == FL_RCC_LPTIM32_CLK_SOURCE_RCLP)||\
+                                                                         ((__VALUE__) == FL_RCC_LPTIM32_CLK_SOURCE_LPOSC)||\
                                                                          ((__VALUE__) == FL_RCC_LPTIM32_CLK_SOURCE_RCMF_PSC))
 
 #define         IS_FL_LPTIM32_CLK_SOURCE(__VALUE__)                     (((__VALUE__) == FL_LPTIM32_CLK_SOURCE_INTERNAL)||\
@@ -313,6 +315,8 @@ void FL_LPTIM32_OC_StructInit(FL_LPTIM32_OC_InitTypeDef *initStruct_OC)
   * @}
   */
 
+#endif /* FL_LPTIM32_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -321,5 +325,4 @@ void FL_LPTIM32_OC_StructInit(FL_LPTIM32_OC_InitTypeDef *initStruct_OC)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
-
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_lpuart.c

@@ -6,23 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_lpuart.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -32,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_LPUART_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup LPUART_FL_Private_Macros
   * @{
@@ -151,6 +152,10 @@ FL_ErrorStatus FL_LPUART_Init(LPUART_Type *LPUARTx, FL_LPUART_InitTypeDef *initS
         FL_RCC_EnableGroup1OperationClock(FL_RCC_GROUP1_OPCLK_LPUART0);
         /*时钟源选择*/
         FL_RCC_SetLPUART0ClockSource(initStruct->clockSrc << RCC_OPCCR1_LPUART0CKS_Pos);
+        if(initStruct->clockSrc == FL_RCC_LPUART0_CLK_SOURCE_RCMF)
+        {
+            FL_RCC_RCMF_Enable();
+        }
     }
     else
     {
@@ -160,6 +165,10 @@ FL_ErrorStatus FL_LPUART_Init(LPUART_Type *LPUARTx, FL_LPUART_InitTypeDef *initS
         FL_RCC_EnableGroup1OperationClock(FL_RCC_GROUP1_OPCLK_LPUART1);
         /*时钟源选择*/
         FL_RCC_SetLPUART1ClockSource(initStruct->clockSrc << RCC_OPCCR1_LPUART1CKS_Pos);
+        if(initStruct->clockSrc == FL_RCC_LPUART1_CLK_SOURCE_RCMF)
+        {
+            FL_RCC_RCMF_Enable();
+        }
     }
     /*发送接收配置*/
     if(initStruct->transferDirection & FL_LPUART_DIRECTION_TX)
@@ -234,6 +243,8 @@ void FL_LPUART_StructInit(FL_LPUART_InitTypeDef *initStruct)
   * @}
   */
 
+#endif /* FL_LPUART_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -242,4 +253,4 @@ void FL_LPUART_StructInit(FL_LPUART_InitTypeDef *initStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_opa.c

@@ -6,22 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_opa.h"
-#include "fm33_assert.h"
+
+
+/* Includes ------------------------------------------------------------------*/
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_OPA_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup OPA_FL_Private_Macros
   * @{
@@ -168,15 +170,17 @@ void FL_OPA_StructInit(FL_OPA_InitTypeDef *initStruct)
 }
 
 /**
-  *@}
+  * @}
   */
 
+#endif /* FL_OPA_DRIVER_ENABLED */
+
 /**
-  *@}
+  * @}
   */
 
 /**
-  *@}
+  * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_pmu.c

@@ -6,25 +6,37 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_pmu.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
+
+/** @addtogroup FM33LC0XX_FL_Driver
+  * @{
+  */
 
+/** @addtogroup PMU
+  * @{
+  */
 
+#ifdef FL_PMU_DRIVER_ENABLED
 
+/* Private macros ------------------------------------------------------------*/
+/** @addtogroup PMU_FL_Private_Macros
+  * @{
+  */
 
 #define         IS_FL_PMU_INSTANCE(INSTANCE)                (((INSTANCE) == PMU))
 
@@ -53,6 +65,7 @@
 /**
   *@}
   */
+
 /** @addtogroup PMU_FL_EF_Init
   * @{
   */
@@ -135,10 +148,19 @@ void FL_PMU_StructInit(FL_PMU_SleepInitTypeDef *LPM_InitStruct)
     LPM_InitStruct->wakeupDelay         = FL_PMU_WAKEUP_DELAY_2US;
     LPM_InitStruct->coreVoltageScaling  = FL_DISABLE;
 }
+
 /**
-  *@}
+  * @}
   */
+
+#endif /* FL_PMU_DRIVER_ENABLED */
+
 /**
-  *@}
+  * @}
   */
-/*********************** (C) COPYRIGHT Fudan Microelectronics *****END OF FILE************************/
+
+/**
+  * @}
+  */
+
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_rcc.c

@@ -1,27 +1,25 @@
 /**
   ****************************************************************************************************
-  * @file    fm33lC0xx_fl_rcc.c
+  * @file    fm33lc0xx_fl_rcc.c
   * @author  FMSH Application Team
   * @brief   Src file of RCC FL Module
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
 /* Includes ------------------------------------------------------------------*/
-#include "system_fm33lc0xx.h"
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +29,8 @@
   * @{
   */
 
+#ifdef FL_RCC_DRIVER_ENABLED
+
 /** @addtogroup RCC_FL_EF_Operation
   * @{
   */
@@ -42,7 +42,7 @@
   */
 uint32_t FL_RCC_GetUSBClockFreqToSysclk(void)
 {
-    if(FL_RCC_GetUSBClockSource() == FL_RCC_USB_CLOCK_SELECT_48M)
+    if(FL_RCC_GetUSBClockOutput() == FL_RCC_USB_CLK_OUT_48M)
     {
         return 48000000;
     }
@@ -73,28 +73,32 @@ uint32_t FL_RCC_GetSystemClockFreq(void)
             break;
         /* 系统时钟源为XTHF */
         case FL_RCC_SYSTEM_CLK_SOURCE_XTHF:
-            frequency = XTHF_VALUE;
+            frequency = XTHFClock;
             break;
         /* 系统时钟源为PLL */
         case FL_RCC_SYSTEM_CLK_SOURCE_PLL:
             frequency = FL_RCC_GetPLLClockFreq();
             break;
         /* 系统时钟源为内部RCMF */
-        case FL_RCC_SYSTEM_CLK_SOURCE_RCMFPSC:
-            /* 根据RC4M的分频配置得出系统时钟 */
-            frequency = FL_RCC_GetRC4MClockFreq();
+        case FL_RCC_SYSTEM_CLK_SOURCE_RCMF_PSC:
+            /* 根据RCMF的分频配置得出系统时钟 */
+            frequency = FL_RCC_GetRCMFClockFreq();
             break;
-        /* 系统时钟源为XTLF */
-        case FL_RCC_SYSTEM_CLK_SOURCE_XTLF:
-            /* 根据外部晶振的频率得出系统时钟 */
-            frequency = XTLF_VALUE;
+        /* 系统时钟源为LSCLK */
+        case FL_RCC_SYSTEM_CLK_SOURCE_LSCLK:
+            #ifdef USE_LSCLK_CLOCK_SRC_LPOSC
+            frequency = 32000;
+            #else
+            frequency = XTLFClock;
+            #endif
             break;
+        /* 系统时钟源为USB BCK */
         case FL_RCC_SYSTEM_CLK_SOURCE_USBCLK:
-            /* USB时钟频率获取*/
+            /* USB时钟频率获取 */
             frequency = FL_RCC_GetUSBClockFreqToSysclk();
             break;
-        /* 系统时钟源为RCLP */
-        case FL_RCC_SYSTEM_CLK_SOURCE_RCLP:
+        /* 系统时钟源为LPOSC */
+        case FL_RCC_SYSTEM_CLK_SOURCE_LPOSC:
             frequency = 32000;
             break;
         default:
@@ -204,12 +208,12 @@ uint32_t FL_RCC_GetAPB2ClockFreq(void)
     return frequency;
 }
 /**
-  * @brief  获取RC4M输出时钟频率
+  * @brief  获取RCMF输出时钟频率
   *
-  * @retval RC4M输出时钟频率(Hz)
+  * @retval RCMF输出时钟频率(Hz)
   *
   */
-uint32_t FL_RCC_GetRC4MClockFreq(void)
+uint32_t FL_RCC_GetRCMFClockFreq(void)
 {
     uint32_t frequency = 0;
     switch(FL_RCC_RCMF_GetPrescaler())
@@ -276,7 +280,7 @@ uint32_t FL_RCC_GetPLLClockFreq(void)
             frequency = FL_RCC_GetRCHFClockFreq();
             break;
         case FL_RCC_PLL_CLK_SOURCE_XTHF:
-            frequency = XTHF_VALUE;
+            frequency = XTHFClock;
             break;
         default:
             frequency = FL_RCC_GetRCHFClockFreq();
@@ -320,6 +324,8 @@ uint32_t FL_RCC_GetPLLClockFreq(void)
   * @}
   */
 
+#endif /* FL_RCC_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -328,4 +334,4 @@ uint32_t FL_RCC_GetPLLClockFreq(void)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_rng.c

@@ -6,23 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
 
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rng.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -31,6 +30,8 @@
   * @{
   */
 
+#ifdef FL_RNG_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup RNG_FL_Private_Macros
 * @{
@@ -176,15 +177,17 @@ uint32_t GetCrc32(uint32_t dataIn)
 }
 
 /**
-  *@}
+  * @}
   */
 
+#endif /* FL_RNG_DRIVER_ENABLED */
+
 /**
-  *@}
+  * @}
   */
 
 /**
-  *@}
+  * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_rtc.c

@@ -6,22 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_rtc.h"
-#include "fm33_assert.h"
+
+
+/* Includes ------------------------------------------------------------------*/
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_RTC_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup RTC_FL_Private_Macros
   * @{
@@ -174,6 +176,8 @@ void FL_RTC_StructInit(FL_RTC_InitTypeDef *initStruct)
   * @}
   */
 
+#endif /* FL_RTC_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -182,4 +186,4 @@ void FL_RTC_StructInit(FL_RTC_InitTypeDef *initStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_spi.c

@@ -6,22 +6,23 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_spi.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
+
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
   */
@@ -30,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_SPI_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup Private_Macros
   * @{
@@ -197,6 +200,8 @@ void FL_SPI_StructInit(FL_SPI_InitTypeDef *initStruct)
   * @}
   */
 
+#endif /* FL_SPI_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -205,4 +210,4 @@ void FL_SPI_StructInit(FL_SPI_InitTypeDef *initStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_svd.c

@@ -6,23 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_svd.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -32,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_SVD_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup SVD_FL_Private_Macros
   * @{
@@ -152,15 +153,17 @@ void FL_SVD_StructInit(FL_SVD_InitTypeDef *initStruct)
 }
 
 /**
-  *@}
+  * @}
   */
 
+#endif /* FL_SVD_DRIVER_ENABLED */
+
 /**
-  *@}
+  * @}
   */
 
 /**
-  *@}
+  * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_u7816.c

@@ -6,22 +6,22 @@
   *******************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   *******************************************************************************************************
   */
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_rmu.h"
-#include "fm33lc0xx_fl_u7816.h"
-#include "fm33_assert.h"
+
+
+/* Includes ------------------------------------------------------------------*/
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_U7816_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup U7816_FL_Private_Macros
   * @{
@@ -224,6 +226,8 @@ void FL_U7816_StructInit(FL_U7816_InitTypeDef *U7816_InitStruct)
   * @}
   */
 
+#endif /* FL_U7816_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -232,5 +236,4 @@ void FL_U7816_StructInit(FL_U7816_InitTypeDef *U7816_InitStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
-
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_uart.c

@@ -6,22 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_uart.h"
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_UART_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup UART_FL_Private_Macros
   * @{
@@ -187,7 +189,7 @@ FL_ErrorStatus FL_UART_Init(UART_Type *UARTx, FL_UART_InitTypeDef *initStruct)
                 Fclk = FL_RCC_GetSystemClockFreq();
                 break;
             case FL_RCC_UART0_CLK_SOURCE_RCMF_PSC:
-                Fclk = FL_RCC_GetRC4MClockFreq();
+                Fclk = FL_RCC_GetRCMFClockFreq();
                 break;
         }
         baudRate = Fclk / initStruct->baudRate - 1;
@@ -209,7 +211,7 @@ FL_ErrorStatus FL_UART_Init(UART_Type *UARTx, FL_UART_InitTypeDef *initStruct)
                 Fclk = FL_RCC_GetSystemClockFreq();
                 break;
             case FL_RCC_UART1_CLK_SOURCE_RCMF_PSC:
-                Fclk = FL_RCC_GetRC4MClockFreq();
+                Fclk = FL_RCC_GetRCMFClockFreq();
                 break;
         }
         baudRate = Fclk / initStruct->baudRate - 1;
@@ -342,6 +344,8 @@ void FL_UART_StructInit(FL_UART_InitTypeDef *initStruct)
   * @}
   */
 
+#endif /* FL_UART_DRIVER_ENABLED */
+
 /**
   * @}
   */
@@ -350,4 +354,4 @@ void FL_UART_StructInit(FL_UART_InitTypeDef *initStruct)
   * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl_wwdt.c

@@ -6,22 +6,22 @@
   ****************************************************************************************************
   * @attention
   *
-  * Copyright (c) [2019] [Fudan Microelectronics]
-  * THIS SOFTWARE is licensed under the Mulan PSL v1.
-  * can use this software according to the terms and conditions of the Mulan PSL v1.
-  * You may obtain a copy of Mulan PSL v1 at:
-  * http://license.coscl.org.cn/MulanPSL
-  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
-  * PURPOSE.
-  * See the Mulan PSL v1 for more details.
+  * Copyright (c) [2021] [Fudan Microelectronics]
+  * THIS SOFTWARE is licensed under Mulan PSL v2.
+  * You can use this software according to the terms and conditions of the Mulan PSL v2.
+  * You may obtain a copy of Mulan PSL v2 at:
+  *          http://license.coscl.org.cn/MulanPSL2
+  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+  * See the Mulan PSL v2 for more details.
   *
   ****************************************************************************************************
   */
+
+
 /* Includes ------------------------------------------------------------------*/
-#include "fm33lc0xx_fl_rcc.h"
-#include "fm33lc0xx_fl_wwdt.h"
-#include "fm33_assert.h"
+#include "fm33lc0xx_fl.h"
 
 /** @addtogroup FM33LC0XX_FL_Driver
   * @{
@@ -31,6 +31,8 @@
   * @{
   */
 
+#ifdef FL_WWDT_DRIVER_ENABLED
+
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup WWDT_FL_Private_Macros
   * @{
@@ -111,15 +113,17 @@ void FL_WWDT_StructInit(FL_WWDT_InitTypeDef *WWDT_InitStruct)
 }
 
 /**
-  *@}
+  * @}
   */
 
+#endif /* FL_WWDT_DRIVER_ENABLED */
+
 /**
-  *@}
+  * @}
   */
 
 /**
-  *@}
+  * @}
   */
 
-/******************************************* END OF FILE *******************************************/
+/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/

bsp/fm33lc026/libraries/HAL_Drivers/SConscript

@@ -8,6 +8,9 @@ cwd = GetCurrentDir()
 src = Split("""
 """)
 
+if GetDepend(['RT_USING_PIN']):
+    src += ['drv_gpio.c']
+
 if GetDepend(['RT_USING_SERIAL']):
     src += ['drv_usart.c']
 

bsp/fm33lc026/libraries/HAL_Drivers/config/uart_config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -24,7 +24,7 @@ extern "C" {
         .name = "uart0",                                            \
         .InitTypeDef = UART0,                                       \
         .irq_type = UART0_IRQn,                                    \
-        .clockSrc = FL_RCC_UART0_CLK_SOURCE_APB1CLK,				\
+        .clockSrc = FL_RCC_UART0_CLK_SOURCE_APB1CLK,                \
     }
 #endif /* UART0_CONFIG */
 #endif /* BSP_USING_UART0 */
@@ -51,7 +51,7 @@ extern "C" {
     }
 #endif /* UART4_CONFIG */
 #endif /* BSP_USING_UART4 */
-    
+
 #if defined(BSP_USING_UART5)
 #ifndef UART5_CONFIG
 #define UART5_CONFIG                                                \
@@ -61,8 +61,8 @@ extern "C" {
         .irq_type = UART5_IRQn,                                    \
     }
 #endif /* UART5_CONFIG */
-#endif /* BSP_USING_UART5 */	
-	
+#endif /* BSP_USING_UART5 */
+
 #if defined(BSP_USING_LPUART0)
 #ifndef LPUART0_CONFIG
 #define LPUART0_CONFIG                                                \
@@ -73,7 +73,7 @@ extern "C" {
     }
 #endif /* LPUART0_CONFIG */
 #endif /* BSP_USING_LPUART0 */
-	
+
 #if defined(BSP_USING_LPUART1)
 #ifndef LPUART1_CONFIG
 #define LPUART1_CONFIG                                                \

bsp/fm33lc026/libraries/HAL_Drivers/drv_common.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/fm33lc026/libraries/HAL_Drivers/drv_common.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/fm33lc026/libraries/HAL_Drivers/drv_config.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -9,7 +9,7 @@
  * 2020-10-14     Dozingfiretruck   Porting for stm32wbxx
  * 2021-08-27     Jiao         first version
 */
- 
+
 #ifndef __DRV_CONFIG_H__
 #define __DRV_CONFIG_H__
 

bsp/fm33lc026/libraries/HAL_Drivers/drv_gpio.c

@@ -0,0 +1,444 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2022-7-20     wudiyidashi        first version
+ */
+
+#include <board.h>
+#include "drv_gpio.h"
+
+#ifdef RT_USING_PIN
+
+#define PIN_NUM(port, no) (((((port)&0xFu) << 4) | ((no)&0xFu)))
+#define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu))
+#define PIN_NO(pin) ((uint8_t)((pin)&0xFu))
+
+#define PIN_STPORT(pin) ((GPIO_Type *)(GPIOA_BASE + (0x40u * PIN_PORT(pin))))
+#define PIN_STPIN(pin) ((uint16_t)(1u << PIN_NO(pin)))
+
+#define PIN_STPORT_MAX 4u
+
+/*
+    --GPIO-- |   EXTI INPUT   | --EXTI--
+    PA0~PA3  | EXTI_ASEL[1:0] | EXTI[0]
+    PA4~PA7  | EXTI_ASEL[3:2] | EXTI[1]
+    PA8~PA11 | EXTI_ASEL[5:4] | EXTI[2]
+    PA12~PA15| EXTI_ASEL[7:6] | EXTI[3]
+    PB0~PB3  | EXTI_BSEL[1:0] | EXTI[4]
+    PB4~PB7  | EXTI_BSEL[3:2] | EXTI[5]
+    PB8~PB11 | EXTI_BSEL[5:4] | EXTI[6]
+  PB12~PB15  | EXTI_BSEL[7:6] | EXTI[7]
+    PC0~PC3  | EXTI_CSEL[1:0] | EXTI[8]
+    PC4~PC7  | EXTI_CSEL[3:2] | EXTI[9]
+  PC8~PC11   | EXTI_CSEL[5:4] | EXTI[10]
+    PC12     |     -          | EXTI[11]
+    PD0~PD3  | EXTI_DSEL[1:0] | EXTI[12]
+    PD4~PD7  | EXTI_DSEL[3:2] | EXTI[13]
+    PD8~PD11 | EXTI_DSEL[5:4] | EXTI[14]
+    PD12     |     -          | EXTI[15]
+
+{PIN_NUM(PA3),FL_GPIO_EXTI_LINE_0}
+{PIN_NUM(PA7),FL_GPIO_EXTI_LINE_0}
+    ...
+{PIN_NUM(PD12),FL_GPIO_EXTI_LINE_0}
+*/
+
+static const struct pin_irq_map pin_irq_map[] =
+    {
+        {3, FL_GPIO_EXTI_LINE_0},
+        {7, FL_GPIO_EXTI_LINE_1},
+        {11, FL_GPIO_EXTI_LINE_2},
+        {15, FL_GPIO_EXTI_LINE_3},
+        {19, FL_GPIO_EXTI_LINE_4},
+        {23, FL_GPIO_EXTI_LINE_5},
+        {27, FL_GPIO_EXTI_LINE_6},
+        {31, FL_GPIO_EXTI_LINE_7},
+        {35, FL_GPIO_EXTI_LINE_8},
+        {39, FL_GPIO_EXTI_LINE_9},
+        {43, FL_GPIO_EXTI_LINE_10},
+        {44, FL_GPIO_EXTI_LINE_11},
+        {51, FL_GPIO_EXTI_LINE_12},
+        {55, FL_GPIO_EXTI_LINE_13},
+        {59, FL_GPIO_EXTI_LINE_14},
+        {60, FL_GPIO_EXTI_LINE_15},
+};
+
+static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
+    {
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+        {-1, 0, RT_NULL, RT_NULL},
+};
+static uint32_t pin_irq_enable_mask = 0;
+
+#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
+
+static rt_base_t fm33_pin_get(const char *name)
+{
+    rt_base_t pin = 0;
+    int hw_port_num, hw_pin_num = 0;
+    int i, name_len;
+
+    name_len = rt_strlen(name);
+
+    if ((name_len < 4) || (name_len >= 6))
+    {
+        return -RT_EINVAL;
+    }
+    if ((name[0] != 'P') || (name[2] != '.'))
+    {
+        return -RT_EINVAL;
+    }
+
+    if ((name[1] >= 'A') && (name[1] <= 'Z'))
+    {
+        hw_port_num = (int)(name[1] - 'A');
+    }
+    else
+    {
+        return -RT_EINVAL;
+    }
+
+    for (i = 3; i < name_len; i++)
+    {
+        hw_pin_num *= 10;
+        hw_pin_num += name[i] - '0';
+    }
+
+    pin = PIN_NUM(hw_port_num, hw_pin_num);
+
+    return pin;
+}
+
+static void fm33_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
+{
+    GPIO_Type *gpio_port;
+    uint16_t gpio_pin;
+
+    if (PIN_PORT(pin) < PIN_STPORT_MAX)
+    {
+        gpio_port = PIN_STPORT(pin);
+        gpio_pin = PIN_STPIN(pin);
+
+        if (value == PIN_LOW)
+        {
+            FL_GPIO_ResetOutputPin(gpio_port, gpio_pin);
+        }
+        else
+        {
+            FL_GPIO_SetOutputPin(gpio_port, gpio_pin);
+        }
+    }
+}
+
+static int fm33_pin_read(rt_device_t dev, rt_base_t pin)
+{
+    GPIO_Type *gpio_port;
+    uint16_t gpio_pin;
+    int value = PIN_LOW;
+
+    if (PIN_PORT(pin) < PIN_STPORT_MAX)
+    {
+        gpio_port = PIN_STPORT(pin);
+        gpio_pin = PIN_STPIN(pin);
+        value = FL_GPIO_GetInputPin(gpio_port, gpio_pin);
+    }
+
+    return value;
+}
+
+static void fm33_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
+{
+    FL_GPIO_InitTypeDef GPIO_InitStruct;
+
+    if (PIN_PORT(pin) >= PIN_STPORT_MAX)
+    {
+        return;
+    }
+
+    /* Configure GPIO_InitStructure */
+    GPIO_InitStruct.pin = PIN_STPIN(pin);
+    GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+    GPIO_InitStruct.pull = FL_DISABLE;
+    GPIO_InitStruct.remapPin = FL_DISABLE;
+
+    if (mode == PIN_MODE_OUTPUT)
+    {
+        /* output setting */
+        GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT;
+        GPIO_InitStruct.pull = FL_DISABLE;
+    }
+    else if (mode == PIN_MODE_INPUT)
+    {
+        /* input setting: not pull. */
+        GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT;
+        GPIO_InitStruct.pull = FL_DISABLE;
+    }
+    else if (mode == PIN_MODE_INPUT_PULLUP)
+    {
+        /* input setting: pull up. */
+        GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT;
+        GPIO_InitStruct.pull = FL_ENABLE;
+    }
+    else if (mode == PIN_MODE_INPUT_PULLDOWN)
+    {
+        /* input setting: pull down. */
+        GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT;
+        GPIO_InitStruct.pull = FL_DISABLE;
+    }
+    else if (mode == PIN_MODE_OUTPUT_OD)
+    {
+        /* output setting: od. */
+        GPIO_InitStruct.mode = FL_GPIO_OUTPUT_OPENDRAIN;
+        GPIO_InitStruct.pull = FL_DISABLE;
+    }
+
+    FL_GPIO_Init(PIN_STPORT(pin), &GPIO_InitStruct);
+}
+
+rt_inline rt_int32_t pin2irqindex(rt_uint32_t pin)
+{
+    rt_uint8_t irqindex;
+    for (irqindex = 4 * PIN_PORT(pin); irqindex <= ITEM_NUM(pin_irq_map); irqindex++)
+    {
+        if (pin_irq_map[irqindex].pin >= pin && pin_irq_map[irqindex - 1].pin < pin)
+        {
+            return irqindex;
+        }
+    }
+    return -1;
+}
+
+rt_inline const struct pin_irq_map *get_pin_irq_map(rt_base_t pin)
+{
+    rt_int32_t mapindex;
+    mapindex = pin2irqindex(pin);
+    if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map))
+    {
+        return RT_NULL;
+    }
+    return &pin_irq_map[mapindex];
+};
+
+static rt_err_t fm33_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
+                                    rt_uint32_t mode, void (*hdr)(void *args), void *args)
+{
+    rt_base_t level;
+    rt_int32_t irqindex = -1;
+
+    if (PIN_PORT(pin) >= PIN_STPORT_MAX)
+    {
+        return -RT_ENOSYS;
+    }
+
+    irqindex = pin2irqindex(pin);
+    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
+    {
+        return RT_ENOSYS;
+    }
+
+    level = rt_hw_interrupt_disable();
+    if (pin_irq_hdr_tab[irqindex].pin == pin &&
+        pin_irq_hdr_tab[irqindex].hdr == hdr &&
+        pin_irq_hdr_tab[irqindex].mode == mode &&
+        pin_irq_hdr_tab[irqindex].args == args)
+    {
+        rt_hw_interrupt_enable(level);
+        return RT_EOK;
+    }
+    if (pin_irq_hdr_tab[irqindex].pin != -1)
+    {
+        rt_hw_interrupt_enable(level);
+        return RT_EBUSY;
+    }
+    pin_irq_hdr_tab[irqindex].pin = pin;
+    pin_irq_hdr_tab[irqindex].hdr = hdr;
+    pin_irq_hdr_tab[irqindex].mode = mode;
+    pin_irq_hdr_tab[irqindex].args = args;
+    rt_hw_interrupt_enable(level);
+
+    return RT_EOK;
+}
+
+static rt_err_t fm33_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
+{
+    rt_base_t level;
+    rt_int32_t irqindex = -1;
+
+    if (PIN_PORT(pin) >= PIN_STPORT_MAX)
+    {
+        return -RT_ENOSYS;
+    }
+
+    irqindex = pin2irqindex(PIN_STPIN(pin));
+    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
+    {
+        return RT_ENOSYS;
+    }
+
+    level = rt_hw_interrupt_disable();
+    if (pin_irq_hdr_tab[irqindex].pin == -1)
+    {
+        rt_hw_interrupt_enable(level);
+        return RT_EOK;
+    }
+    pin_irq_hdr_tab[irqindex].pin = -1;
+    pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
+    pin_irq_hdr_tab[irqindex].mode = 0;
+    pin_irq_hdr_tab[irqindex].args = RT_NULL;
+    rt_hw_interrupt_enable(level);
+
+    return RT_EOK;
+}
+
+static rt_err_t fm33_pin_irq_enable(struct rt_device *device, rt_base_t pin,
+                                    rt_uint32_t enabled)
+{
+    const struct pin_irq_map *irqmap;
+    rt_base_t level;
+    rt_int8_t irqindex = 0;
+    FL_GPIO_InitTypeDef GPIO_InitStruct;
+    FL_EXTI_InitTypeDef extiInitStruct = {0};
+    FL_EXTI_CommonInitTypeDef extiCommonInitStruct = {0};
+
+    FL_RCC_EnableEXTIOnSleep();
+
+    extiCommonInitStruct.clockSource = FL_RCC_EXTI_CLK_SOURCE_HCLK;
+    FL_EXTI_CommonInit(&extiCommonInitStruct);
+
+    if (PIN_PORT(pin) >= PIN_STPORT_MAX)
+    {
+        return -RT_ENOSYS;
+    }
+
+    if (enabled == PIN_IRQ_ENABLE)
+    {
+        if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
+        {
+            return RT_ENOSYS;
+        }
+
+        irqindex = pin2irqindex(pin);
+        irqmap = &pin_irq_map[irqindex];
+
+        level = rt_hw_interrupt_disable();
+
+        if (pin_irq_hdr_tab[irqindex].pin == -1)
+        {
+            rt_hw_interrupt_enable(level);
+            return RT_ENOSYS;
+        }
+
+        /* Configure GPIO_InitStructure */
+        GPIO_InitStruct.pin = PIN_STPIN(pin);
+        GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT;
+        GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
+        GPIO_InitStruct.pull = FL_DISABLE;
+        GPIO_InitStruct.remapPin = FL_DISABLE;
+
+        extiInitStruct.input = pin - pin_irq_map[irqindex - 1].pin - 1;
+        extiInitStruct.filter = FL_ENABLE;
+
+        switch (pin_irq_hdr_tab[irqindex].mode)
+        {
+        case PIN_IRQ_MODE_RISING:
+            extiInitStruct.triggerEdge = FL_GPIO_EXTI_TRIGGER_EDGE_RISING;
+            break;
+        case PIN_IRQ_MODE_FALLING:
+            extiInitStruct.triggerEdge = FL_GPIO_EXTI_TRIGGER_EDGE_FALLING;
+            break;
+        case PIN_IRQ_MODE_RISING_FALLING:
+            extiInitStruct.triggerEdge = FL_GPIO_EXTI_TRIGGER_EDGE_BOTH;
+            break;
+        }
+        FL_GPIO_Init(PIN_STPORT(pin), &GPIO_InitStruct);
+        FL_EXTI_Init(irqmap->irqno, &extiInitStruct);
+
+        NVIC_DisableIRQ(GPIO_IRQn);
+        NVIC_SetPriority(GPIO_IRQn, 2);
+        NVIC_EnableIRQ(GPIO_IRQn);
+        pin_irq_enable_mask |= irqmap->irqno;
+
+        rt_hw_interrupt_enable(level);
+    }
+    else if (enabled == PIN_IRQ_DISABLE)
+    {
+        irqmap = get_pin_irq_map(PIN_STPIN(pin));
+        if (irqmap == RT_NULL)
+        {
+            return RT_ENOSYS;
+        }
+
+        level = rt_hw_interrupt_disable();
+
+        FL_GPIO_DeInit(PIN_STPORT(pin), PIN_STPIN(pin));
+
+        pin_irq_enable_mask &= ~irqmap->irqno;
+
+        NVIC_DisableIRQ(GPIO_IRQn);
+
+        rt_hw_interrupt_enable(level);
+    }
+    else
+    {
+        return -RT_ENOSYS;
+    }
+
+    return RT_EOK;
+}
+const static struct rt_pin_ops _fm33_pin_ops =
+    {
+        fm33_pin_mode,
+        fm33_pin_write,
+        fm33_pin_read,
+        fm33_pin_attach_irq,
+        fm33_pin_dettach_irq,
+        fm33_pin_irq_enable,
+        fm33_pin_get,
+};
+
+rt_inline void pin_irq_hdr(int irqno)
+{
+    if (pin_irq_hdr_tab[irqno].hdr)
+    {
+        pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
+    }
+}
+
+void GPIO_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    for (uint8_t extinum = 0; extinum < 16; ++extinum)
+    {
+        if (FL_GPIO_IsActiveFlag_EXTI(GPIO, 0x1U << extinum))
+        {
+            FL_GPIO_ClearFlag_EXTI(GPIO, 0x1U << extinum);
+            pin_irq_hdr(extinum);
+        }
+    }
+    rt_interrupt_leave();
+}
+
+int rt_hw_pin_init(void)
+{
+    return rt_device_pin_register("pin", &_fm33_pin_ops, RT_NULL);
+}
+
+#endif /* RT_USING_PIN */

bsp/fm33lc026/libraries/HAL_Drivers/drv_gpio.h

@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2022-07-20     wudiyidashi       first version
+ */
+
+#ifndef __DRV_GPIO_H__
+#define __DRV_GPIO_H__
+
+#include <drv_common.h>
+#include <board.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define __FM33_PORT(port)  GPIO##port##_BASE
+
+
+#define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__FM33_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN)
+
+
+struct pin_irq_map
+{
+    rt_uint16_t pin;
+    rt_uint16_t irqno;
+};
+
+int rt_hw_pin_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DRV_GPIO_H__ */
+

bsp/fm33lc026/libraries/HAL_Drivers/drv_log.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/fm33lc026/libraries/HAL_Drivers/drv_usart.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -185,7 +185,7 @@ static int uart_putc(struct rt_serial_device *serial, char c)
     RT_ASSERT(serial != RT_NULL);
 
     uart = rt_container_of(serial, struct _uart, serial);
-    FL_UART_WriteTXBuff(uart->config->InitTypeDef, c); //发送一个数据
+    FL_UART_WriteTXBuff(uart->config->InitTypeDef, c); //鍙戦€佷竴涓�暟鎹�
     while (FL_SET != FL_UART_IsActiveFlag_TXShiftBuffEmpty(uart->config->InitTypeDef));
     return 1;
 }
@@ -200,7 +200,7 @@ static int uart_getc(struct rt_serial_device *serial)
     ch = -1;
     if (FL_SET == FL_UART_IsActiveFlag_RXBuffFull(uart->config->InitTypeDef))
     {
-        ch = FL_UART_ReadRXBuff(uart->config->InitTypeDef);//接收中断标志可通过读取rxreg寄存器清除
+        ch = FL_UART_ReadRXBuff(uart->config->InitTypeDef);//鎺ユ敹涓�柇鏍囧織鍙�€氳繃璇诲彇rxreg瀵勫瓨鍣ㄦ竻闄�
     }
     return ch;
 }

bsp/fm33lc026/libraries/HAL_Drivers/drv_usart.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/fm33lc026/project.uvprojx

@@ -1,41 +1,46 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
 <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
   <SchemaVersion>2.1</SchemaVersion>
+
   <Header>### uVision Project, (C) Keil Software</Header>
+
   <Targets>
     <Target>
       <TargetName>RT_Thread</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
       <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>FM33LC04X</Device>
           <Vendor>FMSH</Vendor>
-          <PackID>Keil.FM33LC0XX_DFP.3.0.1</PackID>
+          <PackID>FMSH.FM33LC0XX_DFP.3.0.3</PackID>
+          <PackURL>https://fmdevelopers.oss-cn-shanghai.aliyuncs.com/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x6000) CPUTYPE("Cortex-M0") CLOCK(12000000) ELITTLE</Cpu>
-          <FlashUtilSpec />
-          <StartupFile />
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
           <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0FM33LC04X_FLASH256 -FS00 -FL040000 -FP0($$Device:FM33LC04X$Flash\FM33LC04X_FLASH256.FLM))</FlashDriverDll>
           <DeviceId>0</DeviceId>
-          <RegisterFile />
-          <MemoryEnv />
-          <Cmp />
-          <Asm />
-          <Linker />
-          <OHString />
-          <InfinionOptionDll />
-          <SLE66CMisc />
-          <SLE66AMisc />
-          <SLE66LinkerMisc />
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
           <SFDFile>$$Device:FM33LC04X$SVD\FM33LC0XX.SVD</SFDFile>
           <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
-          <BinPath />
-          <IncludePath />
-          <LibPath />
-          <RegisterFilePath />
-          <DBRegisterFilePath />
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
           <TargetStatus>
             <Error>0</Error>
             <ExitCodeStop>0</ExitCodeStop>
@@ -57,8 +62,8 @@
           <BeforeCompile>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name />
-            <UserProg2Name />
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopU1X>0</nStopU1X>
@@ -67,8 +72,8 @@
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name />
-            <UserProg2Name />
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopB1X>0</nStopB1X>
@@ -78,14 +83,14 @@
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
             <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
-            <UserProg2Name />
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopA1X>0</nStopA1X>
             <nStopA2X>0</nStopA2X>
           </AfterMake>
           <SelectedForBatchBuild>0</SelectedForBatchBuild>
-          <SVCSIdString />
+          <SVCSIdString></SVCSIdString>
         </TargetCommonOption>
         <CommonProperty>
           <UseCPPCompiler>0</UseCPPCompiler>
@@ -99,17 +104,17 @@
           <AssembleAssemblyFile>0</AssembleAssemblyFile>
           <PublicsOnly>0</PublicsOnly>
           <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument />
-          <IncludeLibraryModules />
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
           <ComprImg>1</ComprImg>
         </CommonProperty>
         <DllOption>
           <SimDllName>SARMCM3.DLL</SimDllName>
-          <SimDllArguments />
+          <SimDllArguments></SimDllArguments>
           <SimDlgDll>DARMCM1.DLL</SimDlgDll>
           <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
           <TargetDllName>SARMCM3.DLL</TargetDllName>
-          <TargetDllArguments />
+          <TargetDllArguments></TargetDllArguments>
           <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
           <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
         </DllOption>
@@ -134,10 +139,10 @@
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2CM3.DLL</Flash2>
           <Flash3>"" ()</Flash3>
-          <Flash4 />
-          <pFcarmOut />
-          <pFcarmGrp />
-          <pFcArmRoot />
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
           <FcArmLst>0</FcArmLst>
         </Utilities>
         <TargetArmAds>
@@ -170,7 +175,7 @@
             <RvctClst>0</RvctClst>
             <GenPPlst>0</GenPPlst>
             <AdsCpuType>"Cortex-M0"</AdsCpuType>
-            <RvctDeviceName />
+            <RvctDeviceName></RvctDeviceName>
             <mOS>0</mOS>
             <uocRom>0</uocRom>
             <uocRam>0</uocRam>
@@ -180,6 +185,7 @@
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
             <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -303,7 +309,7 @@
                 <Size>0x0</Size>
               </OCR_RVCT10>
             </OnChipMemories>
-            <RvctStartVector />
+            <RvctStartVector></RvctStartVector>
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
@@ -330,10 +336,10 @@
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls />
-              <Define>USE_HAL_DRIVER, FM33LC0XX, __RTTHREAD__, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND</Define>
-              <Undefine />
-              <IncludePath>applications;..\..\components\libc\compilers\common;..\..\components\libc\compilers\common\extension;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m0;..\..\components\drivers\include;..\..\components\drivers\include;board;libraries\HAL_Drivers;libraries\HAL_Drivers\config;..\..\components\finsh;libraries\FM33LC0xx_FL_Driver\CMSIS\Include;libraries\FM33LC0xx_FL_Driver\Inc;.;..\..\include;..\..\components\libc\posix\io\poll;..\..\components\libc\posix\io\stdio;..\..\components\libc\posix\ipc</IncludePath>
+              <MiscControls></MiscControls>
+              <Define>__STDC_LIMIT_MACROS, USE_HAL_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, FM33LC0XX, RT_USING_ARM_LIBC</Define>
+              <Undefine></Undefine>
+              <IncludePath>applications;..\..\components\libc\compilers\common\include;..\..\components\libc\compilers\common\extension;..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m0;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;board;libraries\HAL_Drivers;libraries\HAL_Drivers\config;..\..\components\finsh;libraries\FM33LC0xx_FL_Driver\CMSIS\Include;libraries\FM33LC0xx_FL_Driver\Inc;.;..\..\include;..\..\components\libc\posix\io\poll;..\..\components\libc\posix\io\stdio;..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -346,12 +352,12 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>4</ClangAsOpt>
             <VariousControls>
-              <MiscControls />
-              <Define />
-              <Undefine />
-              <IncludePath />
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
             </VariousControls>
           </Aads>
           <LDads>
@@ -363,13 +369,13 @@
             <useFile>0</useFile>
             <TextAddressRange>0x0</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
-            <pXoBase />
+            <pXoBase></pXoBase>
             <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
-            <IncludeLibs />
-            <IncludeLibsPath />
-            <Misc />
-            <LinkerInputFile />
-            <DisabledWarnings />
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
           </LDads>
         </TargetArmAds>
       </TargetOption>
@@ -392,26 +398,40 @@
               <FileType>1</FileType>
               <FilePath>..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>syscalls.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>time.c</FileName>
+              <FileName>cctype.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\libc\compilers\common\time.c</FilePath>
+              <FilePath>..\..\components\libc\compilers\common\cctype.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>stdlib.c</FileName>
+              <FileName>cstdio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\libc\compilers\common\stdlib.c</FilePath>
+              <FilePath>..\..\components\libc\compilers\common\cstdio.c</FilePath>
+            </File>
+            <File>
+              <FileName>cstdlib.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\common\cstdlib.c</FilePath>
+            </File>
+            <File>
+              <FileName>cstring.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\common\cstring.c</FilePath>
+            </File>
+            <File>
+              <FileName>ctime.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\common\ctime.c</FilePath>
+            </File>
+            <File>
+              <FileName>cwchar.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\common\cwchar.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -419,33 +439,25 @@
           <GroupName>CPU</GroupName>
           <Files>
             <File>
-              <FileName>showmem.c</FileName>
+              <FileName>backtrace.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>div0.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>backtrace.c</FileName>
+              <FileName>showmem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>context_rvds.S</FileName>
               <FileType>2</FileType>
               <FilePath>..\..\libcpu\arm\cortex-m0\context_rvds.S</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>cpuport.c</FileName>
               <FileType>1</FileType>
@@ -456,55 +468,61 @@
         <Group>
           <GroupName>DeviceDrivers</GroupName>
           <Files>
+            <File>
+              <FileName>i2c-bit-ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\i2c\i2c-bit-ops.c</FilePath>
+            </File>
+            <File>
+              <FileName>i2c_core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\i2c\i2c_core.c</FilePath>
+            </File>
+            <File>
+              <FileName>i2c_dev.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\i2c\i2c_dev.c</FilePath>
+            </File>
+            <File>
+              <FileName>completion.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\ipc\completion.c</FilePath>
+            </File>
+            <File>
+              <FileName>dataqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\ipc\dataqueue.c</FilePath>
+            </File>
             <File>
               <FileName>pipe.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\components\drivers\ipc\pipe.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>ringblk_buf.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>ringbuffer.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\components\drivers\ipc\ringbuffer.c</FilePath>
             </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>workqueue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\ipc\workqueue.c</FilePath>
-            </File>
-          </Files>
-          <Files>
             <File>
               <FileName>waitqueue.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\components\drivers\ipc\waitqueue.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>completion.c</FileName>
+              <FileName>workqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\ipc\completion.c</FilePath>
+              <FilePath>..\..\components\drivers\ipc\workqueue.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>dataqueue.c</FileName>
+              <FileName>pin.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\ipc\dataqueue.c</FilePath>
+              <FilePath>..\..\components\drivers\misc\pin.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>serial.c</FileName>
               <FileType>1</FileType>
@@ -515,31 +533,30 @@
         <Group>
           <GroupName>Drivers</GroupName>
           <Files>
+            <File>
+              <FileName>board.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\board.c</FilePath>
+            </File>
             <File>
               <FileName>startup_fm33lc0xx.s</FileName>
               <FileType>2</FileType>
               <FilePath>libraries\FM\FM33xx\Source\Templates\ARM\startup_fm33lc0xx.s</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>board.c</FileName>
+              <FileName>drv_common.c</FileName>
               <FileType>1</FileType>
-              <FilePath>board\board.c</FilePath>
+              <FilePath>libraries\HAL_Drivers\drv_common.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>drv_usart.c</FileName>
+              <FileName>drv_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>libraries\HAL_Drivers\drv_usart.c</FilePath>
+              <FilePath>libraries\HAL_Drivers\drv_gpio.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>drv_common.c</FileName>
+              <FileName>drv_usart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>libraries\HAL_Drivers\drv_common.c</FilePath>
+              <FilePath>libraries\HAL_Drivers\drv_usart.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -551,15 +568,16 @@
               <FileType>1</FileType>
               <FilePath>..\..\components\finsh\shell.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>msh.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\components\finsh\msh.c</FilePath>
             </File>
-          </Files>
-          <Files>
+            <File>
+              <FileName>msh_parse.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\finsh\msh_parse.c</FilePath>
+            </File>
             <File>
               <FileName>cmd.c</FileName>
               <FileType>1</FileType>
@@ -575,150 +593,126 @@
               <FileType>1</FileType>
               <FilePath>libraries\FM33LC0xx_FL_Driver\Src\fm33lc0xx_fl_rcc.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>fm33lc0xx_fl_crc.c</FileName>
               <FileType>1</FileType>
               <FilePath>libraries\FM33LC0xx_FL_Driver\Src\fm33lc0xx_fl_crc.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>fm33lc0xx_fl_uart.c</FileName>
               <FileType>1</FileType>
               <FilePath>libraries\FM33LC0xx_FL_Driver\Src\fm33lc0xx_fl_uart.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>fm33lc0xx_fl_lpuart.c</FileName>
               <FileType>1</FileType>
               <FilePath>libraries\FM33LC0xx_FL_Driver\Src\fm33lc0xx_fl_lpuart.c</FilePath>
             </File>
-          </Files>
-          <Files>
+            <File>
+              <FileName>fm33lc0xx_fl_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>libraries\FM33LC0xx_FL_Driver\Src\fm33lc0xx_fl_i2c.c</FilePath>
+            </File>
             <File>
               <FileName>fm33lc0xx_fl_gpio.c</FileName>
               <FileType>1</FileType>
               <FilePath>libraries\FM33LC0xx_FL_Driver\Src\fm33lc0xx_fl_gpio.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>fm33lc0xx_fl_dma.c</FileName>
               <FileType>1</FileType>
               <FilePath>libraries\FM33LC0xx_FL_Driver\Src\fm33lc0xx_fl_dma.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>system_fm33lc0xx.c</FileName>
               <FileType>1</FileType>
               <FilePath>libraries\FM33LC0xx_FL_Driver\CMSIS\system_fm33lc0xx.c</FilePath>
             </File>
+            <File>
+              <FileName>fm33lc0xx_fl_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>libraries\FM33LC0xx_FL_Driver\Src\fm33lc0xx_fl_exti.c</FilePath>
+            </File>
           </Files>
         </Group>
         <Group>
           <GroupName>Kernel</GroupName>
           <Files>
             <File>
-              <FileName>idle.c</FileName>
+              <FileName>clock.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
+              <FilePath>..\..\src\clock.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>ipc.c</FileName>
+              <FileName>components.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
+              <FilePath>..\..\src\components.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>components.c</FileName>
+              <FileName>device.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\components.c</FilePath>
+              <FilePath>..\..\src\device.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>kservice.c</FileName>
+              <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
+              <FilePath>..\..\src\idle.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>scheduler.c</FileName>
+              <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
+              <FilePath>..\..\src\ipc.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>mem.c</FileName>
+              <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
+              <FilePath>..\..\src\irq.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>clock.c</FileName>
+              <FileName>kservice.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
+              <FilePath>..\..\src\kservice.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>timer.c</FileName>
+              <FileName>mem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
+              <FilePath>..\..\src\mem.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
               <FileName>mempool.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\src\mempool.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>device.c</FileName>
+              <FileName>object.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
+              <FilePath>..\..\src\object.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>thread.c</FileName>
+              <FileName>scheduler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
+              <FilePath>..\..\src\scheduler.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>irq.c</FileName>
+              <FileName>thread.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
+              <FilePath>..\..\src\thread.c</FilePath>
             </File>
-          </Files>
-          <Files>
             <File>
-              <FileName>object.c</FileName>
+              <FileName>timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
+              <FilePath>..\..\src\timer.c</FilePath>
             </File>
           </Files>
         </Group>
       </Groups>
     </Target>
   </Targets>
+
   <RTE>
-    <apis />
-    <components />
-    <files />
+    <apis/>
+    <components/>
+    <files/>
   </RTE>
+
 </Project>

bsp/fm33lc026/rtconfig.h

@@ -1,7 +1,8 @@
 #ifndef RT_CONFIG_H__
 #define RT_CONFIG_H__
 
-/* Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) */
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
 
 /* RT-Thread Kernel */
 
@@ -12,13 +13,13 @@
 #define RT_TICK_PER_SECOND 500
 #define RT_USING_OVERFLOW_CHECK
 #define RT_USING_HOOK
+#define RT_HOOK_USING_FUNC_PTR
 #define RT_USING_IDLE_HOOK
 #define RT_IDLE_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 256
 
 /* kservice optimization */
 
-/* end of kservice optimization */
 #define RT_DEBUG
 #define RT_DEBUG_COLOR
 
@@ -29,7 +30,6 @@
 #define RT_USING_EVENT
 #define RT_USING_MAILBOX
 #define RT_USING_MESSAGEQUEUE
-/* end of Inter-Thread communication */
 
 /* Memory Management */
 
@@ -37,7 +37,6 @@
 #define RT_USING_SMALL_MEM
 #define RT_USING_SMALL_MEM_AS_HEAP
 #define RT_USING_HEAP
-/* end of Memory Management */
 
 /* Kernel Device Object */
 
@@ -45,9 +44,7 @@
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart4"
-/* end of Kernel Device Object */
-#define RT_VER_NUM 0x40100
-/* end of RT-Thread Kernel */
+#define RT_VER_NUM 0x40101
 #define ARCH_ARM
 #define ARCH_ARM_CORTEX_M
 #define ARCH_ARM_CORTEX_M0
@@ -58,15 +55,8 @@
 #define RT_USING_USER_MAIN
 #define RT_MAIN_THREAD_STACK_SIZE 2048
 #define RT_MAIN_THREAD_PRIORITY 10
-
-/* C++ features */
-
-/* end of C++ features */
-
-/* Command shell */
-
-#define RT_USING_FINSH
 #define RT_USING_MSH
+#define RT_USING_FINSH
 #define FINSH_USING_MSH
 #define FINSH_THREAD_NAME "tshell"
 #define FINSH_THREAD_PRIORITY 20
@@ -78,11 +68,6 @@
 #define MSH_USING_BUILT_IN_COMMANDS
 #define FINSH_USING_DESCRIPTION
 #define FINSH_ARG_MAX 10
-/* end of Command shell */
-
-/* Device virtual file system */
-
-/* end of Device virtual file system */
 
 /* Device Drivers */
 
@@ -90,14 +75,16 @@
 #define RT_USING_SERIAL
 #define RT_USING_SERIAL_V1
 #define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
+#define RT_USING_PIN
 
 /* Using USB */
 
-/* end of Using USB */
-/* end of Device Drivers */
 
-/* POSIX layer and C standard library */
+/* C/C++ and POSIX layer */
 
+#define RT_LIBC_DEFAULT_TIMEZONE 8
 
 /* POSIX (Portable Operating System Interface) layer */
 
@@ -107,41 +94,15 @@
 
 /* Socket is in the 'Network' category */
 
-/* end of Interprocess Communication (IPC) */
-/* end of POSIX (Portable Operating System Interface) layer */
-/* end of POSIX layer and C standard library */
 
 /* Network */
 
-/* Socket abstraction layer */
-
-/* end of Socket abstraction layer */
-
-/* Network interface device */
-
-/* end of Network interface device */
-
-/* light weight TCP/IP stack */
-
-/* end of light weight TCP/IP stack */
-
-/* AT commands */
-
-/* end of AT commands */
-/* end of Network */
-
-/* VBUS(Virtual Software BUS) */
-
-/* end of VBUS(Virtual Software BUS) */
 
 /* Utilities */
 
-/* end of Utilities */
-/* end of RT-Thread Components */
 
 /* RT-Thread Utestcases */
 
-/* end of RT-Thread Utestcases */
 
 /* RT-Thread online packages */
 
@@ -152,83 +113,67 @@
 
 /* Marvell WiFi */
 
-/* end of Marvell WiFi */
 
 /* Wiced WiFi */
 
-/* end of Wiced WiFi */
-/* end of Wi-Fi */
 
 /* IoT Cloud */
 
-/* end of IoT Cloud */
-/* end of IoT - internet of things */
 
 /* security packages */
 
-/* end of security packages */
 
 /* language packages */
 
-/* end of language packages */
+/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
+
+
+/* XML: Extensible Markup Language */
+
 
 /* multimedia packages */
 
 /* LVGL: powerful and easy-to-use embedded GUI library */
 
-/* end of LVGL: powerful and easy-to-use embedded GUI library */
 
 /* u8g2: a monochrome graphic library */
 
-/* end of u8g2: a monochrome graphic library */
 
 /* PainterEngine: A cross-platform graphics application framework written in C language */
 
-/* end of PainterEngine: A cross-platform graphics application framework written in C language */
-/* end of multimedia packages */
 
 /* tools packages */
 
-/* end of tools packages */
 
 /* system packages */
 
 /* enhanced kernel services */
 
-/* end of enhanced kernel services */
 
 /* acceleration: Assembly language or algorithmic acceleration packages */
 
-/* end of acceleration: Assembly language or algorithmic acceleration packages */
 
 /* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
 
-/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
 
 /* Micrium: Micrium software products porting for RT-Thread */
 
-/* end of Micrium: Micrium software products porting for RT-Thread */
-/* end of system packages */
 
 /* peripheral libraries and drivers */
 
-/* end of peripheral libraries and drivers */
 
 /* AI packages */
 
-/* end of AI packages */
 
 /* miscellaneous packages */
 
+/* project laboratory */
+
 /* samples: kernel and components samples */
 
-/* end of samples: kernel and components samples */
 
 /* entertainment: terminal games and other interesting software packages */
 
-/* end of entertainment: terminal games and other interesting software packages */
-/* end of miscellaneous packages */
-/* end of RT-Thread online packages */
 #define SOC_FAMILY_FM33
 #define SOC_SERIES_FM33LC0XX
 
@@ -238,11 +183,10 @@
 
 /* On-chip Peripheral Drivers */
 
+#define BSP_USING_GPIO
 #define BSP_USING_UART
 #define BSP_USING_UART0
 #define BSP_USING_UART1
 #define BSP_USING_UART4
-/* end of On-chip Peripheral Drivers */
-/* end of Hardware Drivers Config */
 
 #endif