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@@ -13,18 +13,18 @@
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#include <board.h>
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-#define DBG_TAG "drv.hwtimer"
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+#define DBG_TAG "drv.clock_timer"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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-#ifdef RT_USING_HWTIMER
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+#ifdef RT_USING_CLOCK_TIME
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-static const struct rt_hwtimer_info apm32_timer_info =
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+static const struct rt_clock_timer_info apm32_timer_info =
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{
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.maxfreq = 1000000,
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.minfreq = 2000,
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.maxcnt = 0xFFFF,
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- .cntmode = HWTIMER_CNTMODE_UP,
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+ .cntmode = CLOCK_TIMER_CNTMODE_UP,
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};
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/* apm32 config class */
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@@ -33,7 +33,7 @@ struct apm32_timer
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char *name;
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TMR_T *tmr;
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IRQn_Type irqn;
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- rt_hwtimer_t device;
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+ rt_clock_timer_t device;
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};
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enum
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@@ -234,7 +234,7 @@ static struct apm32_timer tmr_config[] =
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#endif
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};
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-static rt_uint32_t apm32_hwtimer_clock_get(TMR_T *tmr)
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+static rt_uint32_t apm32_clock_timer_clock_get(TMR_T *tmr)
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{
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#if defined(SOC_SERIES_APM32F0)
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uint32_t pclk1;
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@@ -265,7 +265,7 @@ static rt_uint32_t apm32_hwtimer_clock_get(TMR_T *tmr)
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#endif
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}
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-static void apm32_hwtimer_enable_clock(void)
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+static void apm32_clock_timer_enable_clock(void)
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{
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#ifdef BSP_USING_TMR1
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_TMR1);
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@@ -320,7 +320,7 @@ static void apm32_hwtimer_enable_clock(void)
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#endif
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}
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-static void apm32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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+static void apm32_clock_timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state)
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{
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#if defined(SOC_SERIES_APM32F0)
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TMR_TimeBase_T base_config;
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@@ -337,15 +337,15 @@ static void apm32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t stat
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{
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timer_config = (struct apm32_timer *)timer->parent.user_data;
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- apm32_hwtimer_enable_clock();
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+ apm32_clock_timer_enable_clock();
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- prescaler = (uint32_t)(apm32_hwtimer_clock_get(timer_config->tmr) / 10000) - 1;
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+ prescaler = (uint32_t)(apm32_clock_timer_clock_get(timer_config->tmr) / 10000) - 1;
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base_config.period = 10000 - 1;
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#if defined(SOC_SERIES_APM32F0)
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base_config.div = prescaler;
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base_config.clockDivision = TMR_CKD_DIV1;
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- if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
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+ if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP)
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{
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base_config.counterMode = TMR_COUNTER_MODE_UP;
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}
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@@ -357,7 +357,7 @@ static void apm32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t stat
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|| defined(SOC_SERIES_APM32F4)
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base_config.division = prescaler;
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base_config.clockDivision = TMR_CLOCK_DIV_1;
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- if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
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+ if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP)
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{
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base_config.countMode = TMR_COUNTER_MODE_UP;
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}
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@@ -391,7 +391,7 @@ static void apm32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t stat
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}
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}
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-static rt_err_t apm32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
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+static rt_err_t apm32_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode)
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{
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rt_err_t result = RT_EOK;
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struct apm32_timer *timer_config = RT_NULL;
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@@ -405,7 +405,7 @@ static rt_err_t apm32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtim
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/* set timer_config autoReload */
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timer_config->tmr->AUTORLD = t - 1;
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- if (opmode == HWTIMER_MODE_ONESHOT)
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+ if (opmode == CLOCK_TIMER_MODE_ONESHOT)
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{
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/* set timer to single mode */
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timer_config->tmr->CTRL1_B.SPMEN = 1;
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@@ -442,7 +442,7 @@ static rt_err_t apm32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtim
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return result;
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}
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-static void apm32_hwtimer_stop(rt_hwtimer_t *timer)
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+static void apm32_clock_timer_stop(rt_clock_timer_t *timer)
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{
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struct apm32_timer *timer_config = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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@@ -453,7 +453,7 @@ static void apm32_hwtimer_stop(rt_hwtimer_t *timer)
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timer_config->tmr->CNT = 0;
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}
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-static rt_err_t apm32_hwtimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
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+static rt_err_t apm32_clock_timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg)
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{
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struct apm32_timer *timer_config = RT_NULL;
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rt_err_t result = RT_EOK;
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@@ -467,11 +467,11 @@ static rt_err_t apm32_hwtimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *a
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switch (cmd)
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{
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- case HWTIMER_CTRL_FREQ_SET:
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+ case CLOCK_TIMER_CTRL_FREQ_SET:
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/* set timer frequence */
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freq = *((rt_uint32_t *)arg);
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- val = apm32_hwtimer_clock_get(timer_config->tmr) / freq;
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+ val = apm32_clock_timer_clock_get(timer_config->tmr) / freq;
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/* Configures the timer prescaler */
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timer_config->tmr->PSC_B.PSC = val - 1;
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@@ -485,7 +485,7 @@ static rt_err_t apm32_hwtimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *a
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return result;
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}
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-static rt_uint32_t apm32_hwtimer_counter_get(rt_hwtimer_t *timer)
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+static rt_uint32_t apm32_clock_timer_counter_get(rt_clock_timer_t *timer)
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{
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struct apm32_timer *timer_config = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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@@ -494,13 +494,13 @@ static rt_uint32_t apm32_hwtimer_counter_get(rt_hwtimer_t *timer)
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return timer_config->tmr->CNT;
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}
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-static const struct rt_hwtimer_ops apm32_hwtimer_ops =
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+static const struct rt_clock_timer_ops apm32_clock_timer_ops =
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{
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- .init = apm32_hwtimer_init,
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- .start = apm32_hwtimer_start,
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- .stop = apm32_hwtimer_stop,
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- .count_get = apm32_hwtimer_counter_get,
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- .control = apm32_hwtimer_ctrl,
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+ .init = apm32_clock_timer_init,
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+ .start = apm32_clock_timer_start,
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+ .stop = apm32_clock_timer_stop,
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+ .count_get = apm32_clock_timer_counter_get,
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+ .control = apm32_clock_timer_ctrl,
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};
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@@ -509,7 +509,7 @@ static const struct rt_hwtimer_ops apm32_hwtimer_ops =
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void TMR1_BRK_UP_TRG_COM_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR1_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR1_INDEX].device);
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TMR_ClearIntFlag(TMR1, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -519,7 +519,7 @@ void TMR1_BRK_UP_TRG_COM_IRQHandler(void)
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void TMR1_UP_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR1_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR1_INDEX].device);
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TMR_ClearIntFlag(TMR1, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -531,12 +531,12 @@ void TMR1_UP_TMR10_IRQHandler(void)
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rt_interrupt_enter();
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if (TMR_ReadIntFlag(TMR1, TMR_INT_UPDATE))
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{
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- rt_device_hwtimer_isr(&tmr_config[TMR1_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR1_INDEX].device);
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TMR_ClearIntFlag(TMR1, TMR_INT_UPDATE);
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}
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if (TMR_ReadIntFlag(TMR10, TMR_INT_UPDATE))
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{
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- rt_device_hwtimer_isr(&tmr_config[TMR10_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR10_INDEX].device);
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TMR_ClearIntFlag(TMR10, TMR_INT_UPDATE);
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}
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rt_interrupt_leave();
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@@ -548,7 +548,7 @@ void TMR1_UP_TMR10_IRQHandler(void)
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void TMR2_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR2_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR2_INDEX].device);
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TMR_ClearIntFlag(TMR2, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -558,7 +558,7 @@ void TMR2_IRQHandler(void)
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void TMR3_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR3_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR3_INDEX].device);
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TMR_ClearIntFlag(TMR3, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -568,7 +568,7 @@ void TMR3_IRQHandler(void)
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void TMR4_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR4_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR4_INDEX].device);
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TMR_ClearIntFlag(TMR4, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -578,7 +578,7 @@ void TMR4_IRQHandler(void)
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void TMR5_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR5_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR5_INDEX].device);
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TMR_ClearIntFlag(TMR5, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -594,7 +594,7 @@ void TMR5_IRQHandler(void)
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#endif
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR6_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR6_INDEX].device);
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TMR_ClearIntFlag(TMR6, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -604,7 +604,7 @@ void TMR5_IRQHandler(void)
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void TMR7_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR7_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR7_INDEX].device);
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TMR_ClearIntFlag(TMR7, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -615,7 +615,7 @@ void TMR7_IRQHandler(void)
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void TMR8_UP_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR8_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR8_INDEX].device);
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TMR_ClearIntFlag(TMR8, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -627,12 +627,12 @@ void TMR8_UP_TMR13_IRQHandler(void)
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rt_interrupt_enter();
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if (TMR_ReadIntFlag(TMR8, TMR_INT_UPDATE))
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{
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- rt_device_hwtimer_isr(&tmr_config[TMR8_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR8_INDEX].device);
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TMR_ClearIntFlag(TMR8, TMR_INT_UPDATE);
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}
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if (TMR_ReadIntFlag(TMR13, TMR_INT_UPDATE))
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{
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- rt_device_hwtimer_isr(&tmr_config[TMR13_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR13_INDEX].device);
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TMR_ClearIntFlag(TMR13, TMR_INT_UPDATE);
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}
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rt_interrupt_leave();
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@@ -644,7 +644,7 @@ void TMR8_UP_TMR13_IRQHandler(void)
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void TMR1_BRK_TMR9_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR9_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR9_INDEX].device);
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TMR_ClearIntFlag(TMR9, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -654,7 +654,7 @@ void TMR1_BRK_TMR9_IRQHandler(void)
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void TMR1_TRG_COM_TMR11_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR11_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR11_INDEX].device);
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TMR_ClearIntFlag(TMR11, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -664,7 +664,7 @@ void TMR1_TRG_COM_TMR11_IRQHandler(void)
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void TMR8_BRK_TMR12_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR12_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR12_INDEX].device);
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TMR_ClearIntFlag(TMR12, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -678,7 +678,7 @@ void TMR8_BRK_TMR12_IRQHandler(void)
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#endif
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR14_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR14_INDEX].device);
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TMR_ClearIntFlag(TMR14, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -688,7 +688,7 @@ void TMR8_BRK_TMR12_IRQHandler(void)
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void TMR15_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR15_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR15_INDEX].device);
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TMR_ClearIntFlag(TMR15, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -698,7 +698,7 @@ void TMR15_IRQHandler(void)
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void TMR16_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR16_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR16_INDEX].device);
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TMR_ClearIntFlag(TMR16, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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@@ -708,13 +708,13 @@ void TMR16_IRQHandler(void)
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void TMR17_IRQHandler(void)
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{
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rt_interrupt_enter();
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- rt_device_hwtimer_isr(&tmr_config[TMR17_INDEX].device);
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+ rt_clock_timer_isr(&tmr_config[TMR17_INDEX].device);
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TMR_ClearIntFlag(TMR17, TMR_INT_UPDATE);
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rt_interrupt_leave();
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}
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#endif
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-static int rt_hw_hwtimer_init(void)
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+static int rt_hw_clock_timer_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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@@ -722,8 +722,8 @@ static int rt_hw_hwtimer_init(void)
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for (i = 0; i < sizeof(tmr_config) / sizeof(tmr_config[0]); i++)
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{
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tmr_config[i].device.info = &apm32_timer_info;
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- tmr_config[i].device.ops = &apm32_hwtimer_ops;
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- if (rt_device_hwtimer_register(&tmr_config[i].device, tmr_config[i].name, &tmr_config[i]) == RT_EOK)
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+ tmr_config[i].device.ops = &apm32_clock_timer_ops;
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+ if (rt_clock_timer_register(&tmr_config[i].device, tmr_config[i].name, &tmr_config[i]) == RT_EOK)
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{
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LOG_D("%s register success", tmr_config[i].name);
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}
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@@ -736,6 +736,6 @@ static int rt_hw_hwtimer_init(void)
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return result;
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}
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-INIT_BOARD_EXPORT(rt_hw_hwtimer_init);
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+INIT_BOARD_EXPORT(rt_hw_clock_timer_init);
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-#endif /* RT_USING_HWTIMER */
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+#endif /* RT_USING_CLOCK_TIME */
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