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@@ -1,5 +1,5 @@
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/*
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- * Copyright (c) 2006-2023, RT-Thread Development Team
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+ * Copyright (c) 2006-2026 RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@@ -8,6 +8,7 @@
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* 2020-05-23 liuduanfei first version
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* 2020-08-25 wanghaijing add sdmmmc2
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* 2023-03-26 wdfk-prog Distinguish between SDMMC and SDIO drivers
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+ * 2024-08-05 wdfk-prog Optimize SDMMC timeout handling and clock divider
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*/
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#include "board.h"
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@@ -27,7 +28,6 @@
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#endif /* DRV_DEBUG */
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#include <rtdbg.h>
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-static struct stm32_sdio_class sdio_obj;
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static struct rt_mmcsd_host *host1;
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static struct rt_mmcsd_host *host2;
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@@ -55,6 +55,11 @@ struct rthw_sdio
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rt_align(SDIO_ALIGN_LEN)
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static rt_uint8_t cache_buf[SDIO_BUFF_SIZE];
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+static rt_uint32_t stm32_sdio_clk_get(void)
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+{
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+ return SDIO_CLOCK_FREQ;
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+}
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+
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/**
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* @brief This function get order from sdio.
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* @param data
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@@ -154,10 +159,6 @@ static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
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return;
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}
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- if (sdio->pkg == RT_NULL)
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- {
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- return;
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- }
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/* Get Card Specific Data */
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cmd->resp[0] = hsd->RESP1;
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if (resp_type(cmd) == RESP_R2)
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@@ -221,6 +222,38 @@ static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
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}
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}
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+/**
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+ * @brief Calculate timeout for SDMMC data transfer.
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+ *
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+ * @note The timeout is estimated based on transfer size:
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+ * timeout = 100 ms + 2 ms per 512 bytes.
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+ * The result is clamped to the range [100 ms, 5000 ms].
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+ *
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+ * @param data Pointer to transfer data descriptor.
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+ *
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+ * @return Timeout in RT-Thread tick units.
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+ */
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+static rt_tick_t stm32_sdmmc_calc_timeout(struct rt_mmcsd_data *data)
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+{
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+ rt_size_t len;
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+ rt_uint32_t timeout_ms;
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+
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+ if (data == RT_NULL)
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+ return rt_tick_from_millisecond(100);
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+
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+ len = data->blks * data->blksize;
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+
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+ /* base timeout + size-based timeout */
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+ timeout_ms = 100 + (len / 512) * 2;
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+
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+ if (timeout_ms < 100)
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+ timeout_ms = 100;
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+ if (timeout_ms > 5000)
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+ timeout_ms = 5000;
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+
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+ return rt_tick_from_millisecond(timeout_ms);
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+}
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+
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/**
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* @brief This function send command.
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* @param sdio rthw_sdio
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@@ -262,7 +295,7 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
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/* data pre configuration */
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if (data != RT_NULL)
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{
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- SCB_CleanInvalidateDCache();
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+ rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, cache_buf, data->blks * data->blksize);
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reg_cmd |= SDMMC_CMD_CMDTRANS;
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__HAL_SD_DISABLE_IT(&sdio->sdio_des.hw_sdio, SDMMC_MASK_CMDRENDIE | SDMMC_MASK_CMDSENTIE);
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@@ -292,14 +325,19 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
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/* Waiting for data to be sent to completion */
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if (data != RT_NULL)
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{
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- volatile rt_uint32_t count = SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS;
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+ rt_tick_t start = rt_tick_get();
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+ rt_tick_t timeout = stm32_sdmmc_calc_timeout(data);
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- while (count && (hsd->STA & SDMMC_STA_DPSMACT))
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+ while (hsd->STA & SDMMC_STA_DPSMACT)
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{
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- count--;
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+ if ((rt_tick_get() - start) >= timeout)
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+ {
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+ cmd->err = -RT_ETIMEOUT;
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+ break;
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+ }
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}
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- if ((count == 0) || (hsd->STA & SDIO_ERRORS))
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+ if ((hsd->STA & SDIO_ERRORS) != 0)
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{
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cmd->err = -RT_ERROR;
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}
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@@ -311,7 +349,7 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
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if (data->flags & DATA_DIR_READ)
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{
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rt_memcpy(data->buf, cache_buf, data->blks * data->blksize);
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- SCB_CleanInvalidateDCache();
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+ rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, cache_buf, data->blks * data->blksize);
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}
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}
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}
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@@ -371,142 +409,128 @@ static void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *r
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*/
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static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
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{
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- rt_uint32_t temp, clk_src;
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- rt_uint32_t clk = io_cfg->clock;
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+ rt_uint32_t req_clk = io_cfg->clock;
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+ rt_uint32_t clk = req_clk;
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struct rthw_sdio *sdio = host->private_data;
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SD_HandleTypeDef *hsd = &sdio->sdio_des.hw_sdio;
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SDMMC_InitTypeDef Init = {0};
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rt_uint32_t sdmmc_clk = sdio->sdio_des.clk_get();
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+ rt_bool_t stop_flag = RT_TRUE;
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+ switch (io_cfg->power_mode & 0X03)
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+ {
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+ case MMCSD_POWER_OFF:
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+ /* Set Power State to OFF */
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+ (void)SDMMC_PowerState_OFF(hsd->Instance);
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+ stop_flag = RT_TRUE;
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+ break;
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+ case MMCSD_POWER_UP:
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+ /* In F4 series chips, 0X01 is reserved bit and has no practical effect.
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+ For F7 series chips, 0X01 is power-on after power-off,The SDMMC disables the function and the card clock stops.
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+ For H7 series chips, 0X03 is the power-on function.
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+ */
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+ stop_flag = RT_TRUE;
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+ break;
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+ case MMCSD_POWER_ON:
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+ stop_flag = RT_FALSE;
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+ break;
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+ default:
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+ LOG_W("unknown power mode %d", io_cfg->power_mode);
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+ stop_flag = RT_FALSE;
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+ break;
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+ }
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+ if(stop_flag == RT_TRUE)
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+ {
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+ return;
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+ }
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+
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+ if (clk == 0U)
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+ {
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+ LOG_E("invalid target clock: 0");
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+ return;
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+ }
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+
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if (sdmmc_clk < 400 * 1000)
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{
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- LOG_E("The clock rate is too low! rata:%d", sdmmc_clk);
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+ LOG_E("The clock rate is too low! rate:%u", sdmmc_clk);
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return;
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}
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if (clk > host->freq_max)
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clk = host->freq_max;
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- if (clk > sdmmc_clk)
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+ if (clk > (sdmmc_clk / 2U))
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{
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- LOG_W("Setting rate is greater than clock source rate.");
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- clk = sdmmc_clk;
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+ LOG_W("Setting rate is greater than controller max output rate.");
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+ clk = sdmmc_clk / 2U;
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}
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- LOG_D("clk:%dK width:%s%s%s power:%s%s%s",
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- clk / 1000,
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- io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
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- io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
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- io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
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- io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "",
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- io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "",
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- io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : ""
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- );
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+ /* Configure the SDMMC peripheral */
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+ Init.ClockEdge = hsd->Init.ClockEdge;
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+ Init.ClockPowerSave = hsd->Init.ClockPowerSave;
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+ if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4)
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+ {
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+ Init.BusWide = SDMMC_BUS_WIDE_4B;
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+ }
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+ else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8)
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+ {
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+ Init.BusWide = SDMMC_BUS_WIDE_8B;
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+ }
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+ else
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+ {
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+ Init.BusWide = SDMMC_BUS_WIDE_1B;
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+ }
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+ Init.HardwareFlowControl = hsd->Init.HardwareFlowControl;
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- if (sdmmc_clk != 0U)
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+ /* Identification mode: use initialization frequency */
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+ if (clk <= SD_INIT_FREQ)
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{
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- hsd->Init.ClockDiv = sdmmc_clk / (2U * SD_INIT_FREQ);
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- /* Configure the SDMMC peripheral */
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- Init.ClockEdge = hsd->Init.ClockEdge;
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- Init.ClockPowerSave = hsd->Init.ClockPowerSave;
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- if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4)
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- {
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- Init.BusWide = SDMMC_BUS_WIDE_4B;
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- }
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- else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8)
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- {
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- Init.BusWide = SDMMC_BUS_WIDE_8B;
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- }
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- else
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- {
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- Init.BusWide = SDMMC_BUS_WIDE_1B;
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- }
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- Init.HardwareFlowControl = hsd->Init.HardwareFlowControl;
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- /* Check if user Clock div < Normal speed 25Mhz, no change in Clockdiv */
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- if (hsd->Init.ClockDiv >= (sdmmc_clk / (2U * SD_NORMAL_SPEED_FREQ)))
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- {
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- Init.ClockDiv = hsd->Init.ClockDiv;
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- }
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- //CARD_ULTRA_HIGH_SPEED :UHS-I SD Card <50Mo/s for SDR50, DDR5 Cards and <104Mo/s for SDR104, Spec version 3.01
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- else if (MMCSD_TIMING_UHS_SDR50 <= io_cfg->timing && io_cfg->timing <= MMCSD_TIMING_UHS_DDR50)
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- {
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- /* UltraHigh speed SD card,user Clock div */
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- Init.ClockDiv = hsd->Init.ClockDiv;
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- }
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- //CARD_HIGH_SPEED: High Speed Card <25Mo/s , Spec version 2.00
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- else if (io_cfg->timing == MMCSD_TIMING_SD_HS)
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- {
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- /* High speed SD card, Max Frequency = 50Mhz */
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- if (hsd->Init.ClockDiv == 0U)
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- {
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- if (sdmmc_clk > SD_HIGH_SPEED_FREQ)
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- {
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- Init.ClockDiv = sdmmc_clk / (2U * SD_HIGH_SPEED_FREQ);
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- }
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- else
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- {
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- Init.ClockDiv = hsd->Init.ClockDiv;
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- }
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- }
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- else
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- {
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- if ((sdmmc_clk/(2U * hsd->Init.ClockDiv)) > SD_HIGH_SPEED_FREQ)
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- {
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- Init.ClockDiv = sdmmc_clk / (2U * SD_HIGH_SPEED_FREQ);
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- }
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- else
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- {
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- Init.ClockDiv = hsd->Init.ClockDiv;
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- }
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- }
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- }
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- //CARD_NORMAL_SPEED: Normal Speed Card <12.5Mo/s , Spec Version 1.01
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- else if (io_cfg->timing == MMCSD_TIMING_LEGACY)
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- {
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- /* No High speed SD card, Max Frequency = 25Mhz */
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- if (hsd->Init.ClockDiv == 0U)
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- {
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- if (sdmmc_clk > SD_NORMAL_SPEED_FREQ)
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- {
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- Init.ClockDiv = sdmmc_clk / (2U * SD_NORMAL_SPEED_FREQ);
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- }
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- else
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- {
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- Init.ClockDiv = hsd->Init.ClockDiv;
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- }
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- }
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- else
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- {
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- if ((sdmmc_clk/(2U * hsd->Init.ClockDiv)) > SD_NORMAL_SPEED_FREQ)
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- {
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- Init.ClockDiv = sdmmc_clk / (2U * SD_NORMAL_SPEED_FREQ);
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- }
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- else
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- {
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- Init.ClockDiv = hsd->Init.ClockDiv;
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- }
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- }
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- }
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- (void)SDMMC_Init(hsd->Instance, Init);
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+ clk = SD_INIT_FREQ;
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}
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- switch ((io_cfg->power_mode)&0X03)
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+ /* CARD_HIGH_SPEED: High Speed Card <50Mo/s , Spec version 2.00 */
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+ else if (io_cfg->timing == MMCSD_TIMING_SD_HS)
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+ {
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+ /* High speed SD card, Max Frequency = 50Mhz */
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+ if (clk > SD_HIGH_SPEED_FREQ)
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+ clk = SD_HIGH_SPEED_FREQ;
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+ }
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+ /* CARD_NORMAL_SPEED: Normal Speed Card <12.5Mo/s , Spec Version 1.01 */
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+ else if (io_cfg->timing == MMCSD_TIMING_LEGACY)
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+ {
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+ /* No High speed SD card, Max Frequency = 25Mhz */
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+ if (clk > SD_NORMAL_SPEED_FREQ)
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+ clk = SD_NORMAL_SPEED_FREQ;
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+ }
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+ /* CARD_ULTRA_HIGH_SPEED :UHS-I SD Card <50Mo/s for SDR50, DDR5 Cards and <104Mo/s for SDR104, Spec version 3.01 UltraHigh speed SD card */
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+ else
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+ {
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+ /* UltraHigh speed SD card,user Clock div: keep clk */
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+ }
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+
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+ /* Round-up division to ensure SDMMC_CK does not exceed target clk
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+ * SDMMC_CK = SDMMCCLK / (2 * ClockDiv)
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+ */
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+ Init.ClockDiv = (sdmmc_clk + (2U * clk) - 1U) / (2U * clk);
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+
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+ LOG_D("clk_req:%uK clk_set:%uK clk_real:%uK div:%u width:%s%s%s power:%s%s%s",
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+ req_clk / 1000U,
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+ clk / 1000U,
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+ (Init.ClockDiv != 0U) ? (sdmmc_clk / (2U * Init.ClockDiv)) / 1000U : 0U,
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+ Init.ClockDiv,
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+ io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
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+ io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
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+ io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
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+ (io_cfg->power_mode & 0x03) == MMCSD_POWER_OFF ? "OFF" : "",
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+ (io_cfg->power_mode & 0x03) == MMCSD_POWER_UP ? "UP" : "",
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+ (io_cfg->power_mode & 0x03) == MMCSD_POWER_ON ? "ON" : ""
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+ );
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+
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+ (void)SDMMC_Init(hsd->Instance, Init);
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+
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+ if((io_cfg->power_mode & 0X03) == MMCSD_POWER_ON)
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{
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- case MMCSD_POWER_OFF:
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- /* Set Power State to OFF */
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- (void)SDMMC_PowerState_OFF(hsd->Instance);
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- break;
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- case MMCSD_POWER_UP:
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- /* In F4 series chips, 0X01 is reserved bit and has no practical effect.
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- For F7 series chips, 0X01 is power-on after power-off,The SDMMC disables the function and the card clock stops.
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- For H7 series chips, 0X03 is the power-on function.
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- */
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- case MMCSD_POWER_ON:
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/* Set Power State to ON */
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(void)SDMMC_PowerState_ON(hsd->Instance);
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- break;
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- default:
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- LOG_W("unknown power mode %d", io_cfg->power_mode);
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- break;
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}
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}
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@@ -528,7 +552,7 @@ void rthw_sdio_irq_update(struct rt_mmcsd_host *host, rt_int32_t enable)
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else
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{
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LOG_D("disable sdio irq");
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- __HAL_SD_ENABLE_IT(&sdio->sdio_des.hw_sdio, SDMMC_IT_SDIOIT);
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+ __HAL_SD_DISABLE_IT(&sdio->sdio_des.hw_sdio, SDMMC_IT_SDIOIT);
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}
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}
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@@ -578,7 +602,7 @@ struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
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if (sdio_des == RT_NULL)
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{
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- LOG_E("L:%d F:%s",(sdio_des == RT_NULL ? "sdio_des is NULL" : ""));
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+ LOG_E("sdio_des is NULL");
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return RT_NULL;
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}
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@@ -586,7 +610,7 @@ struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
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if (sdio == RT_NULL)
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{
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- LOG_E("L:%d F:%s malloc rthw_sdio fail");
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+ LOG_E("malloc rthw_sdio fail");
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return RT_NULL;
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}
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@@ -596,12 +620,13 @@ struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
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if (host == RT_NULL)
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{
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- LOG_E("L:%d F:%s mmcsd alloc host fail");
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+ LOG_E("mmcsd alloc host fail");
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rt_free(sdio);
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return RT_NULL;
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}
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rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct stm32_sdio_des));
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+ sdio->sdio_des.clk_get = (sdio_des->clk_get == RT_NULL ? stm32_sdio_clk_get : sdio_des->clk_get);
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#ifdef BSP_USING_SDIO1
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if(sdio_des->hw_sdio.Instance == SDMMC1)
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{
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@@ -630,14 +655,14 @@ struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
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#endif
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host->max_seg_size = SDIO_BUFF_SIZE;
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host->max_dma_segs = 1;
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- host->max_blk_size = 512;
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- host->max_blk_count = 512;
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+ host->max_blk_size = BLOCKSIZE;
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+ host->max_blk_count = SDIO_BUFF_SIZE / host->max_blk_size;
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/* link up host and sdio */
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sdio->host = host;
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host->private_data = sdio;
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- rthw_sdio_irq_update(host, 1);
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+ rthw_sdio_irq_update(host, RT_TRUE);
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/* ready to change */
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mmcsd_change(host);
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