mmcsd_core.h 7.2 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2011-07-25 weety first version
  9. */
  10. #ifndef __CORE_H__
  11. #define __CORE_H__
  12. #include <rtthread.h>
  13. #include <drivers/mmcsd_host.h>
  14. #include <drivers/mmcsd_card.h>
  15. #include <drivers/mmcsd_cmd.h>
  16. #ifdef __cplusplus
  17. extern "C" {
  18. #endif
  19. #ifdef RT_MMCSD_DBG
  20. #define mmcsd_dbg(fmt, ...) rt_kprintf(fmt, ##__VA_ARGS__)
  21. #else
  22. #define mmcsd_dbg(fmt, ...)
  23. #endif
  24. struct rt_mmcsd_data {
  25. rt_uint32_t blksize;
  26. rt_uint32_t blks;
  27. rt_uint32_t *buf;
  28. rt_int32_t err;
  29. rt_uint32_t flags;
  30. #define DATA_DIR_WRITE (1 << 0)
  31. #define DATA_DIR_READ (1 << 1)
  32. #define DATA_STREAM (1 << 2)
  33. unsigned int bytes_xfered;
  34. struct rt_mmcsd_cmd *stop; /* stop command */
  35. struct rt_mmcsd_req *mrq; /* associated request */
  36. rt_uint32_t timeout_ns;
  37. rt_uint32_t timeout_clks;
  38. };
  39. struct rt_mmcsd_cmd {
  40. rt_uint32_t cmd_code;
  41. rt_uint32_t arg;
  42. rt_uint32_t resp[4];
  43. rt_uint32_t flags;
  44. /*rsponse types
  45. *bits:0~3
  46. */
  47. #define RESP_MASK (0xF)
  48. #define RESP_NONE (0)
  49. #define RESP_R1 (1 << 0)
  50. #define RESP_R1B (2 << 0)
  51. #define RESP_R2 (3 << 0)
  52. #define RESP_R3 (4 << 0)
  53. #define RESP_R4 (5 << 0)
  54. #define RESP_R6 (6 << 0)
  55. #define RESP_R7 (7 << 0)
  56. #define RESP_R5 (8 << 0) /*SDIO command response type*/
  57. /*command types
  58. *bits:4~5
  59. */
  60. #define CMD_MASK (3 << 4) /* command type */
  61. #define CMD_AC (0 << 4)
  62. #define CMD_ADTC (1 << 4)
  63. #define CMD_BC (2 << 4)
  64. #define CMD_BCR (3 << 4)
  65. #define resp_type(cmd) ((cmd)->flags & RESP_MASK)
  66. /*spi rsponse types
  67. *bits:6~8
  68. */
  69. #define RESP_SPI_MASK (0x7 << 6)
  70. #define RESP_SPI_R1 (1 << 6)
  71. #define RESP_SPI_R1B (2 << 6)
  72. #define RESP_SPI_R2 (3 << 6)
  73. #define RESP_SPI_R3 (4 << 6)
  74. #define RESP_SPI_R4 (5 << 6)
  75. #define RESP_SPI_R5 (6 << 6)
  76. #define RESP_SPI_R7 (7 << 6)
  77. #define spi_resp_type(cmd) ((cmd)->flags & RESP_SPI_MASK)
  78. /*
  79. * These are the command types.
  80. */
  81. #define cmd_type(cmd) ((cmd)->flags & CMD_MASK)
  82. rt_int32_t retries; /* max number of retries */
  83. rt_int32_t err;
  84. struct rt_mmcsd_data *data;
  85. struct rt_mmcsd_req *mrq; /* associated request */
  86. };
  87. struct rt_mmcsd_req {
  88. struct rt_mmcsd_data *data;
  89. struct rt_mmcsd_cmd *cmd;
  90. struct rt_mmcsd_cmd *stop;
  91. };
  92. /*the following is response bit*/
  93. #define R1_OUT_OF_RANGE (1 << 31) /* er, c */
  94. #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
  95. #define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
  96. #define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
  97. #define R1_ERASE_PARAM (1 << 27) /* ex, c */
  98. #define R1_WP_VIOLATION (1 << 26) /* erx, c */
  99. #define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
  100. #define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
  101. #define R1_COM_CRC_ERROR (1 << 23) /* er, b */
  102. #define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
  103. #define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
  104. #define R1_CC_ERROR (1 << 20) /* erx, c */
  105. #define R1_ERROR (1 << 19) /* erx, c */
  106. #define R1_UNDERRUN (1 << 18) /* ex, c */
  107. #define R1_OVERRUN (1 << 17) /* ex, c */
  108. #define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
  109. #define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
  110. #define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
  111. #define R1_ERASE_RESET (1 << 13) /* sr, c */
  112. #define R1_STATUS(x) (x & 0xFFFFE000)
  113. #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
  114. #define R1_READY_FOR_DATA (1 << 8) /* sx, a */
  115. #define R1_APP_CMD (1 << 5) /* sr, c */
  116. #define R1_SPI_IDLE (1 << 0)
  117. #define R1_SPI_ERASE_RESET (1 << 1)
  118. #define R1_SPI_ILLEGAL_COMMAND (1 << 2)
  119. #define R1_SPI_COM_CRC (1 << 3)
  120. #define R1_SPI_ERASE_SEQ (1 << 4)
  121. #define R1_SPI_ADDRESS (1 << 5)
  122. #define R1_SPI_PARAMETER (1 << 6)
  123. /* R1 bit 7 is always zero */
  124. #define R2_SPI_CARD_LOCKED (1 << 8)
  125. #define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */
  126. #define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
  127. #define R2_SPI_ERROR (1 << 10)
  128. #define R2_SPI_CC_ERROR (1 << 11)
  129. #define R2_SPI_CARD_ECC_ERROR (1 << 12)
  130. #define R2_SPI_WP_VIOLATION (1 << 13)
  131. #define R2_SPI_ERASE_PARAM (1 << 14)
  132. #define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
  133. #define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE
  134. #define CARD_BUSY 0x80000000 /* Card Power up status bit */
  135. /* R5 response bits */
  136. #define R5_COM_CRC_ERROR (1 << 15)
  137. #define R5_ILLEGAL_COMMAND (1 << 14)
  138. #define R5_ERROR (1 << 11)
  139. #define R5_FUNCTION_NUMBER (1 << 9)
  140. #define R5_OUT_OF_RANGE (1 << 8)
  141. #define R5_STATUS(x) (x & 0xCB00)
  142. #define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12)
  143. /**
  144. * fls - find last (most-significant) bit set
  145. * @x: the word to search
  146. *
  147. * This is defined the same way as ffs.
  148. * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
  149. */
  150. rt_inline rt_uint32_t __rt_fls(rt_uint32_t val)
  151. {
  152. rt_uint32_t bit = 32;
  153. if (!val)
  154. return 0;
  155. if (!(val & 0xffff0000u))
  156. {
  157. val <<= 16;
  158. bit -= 16;
  159. }
  160. if (!(val & 0xff000000u))
  161. {
  162. val <<= 8;
  163. bit -= 8;
  164. }
  165. if (!(val & 0xf0000000u))
  166. {
  167. val <<= 4;
  168. bit -= 4;
  169. }
  170. if (!(val & 0xc0000000u))
  171. {
  172. val <<= 2;
  173. bit -= 2;
  174. }
  175. if (!(val & 0x80000000u))
  176. {
  177. bit -= 1;
  178. }
  179. return bit;
  180. }
  181. #define MMCSD_HOST_PLUGED 0
  182. #define MMCSD_HOST_UNPLUGED 1
  183. int mmcsd_wait_cd_changed(rt_int32_t timeout);
  184. void mmcsd_host_lock(struct rt_mmcsd_host *host);
  185. void mmcsd_host_unlock(struct rt_mmcsd_host *host);
  186. void mmcsd_req_complete(struct rt_mmcsd_host *host);
  187. void mmcsd_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req);
  188. rt_int32_t mmcsd_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd, int retries);
  189. rt_int32_t mmcsd_go_idle(struct rt_mmcsd_host *host);
  190. rt_int32_t mmcsd_spi_read_ocr(struct rt_mmcsd_host *host, rt_int32_t high_capacity, rt_uint32_t *ocr);
  191. rt_int32_t mmcsd_all_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid);
  192. rt_int32_t mmcsd_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid);
  193. rt_int32_t mmcsd_get_csd(struct rt_mmcsd_card *card, rt_uint32_t *csd);
  194. rt_int32_t mmcsd_select_card(struct rt_mmcsd_card *card);
  195. rt_int32_t mmcsd_deselect_cards(struct rt_mmcsd_card *host);
  196. rt_int32_t mmcsd_spi_use_crc(struct rt_mmcsd_host *host, rt_int32_t use_crc);
  197. void mmcsd_set_chip_select(struct rt_mmcsd_host *host, rt_int32_t mode);
  198. void mmcsd_set_clock(struct rt_mmcsd_host *host, rt_uint32_t clk);
  199. void mmcsd_set_bus_mode(struct rt_mmcsd_host *host, rt_uint32_t mode);
  200. void mmcsd_set_bus_width(struct rt_mmcsd_host *host, rt_uint32_t width);
  201. void mmcsd_set_data_timeout(struct rt_mmcsd_data *data, const struct rt_mmcsd_card *card);
  202. rt_uint32_t mmcsd_select_voltage(struct rt_mmcsd_host *host, rt_uint32_t ocr);
  203. void mmcsd_change(struct rt_mmcsd_host *host);
  204. void mmcsd_detect(void *param);
  205. struct rt_mmcsd_host *mmcsd_alloc_host(void);
  206. void mmcsd_free_host(struct rt_mmcsd_host *host);
  207. int rt_mmcsd_core_init(void);
  208. int rt_mmcsd_blk_init(void);
  209. rt_int32_t rt_mmcsd_blk_probe(struct rt_mmcsd_card *card);
  210. void rt_mmcsd_blk_remove(struct rt_mmcsd_card *card);
  211. #ifdef __cplusplus
  212. }
  213. #endif
  214. #endif