fsl_flexio.c 10 KB

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  1. /*
  2. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  3. * Copyright 2016-2017 NXP
  4. *
  5. * Redistribution and use in source and binary forms, with or without modification,
  6. * are permitted provided that the following conditions are met:
  7. *
  8. * o Redistributions of source code must retain the above copyright notice, this list
  9. * of conditions and the following disclaimer.
  10. *
  11. * o Redistributions in binary form must reproduce the above copyright notice, this
  12. * list of conditions and the following disclaimer in the documentation and/or
  13. * other materials provided with the distribution.
  14. *
  15. * o Neither the name of the copyright holder nor the names of its
  16. * contributors may be used to endorse or promote products derived from this
  17. * software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #include "fsl_flexio.h"
  31. /*******************************************************************************
  32. * Definitions
  33. ******************************************************************************/
  34. /*< @brief user configurable flexio handle count. */
  35. #define FLEXIO_HANDLE_COUNT 2
  36. /*******************************************************************************
  37. * Variables
  38. ******************************************************************************/
  39. /*< @brief pointer to array of FLEXIO handle. */
  40. static void *s_flexioHandle[FLEXIO_HANDLE_COUNT];
  41. /*< @brief pointer to array of FLEXIO IP types. */
  42. static void *s_flexioType[FLEXIO_HANDLE_COUNT];
  43. /*< @brief pointer to array of FLEXIO Isr. */
  44. static flexio_isr_t s_flexioIsr[FLEXIO_HANDLE_COUNT];
  45. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  46. /*! @brief Pointers to flexio clocks for each instance. */
  47. const clock_ip_name_t s_flexioClocks[] = FLEXIO_CLOCKS;
  48. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  49. /*! @brief Pointers to flexio bases for each instance. */
  50. FLEXIO_Type *const s_flexioBases[] = FLEXIO_BASE_PTRS;
  51. /*******************************************************************************
  52. * Codes
  53. ******************************************************************************/
  54. uint32_t FLEXIO_GetInstance(FLEXIO_Type *base)
  55. {
  56. uint32_t instance;
  57. /* Find the instance index from base address mappings. */
  58. for (instance = 0; instance < ARRAY_SIZE(s_flexioBases); instance++)
  59. {
  60. if (s_flexioBases[instance] == base)
  61. {
  62. break;
  63. }
  64. }
  65. assert(instance < ARRAY_SIZE(s_flexioBases));
  66. return instance;
  67. }
  68. void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig)
  69. {
  70. uint32_t ctrlReg = 0;
  71. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  72. CLOCK_EnableClock(s_flexioClocks[FLEXIO_GetInstance(base)]);
  73. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  74. FLEXIO_Reset(base);
  75. ctrlReg = base->CTRL;
  76. ctrlReg &= ~(FLEXIO_CTRL_DOZEN_MASK | FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CTRL_FLEXEN_MASK);
  77. ctrlReg |= (FLEXIO_CTRL_DBGE(userConfig->enableInDebug) | FLEXIO_CTRL_FASTACC(userConfig->enableFastAccess) |
  78. FLEXIO_CTRL_FLEXEN(userConfig->enableFlexio));
  79. if (!userConfig->enableInDoze)
  80. {
  81. ctrlReg |= FLEXIO_CTRL_DOZEN_MASK;
  82. }
  83. base->CTRL = ctrlReg;
  84. }
  85. void FLEXIO_Deinit(FLEXIO_Type *base)
  86. {
  87. FLEXIO_Enable(base, false);
  88. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  89. CLOCK_DisableClock(s_flexioClocks[FLEXIO_GetInstance(base)]);
  90. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  91. }
  92. void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig)
  93. {
  94. assert(userConfig);
  95. userConfig->enableFlexio = true;
  96. userConfig->enableInDoze = false;
  97. userConfig->enableInDebug = true;
  98. userConfig->enableFastAccess = false;
  99. }
  100. void FLEXIO_Reset(FLEXIO_Type *base)
  101. {
  102. /*do software reset, software reset operation affect all other FLEXIO registers except CTRL*/
  103. base->CTRL |= FLEXIO_CTRL_SWRST_MASK;
  104. base->CTRL = 0;
  105. }
  106. uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index)
  107. {
  108. assert(index < FLEXIO_SHIFTBUF_COUNT);
  109. uint32_t address = 0;
  110. switch (type)
  111. {
  112. case kFLEXIO_ShifterBuffer:
  113. address = (uint32_t) & (base->SHIFTBUF[index]);
  114. break;
  115. case kFLEXIO_ShifterBufferBitSwapped:
  116. address = (uint32_t) & (base->SHIFTBUFBIS[index]);
  117. break;
  118. case kFLEXIO_ShifterBufferByteSwapped:
  119. address = (uint32_t) & (base->SHIFTBUFBYS[index]);
  120. break;
  121. case kFLEXIO_ShifterBufferBitByteSwapped:
  122. address = (uint32_t) & (base->SHIFTBUFBBS[index]);
  123. break;
  124. #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP
  125. case kFLEXIO_ShifterBufferNibbleByteSwapped:
  126. address = (uint32_t) & (base->SHIFTBUFNBS[index]);
  127. break;
  128. #endif
  129. #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP
  130. case kFLEXIO_ShifterBufferHalfWordSwapped:
  131. address = (uint32_t) & (base->SHIFTBUFHWS[index]);
  132. break;
  133. #endif
  134. #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP
  135. case kFLEXIO_ShifterBufferNibbleSwapped:
  136. address = (uint32_t) & (base->SHIFTBUFNIS[index]);
  137. break;
  138. #endif
  139. default:
  140. break;
  141. }
  142. return address;
  143. }
  144. void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig)
  145. {
  146. base->SHIFTCFG[index] = FLEXIO_SHIFTCFG_INSRC(shifterConfig->inputSource)
  147. #if defined(FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH) && FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
  148. | FLEXIO_SHIFTCFG_PWIDTH(shifterConfig->parallelWidth)
  149. #endif /* FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH */
  150. | FLEXIO_SHIFTCFG_SSTOP(shifterConfig->shifterStop) |
  151. FLEXIO_SHIFTCFG_SSTART(shifterConfig->shifterStart);
  152. base->SHIFTCTL[index] =
  153. FLEXIO_SHIFTCTL_TIMSEL(shifterConfig->timerSelect) | FLEXIO_SHIFTCTL_TIMPOL(shifterConfig->timerPolarity) |
  154. FLEXIO_SHIFTCTL_PINCFG(shifterConfig->pinConfig) | FLEXIO_SHIFTCTL_PINSEL(shifterConfig->pinSelect) |
  155. FLEXIO_SHIFTCTL_PINPOL(shifterConfig->pinPolarity) | FLEXIO_SHIFTCTL_SMOD(shifterConfig->shifterMode);
  156. }
  157. void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig)
  158. {
  159. base->TIMCFG[index] =
  160. FLEXIO_TIMCFG_TIMOUT(timerConfig->timerOutput) | FLEXIO_TIMCFG_TIMDEC(timerConfig->timerDecrement) |
  161. FLEXIO_TIMCFG_TIMRST(timerConfig->timerReset) | FLEXIO_TIMCFG_TIMDIS(timerConfig->timerDisable) |
  162. FLEXIO_TIMCFG_TIMENA(timerConfig->timerEnable) | FLEXIO_TIMCFG_TSTOP(timerConfig->timerStop) |
  163. FLEXIO_TIMCFG_TSTART(timerConfig->timerStart);
  164. base->TIMCMP[index] = FLEXIO_TIMCMP_CMP(timerConfig->timerCompare);
  165. base->TIMCTL[index] = FLEXIO_TIMCTL_TRGSEL(timerConfig->triggerSelect) |
  166. FLEXIO_TIMCTL_TRGPOL(timerConfig->triggerPolarity) |
  167. FLEXIO_TIMCTL_TRGSRC(timerConfig->triggerSource) |
  168. FLEXIO_TIMCTL_PINCFG(timerConfig->pinConfig) | FLEXIO_TIMCTL_PINSEL(timerConfig->pinSelect) |
  169. FLEXIO_TIMCTL_PINPOL(timerConfig->pinPolarity) | FLEXIO_TIMCTL_TIMOD(timerConfig->timerMode);
  170. }
  171. status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr)
  172. {
  173. assert(base);
  174. assert(handle);
  175. assert(isr);
  176. uint8_t index = 0;
  177. /* Find the an empty handle pointer to store the handle. */
  178. for (index = 0; index < FLEXIO_HANDLE_COUNT; index++)
  179. {
  180. if (s_flexioHandle[index] == NULL)
  181. {
  182. /* Register FLEXIO simulated driver base, handle and isr. */
  183. s_flexioType[index] = base;
  184. s_flexioHandle[index] = handle;
  185. s_flexioIsr[index] = isr;
  186. break;
  187. }
  188. }
  189. if (index == FLEXIO_HANDLE_COUNT)
  190. {
  191. return kStatus_OutOfRange;
  192. }
  193. else
  194. {
  195. return kStatus_Success;
  196. }
  197. }
  198. status_t FLEXIO_UnregisterHandleIRQ(void *base)
  199. {
  200. assert(base);
  201. uint8_t index = 0;
  202. /* Find the index from base address mappings. */
  203. for (index = 0; index < FLEXIO_HANDLE_COUNT; index++)
  204. {
  205. if (s_flexioType[index] == base)
  206. {
  207. /* Unregister FLEXIO simulated driver handle and isr. */
  208. s_flexioType[index] = NULL;
  209. s_flexioHandle[index] = NULL;
  210. s_flexioIsr[index] = NULL;
  211. break;
  212. }
  213. }
  214. if (index == FLEXIO_HANDLE_COUNT)
  215. {
  216. return kStatus_OutOfRange;
  217. }
  218. else
  219. {
  220. return kStatus_Success;
  221. }
  222. }
  223. void FLEXIO_CommonIRQHandler(void)
  224. {
  225. uint8_t index;
  226. for (index = 0; index < FLEXIO_HANDLE_COUNT; index++)
  227. {
  228. if (s_flexioHandle[index])
  229. {
  230. s_flexioIsr[index](s_flexioType[index], s_flexioHandle[index]);
  231. }
  232. }
  233. /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
  234. exception return operation might vector to incorrect interrupt */
  235. #if defined __CORTEX_M && (__CORTEX_M == 4U)
  236. __DSB();
  237. #endif
  238. }
  239. void FLEXIO_DriverIRQHandler(void)
  240. {
  241. FLEXIO_CommonIRQHandler();
  242. }
  243. void FLEXIO0_DriverIRQHandler(void)
  244. {
  245. FLEXIO_CommonIRQHandler();
  246. }
  247. void FLEXIO1_DriverIRQHandler(void)
  248. {
  249. FLEXIO_CommonIRQHandler();
  250. }
  251. void UART2_FLEXIO_DriverIRQHandler(void)
  252. {
  253. FLEXIO_CommonIRQHandler();
  254. }
  255. void FLEXIO2_DriverIRQHandler(void)
  256. {
  257. FLEXIO_CommonIRQHandler();
  258. }