rt-thread/bsp/cypress/libraries/IFX_PSOC6_HAL/SConscript

from building import *
import rtconfig
Import('RTT_ROOT')

# get current directory
cwd = GetCurrentDir()
src = []

# The set of source files associated with this SConscript file.
src = Split('''
            mtb-hal-cat1/source/cyhal_clock.c
            mtb-hal-cat1/source/cyhal_hwmgr.c
            mtb-hal-cat1/source/cyhal_syspm.c
            mtb-hal-cat1/source/cyhal_system.c
            mtb-hal-cat1/source/cyhal_uart.c
            mtb-hal-cat1/source/cyhal_gpio.c
            mtb-hal-cat1/source/cyhal_scb_common.c
            mtb-hal-cat1/source/cyhal_interconnect.c
            mtb-hal-cat1/source/cyhal_utils_psoc.c
            mtb-hal-cat1/source/cyhal_utils.c
            mtb-hal-cat1/source/cyhal_lptimer.c
            mtb-hal-cat1/source/cyhal_irq_psoc.c
            mtb-hal-cat1/include_pvt/cyhal_hw_types.h      
            mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c
            mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_02_124_bga.c
            mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/cy_device.c
            mtb-pdl-cat1/drivers/source/cy_scb_common.c
            mtb-pdl-cat1/drivers/source/cy_sysclk.c
            mtb-pdl-cat1/drivers/source/cy_systick.c
            mtb-pdl-cat1/drivers/source/cy_gpio.c
            mtb-pdl-cat1/drivers/source/cy_sysint.c
            mtb-pdl-cat1/drivers/source/cy_syslib.c
            mtb-pdl-cat1/drivers/source/cy_scb_i2c.c
            mtb-pdl-cat1/drivers/source/cy_syspm.c
            mtb-pdl-cat1/drivers/source/cy_mcwdt.c
            mtb-pdl-cat1/drivers/source/cy_ipc_pipe.c
            mtb-pdl-cat1/drivers/source/cy_ipc_sema.c
            mtb-pdl-cat1/drivers/source/cy_ipc_drv.c
            mtb-pdl-cat1/drivers/source/cy_trigmux.c
            mtb-pdl-cat1/drivers/source/cy_prot.c
            mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.s            
            TARGET_CY8CKIT-062S2-43012/cybsp.c
            TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/system_psoc6_cm4.c
            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c
            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c
            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c
            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c
            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.c
            TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c            
            lib/cy_capsense.lib
            ''')

src += Glob(cwd + '/psoc6cm0p/COMPONENT_CM0P_SLEEP/*.c')

if GetDepend(['RT_USING_SERIAL']):
    src += ['retarget-io/cy_retarget_io.c']
    src += ['mtb-hal-cat1/source/cyhal_uart.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_scb_uart.c']

if GetDepend(['RT_USING_ADC']):
    src += ['mtb-hal-cat1/source/cyhal_dma_dw.c']
    src += ['mtb-hal-cat1/source/cyhal_dma_dmac.c']
    src += ['mtb-hal-cat1/source/cyhal_dma.c']
    src += ['mtb-hal-cat1/source/cyhal_analog_common.c']
    src += ['mtb-hal-cat1/source/cyhal_adc_sar.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_dma.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_sar.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_dmac.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_sysanalog.c']

if GetDepend(['RT_USING_SDIO']):
    src += ['mtb-hal-cat1/source/cyhal_sdhc.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_sd_host.c']

if GetDepend(['RT_USING_QSPI']):
    src += ['mtb-hal-cat1/source/cyhal_qspi.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_dma.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_smif.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_smif_sfdp.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_smif_memslot.c']
    src += ['mtb_shared/serial-flash/cy_serial_flash_qspi.c']
    src += ['TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_qspi_memslot.c']

if GetDepend(['RT_USING_PWM']):
    src += ['mtb-hal-cat1/source/cyhal_pwm.c']
    src += ['mtb-hal-cat1/source/cyhal_timer.c']
    src += ['mtb-hal-cat1/source/cyhal_tcpwm_common.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_tcpwm_pwm.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_tcpwm_counter.c']

if GetDepend(['RT_USING_SPI']):
    src += ['mtb-hal-cat1/source/cyhal_spi.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_scb_spi.c']

if GetDepend(['RT_USING_I2C']):
    src += ['mtb-hal-cat1/source/cyhal_i2c.c']

if GetDepend('BSP_USING_RTC'):
    src += ['mtb-pdl-cat1/drivers/source/cy_rtc.c']
    src += ['mtb-hal-cat1/source/cyhal_rtc.c']

if GetDepend('BSP_USING_ON_CHIP_FLASH'):
    src += ['mtb-pdl-cat1/drivers/source/cy_flash.c']
    src += ['mtb-hal-cat1/source/cyhal_flash.c']

if GetDepend(['BSP_USING_SLIDER']):
    src += ['capsense/cy_capsense_control.c']
    src += ['capsense/cy_capsense_sensing.c']
    src += ['capsense/cy_capsense_sensing_v2.c']
    src += ['capsense/cy_capsense_csx_v2.c']
    src += ['capsense/cy_capsense_csd_v2.c']
    src += ['capsense/cy_capsense_processing.c']
    src += ['capsense/cy_capsense_tuner.c']
    src += ['capsense/cy_capsense_structure.c']
    src += ['capsense/cy_capsense_centroid.c']
    src += ['capsense/cy_capsense_filter.c']
    src += ['mtb-pdl-cat1/drivers/source/cy_csd.c']
    src += ['TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.c']

if GetDepend(['RT_USING_WDT']):
    src += ['mtb-pdl-cat1/drivers/source/cy_wdt.c']
    src += ['mtb-hal-cat1/source/cyhal_wdt.c']

if GetDepend(['RT_USING_HWTIMER']):
    src += ['mtb-hal-cat1/source/cyhal_timer.c']    

path = [cwd + '/capsense',
        cwd + '/psoc6cm0p',
        cwd + '/retarget-io',
        cwd + '/core-lib/include',
        cwd + '/mtb_shared/serial-flash',
        cwd + '/mtb-hal-cat1/include',
        cwd + '/mtb-hal-cat1/include_pvt',
        cwd + '/mtb-pdl-cat1/cmsis/include',
        cwd + '/mtb-pdl-cat1/drivers/include',
        cwd + '/mtb-hal-cat1/COMPONENT_CAT1A/include',
        cwd + '/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include',
        cwd + '/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include',
        cwd + '/TARGET_CY8CKIT-062S2-43012',
        cwd + '/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource']

group = DefineGroup('Libraries', src, depend=[''], CPPPATH=path)

Return('group')