cpu.c 2.3 KB

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  1. /*
  2. * File : cpu.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://openlab.rt-thread.com/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2006-03-13 Bernard first version
  13. */
  14. #include <rtthread.h>
  15. #include "s3c24x0.h"
  16. /**
  17. * @addtogroup S3C24X0
  18. */
  19. /*@{*/
  20. #define ICACHE_MASK (rt_uint32_t)(1 << 12)
  21. #define DCACHE_MASK (rt_uint32_t)(1 << 2)
  22. static rt_uint32_t cp15_rd(void)
  23. {
  24. rt_uint32_t i;
  25. asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
  26. return i;
  27. }
  28. rt_inline void cache_enable(rt_uint32_t bit)
  29. {
  30. __asm__ __volatile__( \
  31. "mrc p15,0,r0,c1,c0,0\n\t" \
  32. "orr r0,r0,%0\n\t" \
  33. "mcr p15,0,r0,c1,c0,0" \
  34. : \
  35. :"r" (bit) \
  36. :"memory");
  37. }
  38. rt_inline void cache_disable(rt_uint32_t bit)
  39. {
  40. __asm__ __volatile__( \
  41. "mrc p15,0,r0,c1,c0,0\n\t" \
  42. "bic r0,r0,%0\n\t" \
  43. "mcr p15,0,%0,c1,c0,0" \
  44. : \
  45. :"r" (bit) \
  46. :"memory");
  47. }
  48. /**
  49. * enable I-Cache
  50. *
  51. */
  52. void rt_hw_cpu_icache_enable()
  53. {
  54. cache_enable(ICACHE_MASK);
  55. }
  56. /**
  57. * disable I-Cache
  58. *
  59. */
  60. void rt_hw_cpu_icache_disable()
  61. {
  62. cache_disable(ICACHE_MASK);
  63. }
  64. /**
  65. * return the status of I-Cache
  66. *
  67. */
  68. rt_base_t rt_hw_cpu_icache_status()
  69. {
  70. return (cp15_rd() & ICACHE_MASK);
  71. }
  72. /**
  73. * enable D-Cache
  74. *
  75. */
  76. void rt_hw_cpu_dcache_enable()
  77. {
  78. cache_enable(DCACHE_MASK);
  79. }
  80. /**
  81. * disable D-Cache
  82. *
  83. */
  84. void rt_hw_cpu_dcache_disable()
  85. {
  86. cache_disable(DCACHE_MASK);
  87. }
  88. /**
  89. * return the status of D-Cache
  90. *
  91. */
  92. rt_base_t rt_hw_cpu_dcache_status()
  93. {
  94. return (cp15_rd() & DCACHE_MASK);
  95. }
  96. /**
  97. * reset cpu by dog's time-out
  98. *
  99. */
  100. void rt_hw_cpu_reset()
  101. {
  102. /* Disable all interrupt except the WDT */
  103. INTMSK = (~((rt_uint32_t)1 << INTWDT));
  104. /* Disable watchdog */
  105. WTCON = 0x0000;
  106. /* Initialize watchdog timer count register */
  107. WTCNT = 0x0001;
  108. /* Enable watchdog timer; assert reset at timer timeout */
  109. WTCON = 0x0021;
  110. while(1); /* loop forever and wait for reset to happen */
  111. /*NOTREACHED*/
  112. }
  113. /**
  114. * shutdown CPU
  115. *
  116. */
  117. void rt_hw_cpu_shutdown()
  118. {
  119. rt_kprintf("shutdown...\n");
  120. RT_ASSERT(RT_NULL);
  121. }
  122. /*@}*/