pin.h 5.1 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2015-01-20 Bernard the first version
  9. * 2017-10-20 ZYH add mode open drain and input pull down
  10. */
  11. #ifndef PIN_H__
  12. #define PIN_H__
  13. #include <rtthread.h>
  14. #ifdef __cplusplus
  15. extern "C" {
  16. #endif
  17. #ifdef RT_USING_DM
  18. #include <drivers/pic.h>
  19. struct rt_pin_irqchip
  20. {
  21. struct rt_pic parent;
  22. int irq;
  23. rt_base_t pin_range[2];
  24. };
  25. #endif /* RT_USING_DM */
  26. /* pin device and operations for RT-Thread */
  27. struct rt_device_pin
  28. {
  29. struct rt_device parent;
  30. #ifdef RT_USING_DM
  31. struct rt_pin_irqchip irqchip;
  32. #endif /* RT_USING_DM */
  33. const struct rt_pin_ops *ops;
  34. };
  35. #define PIN_NONE (-1)
  36. #define PIN_LOW 0x00
  37. #define PIN_HIGH 0x01
  38. #define PIN_MODE_OUTPUT 0x00
  39. #define PIN_MODE_INPUT 0x01
  40. #define PIN_MODE_INPUT_PULLUP 0x02
  41. #define PIN_MODE_INPUT_PULLDOWN 0x03
  42. #define PIN_MODE_OUTPUT_OD 0x04
  43. #ifdef RT_USING_PINCTRL
  44. enum
  45. {
  46. PIN_CONFIG_BIAS_BUS_HOLD,
  47. PIN_CONFIG_BIAS_DISABLE,
  48. PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
  49. PIN_CONFIG_BIAS_PULL_DOWN,
  50. PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
  51. PIN_CONFIG_BIAS_PULL_UP,
  52. PIN_CONFIG_DRIVE_OPEN_DRAIN,
  53. PIN_CONFIG_DRIVE_OPEN_SOURCE,
  54. PIN_CONFIG_DRIVE_PUSH_PULL,
  55. PIN_CONFIG_DRIVE_STRENGTH,
  56. PIN_CONFIG_DRIVE_STRENGTH_UA,
  57. PIN_CONFIG_INPUT_DEBOUNCE,
  58. PIN_CONFIG_INPUT_ENABLE,
  59. PIN_CONFIG_INPUT_SCHMITT,
  60. PIN_CONFIG_INPUT_SCHMITT_ENABLE,
  61. PIN_CONFIG_MODE_LOW_POWER,
  62. PIN_CONFIG_MODE_PWM,
  63. PIN_CONFIG_OUTPUT,
  64. PIN_CONFIG_OUTPUT_ENABLE,
  65. PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS,
  66. PIN_CONFIG_PERSIST_STATE,
  67. PIN_CONFIG_POWER_SOURCE,
  68. PIN_CONFIG_SKEW_DELAY,
  69. PIN_CONFIG_SLEEP_HARDWARE_STATE,
  70. PIN_CONFIG_SLEW_RATE,
  71. PIN_CONFIG_END = 0x7f,
  72. PIN_CONFIG_MAX = 0xff,
  73. };
  74. #endif /* RT_USING_PINCTRL */
  75. #define PIN_IRQ_MODE_RISING 0x00
  76. #define PIN_IRQ_MODE_FALLING 0x01
  77. #define PIN_IRQ_MODE_RISING_FALLING 0x02
  78. #define PIN_IRQ_MODE_HIGH_LEVEL 0x03
  79. #define PIN_IRQ_MODE_LOW_LEVEL 0x04
  80. #define PIN_IRQ_DISABLE 0x00
  81. #define PIN_IRQ_ENABLE 0x01
  82. #define PIN_IRQ_PIN_NONE PIN_NONE
  83. struct rt_device_pin_mode
  84. {
  85. rt_base_t pin;
  86. rt_uint8_t mode; /* e.g. PIN_MODE_OUTPUT */
  87. };
  88. struct rt_device_pin_value
  89. {
  90. rt_base_t pin;
  91. rt_uint8_t value; /* PIN_LOW or PIN_HIGH */
  92. };
  93. struct rt_pin_irq_hdr
  94. {
  95. rt_base_t pin;
  96. rt_uint8_t mode; /* e.g. PIN_IRQ_MODE_RISING */
  97. void (*hdr)(void *args);
  98. void *args;
  99. };
  100. #ifdef RT_USING_PINCTRL
  101. struct rt_pin_ctrl_conf_params
  102. {
  103. const char *propname;
  104. rt_uint32_t param;
  105. rt_uint32_t default_value;
  106. };
  107. #endif /* RT_USING_PINCTRL */
  108. struct rt_pin_ops
  109. {
  110. void (*pin_mode)(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
  111. void (*pin_write)(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
  112. rt_ssize_t (*pin_read)(struct rt_device *device, rt_base_t pin);
  113. rt_err_t (*pin_attach_irq)(struct rt_device *device, rt_base_t pin,
  114. rt_uint8_t mode, void (*hdr)(void *args), void *args);
  115. rt_err_t (*pin_detach_irq)(struct rt_device *device, rt_base_t pin);
  116. rt_err_t (*pin_irq_enable)(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
  117. rt_base_t (*pin_get)(const char *name);
  118. #ifdef RT_USING_DM
  119. rt_err_t (*pin_irq_mode)(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
  120. rt_ssize_t (*pin_parse)(struct rt_device *device, struct rt_ofw_cell_args *args, rt_uint32_t *flags);
  121. #endif
  122. #ifdef RT_USING_PINCTRL
  123. rt_err_t (*pin_ctrl_confs_apply)(struct rt_device *device, void *fw_conf_np);
  124. #endif /* RT_USING_PINCTRL */
  125. };
  126. int rt_device_pin_register(const char *name, const struct rt_pin_ops *ops, void *user_data);
  127. void rt_pin_mode(rt_base_t pin, rt_uint8_t mode);
  128. void rt_pin_write(rt_base_t pin, rt_ssize_t value);
  129. rt_ssize_t rt_pin_read(rt_base_t pin);
  130. rt_base_t rt_pin_get(const char *name);
  131. rt_err_t rt_pin_attach_irq(rt_base_t pin, rt_uint8_t mode,
  132. void (*hdr)(void *args), void *args);
  133. rt_err_t rt_pin_detach_irq(rt_base_t pin);
  134. rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint8_t enabled);
  135. #ifdef RT_USING_DM
  136. rt_ssize_t rt_pin_get_named_pin(struct rt_device *dev, const char *propname, int index,
  137. rt_uint8_t *out_mode, rt_uint8_t *out_value);
  138. rt_ssize_t rt_pin_get_named_pin_count(struct rt_device *dev, const char *propname);
  139. #ifdef RT_USING_OFW
  140. rt_ssize_t rt_ofw_get_named_pin(struct rt_ofw_node *np, const char *propname, int index,
  141. rt_uint8_t *out_mode, rt_uint8_t *out_value);
  142. rt_ssize_t rt_ofw_get_named_pin_count(struct rt_ofw_node *np, const char *propname);
  143. #endif
  144. #endif /* RT_USING_DM */
  145. #ifdef RT_USING_PINCTRL
  146. rt_ssize_t rt_pin_ctrl_confs_lookup(struct rt_device *device, const char *name);
  147. rt_err_t rt_pin_ctrl_confs_apply(struct rt_device *device, int index);
  148. rt_err_t rt_pin_ctrl_confs_apply_by_name(struct rt_device *device, const char *name);
  149. #endif /* RT_USING_PINCTRL */
  150. #ifdef __cplusplus
  151. }
  152. #endif
  153. #endif