ehci-q.c 53 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  22. *
  23. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  24. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  25. * buffers needed for the larger number). We use one QH per endpoint, queue
  26. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  27. *
  28. * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  29. * interrupts) needs careful scheduling. Performance improvements can be
  30. * an ongoing challenge. That's in "ehci-sched.c".
  31. *
  32. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  33. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  34. * (b) special fields in qh entries or (c) split iso entries. TTs will
  35. * buffer low/full speed data so the host collects it at high speed.
  36. */
  37. /*-------------------------------------------------------------------------*/
  38. /* fill a qtd, returning how much of the buffer we were able to queue up */
  39. // 该函数用于填充qtd结构,并返回当前qtd所承载的数据长度,
  40. // 每个qtd有5个pionter,每个pionter最大索引范围4k,因此,每个qtd最大索引5*4k
  41. // 该函数填充pionter,把指针与要指向的物理地址关联起来
  42. // #include "sunxi_hal_timer.h"
  43. static int
  44. qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  45. size_t len, int token, int maxpacket)
  46. {
  47. int i, count;
  48. u64 addr = buf;
  49. /* one buffer entry per 4K ... first might be short or unaligned */
  50. qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  51. qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  52. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  53. if (len < count) /* ... iff needed */
  54. count = len;
  55. else {
  56. buf += 0x1000;
  57. buf &= ~0x0fff;
  58. /* per-qtd limit: from 16K to 20K (best alignment) */
  59. for (i = 1; count < len && i < 5; i++) {
  60. addr = buf;
  61. qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  62. qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  63. (u32)(addr >> 32));
  64. buf += 0x1000;
  65. if ((count + 0x1000) < len)
  66. count += 0x1000;
  67. else
  68. count = len;
  69. }
  70. /* short packets may only terminate transfers */
  71. if (count != len)
  72. count -= (count % maxpacket);
  73. }
  74. qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  75. qtd->length = count;
  76. EHCI_DEBUG_PRINTF("qtd->hw_token = 0x%lx, qtd->length = 0x%x",
  77. qtd->hw_token, qtd->length);
  78. return count;
  79. }
  80. /*-------------------------------------------------------------------------*/
  81. static inline void
  82. qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  83. {
  84. struct ehci_qh_hw *hw = qh->hw;
  85. /* writes to an active overlay are unsafe */
  86. //WARN_ON(qh->qh_state != QH_STATE_IDLE);
  87. hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  88. hw->hw_alt_next = EHCI_LIST_END(ehci);
  89. /* Except for control endpoints, we make hardware maintain data
  90. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  91. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  92. * ever clear it.
  93. */
  94. if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
  95. unsigned is_out, epnum;
  96. is_out = qh->is_out;
  97. epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
  98. if (!usb_gettoggle(qh->ps.udev, epnum, is_out)) {
  99. hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
  100. usb_settoggle(qh->ps.udev, epnum, is_out, 1);
  101. }
  102. }
  103. hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
  104. }
  105. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  106. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  107. * recovery (including urb dequeue) would need software changes to a QH...
  108. */
  109. static void
  110. qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
  111. {
  112. struct ehci_qtd *qtd;
  113. qtd = list_entry(qh->qtd_list.next, struct ehci_qtd, qtd_list);
  114. /*
  115. * first qtd may already be partially processed.
  116. * If we come here during unlink, the QH overlay region
  117. * might have reference to the just unlinked qtd. The
  118. * qtd is updated in qh_completions(). Update the QH
  119. * overlay here.
  120. */
  121. if (qh->hw->hw_token & ACTIVE_BIT(ehci)) {
  122. qh->hw->hw_qtd_next = qtd->hw_next;
  123. if (qh->should_be_inactive)
  124. ehci_warn("qh %p should be inactive!\n", qh);
  125. } else {
  126. qh_update(ehci, qh, qtd);
  127. }
  128. qh->should_be_inactive = 0;
  129. }
  130. /*-------------------------------------------------------------------------*/
  131. static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
  132. //static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
  133. static void ehci_clear_tt_buffer_complete(struct hc_gen_dev *hcd,
  134. struct usb_host_virt_endpoint *ep)
  135. {
  136. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  137. struct ehci_qh *qh = ep->hcpriv;
  138. unsigned long flags;
  139. flags = hal_spin_lock_irqsave(&ehci->lock);
  140. qh->clearing_tt = 0;
  141. if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
  142. && ehci->rh_state == EHCI_RH_RUNNING)
  143. qh_link_async(ehci, qh);
  144. hal_spin_unlock_irqrestore(&ehci->lock, flags);
  145. }
  146. //static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
  147. // struct urb *urb, u32 token)
  148. //{
  149. //
  150. // /* If an async split transaction gets an error or is unlinked,
  151. // * the TT buffer may be left in an indeterminate state. We
  152. // * have to clear the TT buffer.
  153. // *
  154. // * Note: this routine is never called for Isochronous transfers.
  155. // */
  156. // if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
  157. ////#ifdef CONFIG_DYNAMIC_DEBUG
  158. //// struct usb_device *tt = urb->dev->tt->hub;
  159. //// dev_dbg(&tt->dev,
  160. //// "clear tt buffer port %d, a%d ep%d t%08x\n",
  161. //// urb->dev->ttport, urb->dev->devnum,
  162. //// usb_pipeendpoint(urb->pipe), token);
  163. ////#endif /* CONFIG_DYNAMIC_DEBUG */
  164. // if (!ehci_is_TDI(ehci)
  165. // || urb->dev->tt->hub !=
  166. // ehci_to_hcd(ehci)->self.root_hub) {
  167. // if (usb_hub_clear_tt_buffer(urb) == 0)
  168. // qh->clearing_tt = 1;
  169. // } else {
  170. //
  171. // /* REVISIT ARC-derived cores don't clear the root
  172. // * hub TT buffer in this way...
  173. // */
  174. // }
  175. // }
  176. //}
  177. static int qtd_copy_status (
  178. struct ehci_hcd *ehci,
  179. struct urb *urb,
  180. size_t length,
  181. u32 token
  182. )
  183. {
  184. int status = -EINPROGRESS;
  185. /* count IN/OUT bytes, not SETUP (even short packets) */
  186. if (QTD_PID (token) != 2)
  187. urb->actual_length += length - QTD_LENGTH (token);
  188. /* don't modify error codes */
  189. //if (unlikely(urb->unlinked))
  190. // return status;
  191. /* force cleanup after short read; not always an error */
  192. //if (unlikely (IS_SHORT_READ (token)))
  193. // status = -EREMOTEIO;
  194. /* serious "can't proceed" faults reported by the hardware */
  195. if (token & QTD_STS_HALT) {
  196. if (token & QTD_STS_BABBLE) {
  197. /* FIXME "must" disable babbling device's port too */
  198. status = -EOVERFLOW;
  199. /* CERR nonzero + halt --> stall */
  200. } else if (QTD_CERR(token)) {
  201. status = -EPIPE;
  202. /* In theory, more than one of the following bits can be set
  203. * since they are sticky and the transaction is retried.
  204. * Which to test first is rather arbitrary.
  205. */
  206. } else if (token & QTD_STS_MMF) {
  207. /* fs/ls interrupt xfer missed the complete-split */
  208. status = -EPROTO;
  209. } else if (token & QTD_STS_DBE) {
  210. status = (QTD_PID (token) == 1) /* IN ? */
  211. ? -ENOSR /* hc couldn't read data */
  212. : -ECOMM; /* hc couldn't write data */
  213. } else if (token & QTD_STS_XACT) {
  214. /* timeout, bad CRC, wrong PID, etc */
  215. //ehci_dbg("devpath %s ep%d%s 3strikes\n",
  216. // urb->dev->devpath,
  217. // usb_pipeendpoint(urb->pipe),
  218. // usb_pipein(urb->pipe) ? "in" : "out");
  219. status = -EPROTO;
  220. } else { /* unknown */
  221. status = -EPROTO;
  222. }
  223. }
  224. return status;
  225. }
  226. static void
  227. ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
  228. {
  229. if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
  230. /* ... update hc-wide periodic stats */
  231. ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
  232. }
  233. if (unlikely(urb->unlinked)) {
  234. COUNT(ehci->stats.unlink);
  235. } else {
  236. /* report non-error and short read status as zero */
  237. if (status == -EINPROGRESS || status == -EREMOTEIO)
  238. status = 0;
  239. COUNT(ehci->stats.complete);
  240. }
  241. //#ifdef EHCI_URB_TRACE
  242. // ehci_dbg (ehci,
  243. // "%s %s urb %p ep%d%s status %d len %d/%d\n",
  244. // __func__, urb->dev->devpath, urb,
  245. // usb_pipeendpoint (urb->pipe),
  246. // usb_pipein (urb->pipe) ? "in" : "out",
  247. // status,
  248. // urb->actual_length, urb->transfer_buffer_length);
  249. //#endif
  250. // usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  251. //usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
  252. if (urb->status == -EINPROGRESS)
  253. {
  254. urb->status = status;
  255. }
  256. urb->hcpriv = NULL;
  257. usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb);
  258. }
  259. static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  260. /*
  261. * Process and free completed qtds for a qh, returning URBs to drivers.
  262. * Chases up to qh->hw_current. Returns nonzero if the caller should
  263. * unlink qh.
  264. */
  265. // qh_completions()中通过对qh下链接的qtd进行逐个遍历,来判断传输的情况
  266. static unsigned qh_completions(struct ehci_hcd *ehci, struct ehci_qh *qh)
  267. {
  268. struct ehci_qtd *last, *end = qh->dummy;
  269. struct list_head *entry, *tmp;
  270. int last_status;
  271. int stopped;
  272. u8 state;
  273. struct ehci_qh_hw *hw = qh->hw;
  274. /* completions (or tasks on other cpus) must never clobber HALT
  275. * till we've gone through and cleaned everything up, even when
  276. * they add urbs to this qh's queue or mark them for unlinking.
  277. *
  278. * NOTE: unlinking expects to be done in queue order.
  279. *
  280. * It's a bug for qh->qh_state to be anything other than
  281. * QH_STATE_IDLE, unless our caller is scan_async() or
  282. * scan_intr().
  283. */
  284. state = qh->qh_state;
  285. qh->qh_state = QH_STATE_COMPLETING;
  286. stopped = (state == QH_STATE_IDLE);
  287. rescan:
  288. last = NULL;
  289. last_status = -EINPROGRESS;
  290. qh->dequeue_during_giveback = 0;
  291. /* remove de-activated QTDs from front of queue.
  292. * after faults (including short reads), cleanup this urb
  293. * then let the queue advance.
  294. * if queue is stopped, handles unlinks.
  295. */
  296. // list_for_each_safe逐个的把qh上的qtd取出放在指针entry中,
  297. // list_for_each_safe的特点是可以中途删除entry,通过指针tmp去找到下一个entry
  298. //该语句实际上是一个for循环
  299. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  300. struct ehci_qtd *qtd;
  301. struct urb *urb;
  302. u32 token = 0;
  303. //printf("\n");
  304. // 找到对应的qtd内存地址
  305. qtd = list_entry(entry, struct ehci_qtd, qtd_list);
  306. urb = qtd->urb;
  307. /* clean up any state from previous QTD ...*/
  308. //last初始值是NULL,第一次不执行,跳过if
  309. // 当再一次执行到此处时,如果前一次的处理中有qtd是执行完传输的(包括传输出错),
  310. // last此时就会指向了前一个qtd,并在if语句中的ehci_qtd_free()函数中把分配的qtd空间释放掉
  311. if (last) {
  312. // 一个qtd链表中的urb指针的指向都是相同的,除了最末这一个dummy qtd,
  313. // 所以在遍历到最后的qtd时“last->urb != urb”满足
  314. if (likely(last->urb != urb)) {
  315. // ehci_urb_done()要做的一件事是回调urb->complete()函数指针,
  316. // 从而使控制权回到USB device Driver中,这就是我们填充一个urb的回调函数的触发处
  317. ehci_urb_done(ehci, last->urb, last_status);
  318. last_status = -EINPROGRESS;
  319. }
  320. ehci_qtd_free (ehci, last);
  321. // list_add_tail(&(last->qtd_list), &(ehci->wait_free_list));
  322. // hal_log_info("\033[41m ADD : last = 0x%x \033[0m", last);
  323. last = NULL;
  324. }
  325. /* ignore urbs submitted during completions we reported */
  326. // 判断遍历到最后的dummy qtd,就跳出循环,表明整个qtd链表已被处理完了
  327. if (qtd == end) {
  328. break;
  329. }
  330. /* hardware copies qtd out of qh overlay */
  331. //rmb ();
  332. // HC在处理完一个qtd后,反映处理结果的值会回写到当前qtd的token字段中,
  333. // HCD读取这个token的Status值后,可以获知HC的传输情况
  334. hal_dcache_invalidate((unsigned long)&(((struct ehci_qtd *)(qtd->qtd_dma))->hw_token), sizeof(uint32_t));
  335. token = hc32_to_cpu(ehci, qtd->hw_token);
  336. EHCI_DEBUG_PRINTF("token = 0x%lx", token);
  337. /* always clean up qtds the hc de-activated */
  338. retry_xacterr:
  339. if ((token & QTD_STS_ACTIVE) == 0) {
  340. // 传输完成
  341. /* Report Data Buffer Error: non-fatal but useful */
  342. // 在EHCI SPEC里说,不被视作传输错误,会强制endpoint重发一次,所以代码也只是做了打印
  343. if (token & QTD_STS_DBE)
  344. {
  345. EHCI_DEBUG_PRINTF("detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]",
  346. urb,
  347. usb_endpoint_num(&urb->ep->desc),
  348. usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
  349. urb->transfer_buffer_length,
  350. qtd,
  351. qh);
  352. }
  353. /* on STALL, error, and short reads this urb must
  354. * complete and all its qtds must be recycled.
  355. */
  356. if ((token & QTD_STS_HALT) != 0) {
  357. // 表明当前qtd的传输出现了错误,而且与该endpoint的传输都被停掉
  358. EHCI_DEBUG_PRINTF("error halt");
  359. /* retry transaction errors until we
  360. * reach the software xacterr limit
  361. */
  362. // QTD_STS_XACT代表HC没有收到device发回的有效应答包
  363. if ((token & QTD_STS_XACT) &&
  364. QTD_CERR(token) == 0 &&
  365. ++qh->xacterrs < QH_XACTERR_MAX &&
  366. !urb->unlinked) {
  367. EHCI_DEBUG_PRINTF("detected XactErr len %zu/%zu retry %d",
  368. qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
  369. /* reset the token in the qtd and the
  370. * qh overlay (which still contains
  371. * the qtd) so that we pick up from
  372. * where we left off
  373. */
  374. // 出现这样的错误HCD的处理方式是,
  375. // 由软件把Halted位清零,
  376. // token[11:10] CERR位设为0x3,
  377. // Active位置1再次使能该qtd,
  378. // 让HC重新传输这个qtd
  379. token &= ~QTD_STS_HALT;
  380. token |= QTD_STS_ACTIVE |
  381. (EHCI_TUNE_CERR << 10);
  382. qtd->hw_token = cpu_to_hc32(ehci, token);
  383. //wmb();
  384. hw->hw_token = cpu_to_hc32(ehci, token);
  385. hal_dcache_clean_invalidate((unsigned long)&(((struct ehci_qtd *)(qtd->qtd_dma))->hw_token), sizeof(uint32_t));
  386. hal_dcache_clean_invalidate((unsigned long)&(((struct ehci_qh_hw *)(qh->qh_dma))->hw_token), sizeof(uint32_t));
  387. // 重复以上动作,直到传输成功或超时为止
  388. goto retry_xacterr;
  389. }
  390. stopped = 1;
  391. qh->unlink_reason |= QH_UNLINK_HALTED;
  392. /* magic dummy for some short reads; qh won't advance.
  393. * that silicon quirk can kick in with this dummy too.
  394. *
  395. * other short reads won't stop the queue, including
  396. * control transfers (status stage handles that) or
  397. * most other single-qtd reads ... the queue stops if
  398. * URB_SHORT_NOT_OK was set so the driver submitting
  399. * the urbs could clean it up.
  400. */
  401. } else if (IS_SHORT_READ (token)
  402. && !(qtd->hw_alt_next
  403. & EHCI_LIST_END(ehci))) {
  404. EHCI_DEBUG_PRINTF("short reads");
  405. stopped = 1;
  406. qh->unlink_reason |= QH_UNLINK_SHORT_READ;
  407. }
  408. /* stop scanning when we reach qtds the hc is using */
  409. } else if (!stopped
  410. && ehci->rh_state >= EHCI_RH_RUNNING) {
  411. EHCI_DEBUG_PRINTF("stop scanning");
  412. break;
  413. /* scan the whole queue for unlinks whenever it stops */
  414. } else {
  415. EHCI_DEBUG_PRINTF("stopped");
  416. stopped = 1;
  417. /* cancel everything if we halt, suspend, etc */
  418. if (ehci->rh_state < EHCI_RH_RUNNING) {
  419. last_status = -ESHUTDOWN;
  420. qh->unlink_reason |= QH_UNLINK_SHUTDOWN;
  421. }
  422. /* this qtd is active; skip it unless a previous qtd
  423. * for its urb faulted, or its urb was canceled.
  424. */
  425. else if (last_status == -EINPROGRESS && !urb->unlinked) {
  426. // else if (last_status == -EINPROGRESS) {
  427. continue;
  428. }
  429. /*
  430. * If this was the active qtd when the qh was unlinked
  431. * and the overlay's token is active, then the overlay
  432. * hasn't been written back to the qtd yet so use its
  433. * token instead of the qtd's. After the qtd is
  434. * processed and removed, the overlay won't be valid
  435. * any more.
  436. */
  437. if (state == QH_STATE_IDLE &&
  438. qh->qtd_list.next == &qtd->qtd_list &&
  439. (hw->hw_token & ACTIVE_BIT(ehci))) {
  440. token = hc32_to_cpu(ehci, hw->hw_token);
  441. hw->hw_token &= ~ACTIVE_BIT(ehci);
  442. qh->should_be_inactive = 1;
  443. /* An unlink may leave an incomplete
  444. * async transaction in the TT buffer.
  445. * We have to clear it.
  446. */
  447. //ehci_clear_tt_buffer(ehci, qh, urb, token);
  448. }
  449. }
  450. /* unless we already know the urb's status, collect qtd status
  451. * and update count of bytes transferred. in common short read
  452. * cases with only one data qtd (including control transfers),
  453. * queue processing won't halt. but with two or more qtds (for
  454. * example, with a 32 KB transfer), when the first qtd gets a
  455. * short read the second must be removed by hand.
  456. */
  457. if (last_status == -EINPROGRESS) {
  458. // 读取状态
  459. last_status = qtd_copy_status(ehci, urb,
  460. qtd->length, token);
  461. if (last_status == -EREMOTEIO
  462. && (qtd->hw_alt_next
  463. & EHCI_LIST_END(ehci))) {
  464. last_status = -EINPROGRESS;
  465. }
  466. /* As part of low/full-speed endpoint-halt processing
  467. * we must clear the TT buffer (11.17.5).
  468. */
  469. //if (unlikely(last_status != -EINPROGRESS &&
  470. // last_status != -EREMOTEIO)) {
  471. // /* The TT's in some hubs malfunction when they
  472. // * receive this request following a STALL (they
  473. // * stop sending isochronous packets). Since a
  474. // * STALL can't leave the TT buffer in a busy
  475. // * state (if you believe Figures 11-48 - 11-51
  476. // * in the USB 2.0 spec), we won't clear the TT
  477. // * buffer in this case. Strictly speaking this
  478. // * is a violation of the spec.
  479. // */
  480. // if (last_status != -EPIPE)
  481. // ehci_clear_tt_buffer(ehci, qh, urb,
  482. // token);
  483. //}
  484. }
  485. /* if we're removing something not at the queue head,
  486. * patch the hardware queue pointer.
  487. */
  488. //如果是qtd链表的首个元素,则qtd->qtd_list.prev == &qh->qtd_list
  489. //如果不是首元素,则需要先解链再释放,如是首元素,则不必
  490. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  491. //找到上一个qtd的地址
  492. last = list_entry (qtd->qtd_list.prev,
  493. struct ehci_qtd, qtd_list);
  494. //将上一个qtd的next与本qtd的next链接,即,将本qtd从链表中解链
  495. last->hw_next = qtd->hw_next;
  496. hal_dcache_clean_invalidate((unsigned long)&(((struct ehci_qtd *)(last->qtd_dma))->hw_next), sizeof(uint32_t));
  497. hal_dcache_clean_invalidate((unsigned long)&(((struct ehci_qtd *)(qtd->qtd_dma))->hw_next), sizeof(uint32_t));
  498. }
  499. /* remove qtd; it's recycled after possible urb completion */
  500. //释放
  501. list_del (&qtd->qtd_list);
  502. //记录到last里,下一次循环时真正回收qtd
  503. last = qtd;
  504. /* reinit the xacterr counter for the next qtd */
  505. qh->xacterrs = 0;
  506. }//end of list_for_each_safe(entry, tmp, &qh->qtd_list)
  507. /* last urb's completion might still need calling */
  508. // 如果指针last非空,那么一定是指向一个qtd链表队列的末尾处(非dummy qtd)
  509. if (last != NULL) {
  510. ehci_urb_done(ehci, last->urb, last_status);
  511. ehci_qtd_free(ehci, last);
  512. // list_add_tail(&(last->qtd_list), &(ehci->wait_free_list));
  513. // hal_log_info("\033[41m ADD : last = 0x%x \033[0m", last);
  514. }
  515. /* Do we need to rescan for URBs dequeued during a giveback? */
  516. if (unlikely(qh->dequeue_during_giveback)) {
  517. /* If the QH is already unlinked, do the rescan now. */
  518. if (state == QH_STATE_IDLE) {
  519. EHCI_DEBUG_PRINTF("goto rescan");
  520. goto rescan;
  521. }
  522. /* Otherwise the caller must unlink the QH. */
  523. }
  524. /* restore original state; caller must unlink or relink */
  525. qh->qh_state = state;
  526. /* be sure the hardware's done with the qh before refreshing
  527. * it after fault cleanup, or recovering from silicon wrongly
  528. * overlaying the dummy qtd (which reduces DMA chatter).
  529. *
  530. * We won't refresh a QH that's linked (after the HC
  531. * stopped the queue). That avoids a race:
  532. * - HC reads first part of QH;
  533. * - CPU updates that first part and the token;
  534. * - HC reads rest of that QH, including token
  535. * Result: HC gets an inconsistent image, and then
  536. * DMAs to/from the wrong memory (corrupting it).
  537. *
  538. * That should be rare for interrupt transfers,
  539. * except maybe high bandwidth ...
  540. */
  541. if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
  542. qh->unlink_reason |= QH_UNLINK_DUMMY_OVERLAY;
  543. }
  544. EHCI_DEBUG_PRINTF("qh->unlink_reason = %u\n", qh->unlink_reason);
  545. /* Let the caller know if the QH needs to be unlinked. */
  546. return qh->unlink_reason;
  547. }
  548. /*-------------------------------------------------------------------------*/
  549. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  550. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  551. // ... and packet size, for any kind of endpoint descriptor
  552. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  553. /*
  554. * reverse of qh_urb_transaction: free a list of TDs.
  555. * used for cleanup after errors, before HC sees an URB's TDs.
  556. */
  557. static void qtd_list_free (
  558. struct ehci_hcd *ehci,
  559. struct urb *urb,
  560. struct list_head *qtd_list
  561. ) {
  562. struct list_head *entry, *temp;
  563. list_for_each_safe (entry, temp, qtd_list) {
  564. struct ehci_qtd *qtd;
  565. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  566. list_del (&qtd->qtd_list);
  567. ehci_qtd_free (ehci, qtd);
  568. }
  569. }
  570. /*
  571. * create a list of filled qtds for this URB; won't link into qh.
  572. * 为URB创建并填充qtd列表,但是并未加到qh中
  573. * 一次USB的传输请求是由usb_submit_urb()提交下来的,要传输相关的数据、地址等信息都放在URB中
  574. * qh_urb_transaction()函数就是对URB携带的信息整合到EHCI能识别的数据结构中,即构造相应的qTD
  575. */
  576. static struct list_head *
  577. qh_urb_transaction (
  578. struct ehci_hcd *ehci,
  579. struct urb *urb,
  580. struct list_head *head,
  581. gfp_t flags
  582. ) {
  583. struct ehci_qtd *qtd, *qtd_prev;
  584. dma_addr_t buf;
  585. int len, this_sg_len, maxpacket;
  586. int is_input;
  587. u32 token;
  588. int i = 0;
  589. //struct scatterlist *sg;
  590. /*
  591. * URBs map to sequences of QTDs: one logical transaction
  592. */
  593. qtd = ehci_qtd_alloc (ehci, flags);
  594. if (!qtd)
  595. return NULL;
  596. list_add_tail (&qtd->qtd_list, head);
  597. qtd->urb = urb;
  598. token = QTD_STS_ACTIVE;//使能该qtd
  599. token |= (EHCI_TUNE_CERR << 10);
  600. /* for split transactions, SplitXState initialized to zero */
  601. len = urb->transfer_buffer_length;
  602. is_input = usb_pipein (urb->pipe);
  603. if (usb_pipecontrol (urb->pipe)) {
  604. /* SETUP pid */
  605. // 在此处将urb对应的数据包地址信息分配到qtd的pointer中,并返回长度
  606. qtd_fill(ehci, qtd, urb->setup_dma,
  607. sizeof (struct usb_ctrlrequest),
  608. token | (2 /* "setup" */ << 8), 8);
  609. /* ... and always at least one more pid */
  610. token ^= QTD_TOGGLE;
  611. //用qtd_prev指向填充过的qtd,再申请一个空的qtd
  612. qtd_prev = qtd;
  613. qtd = ehci_qtd_alloc (ehci, flags);
  614. if (!qtd)
  615. goto cleanup;
  616. qtd->urb = urb;
  617. // 将新的qtd联入队列
  618. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  619. list_add_tail (&qtd->qtd_list, head);
  620. /* for zero length DATA stages, STATUS is always IN */
  621. // 为0说明是仅用于control的命令传输,没有数据
  622. if (len == 0)
  623. token |= (1 /* "in" */ << 8);
  624. }
  625. /*
  626. * data transfer stage: buffer setup
  627. */
  628. //i = urb->num_mapped_sgs;
  629. //if (len > 0 && i > 0) {
  630. // sg = urb->sg;
  631. // buf = sg_dma_address(sg);
  632. // /* urb->transfer_buffer_length may be smaller than the
  633. // * size of the scatterlist (or vice versa)
  634. // */
  635. // this_sg_len = min_t(int, sg_dma_len(sg), len);
  636. //} else {
  637. //sg = NULL;
  638. buf = urb->transfer_dma;
  639. this_sg_len = len;
  640. //}
  641. if (is_input)
  642. token |= (1 /* "in" */ << 8);
  643. /* else it's already initted to "out" pid (0 << 8) */
  644. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  645. /*
  646. * buffer gets wrapped in one or more qtds;
  647. * last one may be "short" (including zero len)
  648. * and may serve as a control status ack
  649. */
  650. for (;;) {
  651. int this_qtd_len;
  652. this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
  653. maxpacket);
  654. this_sg_len -= this_qtd_len;
  655. len -= this_qtd_len;
  656. buf += this_qtd_len;
  657. /*
  658. * short reads advance to a "magic" dummy instead of the next
  659. * qtd ... that forces the queue to stop, for manual cleanup.
  660. * (this will usually be overridden later.)
  661. */
  662. if (is_input)
  663. qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
  664. /* qh makes control packets use qtd toggle; maybe switch it */
  665. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  666. token ^= QTD_TOGGLE;
  667. if (this_sg_len <= 0) {
  668. if (--i <= 0 || len <= 0)
  669. break;
  670. // sg = sg_next(sg);
  671. // buf = sg_dma_address(sg);
  672. // this_sg_len = min_t(int, sg_dma_len(sg), len);
  673. }
  674. qtd_prev = qtd;
  675. qtd = ehci_qtd_alloc (ehci, flags);
  676. if (!qtd)
  677. goto cleanup;
  678. qtd->urb = urb;
  679. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  680. list_add_tail (&qtd->qtd_list, head);
  681. }
  682. /*
  683. * unless the caller requires manual cleanup after short reads,
  684. * have the alt_next mechanism keep the queue running after the
  685. * last data qtd (the only one, for control and most other cases).
  686. */
  687. if ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  688. || usb_pipecontrol (urb->pipe))
  689. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  690. /*
  691. * control requests may need a terminating data "status" ack;
  692. * other OUT ones may need a terminating short packet
  693. * (zero length).
  694. */
  695. // 对urb中transfer_buffer_length非零,即涉及数据传输,且传输类型为Control或者是传输方向为OUT,就增加一个qtd作为结束,
  696. // 该qtd要传输的数据长度为零。并把最后一个qtd的token中IOC位置1,表示在完成qtd的传输后,在下一个中断周期产生一个中断
  697. if (urb->transfer_buffer_length != 0) {
  698. int one_more = 0;
  699. if (usb_pipecontrol (urb->pipe)) {
  700. one_more = 1;
  701. token ^= 0x0100; /* "in" <--> "out" */
  702. token |= QTD_TOGGLE; /* force DATA1 */
  703. //printf("[%s %d] token = 0x%lx\n", __func__, __LINE__, token);
  704. } else if (usb_pipeout(urb->pipe)
  705. && (urb->transfer_flags & URB_ZERO_PACKET)
  706. && !(urb->transfer_buffer_length % maxpacket)) {
  707. one_more = 1;
  708. }
  709. if (one_more) {
  710. qtd_prev = qtd;
  711. qtd = ehci_qtd_alloc (ehci, flags);
  712. if (!qtd)
  713. goto cleanup;
  714. qtd->urb = urb;
  715. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  716. list_add_tail (&qtd->qtd_list, head);
  717. /* never any data in such packets */
  718. qtd_fill(ehci, qtd, 0, 0, token, 0);
  719. }
  720. }
  721. /* by default, enable interrupt on urb completion */
  722. if (!(urb->transfer_flags & URB_NO_INTERRUPT))
  723. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  724. return head;
  725. cleanup:
  726. qtd_list_free (ehci, urb, head);
  727. return NULL;
  728. }
  729. /*-------------------------------------------------------------------------*/
  730. // Would be best to create all qh's from config descriptors,
  731. // when each interface/altsetting is established. Unlink
  732. // any previous qh and cancel its urbs first; endpoints are
  733. // implicitly reset then (data toggle too).
  734. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  735. /*
  736. * Each QH holds a qtd list; a QH is used for everything except iso.
  737. *
  738. * For interrupt urbs, the scheduler must set the microframe scheduling
  739. * mask(s) each time the QH gets scheduled. For highspeed, that's
  740. * just one microframe in the s-mask. For split interrupt transactions
  741. * there are additional complications: c-mask, maybe FSTNs.
  742. */
  743. static struct ehci_qh *
  744. qh_make (
  745. struct ehci_hcd *ehci,
  746. struct urb *urb,
  747. gfp_t flags
  748. ) {
  749. struct ehci_qh *qh = ehci_qh_alloc (ehci);
  750. u32 info1 = 0, info2 = 0;
  751. int is_input, type;
  752. int maxp = 0;
  753. //struct usb_tt *tt = urb->dev->tt;
  754. struct ehci_qh_hw *hw;
  755. if (!qh)
  756. return qh;
  757. /*
  758. * init endpoint/device data for this QH
  759. */
  760. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  761. info1 |= usb_pipedevice (urb->pipe) << 0;
  762. is_input = usb_pipein (urb->pipe);
  763. type = usb_pipetype (urb->pipe);
  764. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  765. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  766. * acts like up to 3KB, but is built from smaller packets.
  767. */
  768. if (max_packet(maxp) > 1024) {
  769. ehci_dbg("bogus qh maxpacket %d\n", max_packet(maxp));
  770. goto done;
  771. }
  772. /* Compute interrupt scheduling parameters just once, and save.
  773. * - allowing for high bandwidth, how many nsec/uframe are used?
  774. * - split transactions need a second CSPLIT uframe; same question
  775. * - splits also need a schedule gap (for full/low speed I/O)
  776. * - qh has a polling interval
  777. *
  778. * For control/bulk requests, the HC or TT handles these.
  779. */
  780. if (type == PIPE_INTERRUPT) {
  781. unsigned tmp;
  782. //qh->ps.usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  783. // is_input, 0,
  784. // hb_mult(maxp) * max_packet(maxp)));
  785. qh->ps.phase = NO_FRAME;
  786. if (urb->dev->speed == USB_SPEED_HIGH) {
  787. qh->ps.c_usecs = 0;
  788. qh->gap_uf = 0;
  789. if (urb->interval > 1 && urb->interval < 8) {
  790. /* NOTE interval 2 or 4 uframes could work.
  791. * But interval 1 scheduling is simpler, and
  792. * includes high bandwidth.
  793. */
  794. urb->interval = 1;
  795. } else if (urb->interval > ehci->periodic_size << 3) {
  796. urb->interval = ehci->periodic_size << 3;
  797. }
  798. qh->ps.period = urb->interval >> 3;
  799. /* period for bandwidth allocation */
  800. tmp = min(EHCI_BANDWIDTH_SIZE,
  801. 1 << (urb->ep->desc.bInterval - 1));
  802. /* Allow urb->interval to override */
  803. qh->ps.bw_uperiod = min(tmp, (unsigned)urb->interval);
  804. qh->ps.bw_period = qh->ps.bw_uperiod >> 3;
  805. } else {
  806. int think_time;
  807. /* gap is f(FS/LS transfer times) */
  808. //qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  809. // is_input, 0, maxp) / (125 * 1000);
  810. /* FIXME this just approximates SPLIT/CSPLIT times */
  811. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  812. //qh->ps.c_usecs = qh->ps.usecs + HS_USECS(0);
  813. //qh->ps.usecs = HS_USECS(1);
  814. } else { // SPLIT+DATA, gap, CSPLIT
  815. //qh->ps.usecs += HS_USECS(1);
  816. //qh->ps.c_usecs = HS_USECS(0);
  817. }
  818. //think_time = tt ? tt->think_time : 0;
  819. //qh->ps.tt_usecs = NS_TO_US(think_time +
  820. // usb_calc_bus_time (urb->dev->speed,
  821. // is_input, 0, max_packet (maxp)));
  822. if (urb->interval > ehci->periodic_size)
  823. urb->interval = ehci->periodic_size;
  824. qh->ps.period = urb->interval;
  825. /* period for bandwidth allocation */
  826. tmp = min(EHCI_BANDWIDTH_FRAMES,
  827. (unsigned)(urb->ep->desc.bInterval));
  828. //tmp = rounddown_pow_of_two(tmp);
  829. /* Allow urb->interval to override */
  830. qh->ps.bw_period = min((unsigned)tmp, (unsigned)(urb->interval));
  831. qh->ps.bw_uperiod = qh->ps.bw_period << 3;
  832. }
  833. }
  834. /* support for tt scheduling, and access to toggles */
  835. qh->ps.udev = urb->dev;
  836. qh->ps.ep = urb->ep;
  837. /* using TT? */
  838. switch (urb->dev->speed) {
  839. case USB_SPEED_LOW:
  840. info1 |= QH_LOW_SPEED;
  841. /* FALL THROUGH */
  842. case USB_SPEED_FULL:
  843. /* EPS 0 means "full" */
  844. if (type != PIPE_INTERRUPT)
  845. info1 |= (EHCI_TUNE_RL_TT << 28);
  846. if (type == PIPE_CONTROL) {
  847. info1 |= QH_CONTROL_EP; /* for TT */
  848. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  849. }
  850. info1 |= maxp << 16;
  851. info2 |= (EHCI_TUNE_MULT_TT << 30);
  852. /* Some Freescale processors have an erratum in which the
  853. * port number in the queue head was 0..N-1 instead of 1..N.
  854. */
  855. if (ehci_has_fsl_portno_bug(ehci))
  856. info2 |= (urb->dev->ttport-1) << 23;
  857. else
  858. info2 |= urb->dev->ttport << 23;
  859. /* set the address of the TT; for TDI's integrated
  860. * root hub tt, leave it zeroed.
  861. */
  862. //if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
  863. // info2 |= tt->hub->devnum << 16;
  864. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  865. break;
  866. case USB_SPEED_HIGH: /* no TT involved */
  867. info1 |= QH_HIGH_SPEED;
  868. if (type == PIPE_CONTROL) {
  869. info1 |= (EHCI_TUNE_RL_HS << 28);
  870. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  871. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  872. info2 |= (EHCI_TUNE_MULT_HS << 30);
  873. } else if (type == PIPE_BULK) {
  874. info1 |= (EHCI_TUNE_RL_HS << 28);
  875. /* The USB spec says that high speed bulk endpoints
  876. * always use 512 byte maxpacket. But some device
  877. * vendors decided to ignore that, and MSFT is happy
  878. * to help them do so. So now people expect to use
  879. * such nonconformant devices with Linux too; sigh.
  880. */
  881. info1 |= max_packet(maxp) << 16;
  882. info2 |= (EHCI_TUNE_MULT_HS << 30);
  883. } else { /* PIPE_INTERRUPT */
  884. info1 |= max_packet (maxp) << 16;
  885. info2 |= hb_mult (maxp) << 30;
  886. }
  887. break;
  888. default:
  889. ehci_dbg("bogus dev %p speed %d\n", urb->dev,
  890. urb->dev->speed);
  891. done:
  892. qh_destroy(ehci, qh);
  893. return NULL;
  894. }
  895. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  896. /* init as live, toggle clear */
  897. qh->qh_state = QH_STATE_IDLE;
  898. hw = qh->hw;
  899. hw->hw_info1 = cpu_to_hc32(ehci, info1);
  900. hw->hw_info2 = cpu_to_hc32(ehci, info2);
  901. qh->is_out = !is_input;
  902. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  903. return qh;
  904. }
  905. /*-------------------------------------------------------------------------*/
  906. static void enable_async(struct ehci_hcd *ehci)
  907. {
  908. int cmd;
  909. int ret;
  910. if (ehci->async_count++)
  911. return;
  912. ///* Stop waiting to turn off the async schedule */
  913. ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
  914. ///* Don't start the schedule until ASS is 0 */
  915. hal_dcache_clean_all(); //akira 20202020
  916. hal_dcache_invalidate_all(); //akira 20202020
  917. ehci_poll_ASS(ehci);
  918. turn_on_io_watchdog(ehci);
  919. /*scan??*/
  920. //akira???
  921. // /* need to flush Dcache? */
  922. // hal_dcache_clean_all();
  923. // /* Enable async. schedule. */
  924. // cmd = ehci_readl(ehci, &ehci->regs->command);
  925. // cmd |= CMD_ASE;
  926. // ehci_writel(ehci, cmd, &ehci->regs->command);
  927. // ret = ehci_handshake(ehci, (uint32_t *)&ehci->regs->status, STS_ASS, STS_ASS,
  928. // 100*1000);
  929. // if (ret < 0) {
  930. // hal_log_err("EHCI fail timeout STS_ASS set.\n");
  931. // return;
  932. // }
  933. // if (ehci->isoc_count > 0 || (ehci->async_count + ehci->intr_count > 0))
  934. // ehci_work(ehci);
  935. }
  936. static void disable_async(struct ehci_hcd *ehci)
  937. {
  938. int cmd;
  939. int ret;
  940. if (--ehci->async_count)
  941. return;
  942. /* The async schedule and unlink lists are supposed to be empty */
  943. //WARN_ON(ehci->async->qh_next.qh || !list_empty(&ehci->async_unlink) ||
  944. // !list_empty(&ehci->async_idle));
  945. ///* Don't turn off the schedule until ASS is 1 */
  946. hal_dcache_clean_all(); //akira 20202020
  947. hal_dcache_invalidate_all(); //akira 20202020
  948. ehci_poll_ASS(ehci);
  949. // cmd = ehci_readl(ehci, &ehci->regs->command);
  950. // cmd &= ~CMD_ASE;
  951. // ehci_writel(ehci, cmd, &ehci->regs->command);
  952. // ret = ehci_handshake(ehci, (uint32_t *)&ehci->regs->status, STS_ASS, 0,
  953. // 100*1000);
  954. // if (ret < 0) {
  955. // hal_log_err("EHCI fail timeout STS_ASS reset.\n");
  956. // return;
  957. // }
  958. }
  959. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  960. static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  961. {
  962. uint32_t dma = QH_NEXT(ehci, qh->qh_dma);
  963. struct ehci_qh *head;
  964. /* Don't link a QH if there's a Clear-TT-Buffer pending */
  965. //if (unlikely(qh->clearing_tt))
  966. // return;
  967. //WARN_ON(qh->qh_state != QH_STATE_IDLE);
  968. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  969. qh_refresh(ehci, qh);
  970. /* splice right after start */
  971. head = ehci->async;
  972. qh->qh_next = head->qh_next;
  973. qh->hw->hw_next = head->hw->hw_next;
  974. head->qh_next.qh = qh;
  975. head->hw->hw_next = dma;
  976. qh->qh_state = QH_STATE_LINKED;
  977. qh->xacterrs = 0;
  978. qh->unlink_reason = 0;
  979. /* qtd completions reported later by interrupt */
  980. enable_async(ehci);
  981. }
  982. /*-------------------------------------------------------------------------*/
  983. /*
  984. * For control/bulk/interrupt, return QH with these TDs appended.
  985. * Allocates and initializes the QH if necessary.
  986. * Returns null if it can't allocate a QH it needs to.
  987. * If the QH has TDs (urbs) already, that's great.
  988. */
  989. static struct ehci_qh *qh_append_tds (
  990. struct ehci_hcd *ehci,
  991. struct urb *urb,
  992. struct list_head *qtd_list,
  993. int epnum,
  994. void **ptr
  995. )
  996. {
  997. struct ehci_qh *qh = NULL;
  998. uint32_t qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
  999. qh = (struct ehci_qh *) *ptr;
  1000. if (unlikely (qh == NULL)) {
  1001. /* can't sleep here, we have ehci->lock... */
  1002. qh = qh_make (ehci, urb, 0);
  1003. *ptr = qh;
  1004. }
  1005. if (qh != NULL) {
  1006. struct ehci_qtd *qtd;
  1007. if (unlikely (list_empty (qtd_list)))
  1008. qtd = NULL;
  1009. else
  1010. qtd = list_entry (qtd_list->next, struct ehci_qtd,
  1011. qtd_list);
  1012. /* control qh may need patching ... */
  1013. if (epnum == 0) {
  1014. /* usb_reset_device() briefly reverts to address 0 */
  1015. if (usb_pipedevice (urb->pipe) == 0)
  1016. qh->hw->hw_info1 &= ~qh_addr_mask;
  1017. }
  1018. /* just one way to queue requests: swap with the dummy qtd.
  1019. * only hc or qh_refresh() ever modify the overlay.
  1020. */
  1021. if (qtd != NULL) {
  1022. struct ehci_qtd *dummy;
  1023. dma_addr_t dma;
  1024. uint32_t token;
  1025. /* to avoid racing the HC, use the dummy td instead of
  1026. * the first td of our list (becomes new dummy). both
  1027. * tds stay deactivated until we're done, when the
  1028. * HC is allowed to fetch the old dummy (4.10.2).
  1029. */
  1030. token = qtd->hw_token;
  1031. qtd->hw_token = HALT_BIT(ehci);
  1032. dummy = qh->dummy;
  1033. dma = dummy->qtd_dma;
  1034. *dummy = *qtd;
  1035. dummy->qtd_dma = dma;
  1036. list_del (&qtd->qtd_list);
  1037. list_add (&dummy->qtd_list, qtd_list);
  1038. list_splice_tail(qtd_list, &qh->qtd_list);
  1039. ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
  1040. qh->dummy = qtd;
  1041. /* hc must see the new dummy at list end */
  1042. dma = qtd->qtd_dma;
  1043. qtd = list_entry (qh->qtd_list.prev,
  1044. struct ehci_qtd, qtd_list);
  1045. qtd->hw_next = QTD_NEXT(ehci, dma);
  1046. /* let the hc process these next qtds */
  1047. dummy->hw_token = token;
  1048. urb->hcpriv = qh;
  1049. }
  1050. }
  1051. return qh;
  1052. }
  1053. /*-------------------------------------------------------------------------*/
  1054. static int
  1055. submit_async (
  1056. struct ehci_hcd *ehci,
  1057. struct urb *urb,
  1058. struct list_head *qtd_list,
  1059. gfp_t mem_flags
  1060. ) {
  1061. int epnum;
  1062. unsigned long flags;
  1063. struct ehci_qh *qh = NULL;
  1064. int rc = 0;
  1065. epnum = urb->ep->desc.bEndpointAddress;
  1066. flags = hal_spin_lock_irqsave(&ehci->lock);
  1067. //if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
  1068. // rc = -ESHUTDOWN;
  1069. // goto done;
  1070. //}
  1071. // rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
  1072. // if (rc)
  1073. // goto done;
  1074. qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
  1075. if (qh == NULL) {
  1076. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  1077. rc = -ENOMEM;
  1078. goto done;
  1079. }
  1080. /* Control/bulk operations through TTs don't need scheduling,
  1081. * the HC and TT handle it when the TT has a buffer ready.
  1082. */
  1083. if (qh->qh_state == QH_STATE_IDLE) {
  1084. qh_link_async(ehci, qh);
  1085. }
  1086. done:
  1087. hal_spin_unlock_irqrestore(&ehci->lock, flags);
  1088. // qtd_list_free (ehci, urb, &(ehci->wait_free_list));
  1089. if (qh == NULL)
  1090. qtd_list_free (ehci, urb, qtd_list);
  1091. return rc;
  1092. }
  1093. static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
  1094. {
  1095. struct ehci_qh *prev;
  1096. /* Add to the end of the list of QHs waiting for the next IAAD */
  1097. qh->qh_state = QH_STATE_UNLINK_WAIT;
  1098. list_add_tail(&qh->unlink_node, &ehci->async_unlink);
  1099. /* Unlink it from the schedule */
  1100. prev = ehci->async;
  1101. while (prev->qh_next.qh != qh)
  1102. prev = prev->qh_next.qh;
  1103. prev->hw->hw_next = qh->hw->hw_next;
  1104. prev->qh_next = qh->qh_next;
  1105. if (ehci->qh_scan_next == qh)
  1106. ehci->qh_scan_next = qh->qh_next.qh;
  1107. }
  1108. static void start_iaa_cycle(struct ehci_hcd *ehci)
  1109. {
  1110. /* If the controller isn't running, we don't have to wait for it */
  1111. if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
  1112. end_unlink_async(ehci);
  1113. /* Otherwise start a new IAA cycle if one isn't already running */
  1114. } else if (ehci->rh_state == EHCI_RH_RUNNING &&
  1115. !ehci->iaa_in_progress) {
  1116. /* Make sure the unlinks are all visible to the hardware */
  1117. //wmb();
  1118. ehci_writel(ehci, ehci->command | CMD_IAAD,
  1119. &ehci->regs->command);
  1120. ehci_readl(ehci, &ehci->regs->command);
  1121. ehci->iaa_in_progress = true;
  1122. // ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
  1123. ehci_iaa_watchdog(ehci);
  1124. }
  1125. }
  1126. static void end_iaa_cycle(struct ehci_hcd *ehci)
  1127. {
  1128. if (ehci->has_synopsys_hc_bug)
  1129. ehci_writel(ehci, (u32) ehci->async->qh_dma,
  1130. &ehci->regs->async_next);
  1131. /* The current IAA cycle has ended */
  1132. ehci->iaa_in_progress = false;
  1133. end_unlink_async(ehci);
  1134. }
  1135. /* See if the async qh for the qtds being unlinked are now gone from the HC */
  1136. static void end_unlink_async(struct ehci_hcd *ehci)
  1137. {
  1138. struct ehci_qh *qh;
  1139. bool early_exit;
  1140. if (list_empty(&ehci->async_unlink))
  1141. return;
  1142. qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
  1143. unlink_node); /* QH whose IAA cycle just ended */
  1144. /*
  1145. * If async_unlinking is set then this routine is already running,
  1146. * either on the stack or on another CPU.
  1147. */
  1148. early_exit = ehci->async_unlinking;
  1149. /* If the controller isn't running, process all the waiting QHs */
  1150. if (ehci->rh_state < EHCI_RH_RUNNING)
  1151. list_splice_tail_init(&ehci->async_unlink, &ehci->async_idle);
  1152. /*
  1153. * Intel (?) bug: The HC can write back the overlay region even
  1154. * after the IAA interrupt occurs. In self-defense, always go
  1155. * through two IAA cycles for each QH.
  1156. */
  1157. else if (qh->qh_state == QH_STATE_UNLINK) {
  1158. /*
  1159. * Second IAA cycle has finished. Process only the first
  1160. * waiting QH (NVIDIA (?) bug).
  1161. */
  1162. list_move_tail(&qh->unlink_node, &ehci->async_idle);
  1163. }
  1164. /*
  1165. * AMD/ATI (?) bug: The HC can continue to use an active QH long
  1166. * after the IAA interrupt occurs. To prevent problems, QHs that
  1167. * may still be active will wait until 2 ms have passed with no
  1168. * change to the hw_current and hw_token fields (this delay occurs
  1169. * between the two IAA cycles).
  1170. *
  1171. * The EHCI spec (4.8.2) says that active QHs must not be removed
  1172. * from the async schedule and recommends waiting until the QH
  1173. * goes inactive. This is ridiculous because the QH will _never_
  1174. * become inactive if the endpoint NAKs indefinitely.
  1175. */
  1176. /* Some reasons for unlinking guarantee the QH can't be active */
  1177. else if (qh->unlink_reason & (QH_UNLINK_HALTED |
  1178. QH_UNLINK_SHORT_READ | QH_UNLINK_DUMMY_OVERLAY))
  1179. goto DelayDone;
  1180. /* The QH can't be active if the queue was and still is empty... */
  1181. else if ((qh->unlink_reason & QH_UNLINK_QUEUE_EMPTY) &&
  1182. list_empty(&qh->qtd_list))
  1183. goto DelayDone;
  1184. /* ... or if the QH has halted */
  1185. else if (qh->hw->hw_token & cpu_to_hc32(ehci, QTD_STS_HALT))
  1186. goto DelayDone;
  1187. /* Otherwise we have to wait until the QH stops changing */
  1188. else {
  1189. uint32_t qh_current, qh_token;
  1190. qh_current = qh->hw->hw_current;
  1191. qh_token = qh->hw->hw_token;
  1192. if (qh_current != ehci->old_current ||
  1193. qh_token != ehci->old_token) {
  1194. ehci->old_current = qh_current;
  1195. ehci->old_token = qh_token;
  1196. ehci_enable_event(ehci, EHCI_HRTIMER_ACTIVE_UNLINK, true);
  1197. return;
  1198. }
  1199. DelayDone:
  1200. qh->qh_state = QH_STATE_UNLINK;
  1201. early_exit = true;
  1202. }
  1203. ehci->old_current = ~0; /* Prepare for next QH */
  1204. /* Start a new IAA cycle if any QHs are waiting for it */
  1205. if (!list_empty(&ehci->async_unlink))
  1206. start_iaa_cycle(ehci);
  1207. /*
  1208. * Don't allow nesting or concurrent calls,
  1209. * or wait for the second IAA cycle for the next QH.
  1210. */
  1211. if (early_exit)
  1212. return;
  1213. /* Process the idle QHs */
  1214. ehci->async_unlinking = true;
  1215. while (!list_empty(&ehci->async_idle)) {
  1216. qh = list_first_entry(&ehci->async_idle, struct ehci_qh,
  1217. unlink_node);
  1218. list_del(&qh->unlink_node);
  1219. qh->qh_state = QH_STATE_IDLE;
  1220. qh->qh_next.qh = NULL;
  1221. if (!list_empty(&qh->qtd_list))
  1222. qh_completions(ehci, qh);
  1223. if (!list_empty(&qh->qtd_list) &&
  1224. ehci->rh_state == EHCI_RH_RUNNING)
  1225. qh_link_async(ehci, qh);
  1226. disable_async(ehci);
  1227. }
  1228. ehci->async_unlinking = false;
  1229. }
  1230. static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
  1231. static void unlink_empty_async(struct ehci_hcd *ehci)
  1232. {
  1233. struct ehci_qh *qh;
  1234. struct ehci_qh *qh_to_unlink = NULL;
  1235. int count = 0;
  1236. /* Find the last async QH which has been empty for a timer cycle */
  1237. for (qh = ehci->async->qh_next.qh; qh; qh = qh->qh_next.qh) {
  1238. if (list_empty(&qh->qtd_list) &&
  1239. qh->qh_state == QH_STATE_LINKED) {
  1240. ++count;
  1241. if (qh->unlink_cycle != ehci->async_unlink_cycle)
  1242. qh_to_unlink = qh;
  1243. }
  1244. }
  1245. /* If nothing else is being unlinked, unlink the last empty QH */
  1246. if (list_empty(&ehci->async_unlink) && qh_to_unlink) {
  1247. qh_to_unlink->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
  1248. start_unlink_async(ehci, qh_to_unlink);
  1249. --count;
  1250. }
  1251. /* Other QHs will be handled later */
  1252. if (count > 0) {
  1253. // ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
  1254. ++ehci->async_unlink_cycle;
  1255. unlink_empty_async(ehci);
  1256. }
  1257. }
  1258. #ifdef CONFIG_PM
  1259. /* The root hub is suspended; unlink all the async QHs */
  1260. static void unlink_empty_async_suspended(struct ehci_hcd *ehci)
  1261. {
  1262. struct ehci_qh *qh;
  1263. while (ehci->async->qh_next.qh) {
  1264. qh = ehci->async->qh_next.qh;
  1265. WARN_ON(!list_empty(&qh->qtd_list));
  1266. single_unlink_async(ehci, qh);
  1267. }
  1268. }
  1269. #endif
  1270. /* makes sure the async qh will become idle */
  1271. /* caller must own ehci->lock */
  1272. static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
  1273. {
  1274. /* If the QH isn't linked then there's nothing we can do. */
  1275. if (qh->qh_state != QH_STATE_LINKED)
  1276. return;
  1277. single_unlink_async(ehci, qh);
  1278. start_iaa_cycle(ehci);
  1279. }
  1280. /*-------------------------------------------------------------------------*/
  1281. // scan_async()函数的工作就是去check传输的状况,并回收qtd
  1282. static void scan_async (struct ehci_hcd *ehci)
  1283. {
  1284. struct ehci_qh *qh;
  1285. bool check_unlinks_later = false;
  1286. ehci->qh_scan_next = ehci->async->qh_next.qh;
  1287. while (ehci->qh_scan_next) {
  1288. qh = ehci->qh_scan_next;
  1289. ehci->qh_scan_next = qh->qh_next.qh;
  1290. /* clean any finished work for this qh */
  1291. if (!list_empty(&qh->qtd_list)) {
  1292. int temp;
  1293. /*
  1294. * Unlinks could happen here; completion reporting
  1295. * drops the lock. That's why ehci->qh_scan_next
  1296. * always holds the next qh to scan; if the next qh
  1297. * gets unlinked then ehci->qh_scan_next is adjusted
  1298. * in single_unlink_async().
  1299. */
  1300. temp = qh_completions(ehci, qh);
  1301. if (temp) {
  1302. start_unlink_async(ehci, qh);
  1303. } else if (list_empty(&qh->qtd_list)
  1304. && qh->qh_state == QH_STATE_LINKED) {
  1305. qh->unlink_cycle = ehci->async_unlink_cycle;
  1306. check_unlinks_later = true;
  1307. }
  1308. }
  1309. }
  1310. /*
  1311. * Unlink empty entries, reducing DMA usage as well
  1312. * as HCD schedule-scanning costs. Delay for any qh
  1313. * we just scanned, there's a not-unusual case that it
  1314. * doesn't stay idle for long.
  1315. */
  1316. // if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
  1317. // !(ehci->enabled_hrtimer_events &
  1318. // BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
  1319. // ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
  1320. // ++ehci->async_unlink_cycle;
  1321. // }
  1322. if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING) {
  1323. ++ehci->async_unlink_cycle;//akira 20202020
  1324. unlink_empty_async(ehci);
  1325. }
  1326. }