sunxi-hci.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673
  1. /**
  2. * drivers/usb/host/sunxi_hci.c
  3. * (C) Copyright 2010-2015
  4. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  5. * yangnaitian, 2011-5-24, create this file
  6. * javen, 2011-7-18, add clock and power switch
  7. *
  8. * sunxi HCI Driver
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. */
  16. #include <stdio.h>
  17. #include <stdlib.h>
  18. #include <string.h>
  19. //#include <sunxi_hal_gpio.h>
  20. #include <usb_os_platform.h>
  21. #include <hal_osal.h>
  22. #include <hal_clk.h>
  23. #include <hal_reset.h>
  24. #include <hal_gpio.h>
  25. #include <log.h>
  26. #include <usb/hal_hci.h>
  27. #include <platform_usb.h>
  28. #include <hal_cfg.h>
  29. #include "sunxi-hci.h"
  30. //static u64 sunxi_hci_dmamask = DMA_BIT_MASK(64);
  31. #ifdef CONFIG_USB_SUNXI_USB_MANAGER
  32. int usb_otg_id_status(void);
  33. #endif
  34. #define USBPHYC_REG_o_PHYCTL 0x0404
  35. #if 0
  36. static void usb_hci_utmi_phy_tune(struct sunxi_hci_hcd *sunxi_hci, int mask,
  37. int offset, int val)
  38. {
  39. int reg_value = 0;
  40. reg_value = USBC_Readl(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_TUNE);
  41. reg_value &= ~mask;
  42. val = val << offset;
  43. val &= mask;
  44. reg_value |= val;
  45. USBC_Writel(reg_value, (sunxi_hci->usb_vbase + SUNXI_HCI_PHY_TUNE));
  46. }
  47. #endif
  48. static int usb_new_phyx_tp_write(struct sunxi_hci_hcd *sunxi_hci, int addr, int data, int len)
  49. {
  50. int temp = 0;
  51. int j = 0;
  52. int dtmp = 0;
  53. /*device: 0x410(phy_ctl)*/
  54. dtmp = data;
  55. for (j = 0; j < len; j++)
  56. {
  57. temp = USBC_Readb(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  58. temp |= (0x1 << 1);
  59. USBC_Writeb(temp, sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  60. USBC_Writeb(addr + j, sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL + 1);
  61. temp = USBC_Readb(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  62. temp &= ~(0x1 << 0);
  63. USBC_Writeb(temp, sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  64. temp = USBC_Readb(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  65. temp &= ~(0x1 << 7);
  66. temp |= (dtmp & 0x1) << 7;
  67. USBC_Writeb(temp, sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  68. temp |= (0x1 << 0);
  69. USBC_Writeb(temp, sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  70. temp &= ~(0x1 << 0);
  71. USBC_Writeb(temp, sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  72. temp = USBC_Readb(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  73. temp &= ~(0x1 << 1);
  74. USBC_Writeb(temp, sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  75. dtmp >>= 1;
  76. }
  77. return 0;
  78. }
  79. static int usb_new_phyx_tp_read(struct sunxi_hci_hcd *sunxi_hci, int addr, int len)
  80. {
  81. int temp = 0;
  82. int i = 0;
  83. int j = 0;
  84. int ret = 0;
  85. temp = USBC_Readb(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  86. temp |= (0x1 << 1);
  87. USBC_Writeb(temp, sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  88. for (j = len; j > 0; j--)
  89. {
  90. USBC_Writeb((addr + j - 1), sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL + 1);
  91. for (i = 0; i < 0x4; i++);
  92. temp = USBC_Readb(sunxi_hci->usb_vbase + SUNXI_HCI_UTMI_PHY_STATUS);
  93. ret <<= 1;
  94. ret |= (temp & 0x1);
  95. }
  96. temp = USBC_Readb(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  97. temp &= ~(0x1 << 1);
  98. USBC_Writeb(temp, sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  99. return ret;
  100. }
  101. static void usb_new_phy_init(struct sunxi_hci_hcd *sunxi_hci)
  102. {
  103. int value= 0;
  104. // printf("com_tune: addr:%x, len:%x, value:%x\n", 0x30, 0x0D, usb_new_phyx_tp_read(sunxi_hci, 0x30, 0x0D));
  105. usb_new_phyx_tp_write(sunxi_hci, 0x30, 0xef, 0x0D);
  106. // printf("com_tune[after fix]: addr:%x, len:%x, value:%x\n", 0x30, 0x0D, usb_new_phyx_tp_read(sunxi_hci, 0x30, 0x0D));
  107. // printf("tx_tune: addr:%x,len:%x, value:%x\n", 0x60, 0x0E, usb_new_phyx_tp_read(sunxi_hci, 0x60, 0x0E));
  108. value = usb_new_phyx_tp_read(sunxi_hci, 0x60, 0x0E);
  109. value = (value & (~0x0f)) | sunxi_hci->usb_driver_level;
  110. usb_new_phyx_tp_write(sunxi_hci, 0x60, value, 0x0E);
  111. // printf("tx_tune[after fix]: addr:%x, len:%x, value:%x\n", 0x60, 0x0E, usb_new_phyx_tp_read(sunxi_hci, 0x60, 0x0E));
  112. // printf("res: addr:%x, len:%x, value:%x\n", 0x44, 0x04, usb_new_phyx_tp_read(sunxi_hci, 0x44, 0x04));
  113. usb_new_phyx_tp_write(sunxi_hci, 0x44, 0xf, 0x04);
  114. // printf("res[after fix]: addr:%x, len:%x, value:%x\n", 0x44, 0x04, usb_new_phyx_tp_read(sunxi_hci, 0x44, 0x04));
  115. }
  116. void usb_new_phy_adjust(struct sunxi_hci_hcd *sunxi_hci, int driver_level)
  117. {
  118. int value= 0;
  119. value = usb_new_phyx_tp_read(sunxi_hci, 0x60, 0x0E);
  120. printf("before value:%x\n", value);
  121. value = (value & (~0x0f)) | driver_level;
  122. printf("target value:%x\n", value);
  123. usb_new_phyx_tp_write(sunxi_hci, 0x60, value, 0x0E);
  124. value = usb_new_phyx_tp_read(sunxi_hci, 0x60, 0x0E);
  125. printf("after value:%x\n", value);
  126. }
  127. static void USBC_SelectPhyToHci(struct sunxi_hci_hcd *sunxi_hci)
  128. {
  129. int reg_value = 0;
  130. reg_value = USBC_Readl(sunxi_hci->otg_vbase + SUNXI_OTG_PHY_CFG);
  131. reg_value &= ~(0x01);
  132. USBC_Writel(reg_value, (sunxi_hci->otg_vbase + SUNXI_OTG_PHY_CFG));
  133. }
  134. static void USBC_Clean_SIDDP(struct sunxi_hci_hcd *sunxi_hci)
  135. {
  136. int reg_value = 0;
  137. reg_value = USBC_Readl(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  138. reg_value &= ~(0x01 << SUNXI_HCI_PHY_CTRL_SIDDQ);
  139. USBC_Writel(reg_value, (sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL));
  140. }
  141. /*
  142. * Low-power mode USB standby helper functions.
  143. */
  144. #ifdef SUNXI_USB_STANDBY_LOW_POW_MODE
  145. void sunxi_hci_set_siddq(struct sunxi_hci_hcd *sunxi_hci, int is_on)
  146. {
  147. int reg_value = 0;
  148. reg_value = USBC_Readl(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL);
  149. if (is_on)
  150. reg_value |= 0x01 << SUNXI_HCI_PHY_CTRL_SIDDQ;
  151. else
  152. reg_value &= ~(0x01 << SUNXI_HCI_PHY_CTRL_SIDDQ);
  153. USBC_Writel(reg_value, (sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL));
  154. }
  155. void sunxi_hci_set_wakeup_ctrl(struct sunxi_hci_hcd *sunxi_hci, int is_on)
  156. {
  157. int reg_value = 0;
  158. reg_value = USBC_Readl(sunxi_hci->usb_vbase + SUNXI_HCI_CTRL_3);
  159. if (is_on)
  160. reg_value |= 0x01 << SUNXI_HCI_CTRL_3_REMOTE_WAKEUP;
  161. else
  162. reg_value &= ~(0x01 << SUNXI_HCI_CTRL_3_REMOTE_WAKEUP);
  163. USBC_Writel(reg_value, (sunxi_hci->usb_vbase + SUNXI_HCI_CTRL_3));
  164. }
  165. void sunxi_hci_set_rc_clk(struct sunxi_hci_hcd *sunxi_hci, int is_on)
  166. {
  167. int reg_value = 0;
  168. reg_value = USBC_Readl(sunxi_hci->usb_vbase + SUNXI_USB_PMU_IRQ_ENABLE);
  169. if (is_on)
  170. reg_value |= 0x01 << SUNXI_HCI_RC16M_CLK_ENBALE;
  171. else
  172. reg_value &= ~(0x01 << SUNXI_HCI_RC16M_CLK_ENBALE);
  173. USBC_Writel(reg_value, (sunxi_hci->usb_vbase + SUNXI_USB_PMU_IRQ_ENABLE));
  174. }
  175. #if defined(CONFIG_ARCH_SUN50IW9)
  176. void sunxi_hci_set_standby_irq(struct sunxi_hci_hcd *sunxi_hci, int is_on)
  177. {
  178. int reg_value = 0;
  179. reg_value = USBC_Readl(sunxi_hci->usb_vbase + SUNXI_USB_EHCI_TIME_INT);
  180. if (is_on)
  181. reg_value |= 0x01 << SUNXI_USB_EHCI_STANDBY_IRQ;
  182. else
  183. reg_value &= ~(0x01 << SUNXI_USB_EHCI_STANDBY_IRQ);
  184. USBC_Writel(reg_value, (sunxi_hci->usb_vbase + SUNXI_USB_EHCI_TIME_INT));
  185. }
  186. #endif
  187. void sunxi_hci_clean_standby_irq(struct sunxi_hci_hcd *sunxi_hci)
  188. {
  189. int reg_value = 0;
  190. reg_value = USBC_Readl(sunxi_hci->usb_vbase + SUNXI_USB_EHCI_TIME_INT);
  191. reg_value |= 0x01 << SUNXI_USB_EHCI_STANDBY_IRQ_STATUS;
  192. USBC_Writel(reg_value, (sunxi_hci->usb_vbase + SUNXI_USB_EHCI_TIME_INT));
  193. }
  194. #endif
  195. int hci_clock_init(struct sunxi_hci_hcd *sunxi_hci)
  196. {
  197. struct platform_usb_config *hci_table = platform_get_hci_table();
  198. if(sunxi_hci->usbc_no < USB_MAX_CONTROLLER_COUNT){
  199. sunxi_hci->bus_clk_id = hci_table[sunxi_hci->usbc_no].usb_clk;
  200. sunxi_hci->reset_bus_clk = hci_table[sunxi_hci->usbc_no].usb_rst;
  201. sunxi_hci->phy_clk_id = hci_table[sunxi_hci->usbc_no].phy_clk;
  202. sunxi_hci->reset_phy_clk = hci_table[sunxi_hci->usbc_no].phy_rst;
  203. return 0;
  204. }else{
  205. hal_log_err("hci_clock_init failed, invalied\n");
  206. return -1;
  207. }
  208. }
  209. int open_clock(struct sunxi_hci_hcd *sunxi_hci, u32 ohci)
  210. {
  211. hal_reset_type_t reset_type = HAL_SUNXI_RESET;
  212. hal_clk_type_t clk_type = HAL_SUNXI_CCU;
  213. hal_clk_status_t ret;
  214. //mutex_lock(&usb_clock_lock);
  215. sunxi_hci->reset_phy = hal_reset_control_get(reset_type, sunxi_hci->reset_phy_clk);
  216. hal_reset_control_deassert(sunxi_hci->reset_phy);
  217. hal_reset_control_put(sunxi_hci->reset_phy);
  218. sunxi_hci->reset_hci = hal_reset_control_get(reset_type, sunxi_hci->reset_bus_clk);
  219. hal_reset_control_deassert(sunxi_hci->reset_hci);
  220. hal_reset_control_put(sunxi_hci->reset_hci);
  221. sunxi_hci->phy_clk = hal_clock_get(clk_type, sunxi_hci->phy_clk_id);
  222. ret = hal_clock_enable(sunxi_hci->phy_clk);
  223. if (ret)
  224. {
  225. hal_log_err("couldn't enable usb_clk!\n");
  226. return -1;
  227. }
  228. sunxi_hci->bus_clk = hal_clock_get(clk_type, sunxi_hci->bus_clk_id);
  229. ret = hal_clock_enable(sunxi_hci->bus_clk);
  230. if (ret)
  231. {
  232. hal_log_err("couldn't enable hci_clk!\n");
  233. return -1;
  234. }
  235. USBC_Clean_SIDDP(sunxi_hci);
  236. /* otg and hci0 Controller Shared phy in SUN50I */
  237. if (sunxi_hci->usbc_no == HCI0_USBC_NO)
  238. USBC_SelectPhyToHci(sunxi_hci);
  239. hal_log_info("--open_clock 0x810 = 0x%x\n", USBC_Readl(sunxi_hci->usb_vbase + SUNXI_HCI_PHY_CTRL));
  240. //mutex_unlock(&usb_clock_lock);
  241. usb_new_phy_init(sunxi_hci);
  242. return 0;
  243. }
  244. int close_clock(struct sunxi_hci_hcd *sunxi_hci, u32 ohci)
  245. {
  246. hal_reset_type_t reset_type = HAL_SUNXI_RESET;
  247. hal_clk_type_t clk_type = HAL_SUNXI_CCU;
  248. hal_clk_status_t ret;
  249. //if (sunxi_hci->ahb &&
  250. // sunxi_hci->mod_usbphy &&
  251. // sunxi_hci->clk_is_open) {
  252. // sunxi_hci->clk_is_open = 0;
  253. // clk_disable_unprepare(sunxi_hci->mod_usbphy);
  254. // clk_disable_unprepare(sunxi_hci->ahb);
  255. // udelay(10);
  256. //} else {
  257. // DMSG_PANIC("[%s]: wrn: open clock failed, (0x%p, 0x%p, %d, 0x%p)\n",
  258. // sunxi_hci->hci_name,
  259. // sunxi_hci->ahb,
  260. // sunxi_hci->mod_usbphy,
  261. // sunxi_hci->clk_is_open,
  262. // sunxi_hci->mod_usb);
  263. //}
  264. sunxi_hci->reset_phy = hal_reset_control_get(reset_type, sunxi_hci->reset_phy_clk);
  265. ret = hal_reset_control_assert(sunxi_hci->reset_phy);
  266. if (ret)
  267. {
  268. hal_log_err("couldn't disable hci_reset_phy!\n");
  269. return -1;
  270. }
  271. sunxi_hci->reset_hci = hal_reset_control_get(reset_type, sunxi_hci->reset_bus_clk);
  272. ret = hal_reset_control_assert(sunxi_hci->reset_hci);
  273. if (ret)
  274. {
  275. hal_log_err("couldn't disable hci_reset_bus!\n");
  276. return -1;
  277. }
  278. sunxi_hci->phy_clk = hal_clock_get(clk_type, sunxi_hci->phy_clk_id);
  279. ret = hal_clock_disable(sunxi_hci->phy_clk);
  280. if (ret)
  281. {
  282. hal_log_err("couldn't disable phy_clk!\n");
  283. return -1;
  284. }
  285. sunxi_hci->bus_clk = hal_clock_get(clk_type, sunxi_hci->bus_clk_id);
  286. ret = hal_clock_disable(sunxi_hci->bus_clk);
  287. if (ret)
  288. {
  289. hal_log_err("couldn't disable bus_clk!\n");
  290. return -1;
  291. }
  292. return 0;
  293. }
  294. static int usb_get_hsic_phy_ctrl(int value, int enable)
  295. {
  296. if (enable) {
  297. value |= (0x07<<8);
  298. value |= (0x01<<1);
  299. value |= (0x01<<0);
  300. value |= (0x01<<16);
  301. value |= (0x01<<20);
  302. } else {
  303. value &= ~(0x07<<8);
  304. value &= ~(0x01<<1);
  305. value &= ~(0x01<<0);
  306. value &= ~(0x01<<16);
  307. value &= ~(0x01<<20);
  308. }
  309. return value;
  310. }
  311. void usb_passby(struct sunxi_hci_hcd *sunxi_hci, u32 enable)
  312. {
  313. uint32_t flags;
  314. hal_spinlock_t passby_lock;
  315. unsigned long reg_value = 0;
  316. flags = hal_spin_lock_irqsave(&passby_lock);
  317. reg_value = USBC_Readl(sunxi_hci->usb_vbase + SUNXI_USB_PMU_IRQ_ENABLE);
  318. if (enable) {
  319. reg_value |= (1 << 10); /* AHB Master interface INCR8 enable */
  320. reg_value |= (1 << 9); /* AHB Master interface burst type INCR4 enable */
  321. reg_value |= (1 << 8); /* AHB Master interface INCRX align enable */
  322. reg_value |= (1 << 0); /* ULPI bypass enable */
  323. hal_log_info("reg_value = 0x%x\n", reg_value);
  324. } else if (!enable) {
  325. reg_value &= ~(1 << 10); /* AHB Master interface INCR8 disable */
  326. reg_value &= ~(1 << 9); /* AHB Master interface burst type INCR4 disable */
  327. reg_value &= ~(1 << 8); /* AHB Master interface INCRX align disable */
  328. reg_value &= ~(1 << 0); /* ULPI bypass disable */
  329. }
  330. USBC_Writel(reg_value,
  331. (sunxi_hci->usb_vbase + SUNXI_USB_PMU_IRQ_ENABLE));
  332. hal_log_info("---usb_passby 0x800 = 0x%x\n", USBC_Readl(sunxi_hci->usb_vbase + SUNXI_USB_PMU_IRQ_ENABLE));
  333. hal_spin_unlock_irqrestore(&passby_lock, flags);
  334. }
  335. static int init_pin(struct sunxi_hci_hcd *sunxi_hci)
  336. {
  337. //if (strncmp(sunxi_hci->drv_vbus_name, "gpio", 4) == 0) {
  338. // sunxi_hci->drv_vbus_gpio = usb_drvvbus[sunxi_hci->usbc_no];
  339. // sunxi_hci->drv_vbus_gpio_valid = 1;
  340. //} else
  341. // sunxi_hci->drv_vbus_gpio_valid = 0;
  342. //if (sunxi_hci->drv_vbus_gpio_valid) {
  343. // if (hal_gpio_pinmux_set_function(sunxi_hci->drv_vbus_gpio, 0)) {
  344. // DMSG_PANIC("ERR: %s set drvvbus gpio function failed\n", sunxi_hci->hci_name);
  345. // return;
  346. // }
  347. // if (hal_gpio_set_pull(sunxi_hci->drv_vbus_gpio, 1)) {
  348. // DMSG_PANIC("ERR: %s pull gpio failed\n", sunxi_hci->hci_name);
  349. // return;
  350. // }
  351. //}
  352. return 0;
  353. }
  354. static void free_pin(struct sunxi_hci_hcd *sunxi_hci)
  355. {
  356. //if (sunxi_hci->drv_vbus_gpio_valid) {
  357. // gpio_free(sunxi_hci->drv_vbus_gpio_set.gpio);
  358. // sunxi_hci->drv_vbus_gpio_valid = 0;
  359. //}
  360. //if (sunxi_hci->hsic_flag) {
  361. // /* Marvell 4G HSIC ctrl */
  362. // if (sunxi_hci->usb_host_hsic_rdy_valid) {
  363. // gpio_free(sunxi_hci->usb_host_hsic_rdy.gpio);
  364. // sunxi_hci->usb_host_hsic_rdy_valid = 0;
  365. // }
  366. // /* SMSC usb3503 HSIC HUB ctrl */
  367. // if (sunxi_hci->usb_hsic_usb3503_flag) {
  368. // if (sunxi_hci->usb_hsic_hub_connect_valid) {
  369. // gpio_free(sunxi_hci->usb_hsic_hub_connect.gpio);
  370. // sunxi_hci->usb_hsic_hub_connect_valid = 0;
  371. // }
  372. // if (sunxi_hci->usb_hsic_int_n_valid) {
  373. // gpio_free(sunxi_hci->usb_hsic_int_n.gpio);
  374. // sunxi_hci->usb_hsic_int_n_valid = 0;
  375. // }
  376. // if (sunxi_hci->usb_hsic_reset_n_valid) {
  377. // gpio_free(sunxi_hci->usb_hsic_reset_n.gpio);
  378. // sunxi_hci->usb_hsic_reset_n_valid = 0;
  379. // }
  380. // }
  381. //}
  382. }
  383. void sunxi_set_host_vbus(struct sunxi_hci_hcd *sunxi_hci, int is_on)
  384. {
  385. // int ret;
  386. //
  387. // if (sunxi_hci->supply) {
  388. // if (is_on) {
  389. // ret = regulator_enable(sunxi_hci->supply);
  390. // if (ret)
  391. // DMSG_PANIC("ERR: %s regulator enable failed\n",
  392. // sunxi_hci->hci_name);
  393. // } else {
  394. // ret = regulator_disable(sunxi_hci->supply);
  395. // if (ret)
  396. // DMSG_PANIC("ERR: %s regulator force disable failed\n",
  397. // sunxi_hci->hci_name);
  398. // }
  399. // }
  400. // if (sunxi_hci->drv_vbus_type == USB_DRV_VBUS_TYPE_GIPO) {
  401. // if (sunxi_hci->drv_vbus_gpio_valid)
  402. // __gpio_set_value(sunxi_hci->drv_vbus_gpio_set.gpio,
  403. // is_on);
  404. // } else if (sunxi_hci->drv_vbus_type == USB_DRV_VBUS_TYPE_AXP) {
  405. //#if defined(CONFIG_AW_AXP)
  406. // axp_usb_vbus_output(is_on);
  407. //#endif
  408. // }
  409. //#endif
  410. }
  411. //EXPORT_SYMBOL(sunxi_set_host_vbus);
  412. void sunxi_set_vbus(struct sunxi_hci_hcd *sunxi_hci, int is_on)
  413. {
  414. DMSG_DEBUG("[%s]: sunxi_set_vbus cnt.\n", sunxi_hci->hci_name)
  415. #if 0
  416. if (is_on) {
  417. ret = regulator_enable(sunxi_hci->supply);
  418. if (ret)
  419. DMSG_PANIC("ERR: %s regulator enable failed\n",
  420. sunxi_hci->hci_name);
  421. } else {
  422. ret = regulator_disable(sunxi_hci->supply);
  423. if (ret)
  424. DMSG_PANIC("ERR: %s regulator force disable failed\n",
  425. sunxi_hci->hci_name);
  426. }
  427. #endif
  428. if (sunxi_hci->drv_vbus_type == USB_DRV_VBUS_TYPE_GIPO)
  429. {
  430. //hal_gpio_set_direction(sunxi_hci->drv_vbus_gpio_set, is_on);
  431. hal_gpio_set_data(sunxi_hci->drv_vbus_gpio_set, is_on);
  432. }
  433. else if (sunxi_hci->drv_vbus_type == USB_DRV_VBUS_TYPE_AXP)
  434. {
  435. #if defined(CONFIG_AW_AXP)
  436. axp_usb_vbus_output(is_on);
  437. #endif
  438. }
  439. }
  440. void sunxi_hci_get_config_param(struct sunxi_hci_hcd *sunxi_hci)
  441. {
  442. int ret = -1, pin_type = 0, value = 0;
  443. char ehci_name[10] = {0};
  444. user_gpio_set_t pin_value = {0};
  445. sprintf(ehci_name, "usbc%1d", sunxi_hci->usbc_no);
  446. ret = Hal_Cfg_GetKeyValue(ehci_name, KEY_USB_DRVVBUS_GPIO, (int32_t *)&pin_value, (sizeof(user_gpio_set_t) + 3) / sizeof(int));
  447. if (ret) {
  448. hal_log_err("%s drvvbus fetch error!", ehci_name);
  449. }
  450. ret = Hal_Cfg_GetKeyValue(ehci_name, KEY_USB_DRVVBUS_TYPE, (int32_t *)&pin_type, 1);
  451. if (ret) {
  452. hal_log_err("%s drvvbus fetch error!", ehci_name);
  453. }
  454. ret = Hal_Cfg_GetKeyValue(ehci_name, KEY_USB_DRIVER_LEVEL, (int32_t *)&value, 1);
  455. if (ret) {
  456. hal_log_err("%s %s fetch error!", ehci_name, KEY_USB_DRIVER_LEVEL);
  457. value = 0xf;
  458. }
  459. if (value > 0xf || value < 0x0)
  460. {
  461. value = 0xf;
  462. }
  463. sunxi_hci->usb_driver_level = value;
  464. ret = Hal_Cfg_GetKeyValue(ehci_name, KEY_USB_IRQ_FLAG, (int32_t *)&value, 1);
  465. if (ret) {
  466. hal_log_err("%s %s fetch error!", ehci_name, KEY_USB_IRQ_FLAG);
  467. value = 0x0;
  468. }
  469. sunxi_hci->usb_irq_flag = value;
  470. sunxi_hci->drv_vbus_type = pin_type;
  471. sunxi_hci->drv_vbus_gpio_set = (pin_value.port - 1) * PINS_PER_BANK + pin_value.port_num;
  472. hal_gpio_set_direction(sunxi_hci->drv_vbus_gpio_set, GPIO_DIRECTION_OUTPUT);
  473. }
  474. static int sunxi_get_ohci_clock_src(struct platform_device *pdev,
  475. struct sunxi_hci_hcd *sunxi_hci)
  476. {
  477. // struct device_node *np = pdev->dev.of_node;
  478. //
  479. // sunxi_hci->clk_usbohci12m = of_clk_get(np, 2);
  480. // if (IS_ERR(sunxi_hci->clk_usbohci12m)) {
  481. // sunxi_hci->clk_usbohci12m = NULL;
  482. // DMSG_INFO("%s get usb clk_usbohci12m clk failed.\n",
  483. // sunxi_hci->hci_name);
  484. // }
  485. //
  486. // sunxi_hci->clk_hoscx2 = of_clk_get(np, 3);
  487. // if (IS_ERR(sunxi_hci->clk_hoscx2)) {
  488. // sunxi_hci->clk_hoscx2 = NULL;
  489. // DMSG_INFO("%s get usb clk_hoscx2 clk failed.\n",
  490. // sunxi_hci->hci_name);
  491. // }
  492. //
  493. // sunxi_hci->clk_hosc = of_clk_get(np, 4);
  494. // if (IS_ERR(sunxi_hci->clk_hosc)) {
  495. // sunxi_hci->clk_hosc = NULL;
  496. // DMSG_INFO("%s get usb clk_hosc failed.\n",
  497. // sunxi_hci->hci_name);
  498. // }
  499. //
  500. // sunxi_hci->clk_losc = of_clk_get(np, 5);
  501. // if (IS_ERR(sunxi_hci->clk_losc)) {
  502. // sunxi_hci->clk_losc = NULL;
  503. // DMSG_INFO("%s get usb clk_losc clk failed.\n",
  504. // sunxi_hci->hci_name);
  505. // }
  506. //
  507. return 0;
  508. }
  509. int exit_sunxi_hci(struct sunxi_hci_hcd *sunxi_hci)
  510. {
  511. //release_usb_regulator_io(sunxi_hci);
  512. //free_pin(sunxi_hci);
  513. return 0;
  514. }
  515. //EXPORT_SYMBOL(exit_sunxi_hci);
  516. //int init_sunxi_hci(int usbc_type, int hci_num)
  517. //{
  518. // struct sunxi_hci_hcd *sunxi_hci = NULL;
  519. //
  520. // if (usbc_type == SUNXI_USB_EHCI) {
  521. // sunxi_hci = g_sunxi_ehci[hci_num];
  522. // } else if (usbc_type == SUNXI_USB_OHCI) {
  523. // sunxi_hci = g_sunxi_ohci[hci_num];
  524. // } else {
  525. // ehci_err("usbc type is error! n");
  526. // return -1;
  527. // }
  528. //
  529. // ret = sunxi_get_hci_resource(sunxi_hci, hci_num, usbc_type);
  530. //
  531. //#if 0
  532. // if (usbc_type == SUNXI_USB_OHCI)
  533. // ret = sunxi_get_ohci_clock_src(pdev, sunxi_hci);
  534. //#endif
  535. // return ret;
  536. //}
  537. //static int __parse_hci_str(const char *buf, size_t size)
  538. //{
  539. // int ret = 0;
  540. // unsigned long val;
  541. //
  542. // if (!buf) {
  543. // pr_err("%s()%d invalid argument\n", __func__, __LINE__);
  544. // return -1;
  545. // }
  546. //
  547. // ret = kstrtoul(buf, 10, &val);
  548. // if (ret) {
  549. // pr_err("%s()%d failed to transfer\n", __func__, __LINE__);
  550. // return -1;
  551. // }
  552. //
  553. // return val;
  554. //}
  555. //static int __init init_sunxi_hci_class(void)
  556. //{
  557. // int ret = 0;
  558. //
  559. // ret = class_register(&hci_class);
  560. // if (ret) {
  561. // DMSG_PANIC("%s()%d register class fialed\n", __func__, __LINE__);
  562. // return -1;
  563. // }
  564. //
  565. // return 0;
  566. //}
  567. //
  568. //static void __exit exit_sunxi_hci_class(void)
  569. //{
  570. // class_unregister(&hci_class);
  571. //}
  572. //late_initcall(init_sunxi_hci_class);
  573. //module_exit(exit_sunxi_hci_class);
  574. //MODULE_LICENSE("GPL");