test_ccmu.c 15 KB

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  1. #include <hal_log.h>
  2. #include <hal_cmd.h>
  3. #include <hal_clk.h>
  4. struct st_test_clk
  5. {
  6. hal_clk_id_t id;
  7. char *name;
  8. };
  9. struct st_test_clk ccmu_test_table[] =
  10. {
  11. { HAL_CLK_SRC_ROOT, "HAL_CLK_SRC_ROOT"},
  12. { HAL_CLK_SRC_HOSC24M, "HAL_CLK_SRC_HOSC24M"},
  13. { HAL_CLK_SRC_HOSC24MD2, "HAL_CLK_SRC_HOSC24MD2"},
  14. { HAL_CLK_SRC_IOSC16M, "HAL_CLK_SRC_IOSC16M"},
  15. { HAL_CLK_SRC_OSC48M, "HAL_CLK_SRC_OSC48M"},
  16. { HAL_CLK_SRC_OSC48MD4, "HAL_CLK_SRC_OSC48MD4"},
  17. { HAL_CLK_SRC_LOSC, "HAL_CLK_SRC_LOSC"},
  18. { HAL_CLK_SRC_RC16M, "HAL_CLK_SRC_RC16M"},
  19. { HAL_CLK_PLL_PERI0DIV25M, "HAL_CLK_PLL_PERI0DIV25M"},
  20. { HAL_CLK_PLL_PERI0X2, "HAL_CLK_PLL_PERI0X2 "},
  21. { HAL_CLK_PLL_PERI1X2, "HAL_CLK_PLL_PERI1X2"},
  22. { HAL_CLK_PLL_AUDIOX2, "HAL_CLK_PLL_AUDIOX2"},
  23. { HAL_CLK_PLL_AUDIOX4, "HAL_CLK_PLL_AUDIOX4"},
  24. { HAL_CLK_PLL_VIDEOX4, "HAL_CLK_PLL_VIDEOX4"},
  25. { HAL_CLK_PLL_DDRDIV4, "HAL_CLK_PLL_DDRDIV4"},
  26. { HAL_CLK_PLL_CPUX_C0, "HAL_CLK_PLL_CPUX_C0 "},
  27. { HAL_CLK_PLL_CPUX_C1, "HAL_CLK_PLL_CPUX_C1"},
  28. { HAL_CLK_PLL_DDR0, "HAL_CLK_PLL_DDR0"},
  29. { HAL_CLK_PLL_DDR1, "HAL_CLK_PLL_DDR1"},
  30. { HAL_CLK_PLL_32K, "HAL_CLK_PLL_32K"},
  31. { HAL_CLK_PLL_PERI0, "HAL_CLK_PLL_PERI0"},
  32. { HAL_CLK_PLL_PERI1, "HAL_CLK_PLL_PERI1"},
  33. { HAL_CLK_PLL_GPU0, "HAL_CLK_PLL_GPU0"},
  34. { HAL_CLK_PLL_GPU1, "HAL_CLK_PLL_GPU1"},
  35. { HAL_CLK_PLL_VIDEO0, "HAL_CLK_PLL_VIDEO0"},
  36. { HAL_CLK_PLL_VIDEO1, "HAL_CLK_PLL_VIDEO1"},
  37. { HAL_CLK_PLL_VIDEO2, "HAL_CLK_PLL_VIDEO2"},
  38. { HAL_CLK_PLL_VE, "HAL_CLK_PLL_VE"},
  39. { HAL_CLK_PLL_DE, "HAL_CLK_PLL_DE"},
  40. { HAL_CLK_PLL_ISP, "HAL_CLK_PLL_ISP"},
  41. { HAL_CLK_PLL_HSIC, "HAL_CLK_PLL_HSIC"},
  42. { HAL_CLK_PLL_AUDIO, "HAL_CLK_PLL_AUDIO"},
  43. { HAL_CLK_PLL_VIDEO, "HAL_CLK_PLL_VIDEO"},
  44. { HAL_CLK_PLL_MIPI, "HAL_CLK_PLL_MIPI"},
  45. { HAL_CLK_PLL_HDMI, "HAL_CLK_PLL_HDMI"},
  46. { HAL_CLK_PLL_USB, "HAL_CLK_PLL_USB"},
  47. { HAL_CLK_PLL_EDP, "HAL_CLK_PLL_EDP"},
  48. { HAL_CLK_PLL_SATA, "HAL_CLK_PLL_SATA"},
  49. { HAL_CLK_PLL_ADC, "HAL_CLK_PLL_ADC"},
  50. { HAL_CLK_PLL_DTMB, "HAL_CLK_PLL_DTMB"},
  51. { HAL_CLK_PLL_24M, "HAL_CLK_PLL_24M"},
  52. { HAL_CLK_PLL_EVE, "HAL_CLK_PLL_EVE"},
  53. { HAL_CLK_PLL_CVE, "HAL_CLK_PLL_CVE"},
  54. { HAL_CLK_PLL_ISE, "HAL_CLK_PLL_ISE"},
  55. { HAL_CLK_PLL_CSI, "HAL_CLK_PLL_CSI"},
  56. { HAL_CLK_BUS_C0_CPU, "HAL_CLK_BUS_C0_CPU "},
  57. { HAL_CLK_BUS_C1_CPU, "HAL_CLK_BUS_C1_CPU"},
  58. { HAL_CLK_BUS_C0_AXI, "HAL_CLK_BUS_C0_AXI"},
  59. { HAL_CLK_BUS_C1_AXI, "HAL_CLK_BUS_C1_AXI"},
  60. { HAL_CLK_BUS_CPUAPB, "HAL_CLK_BUS_CPUAPB"},
  61. { HAL_CLK_BUS_PSI, "HAL_CLK_BUS_PSI"},
  62. { HAL_CLK_BUS_AHB1, "HAL_CLK_BUS_AHB1"},
  63. { HAL_CLK_BUS_AHB2, "HAL_CLK_BUS_AHB2"},
  64. { HAL_CLK_BUS_AHB3, "HAL_CLK_BUS_AHB3"},
  65. { HAL_CLK_BUS_APB1, "HAL_CLK_BUS_APB1"},
  66. { HAL_CLK_BUS_APB2, "HAL_CLK_BUS_APB2"},
  67. { HAL_CLK_BUS_CCI400, "HAL_CLK_BUS_CCI400"},
  68. { HAL_CLK_BUS_MBUS, "HAL_CLK_BUS_MBUS"},
  69. { HAL_CLK_PERIPH_DMA, "HAL_CLK_PERIPH_DMA"},
  70. { HAL_CLK_PERIPH_DE, "HAL_CLK_PERIPH_DE"},
  71. { HAL_CLK_PERIPH_EE, "HAL_CLK_PERIPH_EE"},
  72. { HAL_CLK_PERIPH_DI, "HAL_CLK_PERIPH_DI"},
  73. { HAL_CLK_PERIPH_G2D, "HAL_CLK_PERIPH_G2D"},
  74. { HAL_CLK_PERIPH_EDMA, "HAL_CLK_PERIPH_EDMA"},
  75. { HAL_CLK_PERIPH_EVE, "HAL_CLK_PERIPH_EVE"},
  76. { HAL_CLK_PERIPH_CVE, "HAL_CLK_PERIPH_CVE"},
  77. { HAL_CLK_PERIPH_GPU, "HAL_CLK_PERIPH_GPU"},
  78. { HAL_CLK_PERIPH_CE, "HAL_CLK_PERIPH_CE"},
  79. { HAL_CLK_PERIPH_VE, "HAL_CLK_PERIPH_VE"},
  80. { HAL_CLK_PERIPH_EISE, "HAL_CLK_PERIPH_EISE"},
  81. { HAL_CLK_PERIPH_NNA, "HAL_CLK_PERIPH_NNA"},
  82. { HAL_CLK_PERIPH_NNA_RST, "HAL_CLK_PERIPH_NNA_RST"},
  83. { HAL_CLK_PERIPH_MSGBOX0, "HAL_CLK_PERIPH_MSGBOX0"},
  84. { HAL_CLK_PERIPH_MSGBOX1, "HAL_CLK_PERIPH_MSGBOX1"},
  85. { HAL_CLK_PERIPH_MSGBOXR, "HAL_CLK_PERIPH_MSGBOXR"},
  86. { HAL_CLK_PERIPH_SPINLOCK, "HAL_CLK_PERIPH_SPINLOCK"},
  87. { HAL_CLK_PERIPH_HSTIMER, "HAL_CLK_PERIPH_HSTIMER"},
  88. { HAL_CLK_PERIPH_AVS, "HAL_CLK_PERIPH_AVS"},
  89. { HAL_CLK_PERIPH_DBGSYS, "HAL_CLK_PERIPH_DBGSYS"},
  90. { HAL_CLK_PERIPH_PWM, "HAL_CLK_PERIPH_PWM"},
  91. { HAL_CLK_PERIPH_IOMMU, "HAL_CLK_PERIPH_IOMMU"},
  92. { HAL_CLK_PERIPH_GPIO, "HAL_CLK_PERIPH_GPIO"},
  93. { HAL_CLK_PERIPH_DRAM, "HAL_CLK_PERIPH_DRAM"},
  94. { HAL_CLK_PERIPH_NAND0, "HAL_CLK_PERIPH_NAND0"},
  95. { HAL_CLK_PERIPH_NAND1, "HAL_CLK_PERIPH_NAND1"},
  96. { HAL_CLK_PERIPH_SDMMC0_MOD, "HAL_CLK_PERIPH_SDMMC0_MOD"},
  97. { HAL_CLK_PERIPH_SDMMC0_RST, "HAL_CLK_PERIPH_SDMMC0_RST"},
  98. { HAL_CLK_PERIPH_SDMMC0_BUS, "HAL_CLK_PERIPH_SDMMC0_BUS"},
  99. { HAL_CLK_PERIPH_SDMMC1_MOD, "HAL_CLK_PERIPH_SDMMC1_MOD"},
  100. { HAL_CLK_PERIPH_SDMMC1_RST, "HAL_CLK_PERIPH_SDMMC1_RST"},
  101. { HAL_CLK_PERIPH_SDMMC2_BUS, "HAL_CLK_PERIPH_SDMMC2_BUS"},
  102. { HAL_CLK_PERIPH_SDMMC2_MOD, "HAL_CLK_PERIPH_SDMMC2_MOD"},
  103. { HAL_CLK_PERIPH_SDMMC2_RST, "HAL_CLK_PERIPH_SDMMC2_RST"},
  104. { HAL_CLK_PERIPH_SDMMC1_BUS, "HAL_CLK_PERIPH_SDMMC1_BUS"},
  105. { HAL_CLK_PERIPH_SMHC3, "HAL_CLK_PERIPH_SMHC3"},
  106. { HAL_CLK_PERIPH_SMHC4, "HAL_CLK_PERIPH_SMHC4"},
  107. { HAL_CLK_PERIPH_SMHC5, "HAL_CLK_PERIPH_SMHC5"},
  108. { HAL_CLK_PERIPH_UART0, "HAL_CLK_PERIPH_UART0"},
  109. { HAL_CLK_PERIPH_UART1, "HAL_CLK_PERIPH_UART1"},
  110. { HAL_CLK_PERIPH_UART2, "HAL_CLK_PERIPH_UART2"},
  111. { HAL_CLK_PERIPH_UART3, "HAL_CLK_PERIPH_UART3"},
  112. { HAL_CLK_PERIPH_UART4, "HAL_CLK_PERIPH_UART4"},
  113. { HAL_CLK_PERIPH_UART5, "HAL_CLK_PERIPH_UART5"},
  114. { HAL_CLK_PERIPH_UART6, "HAL_CLK_PERIPH_UART6"},
  115. { HAL_CLK_PERIPH_UART7, "HAL_CLK_PERIPH_UART7"},
  116. { HAL_CLK_PERIPH_TWI0, "HAL_CLK_PERIPH_TWI0"},
  117. { HAL_CLK_PERIPH_TWI1, "HAL_CLK_PERIPH_TWI1"},
  118. { HAL_CLK_PERIPH_TWI2, "HAL_CLK_PERIPH_TWI2"},
  119. { HAL_CLK_PERIPH_TWI3, "HAL_CLK_PERIPH_TWI3"},
  120. { HAL_CLK_PERIPH_TWI4, "HAL_CLK_PERIPH_TWI4"},
  121. { HAL_CLK_PERIPH_CAN0, "HAL_CLK_PERIPH_CAN0"},
  122. { HAL_CLK_PERIPH_CAN1, "HAL_CLK_PERIPH_CAN1"},
  123. { HAL_CLK_PERIPH_CAN2, "HAL_CLK_PERIPH_CAN2"},
  124. { HAL_CLK_PERIPH_SCR0, "HAL_CLK_PERIPH_SCR0"},
  125. { HAL_CLK_PERIPH_SCR1, "HAL_CLK_PERIPH_SCR1"},
  126. { HAL_CLK_PERIPH_SCR2, "HAL_CLK_PERIPH_SCR2"},
  127. { HAL_CLK_PERIPH_SCR3, "HAL_CLK_PERIPH_SCR3"},
  128. { HAL_CLK_PERIPH_SPI0, "HAL_CLK_PERIPH_SPI0"},
  129. { HAL_CLK_PERIPH_SPI1, "HAL_CLK_PERIPH_SPI1"},
  130. { HAL_CLK_PERIPH_SPI2, "HAL_CLK_PERIPH_SPI2"},
  131. { HAL_CLK_PERIPH_SPI3, "HAL_CLK_PERIPH_SPI3"},
  132. { HAL_CLK_PERIPH_SPI4, "HAL_CLK_PERIPH_SPI4"},
  133. { HAL_CLK_PERIPH_SPI5, "HAL_CLK_PERIPH_SPI5"},
  134. { HAL_CLK_PERIPH_SPI6, "HAL_CLK_PERIPH_SPI6"},
  135. { HAL_CLK_PERIPH_SPI7, "HAL_CLK_PERIPH_SPI7"},
  136. { HAL_CLK_PERIPH_THS, "HAL_CLK_PERIPH_THS"},
  137. { HAL_CLK_PERIPH_GMAC, "HAL_CLK_PERIPH_GMAC"},
  138. { HAL_CLK_PERIPH_EPHY, "HAL_CLK_PERIPH_EPHY"},
  139. { HAL_CLK_PERIPH_EMAC, "HAL_CLK_PERIPH_EMAC"},
  140. { HAL_CLK_PERIPH_SATA, "HAL_CLK_PERIPH_SATA"},
  141. { HAL_CLK_PERIPH_TS0, "HAL_CLK_PERIPH_TS0"},
  142. { HAL_CLK_PERIPH_TS1, "HAL_CLK_PERIPH_TS1"},
  143. { HAL_CLK_PERIPH_IRTX, "HAL_CLK_PERIPH_IRTX"},
  144. { HAL_CLK_PERIPH_KEYPAD, "HAL_CLK_PERIPH_KEYPAD"},
  145. { HAL_CLK_PERIPH_GPADC, "HAL_CLK_PERIPH_GPADC"},
  146. { HAL_CLK_PERIPH_LEDC, "HAL_CLK_PERIPH_LEDC"},
  147. { HAL_CLK_PERIPH_PIO, "HAL_CLK_PERIPH_PIO"},
  148. { HAL_CLK_PERIPH_MAD, "HAL_CLK_PERIPH_MAD"},
  149. { HAL_CLK_PERIPH_LPSD, "HAL_CLK_PERIPH_LPSD"},
  150. { HAL_CLK_PERIPH_DTMB, "HAL_CLK_PERIPH_DTMB"},
  151. { HAL_CLK_PERIPH_I2S0, "HAL_CLK_PERIPH_I2S0"},
  152. { HAL_CLK_PERIPH_I2S1, "HAL_CLK_PERIPH_I2S1"},
  153. { HAL_CLK_PERIPH_I2S2, "HAL_CLK_PERIPH_I2S2"},
  154. { HAL_CLK_PERIPH_SPDIF, "HAL_CLK_PERIPH_SPDIF"},
  155. { HAL_CLK_PERIPH_DSD, "HAL_CLK_PERIPH_DSD"},
  156. { HAL_CLK_PERIPH_DMIC, "HAL_CLK_PERIPH_DMIC"},
  157. { HAL_CLK_PERIPH_AUDIOCODEC_1X, "HAL_CLK_PERIPH_AUDIOCODEC_1X"},
  158. { HAL_CLK_PERIPH_AUDIOCODEC_4X, "HAL_CLK_PERIPH_AUDIOCODEC_4X"},
  159. { HAL_CLK_PERIPH_WLAN, "HAL_CLK_PERIPH_WLAN"},
  160. { HAL_CLK_PERIPH_USB0, "HAL_CLK_PERIPH_USB0"},
  161. { HAL_CLK_PERIPH_USB1, "HAL_CLK_PERIPH_USB1"},
  162. { HAL_CLK_PERIPH_USB2, "HAL_CLK_PERIPH_USB2"},
  163. { HAL_CLK_PERIPH_USB3, "HAL_CLK_PERIPH_USB3"},
  164. { HAL_CLK_PERIPH_USBOHCI0, "HAL_CLK_PERIPH_USBOHCI0"},
  165. { HAL_CLK_PERIPH_USBOHCI0_12M, "HAL_CLK_PERIPH_USBOHCI0_12M"},
  166. { HAL_CLK_PERIPH_USBOHCI1, "HAL_CLK_PERIPH_USBOHCI1"},
  167. { HAL_CLK_PERIPH_USBOHCI1_12M, "HAL_CLK_PERIPH_USBOHCI1_12M"},
  168. { HAL_CLK_PERIPH_USBEHCI0, "HAL_CLK_PERIPH_USBEHCI0"},
  169. { HAL_CLK_PERIPH_USBEHCI1, "HAL_CLK_PERIPH_USBEHCI1"},
  170. { HAL_CLK_PERIPH_USBOTG, "HAL_CLK_PERIPH_USBOTG"},
  171. { HAL_CLK_PERIPH_HDMI0, "HAL_CLK_PERIPH_HDMI0"},
  172. { HAL_CLK_PERIPH_HDMI1, "HAL_CLK_PERIPH_HDMI1"},
  173. { HAL_CLK_PERIPH_HDMI2, "HAL_CLK_PERIPH_HDMI2"},
  174. { HAL_CLK_PERIPH_HDMI3, "HAL_CLK_PERIPH_HDMI3"},
  175. { HAL_CLK_PERIPH_MIPI_DSI0, "HAL_CLK_PERIPH_MIPI_DSI0"},
  176. { HAL_CLK_PERIPH_MIPI_DPHY0, "HAL_CLK_PERIPH_MIPI_DPHY0"},
  177. { HAL_CLK_PERIPH_MIPI_HOST0, "HAL_CLK_PERIPH_MIPI_HOST0"},
  178. { HAL_CLK_PERIPH_MIPI_DSI1, "HAL_CLK_PERIPH_MIPI_DSI1"},
  179. { HAL_CLK_PERIPH_MIPI_HOST1, "HAL_CLK_PERIPH_MIPI_HOST1"},
  180. { HAL_CLK_PERIPH_MIPI_DSI2, "HAL_CLK_PERIPH_MIPI_DSI2"},
  181. { HAL_CLK_PERIPH_MIPI_HOST2, "HAL_CLK_PERIPH_MIPI_HOST2"},
  182. { HAL_CLK_PERIPH_MIPI_DSI3, "HAL_CLK_PERIPH_MIPI_DSI3"},
  183. { HAL_CLK_PERIPH_MIPI_HOST3, "HAL_CLK_PERIPH_MIPI_HOST3"},
  184. { HAL_CLK_PERIPH_MIPI_DSC, "HAL_CLK_PERIPH_MIPI_DSC"},
  185. { HAL_CLK_PERIPH_DISPLAY_TOP, "HAL_CLK_PERIPH_DISPLAY_TOP"},
  186. { HAL_CLK_PERIPH_TCON_LCD0, "HAL_CLK_PERIPH_TCON_LCD0"},
  187. { HAL_CLK_PERIPH_TCON_LCD1, "HAL_CLK_PERIPH_TCON_LCD1"},
  188. { HAL_CLK_PERIPH_TCON_LCD2, "HAL_CLK_PERIPH_TCON_LCD2"},
  189. { HAL_CLK_PERIPH_TCON_LCD3, "HAL_CLK_PERIPH_TCON_LCD3"},
  190. { HAL_CLK_PERIPH_TCON_TV0, "HAL_CLK_PERIPH_TCON_TV0"},
  191. { HAL_CLK_PERIPH_TCON_TV1, "HAL_CLK_PERIPH_TCON_TV1"},
  192. { HAL_CLK_PERIPH_TCON_TV2, "HAL_CLK_PERIPH_TCON_TV2"},
  193. { HAL_CLK_PERIPH_TCON_TV3, "HAL_CLK_PERIPH_TCON_TV3"},
  194. { HAL_CLK_PERIPH_TVE0, "HAL_CLK_PERIPH_TVE0"},
  195. { HAL_CLK_PERIPH_TVE1, "HAL_CLK_PERIPH_TVE1"},
  196. { HAL_CLK_PERIPH_LVDS, "HAL_CLK_PERIPH_LVDS"},
  197. { HAL_CLK_PERIPH_TVD0, "HAL_CLK_PERIPH_TVD0"},
  198. { HAL_CLK_PERIPH_TVD1, "HAL_CLK_PERIPH_TVD1"},
  199. { HAL_CLK_PERIPH_TVD2, "HAL_CLK_PERIPH_TVD2"},
  200. { HAL_CLK_PERIPH_TVD3, "HAL_CLK_PERIPH_TVD3"},
  201. { HAL_CLK_PERIPH_TVD4, "HAL_CLK_PERIPH_TVD4"},
  202. { HAL_CLK_PERIPH_TVD5, "HAL_CLK_PERIPH_TVD5"},
  203. { HAL_CLK_PERIPH_EDP, "HAL_CLK_PERIPH_EDP"},
  204. { HAL_CLK_PERIPH_CSI0, "HAL_CLK_PERIPH_CSI0"},
  205. { HAL_CLK_PERIPH_CSI1, "HAL_CLK_PERIPH_CSI1"},
  206. { HAL_CLK_PERIPH_MIPI_CSI, "HAL_CLK_PERIPH_MIPI_CSI"},
  207. { HAL_CLK_PERIPH_SUB_LVDS, "HAL_CLK_PERIPH_SUB_LVDS"},
  208. { HAL_CLK_PERIPH_HISP, "HAL_CLK_PERIPH_HISP"},
  209. { HAL_CLK_PERIPH_CSI_TOP, "HAL_CLK_PERIPH_CSI_TOP"},
  210. { HAL_CLK_PERIPH_CSI_MASTER0, "HAL_CLK_PERIPH_CSI_MASTER0"},
  211. { HAL_CLK_PERIPH_CSI_MASTER1, "HAL_CLK_PERIPH_CSI_MASTER1"},
  212. { HAL_CLK_PERIPH_ISP, "HAL_CLK_PERIPH_ISP"},
  213. { HAL_CLK_PERIPH_DSPO, "HAL_CLK_PERIPH_DSPO"},
  214. };
  215. #define ccmuapi_test(_func, _id, _name, _result) \
  216. do { \
  217. _result = _func(_id); \
  218. hal_log_info("Test(%04d): func is %s,result is %d\n", \
  219. _id, #_func, _result); \
  220. } while(0)
  221. int cmd_test_ccmu(int argc, char **argv)
  222. {
  223. char *tname = NULL;
  224. hal_clk_id_t tid = HAL_CLK_UNINITIALIZED;
  225. unsigned int tsize = sizeof(ccmu_test_table) / sizeof(ccmu_test_table[0]);
  226. hal_clk_id_t id = HAL_CLK_UNINITIALIZED;
  227. unsigned int rate = 0;
  228. hal_clk_status_t status = HAL_CLK_STATUS_INVALID_PARAMETER;
  229. for (int i = 0; i < tsize; i++)
  230. {
  231. tid = ccmu_test_table[i].id;
  232. tname = ccmu_test_table[i].name;
  233. hal_log_info("------------------------------------\n" \
  234. "CLK id: %d, \tname: %s\n", tid, tname);
  235. /* testing get parent API */
  236. ccmuapi_test(hal_clk_get_parent, tid, tname, id);
  237. /* testing recalc rate API */
  238. ccmuapi_test(hal_clk_recalc_rate, tid, tname, rate);
  239. /* testing get rate API */
  240. ccmuapi_test(hal_clk_get_rate, tid, tname, rate);
  241. /* testing is enabled API */
  242. ccmuapi_test(hal_clock_is_enabled, tid, tname, status);
  243. }
  244. /* TODO: add more APIs to test */
  245. hal_log_info("===================================\n");
  246. hal_log_info("Test Finished. total number: %d.\n", tsize);
  247. return 0;
  248. }
  249. FINSH_FUNCTION_EXPORT_CMD(cmd_test_ccmu, hal_ccmu, ccmu hal APIs tests)