mii.h 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188
  1. /*
  2. * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved.
  3. */
  4. #ifndef __MII_H__
  5. #define __MII_H__
  6. /* Basic mode control register. */
  7. #define CVI_BMCR_RESV (0x003f)
  8. #define CVI_BMCR_SPEED1000 (0x0040)
  9. #define CVI_BMCR_CTST (0x0080)
  10. #define CVI_BMCR_FULLDPLX (0x0100)
  11. #define CVI_BMCR_ANRESTART (0x0200)
  12. #define CVI_BMCR_ISOLATE (0x0400)
  13. #define CVI_BMCR_PDOWN (0x0800)
  14. #define CVI_BMCR_ANENABLE (0x1000)
  15. #define CVI_BMCR_SPEED100 (0x2000)
  16. #define CVI_BMCR_LOOPBACK (0x4000)
  17. #define CVI_BMCR_RESET (0x8000)
  18. /* Basic mode status register. */
  19. #define CVI_BMSR_ERCAP (0x0001)
  20. #define CVI_BMSR_JCD (0x0002)
  21. #define CVI_BMSR_LSTATUS (0x0004)
  22. #define CVI_BMSR_ANEGCAPABLE (0x0008)
  23. #define CVI_BMSR_RFAULT (0x0010)
  24. #define CVI_BMSR_ANEGCOMPLETE (0x0020)
  25. #define CVI_BMSR_RESV (0x00c0)
  26. #define CVI_BMSR_ESTATEN (0x0100)
  27. #define CVI_BMSR_100HALF2 (0x0200)
  28. #define CVI_BMSR_100FULL2 (0x0400)
  29. #define CVI_BMSR_10HALF (0x0800)
  30. #define CVI_BMSR_10FULL (0x1000)
  31. #define CVI_BMSR_100HALF (0x2000)
  32. #define CVI_BMSR_100FULL (0x4000)
  33. #define CVI_BMSR_100BASE4 (0x8000)
  34. /* Advertisement control register. */
  35. #define CVI_ADVERTISE_CSMA (0x0001)
  36. #define CVI_ADVERTISE_SLCT (0x001f)
  37. #define CVI_ADVERTISE_10HALF (0x0020)
  38. #define CVI_ADVERTISE_1000XFULL (0x0020)
  39. #define CVI_ADVERTISE_10FULL (0x0040)
  40. #define CVI_ADVERTISE_1000XHALF (0x0040)
  41. #define CVI_ADVERTISE_100HALF (0x0080)
  42. #define CVI_ADVERTISE_1000XPAUSE (0x0080)
  43. #define CVI_ADVERTISE_100FULL (0x0100)
  44. #define CVI_ADVERTISE_1000XPSE_ASYM (0x0100)
  45. #define CVI_ADVERTISE_100BASE4 (0x0200)
  46. #define CVI_ADVERTISE_PAUSE_CAP (0x0400)
  47. #define CVI_ADVERTISE_PAUSE_ASYM (0x0800)
  48. #define CVI_ADVERTISE_RESV (0x1000)
  49. #define CVI_ADVERTISE_RFAULT (0x2000)
  50. #define CVI_ADVERTISE_LPACK (0x4000)
  51. #define CVI_ADVERTISE_NPAGE (0x8000)
  52. /* Generic MII registers. */
  53. #define CVI_MII_BMCR (0x00)
  54. #define CVI_MII_BMSR (0x01)
  55. #define CVI_MII_PHYSID1 (0x02)
  56. #define CVI_MII_PHYSID2 (0x03)
  57. #define CVI_MII_ADVERTISE (0x04)
  58. #define CVI_MII_LPA (0x05)
  59. #define CVI_MII_EXPANSION (0x06)
  60. #define CVI_MII_CTRL1000 (0x09)
  61. #define CVI_MII_STAT1000 (0x0a)
  62. #define CVI_MII_ESTATUS (0x0f)
  63. #define CVI_MII_DCOUNTER (0x12)
  64. #define CVI_MII_FCSCOUNTER (0x13)
  65. #define CVI_MII_NWAYTEST (0x14)
  66. #define CVI_MII_RERRCOUNTER (0x15)
  67. #define CVI_MII_SREVISION (0x16)
  68. #define CVI_MII_RESV1 (0x17)
  69. #define CVI_MII_LBRERROR (0x18)
  70. #define CVI_MII_PHYADDR (0x19)
  71. #define CVI_MII_RESV2 (0x1a)
  72. #define CVI_MII_TPISTATUS (0x1b)
  73. #define CVI_MII_NCONFIG (0x1c)
  74. #define CVI_ADVERTISE_FULL (CVI_ADVERTISE_100FULL | CVI_ADVERTISE_10FULL | \
  75. CVI_ADVERTISE_CSMA)
  76. #define CVI_ADVERTISE_ALL (CVI_ADVERTISE_10HALF | CVI_ADVERTISE_10FULL | \
  77. CVI_ADVERTISE_100HALF | CVI_ADVERTISE_100FULL)
  78. /* Expansion register for auto-negotiation. */
  79. #define CVI_EXPANSION_NWAY (0x0001)
  80. #define CVI_EXPANSION_LCWP (0x0002)
  81. #define CVI_EXPANSION_ENABLENPAGE (0x0004)
  82. #define CVI_EXPANSION_NPCAPABLE (0x0008)
  83. #define CVI_EXPANSION_MFAULTS (0x0010)
  84. #define CVI_ESTATUS_1000_THALF (0x1000)
  85. #define CVI_ESTATUS_1000_TFULL (0x2000)
  86. #define CVI_ESTATUS_1000_XHALF (0x4000)
  87. #define CVI_ESTATUS_1000_XFULL (0x8000)
  88. #define CVI_EXPANSION_RESV (0xffe0)
  89. /* Link partner ability register. */
  90. #define CVI_LPA_SLCT (0x001f)
  91. #define CVI_LPA_10HALF (0x0020)
  92. #define CVI_LPA_1000XFULL (0x0020)
  93. #define CVI_LPA_10FULL (0x0040)
  94. #define CVI_LPA_1000XHALF (0x0040)
  95. #define CVI_LPA_100HALF (0x0080)
  96. #define CVI_LPA_1000XPAUSE (0x0080)
  97. #define CVI_LPA_100FULL (0x0100)
  98. #define CVI_LPA_1000XPAUSE_ASYM (0x0100)
  99. #define CVI_LPA_100BASE4 (0x0200)
  100. #define CVI_LPA_PAUSE_CAP (0x0400)
  101. #define CVI_LPA_PAUSE_ASYM (0x0800)
  102. #define CVI_LPA_RESV (0x1000)
  103. #define CVI_LPA_RFAULT (0x2000)
  104. #define CVI_LPA_LPACK (0x4000)
  105. #define CVI_LPA_NPAGE (0x8000)
  106. #define CVI_LPA_DUPLEX (CVI_LPA_10FULL | CVI_LPA_100FULL)
  107. #define CVI_LPA_100 (CVI_LPA_100FULL | CVI_LPA_100HALF | CVI_LPA_100BASE4)
  108. /* N-way test register. */
  109. #define CVI_NWAYTEST_RESV1 (0x00ff)
  110. #define CVI_NWAYTEST_LOOPBACK (0x0100)
  111. #define CVI_NWAYTEST_RESV2 (0xfe00)
  112. /* 1000BASE-T Control register */
  113. #define CVI_ADVERTISE_1000FULL 0x0200
  114. #define CVI_ADVERTISE_1000HALF 0x0100
  115. /* 1000BASE-T Status register */
  116. #define CVI_LPA_1000LOCALRXOK 0x2000
  117. #define CVI_LPA_1000REMRXOK 0x1000
  118. #define CVI_LPA_1000FULL 0x0800
  119. #define CVI_LPA_1000HALF 0x0400
  120. /* Flow control flags */
  121. #define CVI_FLOW_CTRL_TX 0x01
  122. #define CVI_FLOW_CTRL_RX 0x02
  123. /**
  124. * mii_nway_result
  125. * @negotiated: value of MII ANAR and'd with ANLPAR
  126. *
  127. * Given a set of MII abilities, check each bit and returns the
  128. * currently supported media, in the priority order defined by
  129. * IEEE 802.3u. We use LPA_xxx constants but note this is not the
  130. * value of LPA solely, as described above.
  131. *
  132. * The one exception to IEEE 802.3u is that 100baseT4 is placed
  133. * between 100T-full and 100T-half. If your phy does not support
  134. * 100T4 this is fine. If your phy places 100T4 elsewhere in the
  135. * priority order, you will need to roll your own function.
  136. */
  137. static inline unsigned int mii_nway_result (unsigned int negotiated)
  138. {
  139. unsigned int ret;
  140. if (negotiated & CVI_LPA_100FULL)
  141. ret = CVI_LPA_100FULL;
  142. else if (negotiated & CVI_LPA_100BASE4)
  143. ret = CVI_LPA_100BASE4;
  144. else if (negotiated & CVI_LPA_100HALF)
  145. ret = CVI_LPA_100HALF;
  146. else if (negotiated & CVI_LPA_10FULL)
  147. ret = CVI_LPA_10FULL;
  148. else
  149. ret = CVI_LPA_10HALF;
  150. return ret;
  151. }
  152. /**
  153. * mii_duplex
  154. * @duplex_lock: Non-zero if duplex is locked at full
  155. * @negotiated: value of MII ANAR and'd with ANLPAR
  156. *
  157. * A small helper function for a common case. Returns one
  158. * if the media is operating or locked at full duplex, and
  159. * returns zero otherwise.
  160. */
  161. static inline unsigned int mii_duplex (unsigned int duplex_lock,
  162. unsigned int negotiated)
  163. {
  164. if (duplex_lock)
  165. return 1;
  166. if (mii_nway_result(negotiated) & CVI_LPA_DUPLEX)
  167. return 1;
  168. return 0;
  169. }
  170. #endif /* __LINUX_MII_H__ */