crc.c 10 KB

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  1. //*****************************************************************************
  2. //
  3. // crc.c - Driver for the CRC module.
  4. //
  5. // Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Redistribution and use in source and binary forms, with or without
  9. // modification, are permitted provided that the following conditions
  10. // are met:
  11. //
  12. // Redistributions of source code must retain the above copyright
  13. // notice, this list of conditions and the following disclaimer.
  14. //
  15. // Redistributions in binary form must reproduce the above copyright
  16. // notice, this list of conditions and the following disclaimer in the
  17. // documentation and/or other materials provided with the
  18. // distribution.
  19. //
  20. // Neither the name of Texas Instruments Incorporated nor the names of
  21. // its contributors may be used to endorse or promote products derived
  22. // from this software without specific prior written permission.
  23. //
  24. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  27. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  28. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  29. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  30. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  31. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  32. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. //
  36. //*****************************************************************************
  37. //*****************************************************************************
  38. //
  39. //! \addtogroup crc_api
  40. //! @{
  41. //
  42. //*****************************************************************************
  43. #include <ti/devices/msp432e4/inc/msp432e411y.h>
  44. #include "types.h"
  45. #include <stdbool.h>
  46. #include <stdint.h>
  47. #include "inc/hw_ccm.h"
  48. #include "crc.h"
  49. #include "debug.h"
  50. //*****************************************************************************
  51. //
  52. //! Set the configuration of CRC functionality with the EC module.
  53. //!
  54. //! \param ui32Base is the base address of the EC module.
  55. //! \param ui32CRCConfig is the configuration of the CRC engine.
  56. //!
  57. //! This function configures the operation of the CRC engine within the EC
  58. //! module. The configuration is specified with the \e ui32CRCConfig argument.
  59. //! It is the logical OR of any of the following options:
  60. //!
  61. //! CRC Initialization Value
  62. //! - \b CRC_CFG_INIT_SEED - Initialize with seed value
  63. //! - \b CRC_CFG_INIT_0 - Initialize to all '0s'
  64. //! - \b CRC_CFG_INIT_1 - Initialize to all '1s'
  65. //!
  66. //! Input Data Size
  67. //! - \b CRC_CFG_SIZE_8BIT - Input data size of 8 bits
  68. //! - \b CRC_CFG_SIZE_32BIT - Input data size of 32 bits
  69. //!
  70. //! Post Process Reverse/Inverse
  71. //! - \b CRC_CFG_RESINV - Result inverse enable
  72. //! - \b CRC_CFG_OBR - Output reverse enable
  73. //!
  74. //! Input Bit Reverse
  75. //! - \b CRC_CFG_IBR - Bit reverse enable
  76. //!
  77. //! Endian Control
  78. //! - \b CRC_CFG_ENDIAN_SBHW - Swap byte in half-word
  79. //! - \b CRC_CFG_ENDIAN_SHW - Swap half-word
  80. //!
  81. //! Operation Type
  82. //! - \b CRC_CFG_TYPE_P8005 - Polynomial 0x8005
  83. //! - \b CRC_CFG_TYPE_P1021 - Polynomial 0x1021
  84. //! - \b CRC_CFG_TYPE_P4C11DB7 - Polynomial 0x4C11DB7
  85. //! - \b CRC_CFG_TYPE_P1EDC6F41 - Polynomial 0x1EDC6F41
  86. //! - \b CRC_CFG_TYPE_TCPCHKSUM - TCP checksum
  87. //!
  88. //! \return None.
  89. //
  90. //*****************************************************************************
  91. void
  92. CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig)
  93. {
  94. //
  95. // Check the arguments.
  96. //
  97. ASSERT(ui32Base == CCM0_BASE);
  98. ASSERT((ui32CRCConfig & CRC_CFG_INIT_SEED) ||
  99. (ui32CRCConfig & CRC_CFG_INIT_0) ||
  100. (ui32CRCConfig & CRC_CFG_INIT_1) ||
  101. (ui32CRCConfig & CRC_CFG_SIZE_8BIT) ||
  102. (ui32CRCConfig & CRC_CFG_SIZE_32BIT) ||
  103. (ui32CRCConfig & CRC_CFG_RESINV) ||
  104. (ui32CRCConfig & CRC_CFG_OBR) ||
  105. (ui32CRCConfig & CRC_CFG_IBR) ||
  106. (ui32CRCConfig & CRC_CFG_ENDIAN_SBHW) ||
  107. (ui32CRCConfig & CRC_CFG_ENDIAN_SHW) ||
  108. (ui32CRCConfig & CRC_CFG_TYPE_P8005) ||
  109. (ui32CRCConfig & CRC_CFG_TYPE_P1021) ||
  110. (ui32CRCConfig & CRC_CFG_TYPE_P4C11DB7) ||
  111. (ui32CRCConfig & CRC_CFG_TYPE_P1EDC6F41) ||
  112. (ui32CRCConfig & CRC_CFG_TYPE_TCPCHKSUM));
  113. //
  114. // Write the control register with the configuration.
  115. //
  116. HWREG(ui32Base + CCM_O_CRCCTRL) = ui32CRCConfig;
  117. }
  118. //*****************************************************************************
  119. //
  120. //! Write the seed value for CRC operations in the EC module.
  121. //!
  122. //! \param ui32Base is the base address of the EC module.
  123. //! \param ui32Seed is the seed value.
  124. //!
  125. //! This function writes the seed value for use with CRC operations in the
  126. //! EC module. This value is the start value for CRC operations. If this
  127. //! value is not written, then the residual seed from the previous operation
  128. //! is used as the starting value.
  129. //!
  130. //! \note The seed must be written only if \b CRC_CFG_INIT_SEED is
  131. //! set with the CRCConfigSet() function.
  132. //
  133. //*****************************************************************************
  134. void
  135. CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed)
  136. {
  137. //
  138. // Check the arguments.
  139. //
  140. ASSERT(ui32Base == CCM0_BASE);
  141. //
  142. // Write the seed value to the seed register.
  143. //
  144. HWREG(ui32Base + CCM_O_CRCSEED) = ui32Seed;
  145. }
  146. //*****************************************************************************
  147. //
  148. //! Write data into the EC module for CRC operations.
  149. //!
  150. //! \param ui32Base is the base address of the EC module.
  151. //! \param ui32Data is the data to be written.
  152. //!
  153. //! This function writes either 8 or 32 bits of data into the EC module for
  154. //! CRC operations. The distinction between 8 and 32 bits of data is made
  155. //! when the \b CRC_CFG_SIZE_8BIT or \b CRC_CFG_SIZE_32BIT flag
  156. //! is set using the CRCConfigSet() function.
  157. //!
  158. //! When writing 8 bits of data, ensure the data is in the least significant
  159. //! byte position. The remaining bytes should be written with zero. For
  160. //! example, when writing 0xAB, \e ui32Data should be 0x000000AB.
  161. //!
  162. //! \return None
  163. //
  164. //*****************************************************************************
  165. void
  166. CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data)
  167. {
  168. //
  169. // Check the arguments.
  170. //
  171. ASSERT(ui32Base == CCM0_BASE);
  172. //
  173. // Write the data
  174. //
  175. HWREG(ui32Base + CCM_O_CRCDIN) = ui32Data;
  176. }
  177. //*****************************************************************************
  178. //
  179. //! Reads the result of a CRC operation in the EC module.
  180. //!
  181. //! \param ui32Base is the base address of the EC module.
  182. //! \param bPPResult is \b true to read the post-processed result, or \b false
  183. //! to read the unmodified result.
  184. //!
  185. //! This function reads either the unmodified CRC result or the post
  186. //! processed CRC result from the EC module. The post-processing options
  187. //! are selectable through \b CRC_CFG_RESINV and \b CRC_CFG_OBR
  188. //! parameters in the CRCConfigSet() function.
  189. //!
  190. //! \return The CRC result.
  191. //
  192. //*****************************************************************************
  193. uint32_t
  194. CRCResultRead(uint32_t ui32Base, bool bPPResult)
  195. {
  196. //
  197. // Check the arguments.
  198. //
  199. ASSERT(ui32Base == CCM0_BASE);
  200. //
  201. // Depending on the value of bPPResult, read the appropriate register and
  202. // return value.
  203. //
  204. if (bPPResult)
  205. {
  206. return (HWREG(ui32Base + CCM_O_CRCRSLTPP));
  207. }
  208. else
  209. {
  210. return (HWREG(ui32Base + CCM_O_CRCSEED));
  211. }
  212. }
  213. //*****************************************************************************
  214. //
  215. //! Process data to generate a CRC with the EC module.
  216. //!
  217. //! \param ui32Base is the base address of the EC module.
  218. //! \param pui32DataIn is a pointer to an array of data that is processed.
  219. //! \param ui32DataLength is the number of data items that are processed
  220. //! to produce the CRC.
  221. //! \param bPPResult is \b true to read the post-processed result, or \b false
  222. //! to read the unmodified result.
  223. //!
  224. //! This function processes an array of data to produce a CRC result.
  225. //!
  226. //! The data in the array pointed to be \e pui32DataIn is either an array
  227. //! of bytes or an array or words depending on the selection of the input
  228. //! data size options \b CRC_CFG_SIZE_8BIT and
  229. //! \b CRC_CFG_SIZE_32BIT.
  230. //!
  231. //! This function returns either the unmodified CRC result or the
  232. //! post- processed CRC result from the EC module. The post-processing
  233. //! options are selectable through \b CRC_CFG_RESINV and
  234. //! \b CRC_CFG_OBR parameters.
  235. //!
  236. //! \return The CRC result.
  237. //
  238. //*****************************************************************************
  239. uint32_t
  240. CRCDataProcess(uint32_t ui32Base, uint32_t *pui32DataIn,
  241. uint32_t ui32DataLength, bool bPPResult)
  242. {
  243. uint8_t *pui8DataIn;
  244. //
  245. // Check the arguments.
  246. //
  247. ASSERT(ui32Base == CCM0_BASE);
  248. //
  249. // See if the CRC is operating in 8-bit or 32-bit mode.
  250. //
  251. if (HWREG(ui32Base + CCM_O_CRCCTRL) & CCM_CRCCTRL_SIZE)
  252. {
  253. //
  254. // The CRC is operating in 8-bit mode, so create an 8-bit pointer to
  255. // the data.
  256. //
  257. pui8DataIn = (uint8_t *)pui32DataIn;
  258. //
  259. // Loop through the input data.
  260. //
  261. while (ui32DataLength--)
  262. {
  263. //
  264. // Write the next data byte.
  265. //
  266. HWREG(ui32Base + CCM_O_CRCDIN) = *pui8DataIn++;
  267. }
  268. }
  269. else
  270. {
  271. //
  272. // The CRC is operating in 32-bit mode, so loop through the input data.
  273. //
  274. while (ui32DataLength--)
  275. {
  276. //
  277. // Write the next data word.
  278. //
  279. HWREG(ui32Base + CCM_O_CRCDIN) = *pui32DataIn++;
  280. }
  281. }
  282. //
  283. // Return the result.
  284. //
  285. return (CRCResultRead(ui32Base, bPPResult));
  286. }
  287. //*****************************************************************************
  288. //
  289. // Close the Doxygen group.
  290. //! @}
  291. //
  292. //*****************************************************************************