drv_uart.c 21 KB

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  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-9-2 Philo First version
  10. *
  11. ******************************************************************************/
  12. #include <rtconfig.h>
  13. #if defined(BSP_USING_UART)
  14. #include <rtdevice.h>
  15. #include <rthw.h>
  16. #include "NuMicro.h"
  17. #include <drv_uart.h>
  18. #if defined(RT_SERIAL_USING_DMA)
  19. #include <drv_pdma.h>
  20. #endif
  21. /* Private define ---------------------------------------------------------------*/
  22. enum
  23. {
  24. UART_START = -1,
  25. #if defined(BSP_USING_UART0)
  26. UART0_IDX,
  27. #endif
  28. #if defined(BSP_USING_UART1)
  29. UART1_IDX,
  30. #endif
  31. #if defined(BSP_USING_UART2)
  32. UART2_IDX,
  33. #endif
  34. #if defined(BSP_USING_UART3)
  35. UART3_IDX,
  36. #endif
  37. #if defined(BSP_USING_UART4)
  38. UART4_IDX,
  39. #endif
  40. #if defined(BSP_USING_UART5)
  41. UART5_IDX,
  42. #endif
  43. #if defined(BSP_USING_UART6)
  44. UART6_IDX,
  45. #endif
  46. #if defined(BSP_USING_UART7)
  47. UART7_IDX,
  48. #endif
  49. UART_CNT
  50. };
  51. /* Private typedef --------------------------------------------------------------*/
  52. struct nu_uart
  53. {
  54. rt_serial_t dev;
  55. char *name;
  56. UART_T *uart_base;
  57. uint32_t uart_rst;
  58. IRQn_Type uart_irq_n;
  59. #if defined(RT_SERIAL_USING_DMA)
  60. uint32_t dma_flag;
  61. int16_t pdma_perp_tx;
  62. int8_t pdma_chanid_tx;
  63. int16_t pdma_perp_rx;
  64. int8_t pdma_chanid_rx;
  65. int32_t rx_write_offset;
  66. int32_t rxdma_trigger_len;
  67. #endif
  68. };
  69. typedef struct nu_uart *nu_uart_t;
  70. /* Private functions ------------------------------------------------------------*/
  71. static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
  72. static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void *arg);
  73. static int nu_uart_send(struct rt_serial_device *serial, char c);
  74. static int nu_uart_receive(struct rt_serial_device *serial);
  75. static void nu_uart_isr(nu_uart_t serial);
  76. #if defined(RT_SERIAL_USING_DMA)
  77. static rt_ssize_t nu_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction);
  78. static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events);
  79. static void nu_pdma_uart_tx_cb(void *pvOwner, uint32_t u32Events);
  80. #endif
  81. /* Public functions ------------------------------------------------------------*/
  82. /* Private variables ------------------------------------------------------------*/
  83. static const struct rt_uart_ops nu_uart_ops =
  84. {
  85. .configure = nu_uart_configure,
  86. .control = nu_uart_control,
  87. .putc = nu_uart_send,
  88. .getc = nu_uart_receive,
  89. #if defined(RT_SERIAL_USING_DMA)
  90. .dma_transmit = nu_uart_dma_transmit
  91. #else
  92. .dma_transmit = RT_NULL
  93. #endif
  94. };
  95. static const struct serial_configure nu_uart_default_config =
  96. RT_SERIAL_CONFIG_DEFAULT;
  97. static struct nu_uart nu_uart_arr [] =
  98. {
  99. #if defined(BSP_USING_UART0)
  100. {
  101. .name = "uart0",
  102. .uart_base = UART0,
  103. .uart_rst = UART0_RST,
  104. .uart_irq_n = UART02_IRQn,
  105. #if defined(RT_SERIAL_USING_DMA)
  106. #if defined(BSP_USING_UART0_TX_DMA)
  107. .pdma_perp_tx = PDMA_UART0_TX,
  108. #else
  109. .pdma_perp_tx = NU_PDMA_UNUSED,
  110. #endif
  111. #if defined(BSP_USING_UART0_RX_DMA)
  112. .pdma_perp_rx = PDMA_UART0_RX,
  113. .rx_write_offset = 0,
  114. #else
  115. .pdma_perp_rx = NU_PDMA_UNUSED,
  116. #endif
  117. #endif
  118. },
  119. #endif
  120. #if defined(BSP_USING_UART1)
  121. {
  122. .name = "uart1",
  123. .uart_base = UART1,
  124. .uart_rst = UART1_RST,
  125. .uart_irq_n = UART13_IRQn,
  126. #if defined(RT_SERIAL_USING_DMA)
  127. #if defined(BSP_USING_UART1_TX_DMA)
  128. .pdma_perp_tx = PDMA_UART1_TX,
  129. #else
  130. .pdma_perp_tx = NU_PDMA_UNUSED,
  131. #endif
  132. #if defined(BSP_USING_UART1_RX_DMA)
  133. .pdma_perp_rx = PDMA_UART1_RX,
  134. .rx_write_offset = 0,
  135. #else
  136. .pdma_perp_rx = NU_PDMA_UNUSED,
  137. #endif
  138. #endif
  139. },
  140. #endif
  141. #if defined(BSP_USING_UART2)
  142. {
  143. .name = "uart2",
  144. .uart_base = UART2,
  145. .uart_rst = UART2_RST,
  146. .uart_irq_n = UART02_IRQn,
  147. #if defined(RT_SERIAL_USING_DMA)
  148. #if defined(BSP_USING_UART2_TX_DMA)
  149. .pdma_perp_tx = PDMA_UART2_TX,
  150. #else
  151. .pdma_perp_tx = NU_PDMA_UNUSED,
  152. #endif
  153. #if defined(BSP_USING_UART2_RX_DMA)
  154. .pdma_perp_rx = PDMA_UART2_RX,
  155. .rx_write_offset = 0,
  156. #else
  157. .pdma_perp_rx = NU_PDMA_UNUSED,
  158. #endif
  159. #endif
  160. },
  161. #endif
  162. #if defined(BSP_USING_UART3)
  163. {
  164. .name = "uart3",
  165. .uart_base = UART3,
  166. .uart_rst = UART3_RST,
  167. .uart_irq_n = UART13_IRQn,
  168. #if defined(RT_SERIAL_USING_DMA)
  169. #if defined(BSP_USING_UART3_TX_DMA)
  170. .pdma_perp_tx = PDMA_UART3_TX,
  171. #else
  172. .pdma_perp_tx = NU_PDMA_UNUSED,
  173. #endif
  174. #if defined(BSP_USING_UART3_RX_DMA)
  175. .pdma_perp_rx = PDMA_UART3_RX,
  176. .rx_write_offset = 0,
  177. #else
  178. .pdma_perp_rx = NU_PDMA_UNUSED,
  179. #endif
  180. #endif
  181. },
  182. #endif
  183. #if defined(BSP_USING_UART4)
  184. {
  185. .name = "uart4",
  186. .uart_base = UART4,
  187. .uart_rst = UART4_RST,
  188. .uart_irq_n = UART46_IRQn,
  189. #if defined(RT_SERIAL_USING_DMA)
  190. #if defined(BSP_USING_UART4_TX_DMA)
  191. .pdma_perp_tx = PDMA_UART4_TX,
  192. #else
  193. .pdma_perp_tx = NU_PDMA_UNUSED,
  194. #endif
  195. #if defined(BSP_USING_UART4_RX_DMA)
  196. .pdma_perp_rx = PDMA_UART4_RX,
  197. .rx_write_offset = 0,
  198. #else
  199. .pdma_perp_rx = NU_PDMA_UNUSED,
  200. #endif
  201. #endif
  202. },
  203. #endif
  204. #if defined(BSP_USING_UART5)
  205. {
  206. .name = "uart5",
  207. .uart_base = UART5,
  208. .uart_rst = UART5_RST,
  209. .uart_irq_n = UART57_IRQn,
  210. #if defined(RT_SERIAL_USING_DMA)
  211. #if defined(BSP_USING_UART5_TX_DMA)
  212. .pdma_perp_tx = PDMA_UART5_TX,
  213. #else
  214. .pdma_perp_tx = NU_PDMA_UNUSED,
  215. #endif
  216. #if defined(BSP_USING_UART5_RX_DMA)
  217. .pdma_perp_rx = PDMA_UART5_RX,
  218. .rx_write_offset = 0,
  219. #else
  220. .pdma_perp_rx = NU_PDMA_UNUSED,
  221. #endif
  222. #endif
  223. },
  224. #endif
  225. #if defined(BSP_USING_UART6)
  226. {
  227. .name = "uart6",
  228. .uart_base = UART6,
  229. .uart_rst = UART6_RST,
  230. .uart_irq_n = UART46_IRQn,
  231. #if defined(RT_SERIAL_USING_DMA)
  232. #if defined(BSP_USING_UART6_TX_DMA)
  233. .pdma_perp_tx = PDMA_UART6_TX,
  234. #else
  235. .pdma_perp_tx = NU_PDMA_UNUSED,
  236. #endif
  237. #if defined(BSP_USING_UART6_RX_DMA)
  238. .pdma_perp_rx = PDMA_UART6_RX,
  239. .rx_write_offset = 0,
  240. #else
  241. .pdma_perp_rx = NU_PDMA_UNUSED,
  242. #endif
  243. #endif
  244. },
  245. #endif
  246. #if defined(BSP_USING_UART7)
  247. {
  248. .name = "uart7",
  249. .uart_base = UART7,
  250. .uart_rst = UART7_RST,
  251. .uart_irq_n = UART57_IRQn,
  252. #if defined(RT_SERIAL_USING_DMA)
  253. #if defined(BSP_USING_UART7_TX_DMA)
  254. .pdma_perp_tx = PDMA_UART7_TX,
  255. #else
  256. .pdma_perp_tx = NU_PDMA_UNUSED,
  257. #endif
  258. #if defined(BSP_USING_UART7_RX_DMA)
  259. .pdma_perp_rx = PDMA_UART7_RX,
  260. .rx_write_offset = 0,
  261. #else
  262. .pdma_perp_rx = NU_PDMA_UNUSED,
  263. #endif
  264. #endif
  265. },
  266. #endif
  267. }; /* uart nu_uart */
  268. /* Interrupt Handle Function ----------------------------------------------------*/
  269. #if defined(BSP_USING_UART0) || defined(BSP_USING_UART2)
  270. /* UART02 interrupt entry */
  271. void UART02_IRQHandler(void)
  272. {
  273. /* enter interrupt */
  274. rt_interrupt_enter();
  275. #if defined(BSP_USING_UART0)
  276. nu_uart_isr(&nu_uart_arr[UART0_IDX]);
  277. #endif
  278. #if defined(BSP_USING_UART2)
  279. nu_uart_isr(&nu_uart_arr[UART2_IDX]);
  280. #endif
  281. /* leave interrupt */
  282. rt_interrupt_leave();
  283. }
  284. #endif
  285. #if defined(BSP_USING_UART1) || defined(BSP_USING_UART3)
  286. /* UART13 interrupt entry */
  287. void UART13_IRQHandler(void)
  288. {
  289. /* enter interrupt */
  290. rt_interrupt_enter();
  291. #if defined(BSP_USING_UART1)
  292. nu_uart_isr(&nu_uart_arr[UART1_IDX]);
  293. #endif
  294. #if defined(BSP_USING_UART3)
  295. nu_uart_isr(&nu_uart_arr[UART3_IDX]);
  296. #endif
  297. /* leave interrupt */
  298. rt_interrupt_leave();
  299. }
  300. #endif
  301. #if defined(BSP_USING_UART4) || defined(BSP_USING_UART6)
  302. /* UART46 interrupt entry */
  303. void UART46_IRQHandler(void)
  304. {
  305. /* enter interrupt */
  306. rt_interrupt_enter();
  307. #if defined(BSP_USING_UART4)
  308. nu_uart_isr(&nu_uart_arr[UART4_IDX]);
  309. #endif
  310. #if defined(BSP_USING_UART6)
  311. nu_uart_isr(&nu_uart_arr[UART6_IDX]);
  312. #endif
  313. /* leave interrupt */
  314. rt_interrupt_leave();
  315. }
  316. #endif
  317. #if defined(BSP_USING_UART5) || defined(BSP_USING_UART7)
  318. /* UART57 interrupt entry */
  319. void UART57_IRQHandler(void)
  320. {
  321. /* enter interrupt */
  322. rt_interrupt_enter();
  323. #if defined(BSP_USING_UART5)
  324. nu_uart_isr(&nu_uart_arr[UART5_IDX]);
  325. #endif
  326. #if defined(BSP_USING_UART7)
  327. nu_uart_isr(&nu_uart_arr[UART7_IDX]);
  328. #endif
  329. /* leave interrupt */
  330. rt_interrupt_leave();
  331. }
  332. #endif
  333. /**
  334. * All UART interrupt service routine
  335. */
  336. static void nu_uart_isr(nu_uart_t serial)
  337. {
  338. /* Get base address of uart register */
  339. UART_T *uart_base = serial->uart_base;
  340. /* Get interrupt event */
  341. uint32_t u32IntSts = uart_base->INTSTS;
  342. uint32_t u32FIFOSts = uart_base->FIFOSTS;
  343. #if defined(RT_SERIAL_USING_DMA)
  344. if (u32IntSts & UART_INTSTS_HWRLSIF_Msk)
  345. {
  346. /* Drain RX FIFO to remove remain FEF frames in FIFO. */
  347. uart_base->FIFO |= UART_FIFO_RXRST_Msk;
  348. uart_base->FIFOSTS |= (UART_FIFOSTS_BIF_Msk | UART_FIFOSTS_FEF_Msk | UART_FIFOSTS_PEF_Msk);
  349. return;
  350. }
  351. #endif
  352. /* Handle RX event */
  353. if (u32IntSts & (UART_INTSTS_RDAINT_Msk | UART_INTSTS_RXTOINT_Msk))
  354. {
  355. rt_hw_serial_isr(&serial->dev, RT_SERIAL_EVENT_RX_IND);
  356. }
  357. uart_base->INTSTS = u32IntSts;
  358. uart_base->FIFOSTS = u32FIFOSts;
  359. }
  360. /**
  361. * Configure uart port
  362. */
  363. static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  364. {
  365. rt_err_t ret = RT_EOK;
  366. uint32_t uart_word_len = 0;
  367. uint32_t uart_stop_bit = 0;
  368. uint32_t uart_parity = 0;
  369. RT_ASSERT(serial);
  370. RT_ASSERT(cfg);
  371. /* Check baudrate */
  372. RT_ASSERT(cfg->baud_rate != 0);
  373. /* Get base address of uart register */
  374. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  375. /* Check word len */
  376. switch (cfg->data_bits)
  377. {
  378. case DATA_BITS_5:
  379. uart_word_len = UART_WORD_LEN_5;
  380. break;
  381. case DATA_BITS_6:
  382. uart_word_len = UART_WORD_LEN_6;
  383. break;
  384. case DATA_BITS_7:
  385. uart_word_len = UART_WORD_LEN_7;
  386. break;
  387. case DATA_BITS_8:
  388. uart_word_len = UART_WORD_LEN_8;
  389. break;
  390. default:
  391. rt_kprintf("Unsupported data length\n");
  392. ret = -RT_EINVAL;
  393. goto exit_nu_uart_configure;
  394. }
  395. /* Check stop bit */
  396. switch (cfg->stop_bits)
  397. {
  398. case STOP_BITS_1:
  399. uart_stop_bit = UART_STOP_BIT_1;
  400. break;
  401. case STOP_BITS_2:
  402. uart_stop_bit = UART_STOP_BIT_2;
  403. break;
  404. default:
  405. rt_kprintf("Unsupported stop bit\n");
  406. ret = -RT_EINVAL;
  407. goto exit_nu_uart_configure;
  408. }
  409. /* Check parity */
  410. switch (cfg->parity)
  411. {
  412. case PARITY_NONE:
  413. uart_parity = UART_PARITY_NONE;
  414. break;
  415. case PARITY_ODD:
  416. uart_parity = UART_PARITY_ODD;
  417. break;
  418. case PARITY_EVEN:
  419. uart_parity = UART_PARITY_EVEN;
  420. break;
  421. default:
  422. rt_kprintf("Unsupported parity\n");
  423. ret = -RT_EINVAL;
  424. goto exit_nu_uart_configure;
  425. }
  426. /* Reset this module */
  427. SYS_ResetModule(((nu_uart_t)serial)->uart_rst);
  428. /* Open Uart and set UART Baudrate */
  429. UART_Open(uart_base, cfg->baud_rate);
  430. /* Set line configuration. */
  431. UART_SetLine_Config(uart_base, 0, uart_word_len, uart_parity, uart_stop_bit);
  432. /* Enable NVIC interrupt. */
  433. NVIC_EnableIRQ(((nu_uart_t)serial)->uart_irq_n);
  434. exit_nu_uart_configure:
  435. if (ret != RT_EOK)
  436. UART_Close(uart_base);
  437. return -(ret);
  438. }
  439. #if defined(RT_SERIAL_USING_DMA)
  440. static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t *pu8Buf, int32_t i32TriggerLen)
  441. {
  442. rt_err_t result = RT_EOK;
  443. /* Get base address of uart register */
  444. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  445. result = nu_pdma_callback_register(((nu_uart_t)serial)->pdma_chanid_rx,
  446. nu_pdma_uart_rx_cb,
  447. (void *)serial,
  448. NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT);
  449. if (result != RT_EOK)
  450. {
  451. goto exit_nu_pdma_uart_rx_config;
  452. }
  453. result = nu_pdma_transfer(((nu_uart_t)serial)->pdma_chanid_rx,
  454. 8,
  455. (uint32_t)uart_base,
  456. (uint32_t)pu8Buf,
  457. i32TriggerLen,
  458. 1000); //Idle-timeout, 1ms
  459. if (result != RT_EOK)
  460. {
  461. goto exit_nu_pdma_uart_rx_config;
  462. }
  463. /* Enable Receive Line interrupt & Start DMA RX transfer. */
  464. UART_ENABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk);
  465. UART_ENABLE_INT(uart_base, UART_INTEN_RXPDMAEN_Msk);
  466. exit_nu_pdma_uart_rx_config:
  467. return result;
  468. }
  469. static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events)
  470. {
  471. rt_size_t recv_len = 0;
  472. rt_size_t transferred_rxbyte = 0;
  473. struct rt_serial_device *serial = (struct rt_serial_device *)pvOwner;
  474. nu_uart_t puart = (nu_uart_t)serial;
  475. RT_ASSERT(serial);
  476. /* Get base address of uart register */
  477. UART_T *uart_base = puart->uart_base;
  478. transferred_rxbyte = nu_pdma_transferred_byte_get(puart->pdma_chanid_rx, puart->rxdma_trigger_len);
  479. if (u32Events & (NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT))
  480. {
  481. if (u32Events & NU_PDMA_EVENT_TRANSFER_DONE)
  482. {
  483. if (serial->config.bufsz != 0)
  484. {
  485. struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  486. nu_pdma_uart_rx_config(serial, &rx_fifo->buffer[0], puart->rxdma_trigger_len); // Config & trigger next
  487. }
  488. else
  489. {
  490. UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk);
  491. UART_DISABLE_INT(uart_base, UART_INTEN_RXPDMAEN_Msk);
  492. }
  493. transferred_rxbyte = puart->rxdma_trigger_len;
  494. }
  495. else if ((u32Events & NU_PDMA_EVENT_TIMEOUT) && !UART_GET_RX_EMPTY(uart_base))
  496. {
  497. return;
  498. }
  499. recv_len = transferred_rxbyte - puart->rx_write_offset;
  500. if (recv_len > 0)
  501. {
  502. puart->rx_write_offset = transferred_rxbyte % puart->rxdma_trigger_len;
  503. }
  504. }
  505. if ((serial->config.bufsz == 0) && (u32Events & NU_PDMA_EVENT_TRANSFER_DONE))
  506. {
  507. recv_len = puart->rxdma_trigger_len;
  508. }
  509. if (recv_len > 0)
  510. {
  511. rt_hw_serial_isr(&puart->dev, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  512. }
  513. }
  514. static rt_err_t nu_pdma_uart_tx_config(struct rt_serial_device *serial)
  515. {
  516. rt_err_t result = RT_EOK;
  517. RT_ASSERT(serial);
  518. result = nu_pdma_callback_register(((nu_uart_t)serial)->pdma_chanid_tx,
  519. nu_pdma_uart_tx_cb,
  520. (void *)serial,
  521. NU_PDMA_EVENT_TRANSFER_DONE);
  522. return result;
  523. }
  524. static void nu_pdma_uart_tx_cb(void *pvOwner, uint32_t u32Events)
  525. {
  526. nu_uart_t puart = (nu_uart_t)pvOwner;
  527. RT_ASSERT(puart);
  528. UART_DISABLE_INT(puart->uart_base, UART_INTEN_TXPDMAEN_Msk);// Stop DMA TX transfer
  529. if (u32Events & NU_PDMA_EVENT_TRANSFER_DONE)
  530. {
  531. rt_hw_serial_isr(&puart->dev, RT_SERIAL_EVENT_TX_DMADONE);
  532. }
  533. }
  534. /**
  535. * Uart DMA transfer
  536. */
  537. static rt_ssize_t nu_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  538. {
  539. rt_err_t result = RT_EOK;
  540. nu_uart_t psNuUart = (nu_uart_t)serial;
  541. RT_ASSERT(serial);
  542. RT_ASSERT(buf);
  543. /* Get base address of uart register */
  544. UART_T *uart_base = psNuUart->uart_base;
  545. if (direction == RT_SERIAL_DMA_TX)
  546. {
  547. result = nu_pdma_transfer(psNuUart->pdma_chanid_tx,
  548. 8,
  549. (uint32_t)buf,
  550. (uint32_t)uart_base,
  551. size,
  552. 0); // wait-forever
  553. UART_ENABLE_INT(uart_base, UART_INTEN_TXPDMAEN_Msk); // Start DMA TX transfer
  554. }
  555. else if (direction == RT_SERIAL_DMA_RX)
  556. {
  557. UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk);
  558. UART_DISABLE_INT(uart_base, UART_INTEN_RXPDMAEN_Msk);
  559. // If config.bufsz = 0, serial will trigger once.
  560. psNuUart->rxdma_trigger_len = size;
  561. psNuUart->rx_write_offset = 0;
  562. result = nu_pdma_uart_rx_config(serial, buf, size);
  563. }
  564. else
  565. {
  566. result = -RT_ERROR;
  567. }
  568. return result;
  569. }
  570. static int nu_hw_uart_dma_allocate(nu_uart_t pusrt)
  571. {
  572. RT_ASSERT(pusrt);
  573. /* Allocate UART_TX nu_dma channel */
  574. if (pusrt->pdma_perp_tx != NU_PDMA_UNUSED)
  575. {
  576. pusrt->pdma_chanid_tx = nu_pdma_channel_allocate(pusrt->pdma_perp_tx);
  577. if (pusrt->pdma_chanid_tx >= 0)
  578. {
  579. pusrt->dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  580. }
  581. }
  582. /* Allocate UART_RX nu_dma channel */
  583. if (pusrt->pdma_perp_rx != NU_PDMA_UNUSED)
  584. {
  585. pusrt->pdma_chanid_rx = nu_pdma_channel_allocate(pusrt->pdma_perp_rx);
  586. if (pusrt->pdma_chanid_rx >= 0)
  587. {
  588. pusrt->dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  589. }
  590. }
  591. return RT_EOK;
  592. }
  593. #endif
  594. /**
  595. * Uart interrupt control
  596. */
  597. static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  598. {
  599. nu_uart_t psNuUart = (nu_uart_t)serial;
  600. rt_err_t result = RT_EOK;
  601. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  602. RT_ASSERT(serial);
  603. /* Get base address of uart register */
  604. UART_T *uart_base = psNuUart->uart_base;
  605. switch (cmd)
  606. {
  607. case RT_DEVICE_CTRL_CLR_INT:
  608. if (ctrl_arg == RT_DEVICE_FLAG_INT_RX) /* Disable INT-RX */
  609. {
  610. UART_DISABLE_INT(uart_base, UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk);
  611. }
  612. else if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) /* Disable DMA-RX */
  613. {
  614. /* Disable Receive Line interrupt & Stop DMA RX transfer. */
  615. #if defined(RT_SERIAL_USING_DMA)
  616. if (psNuUart->dma_flag & RT_DEVICE_FLAG_DMA_RX)
  617. {
  618. nu_pdma_channel_terminate(psNuUart->pdma_chanid_rx);
  619. }
  620. UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk);
  621. #endif
  622. }
  623. break;
  624. case RT_DEVICE_CTRL_SET_INT:
  625. if (ctrl_arg == RT_DEVICE_FLAG_INT_RX) /* Enable INT-RX */
  626. {
  627. UART_ENABLE_INT(uart_base, UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk);
  628. }
  629. break;
  630. #if defined(RT_SERIAL_USING_DMA)
  631. case RT_DEVICE_CTRL_CONFIG:
  632. if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) /* Configure and trigger DMA-RX */
  633. {
  634. struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  635. psNuUart->rxdma_trigger_len = serial->config.bufsz;
  636. psNuUart->rx_write_offset = 0;
  637. result = nu_pdma_uart_rx_config(serial, &rx_fifo->buffer[0], psNuUart->rxdma_trigger_len); // Config & trigger
  638. }
  639. else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX) /* Configure DMA-TX */
  640. {
  641. result = nu_pdma_uart_tx_config(serial);
  642. }
  643. break;
  644. #endif
  645. case RT_DEVICE_CTRL_CLOSE:
  646. /* Disable NVIC interrupt. */
  647. NVIC_DisableIRQ(psNuUart->uart_irq_n);
  648. #if defined(RT_SERIAL_USING_DMA)
  649. UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk);
  650. UART_DISABLE_INT(uart_base, UART_INTEN_TXPDMAEN_Msk);
  651. if (psNuUart->dma_flag != 0)
  652. {
  653. nu_pdma_channel_terminate(psNuUart->pdma_chanid_tx);
  654. nu_pdma_channel_terminate(psNuUart->pdma_chanid_rx);
  655. }
  656. #endif
  657. /* Close UART port */
  658. UART_Close(uart_base);
  659. break;
  660. default:
  661. result = -RT_EINVAL;
  662. break;
  663. }
  664. return result;
  665. }
  666. /**
  667. * Uart put char
  668. */
  669. static int nu_uart_send(struct rt_serial_device *serial, char c)
  670. {
  671. RT_ASSERT(serial);
  672. /* Get base address of uart register */
  673. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  674. /* Waiting if TX-FIFO is full. */
  675. while (UART_IS_TX_FULL(uart_base));
  676. /* Put char into TX-FIFO */
  677. UART_WRITE(uart_base, c);
  678. return 1;
  679. }
  680. /**
  681. * Uart get char
  682. */
  683. static int nu_uart_receive(struct rt_serial_device *serial)
  684. {
  685. RT_ASSERT(serial);
  686. /* Get base address of uart register */
  687. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  688. /* Return failure if RX-FIFO is empty. */
  689. if (UART_GET_RX_EMPTY(uart_base))
  690. {
  691. return -1;
  692. }
  693. /* Get char from RX-FIFO */
  694. return UART_READ(uart_base);
  695. }
  696. /**
  697. * Hardware UART Initialization
  698. */
  699. rt_err_t rt_hw_uart_init(void)
  700. {
  701. int i;
  702. rt_uint32_t flag;
  703. rt_err_t ret = RT_EOK;
  704. for (i = (UART_START + 1); i < UART_CNT; i++)
  705. {
  706. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  707. nu_uart_arr[i].dev.ops = &nu_uart_ops;
  708. nu_uart_arr[i].dev.config = nu_uart_default_config;
  709. #if defined(RT_SERIAL_USING_DMA)
  710. nu_uart_arr[i].dma_flag = 0;
  711. nu_hw_uart_dma_allocate(&nu_uart_arr[i]);
  712. flag |= nu_uart_arr[i].dma_flag;
  713. #endif
  714. ret = rt_hw_serial_register(&nu_uart_arr[i].dev, nu_uart_arr[i].name, flag, NULL);
  715. RT_ASSERT(ret == RT_EOK);
  716. }
  717. return ret;
  718. }
  719. #endif //#if defined(BSP_USING_UART)