smp_sgi_test.c 2.7 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Email: opensource_embedded@phytium.com.cn
  7. *
  8. * Change Logs:
  9. * Date Author Notes
  10. * 2024/07/15 zhangyan first commit
  11. */
  12. #include "rtconfig.h"
  13. #ifdef RT_USING_SMP
  14. #include <rtthread.h>
  15. #include <rtdevice.h>
  16. #include <string.h>
  17. #include "fparameters.h"
  18. #include "ftypes.h"
  19. #include "board.h"
  20. #include <rtdbg.h>
  21. #include "interrupt.h"
  22. #include <rtdef.h>
  23. #include "rtatomic.h"
  24. #define RT_TEST_IPI 3
  25. struct rt_thread core_test_thread[RT_CPUS_NR];
  26. static char *core_thread_name[] =
  27. {
  28. "core0_sgi_test",
  29. "core1_sgi_test",
  30. "core2_sgi_test",
  31. "core3_sgi_test",
  32. "core4_sgi_test",
  33. "core5_sgi_test",
  34. "core6_sgi_test",
  35. "core7_sgi_test",
  36. };
  37. static rt_uint8_t core_stack[RT_CPUS_NR][4096];
  38. static rt_isr_handler_t smp_test_ipi_handle(int vector, void *param)
  39. {
  40. rt_int32_t cpu_id = rt_hw_cpu_id();
  41. rt_kprintf("smp_test_ipi_handle, cpu_id = %d\n", cpu_id);
  42. }
  43. static void core_thread(void *parameter)
  44. {
  45. rt_base_t level;
  46. rt_int32_t cpu_id = rt_hw_cpu_id();
  47. /* code */
  48. level = rt_cpus_lock();
  49. rt_hw_ipi_handler_install(RT_TEST_IPI, smp_test_ipi_handle);
  50. rt_hw_interrupt_umask(RT_TEST_IPI);
  51. rt_kprintf("core%d, rt_hw_interrupt_umask(RT_TEST_IPI) successfully.\n", cpu_id);
  52. rt_cpus_unlock(level);
  53. }
  54. void demo_core_test(void)
  55. {
  56. rt_ubase_t i;
  57. rt_ubase_t cpu_id = 0;
  58. rt_kprintf("demo_core%d \n", rt_hw_cpu_id());
  59. for (i = 0; i < RT_CPUS_NR; i++)
  60. {
  61. cpu_id = i;
  62. rt_thread_init(&core_test_thread[i],
  63. core_thread_name[i],
  64. core_thread,
  65. RT_NULL,
  66. &core_stack[i],
  67. 2048,
  68. 20,
  69. 32);
  70. rt_thread_control(&core_test_thread[i], RT_THREAD_CTRL_BIND_CPU, (void *)cpu_id);
  71. rt_thread_startup(&core_test_thread[i]);
  72. rt_thread_mdelay(100);
  73. }
  74. }
  75. /* this function will toggle output pin and test intr of input pin */
  76. static void smp_sgi_test_thread(void *parameter)
  77. {
  78. rt_uint32_t cpu_mask = 0;
  79. for (rt_uint32_t i = 0; i < RT_CPUS_NR; i++)
  80. {
  81. cpu_mask = (1 << i);
  82. rt_hw_ipi_send(RT_TEST_IPI, cpu_mask);
  83. rt_thread_mdelay(10);
  84. }
  85. }
  86. void smp_sgi_sample(int argc, char *argv[])
  87. {
  88. rt_thread_t thread;
  89. rt_err_t res;
  90. demo_core_test();
  91. rt_thread_mdelay(100);
  92. thread = rt_thread_create("smp_test_thread", smp_sgi_test_thread, RT_NULL, 4096, 25, 10);
  93. res = rt_thread_startup(thread);
  94. RT_ASSERT(res == RT_EOK);
  95. }
  96. MSH_CMD_EXPORT(smp_sgi_sample, smp toggle sgi sample.);
  97. #endif