drv_console.c 3.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141
  1. /*
  2. * Copyright (c) 2006-2025, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2025-08-20 kurisaw First version
  9. */
  10. #include <rtthread.h>
  11. #include <rthw.h>
  12. #include <hal_data.h>
  13. #if defined(RT_USING_CONSOLE) && defined(RT_USING_SEMAPHORE)
  14. struct rt_semaphore console_sem;
  15. #if defined(RT_NANO_CONSOLE_UART0)
  16. #define renesas_uart_ctrl g_uart0_ctrl
  17. #define renesas_uart_cfg g_uart0_cfg
  18. #define renesas_uart_callback user_uart0_callback
  19. #elif defined(RT_NANO_CONSOLE_UART1)
  20. #define renesas_uart_ctrl g_uart1_ctrl
  21. #define renesas_uart_cfg g_uart1_cfg
  22. #define renesas_uart_callback user_uart1_callback
  23. #elif defined(RT_NANO_CONSOLE_UART2)
  24. #define renesas_uart_ctrl g_uart2_ctrl
  25. #define renesas_uart_cfg g_uart2_cfg
  26. #define renesas_uart_callback user_uart2_callback
  27. #elif defined(RT_NANO_CONSOLE_UART3)
  28. #define renesas_uart_ctrl g_uart3_ctrl
  29. #define renesas_uart_cfg g_uart3_cfg
  30. #define renesas_uart_callback user_uart3_callback
  31. #elif defined(RT_NANO_CONSOLE_UART4)
  32. #define renesas_uart_ctrl g_uart4_ctrl
  33. #define renesas_uart_cfg g_uart4_cfg
  34. #define renesas_uart_callback user_uart4_callback
  35. #elif defined(RT_NANO_CONSOLE_UART5)
  36. #define renesas_uart_ctrl g_uart5_ctrl
  37. #define renesas_uart_cfg g_uart5_cfg
  38. #define renesas_uart_callback user_uart5_callback
  39. #elif defined(RT_NANO_CONSOLE_UART6)
  40. #define renesas_uart_ctrl g_uart6_ctrl
  41. #define renesas_uart_cfg g_uart6_cfg
  42. #define renesas_uart_callback user_uart6_callback
  43. #elif defined(RT_NANO_CONSOLE_UART7)
  44. #define renesas_uart_ctrl g_uart7_ctrl
  45. #define renesas_uart_cfg g_uart7_cfg
  46. #define renesas_uart_callback user_uart7_callback
  47. #elif defined(RT_NANO_CONSOLE_UART8)
  48. #define renesas_uart_ctrl g_uart8_ctrl
  49. #define renesas_uart_cfg g_uart8_cfg
  50. #define renesas_uart_callback user_uart8_callback
  51. #elif defined(RT_NANO_CONSOLE_UART9)
  52. #define renesas_uart_ctrl g_uart9_ctrl
  53. #define renesas_uart_cfg g_uart9_cfg
  54. #define renesas_uart_callback user_uart9_callback
  55. #endif
  56. void rt_hw_console_init(void)
  57. {
  58. fsp_err_t err = FSP_SUCCESS;
  59. rt_err_t res = RT_EOK;
  60. res = rt_sem_init(&console_sem, "console", 0, RT_IPC_FLAG_FIFO);
  61. RT_ASSERT(res == RT_EOK);
  62. /* Initialize UART using FSP */
  63. #ifdef SOC_SERIES_R7FA8M85
  64. err = R_SCI_B_UART_Open(&renesas_uart_ctrl, &renesas_uart_cfg);
  65. #else
  66. err = R_SCI_UART_Open(&renesas_uart_ctrl, &renesas_uart_cfg);
  67. #endif
  68. if (FSP_SUCCESS != err)
  69. {
  70. while (1); /* Trap on failure */
  71. }
  72. return;
  73. }
  74. void console_send_byte(uint8_t ch)
  75. {
  76. renesas_uart_ctrl.p_reg->TDR = ch;
  77. #if defined(SOC_SERIES_R7FA8M85) || defined(SOC_SERIES_R9A07G0)
  78. while ((renesas_uart_ctrl.p_reg->CSR_b.TEND) == 0);
  79. #else
  80. while ((renesas_uart_ctrl.p_reg->SSR_b.TEND) == 0);
  81. #endif
  82. }
  83. void rt_hw_console_output(const char *str)
  84. {
  85. rt_size_t i = 0, size = 0;
  86. char a = '\r';
  87. size = rt_strlen(str);
  88. for (i = 0; i < size; i++)
  89. {
  90. if (*(str + i) == '\n')
  91. {
  92. console_send_byte((uint8_t) a);
  93. }
  94. console_send_byte(*(str + i));
  95. }
  96. }
  97. void renesas_uart_callback(uart_callback_args_t *p_args)
  98. {
  99. /* Handle the UART event */
  100. switch (p_args->event)
  101. {
  102. /* Received a character or receive completed */
  103. case UART_EVENT_RX_CHAR:
  104. case UART_EVENT_RX_COMPLETE:
  105. rt_sem_release(&console_sem);
  106. break;
  107. default:
  108. break;
  109. }
  110. }
  111. char rt_hw_console_getchar(void)
  112. {
  113. int ch = -1;
  114. rt_sem_take(&console_sem, RT_WAITING_FOREVER);
  115. #ifdef SOC_SERIES_R7FA8M85
  116. fsp_err_t ret = R_SCI_B_UART_Read(&renesas_uart_ctrl, (uint8_t *)&ch, 1);
  117. #else
  118. fsp_err_t ret = R_SCI_UART_Read(&renesas_uart_ctrl, (uint8_t *)&ch, 1);
  119. #endif
  120. if(ret != FSP_SUCCESS)
  121. {
  122. ch = -1;
  123. rt_thread_mdelay(10);
  124. }
  125. return ch;
  126. }
  127. #endif