clk-scmi.c 11 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-11-26 GuEe-GUI first version
  9. */
  10. #include <rtthread.h>
  11. #include <rtdevice.h>
  12. #define DBG_TAG "clk.scmi"
  13. #define DBG_LVL DBG_INFO
  14. #include <rtdbg.h>
  15. struct scmi_clk
  16. {
  17. struct rt_clk_node parent;
  18. struct rt_scmi_device *sdev;
  19. };
  20. #define raw_to_scmi_clk(raw) rt_container_of(raw, struct scmi_clk, parent)
  21. struct scmi_clk_data
  22. {
  23. struct rt_clk_cell cell;
  24. int id;
  25. rt_bool_t rate_discrete;
  26. union
  27. {
  28. struct
  29. {
  30. int rates_nr;
  31. rt_uint64_t rates[];
  32. } list;
  33. struct
  34. {
  35. rt_uint64_t min_rate;
  36. rt_uint64_t max_rate;
  37. rt_uint64_t step_size;
  38. } range;
  39. } info;
  40. };
  41. #define cell_to_scmi_clk_data(cell_ptr) rt_container_of(cell_ptr, struct scmi_clk_data, cell)
  42. static rt_err_t scmi_clk_op_gate(struct scmi_clk *sclk, int clk_id, rt_bool_t enable)
  43. {
  44. struct scmi_clk_state_in in =
  45. {
  46. .clock_id = rt_cpu_to_le32(clk_id),
  47. .attributes = rt_cpu_to_le32(enable),
  48. };
  49. struct scmi_clk_state_out out;
  50. struct rt_scmi_msg msg = RT_SCMI_MSG_IN_OUT(SCMI_CLOCK_CONFIG_SET, &in, &out);
  51. return rt_scmi_process_msg(sclk->sdev, &msg);
  52. }
  53. static rt_base_t scmi_clk_op_get_rate(struct scmi_clk *sclk, int clk_id)
  54. {
  55. rt_ubase_t res;
  56. struct scmi_clk_rate_get_in in =
  57. {
  58. .clock_id = rt_cpu_to_le32(clk_id),
  59. };
  60. struct scmi_clk_rate_get_out out;
  61. struct rt_scmi_msg msg = RT_SCMI_MSG_IN_OUT(SCMI_CLOCK_RATE_GET, &in, &out);
  62. res = rt_scmi_process_msg(sclk->sdev, &msg);
  63. if ((rt_base_t)res >= 0)
  64. {
  65. res = (rt_ubase_t)(((rt_uint64_t)out.rate_msb << 32) | out.rate_lsb);
  66. }
  67. return res;
  68. }
  69. static rt_base_t scmi_clk_op_set_rate(struct scmi_clk *sclk, int clk_id, rt_ubase_t rate)
  70. {
  71. struct scmi_clk_rate_set_in in =
  72. {
  73. .clock_id = rt_cpu_to_le32(clk_id),
  74. .flags = rt_cpu_to_le32(SCMI_CLK_RATE_ROUND_CLOSEST),
  75. .rate_lsb = rt_cpu_to_le32((rt_uint32_t)rate),
  76. .rate_msb = rt_cpu_to_le32((rt_uint32_t)((rt_uint64_t)rate >> 32)),
  77. };
  78. struct scmi_clk_rate_set_out out;
  79. struct rt_scmi_msg msg = RT_SCMI_MSG_IN_OUT(SCMI_CLOCK_RATE_SET, &in, &out);
  80. return rt_scmi_process_msg(sclk->sdev, &msg);
  81. }
  82. static rt_err_t scmi_clk_enable(struct rt_clk_cell *cell)
  83. {
  84. struct scmi_clk *sclk = raw_to_scmi_clk(cell->clk_np);
  85. struct scmi_clk_data *clk_data = cell_to_scmi_clk_data(cell);
  86. return scmi_clk_op_gate(sclk, clk_data->id, RT_TRUE);
  87. }
  88. static void scmi_clk_disable(struct rt_clk_cell *cell)
  89. {
  90. struct scmi_clk *sclk = raw_to_scmi_clk(cell->clk_np);
  91. struct scmi_clk_data *clk_data = cell_to_scmi_clk_data(cell);
  92. scmi_clk_op_gate(sclk, clk_data->id, RT_FALSE);
  93. }
  94. static rt_ubase_t scmi_clk_recalc_rate(struct rt_clk_cell *cell, rt_ubase_t parent_rate)
  95. {
  96. struct scmi_clk *sclk = raw_to_scmi_clk(cell->clk_np);
  97. struct scmi_clk_data *clk_data = cell_to_scmi_clk_data(cell);
  98. return scmi_clk_op_get_rate(sclk, clk_data->id);
  99. }
  100. static rt_base_t scmi_clk_round_rate(struct rt_clk_cell *cell, rt_ubase_t drate, rt_ubase_t *prate)
  101. {
  102. rt_uint64_t fmin, fmax, ftmp;
  103. struct scmi_clk_data *clk_data = cell_to_scmi_clk_data(cell);
  104. if (clk_data->rate_discrete)
  105. {
  106. return drate;
  107. }
  108. fmin = clk_data->info.range.min_rate;
  109. fmax = clk_data->info.range.max_rate;
  110. if (drate <= fmin)
  111. {
  112. return fmin;
  113. }
  114. if (drate >= fmax)
  115. {
  116. return fmax;
  117. }
  118. ftmp = drate - fmin;
  119. ftmp += clk_data->info.range.step_size - 1;
  120. rt_do_div(ftmp, clk_data->info.range.step_size);
  121. return ftmp * clk_data->info.range.step_size + fmin;
  122. }
  123. static rt_err_t scmi_clk_set_rate(struct rt_clk_cell *cell, rt_ubase_t rate, rt_ubase_t parent_rate)
  124. {
  125. rt_err_t err;
  126. rt_ubase_t res_rate;
  127. struct scmi_clk *sclk = raw_to_scmi_clk(cell->clk_np);
  128. struct scmi_clk_data *clk_data = cell_to_scmi_clk_data(cell);
  129. if (!(err = scmi_clk_op_set_rate(sclk, clk_data->id, rate)))
  130. {
  131. res_rate = scmi_clk_op_get_rate(sclk, clk_data->id);
  132. if ((rt_err_t)res_rate < 0)
  133. {
  134. err = (rt_err_t)res_rate;
  135. }
  136. }
  137. return err;
  138. }
  139. static const struct rt_clk_ops scmi_clk_ops =
  140. {
  141. .enable = scmi_clk_enable,
  142. .disable = scmi_clk_disable,
  143. .recalc_rate = scmi_clk_recalc_rate,
  144. .round_rate = scmi_clk_round_rate,
  145. .set_rate = scmi_clk_set_rate,
  146. };
  147. static rt_err_t scmi_clk_probe(struct rt_scmi_device *sdev)
  148. {
  149. rt_err_t err;
  150. rt_size_t cell_count, out_size;
  151. struct rt_scmi_msg msg;
  152. struct rt_device *dev = &sdev->parent;
  153. struct rt_clk_cell **cells_list = RT_NULL, *cell;
  154. struct scmi_clk_data *clk_data;
  155. struct scmi_clk_describe_rates_out *out = RT_NULL;
  156. struct scmi_clk_describe_rates_in in;
  157. struct scmi_clk_attributes attr;
  158. struct scmi_clk_name_in name_in;
  159. struct scmi_clk_name_out name_out;
  160. struct scmi_clk_describe_attributes_in clk_attr_in;
  161. struct scmi_clk_describe_attributes_out clk_attr_out;
  162. struct scmi_clk *sclk = rt_calloc(1, sizeof(*sclk));
  163. if (!sclk)
  164. {
  165. return -RT_ENOMEM;
  166. }
  167. sclk->sdev = sdev;
  168. msg = RT_SCMI_MSG_OUT(SCMI_COM_MSG_ATTRIBUTES, &attr);
  169. if ((err = rt_scmi_process_msg(sclk->sdev, &msg)))
  170. {
  171. goto _fail;
  172. }
  173. cell_count = rt_le16_to_cpu(attr.num_clocks);
  174. if (!(cells_list = rt_calloc(cell_count, sizeof(*cells_list))))
  175. {
  176. err = -RT_ENOMEM;
  177. goto _fail;
  178. }
  179. out_size = rt_offsetof(struct scmi_clk_describe_rates_out, rate[SCMI_MAX_NUM_RATES]);
  180. if (!(out = rt_malloc(out_size)))
  181. {
  182. err = -RT_ENOMEM;
  183. goto _fail;
  184. }
  185. for (int id = 0; id < cell_count; ++id)
  186. {
  187. const char *clk_name;
  188. rt_uint32_t flags, rate_discrete;
  189. in.id = rt_cpu_to_le32(id);
  190. in.rate_index = rt_cpu_to_le32(0);
  191. msg = RT_SCMI_MSG_RAW(SCMI_CLOCK_DESCRIBE_RATES, &in, sizeof(in), out, out_size);
  192. if ((err = rt_scmi_process_msg(sclk->sdev, &msg)))
  193. {
  194. goto _fail;
  195. }
  196. flags = rt_le32_to_cpu(out->num_rates_flags);
  197. rate_discrete = SCMI_RATE_DISCRETE(flags);
  198. if (rate_discrete)
  199. {
  200. clk_data = rt_malloc(rt_offsetof(struct scmi_clk_data,
  201. info.list.rates[SCMI_MAX_NUM_RATES]));
  202. }
  203. else
  204. {
  205. clk_data = rt_malloc(sizeof(*clk_data));
  206. }
  207. if (!clk_data)
  208. {
  209. err = -RT_ENOMEM;
  210. break;
  211. }
  212. if (rate_discrete)
  213. {
  214. /*
  215. * SCMI: [11:0] = rates in this message, [31:16] = remaining to query.
  216. * Using REMAINING as the copy count overflows rates[] and corrupts heap.
  217. */
  218. int idx = 0;
  219. for (;;)
  220. {
  221. rt_uint32_t nr = SCMI_NUM_RETURNED(flags);
  222. rt_uint32_t remaining = SCMI_NUM_REMAINING(flags);
  223. for (rt_uint32_t i = 0; i < nr && idx < SCMI_MAX_NUM_RATES; ++i, ++idx)
  224. {
  225. clk_data->info.list.rates[idx] = SCMI_RATE_TO_U64(out->rate[i]);
  226. }
  227. if (remaining == 0 || idx >= SCMI_MAX_NUM_RATES)
  228. {
  229. break;
  230. }
  231. in.rate_index = rt_cpu_to_le32(idx);
  232. msg = RT_SCMI_MSG_RAW(SCMI_CLOCK_DESCRIBE_RATES, &in, sizeof(in), out, out_size);
  233. if ((err = rt_scmi_process_msg(sclk->sdev, &msg)))
  234. {
  235. rt_free(clk_data);
  236. goto _fail;
  237. }
  238. flags = rt_le32_to_cpu(out->num_rates_flags);
  239. }
  240. clk_data->info.list.rates_nr = idx;
  241. }
  242. else
  243. {
  244. clk_data->info.range.min_rate = SCMI_RATE_TO_U64(out->rate[0]);
  245. clk_data->info.range.max_rate = SCMI_RATE_TO_U64(out->rate[1]);
  246. clk_data->info.range.step_size = SCMI_RATE_TO_U64(out->rate[2]);
  247. }
  248. clk_data->rate_discrete = rate_discrete;
  249. clk_data->id = id;
  250. cell = &clk_data->cell;
  251. rt_memset(cell, 0, sizeof(*cell));
  252. clk_attr_in.clock_id = rt_cpu_to_le32(id);
  253. msg = RT_SCMI_MSG_IN_OUT(SCMI_CLOCK_ATTRIBUTES, &clk_attr_in, &clk_attr_out);
  254. if ((err = rt_scmi_process_msg(sclk->sdev, &msg)))
  255. {
  256. rt_free(clk_data);
  257. goto _fail;
  258. }
  259. if (SUPPORTS_EXTENDED_NAMES(clk_attr_out.attributes))
  260. {
  261. name_in.clock_id = rt_cpu_to_le32(id);
  262. msg = RT_SCMI_MSG_IN_OUT(SCMI_CLOCK_NAME_GET, &name_in, &name_out);
  263. if ((err = rt_scmi_process_msg(sclk->sdev, &msg)))
  264. {
  265. rt_free(clk_data);
  266. goto _fail;
  267. }
  268. clk_name = (const char *)name_out.name;
  269. }
  270. else
  271. {
  272. clk_name = (const char *)clk_attr_out.name;
  273. }
  274. if (!(cell->name = rt_strdup(clk_name)))
  275. {
  276. rt_free(clk_data);
  277. err = -RT_ENOMEM;
  278. goto _fail;
  279. }
  280. cell->ops = &scmi_clk_ops;
  281. cell->flags = RT_CLK_F_GET_RATE_NOCACHE;
  282. cells_list[id] = cell;
  283. }
  284. sclk->parent.dev = dev;
  285. sclk->parent.cells = cells_list;
  286. sclk->parent.cells_nr = cell_count;
  287. if ((err = rt_clk_register(&sclk->parent)))
  288. {
  289. goto _fail;
  290. }
  291. for (int id = 0; id < cell_count; ++id)
  292. {
  293. struct rt_clk *clk = rt_clk_cell_get_clk(cells_list[id], RT_NULL);
  294. if (clk)
  295. {
  296. rt_ubase_t min_rate, max_rate;
  297. clk_data = cell_to_scmi_clk_data(cells_list[id]);
  298. if (clk_data->rate_discrete)
  299. {
  300. min_rate = clk_data->info.list.rates[0];
  301. max_rate = clk_data->info.list.rates[clk_data->info.list.rates_nr - 1];
  302. }
  303. else
  304. {
  305. min_rate = clk_data->info.range.min_rate;
  306. max_rate = clk_data->info.range.max_rate;
  307. }
  308. rt_clk_set_rate_range(clk, min_rate, max_rate);
  309. }
  310. }
  311. return RT_EOK;
  312. _fail:
  313. if (out)
  314. {
  315. rt_free(out);
  316. }
  317. if (cells_list)
  318. {
  319. for (int id = 0; id < cell_count; ++id)
  320. {
  321. if (!cells_list[id])
  322. {
  323. break;
  324. }
  325. cell = cells_list[id];
  326. clk_data = cell_to_scmi_clk_data(cell);
  327. rt_free(clk_data);
  328. }
  329. rt_free(cells_list);
  330. }
  331. rt_free(sclk);
  332. return err;
  333. }
  334. static const struct rt_scmi_device_id scmi_clk_ids[] =
  335. {
  336. { SCMI_PROTOCOL_ID_CLOCK, "clocks" },
  337. { /* sentinel */ },
  338. };
  339. static struct rt_scmi_driver scmi_clk_driver =
  340. {
  341. .name = "clk-scmi",
  342. .ids = scmi_clk_ids,
  343. .probe = scmi_clk_probe,
  344. };
  345. static int scmi_clk_drv_register(void)
  346. {
  347. rt_scmi_driver_register(&scmi_clk_driver);
  348. return 0;
  349. }
  350. INIT_SUBSYS_EXPORT(scmi_clk_drv_register);