drv_dma.h 1.7 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-11-09 shelton first version
  9. * 2023-01-31 shelton add support f421/f425
  10. * 2023-04-08 shelton add support f423
  11. * 2024-04-12 shelton add support a403a and a423
  12. * 2024-08-30 shelton add support m412 and m416
  13. * 2024-12-18 shelton add support f455/f456 and f457
  14. */
  15. #ifndef __DRV_DMA_H__
  16. #define __DRV_DMA_H__
  17. #ifdef __cplusplus
  18. extern "C" {
  19. #endif
  20. #include <rtdevice.h>
  21. #include <rtthread.h>
  22. #include "drv_common.h"
  23. #define DMA_GLO_FLAG 0x0001U
  24. #define DMA_FDT_FLAG 0x0002U
  25. #define DMA_HDT_FLAG 0x0004U
  26. #define DMA_DTE_FLAG 0x0008U
  27. struct dma_config {
  28. dma_type *dma_x;
  29. rt_uint8_t channel_index;
  30. rt_bool_t dma_done;
  31. dma_channel_type *dma_channel;
  32. crm_periph_clock_type dma_clock;
  33. IRQn_Type dma_irqn;
  34. #if defined (SOC_SERIES_AT32F425)
  35. rt_uint8_t flex_channel;
  36. rt_uint32_t request_id;
  37. #endif
  38. #if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
  39. defined (SOC_SERIES_AT32F423) || defined (SOC_SERIES_AT32F402) || \
  40. defined (SOC_SERIES_AT32F405) || defined (SOC_SERIES_AT32A423) || \
  41. defined (SOC_SERIES_AT32M412) || defined (SOC_SERIES_AT32M416) || \
  42. defined (SOC_SERIES_AT32F455) || defined (SOC_SERIES_AT32F456) || \
  43. defined (SOC_SERIES_AT32F457)
  44. dmamux_channel_type *dmamux_channel;
  45. rt_uint32_t request_id;
  46. #endif
  47. };
  48. #ifdef __cplusplus
  49. }
  50. #endif
  51. #endif /*__DRV_DMA_H__ */
  52. /************************** end of file ******************/