drv_rtc.c 12 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-05-16 shelton first version
  9. * 2023-04-08 shelton add support f423
  10. * 2023-10-18 shelton add support f402/f405
  11. * 2024-04-12 shelton add support a403a and a423
  12. * 2024-08-30 shelton add support m412 and m416
  13. * 2024-12-18 shelton add support f455/f456 and f457
  14. */
  15. #include <rtthread.h>
  16. #include <rtdevice.h>
  17. #include <sys/time.h>
  18. #include "drv_common.h"
  19. #ifdef BSP_USING_RTC
  20. //#define DRV_DEBUG
  21. #define LOG_TAG "drv.rtc"
  22. #include <drv_log.h>
  23. #define BKUP_REG_DATA 0xA5A5
  24. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  25. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  26. #define Alarm_IRQn RTCAlarm_IRQn
  27. #define Alarm_IRQHandler RTCAlarm_IRQHandler
  28. #elif defined (SOC_SERIES_AT32F421) || defined (SOC_SERIES_AT32F425)
  29. #define Alarm_IRQn RTC_IRQn
  30. #define Alarm_IRQHandler RTC_IRQHandler
  31. #else
  32. #define Alarm_IRQn ERTCAlarm_IRQn
  33. #define Alarm_IRQHandler ERTCAlarm_IRQHandler
  34. #endif
  35. struct rtc_device_object
  36. {
  37. rt_rtc_dev_t rtc_dev;
  38. #ifdef RT_USING_ALARM
  39. struct rt_rtc_wkalarm wkalarm;
  40. #endif
  41. };
  42. static struct rtc_device_object rtc_device;
  43. static time_t get_rtc_timestamp(void)
  44. {
  45. #if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
  46. defined (SOC_SERIES_AT32F415) || defined (SOC_SERIES_AT32F421) || \
  47. defined (SOC_SERIES_AT32F425) || defined (SOC_SERIES_AT32F423) || \
  48. defined (SOC_SERIES_AT32F402) || defined (SOC_SERIES_AT32F405) || \
  49. defined (SOC_SERIES_AT32A423) || defined (SOC_SERIES_AT32M412) || \
  50. defined (SOC_SERIES_AT32M416) || defined (SOC_SERIES_AT32F455) || \
  51. defined (SOC_SERIES_AT32F456) || defined (SOC_SERIES_AT32F457)
  52. struct tm tm_new;
  53. ertc_time_type ertc_time_struct;
  54. ertc_calendar_get(&ertc_time_struct);
  55. tm_new.tm_sec = ertc_time_struct.sec;
  56. tm_new.tm_min = ertc_time_struct.min;
  57. tm_new.tm_hour = ertc_time_struct.hour;
  58. tm_new.tm_mday = ertc_time_struct.day;
  59. tm_new.tm_mon = ertc_time_struct.month - 1;
  60. tm_new.tm_year = ertc_time_struct.year + 100;
  61. LOG_D("get rtc time.");
  62. return timegm(&tm_new);
  63. #else
  64. return rtc_counter_get();
  65. #endif
  66. }
  67. static rt_err_t set_rtc_time_stamp(time_t time_stamp)
  68. {
  69. #if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
  70. defined (SOC_SERIES_AT32F415) || defined (SOC_SERIES_AT32F421) || \
  71. defined (SOC_SERIES_AT32F425) || defined (SOC_SERIES_AT32F423) || \
  72. defined (SOC_SERIES_AT32F402) || defined (SOC_SERIES_AT32F405) || \
  73. defined (SOC_SERIES_AT32A423) || defined (SOC_SERIES_AT32M412) || \
  74. defined (SOC_SERIES_AT32M416) || defined (SOC_SERIES_AT32F455) || \
  75. defined (SOC_SERIES_AT32F456) || defined (SOC_SERIES_AT32F457)
  76. struct tm now;
  77. gmtime_r(&time_stamp, &now);
  78. if (now.tm_year < 100)
  79. {
  80. return -RT_ERROR;
  81. }
  82. /* set time */
  83. if(ertc_time_set(now.tm_hour, now.tm_min, now.tm_sec, ERTC_AM) != SUCCESS)
  84. {
  85. return -RT_ERROR;
  86. }
  87. /* set date */
  88. if(ertc_date_set(now.tm_year - 100, now.tm_mon + 1, now.tm_mday, now.tm_wday + 1) != SUCCESS)
  89. {
  90. return -RT_ERROR;
  91. }
  92. LOG_D("set rtc time.");
  93. /* indicator for the ertc configuration */
  94. ertc_bpr_data_write(ERTC_DT1, BKUP_REG_DATA);
  95. #else
  96. /* set the rtc counter value */
  97. rtc_counter_set(time_stamp);
  98. /* wait until last write operation on rtc registers has finished */
  99. rtc_wait_config_finish();
  100. LOG_D("set rtc time.");
  101. bpr_data_write(BPR_DATA1, BKUP_REG_DATA);
  102. #endif
  103. return RT_EOK;
  104. }
  105. static rt_err_t rt_rtc_config(void)
  106. {
  107. /* allow access to pattery powered domain */
  108. pwc_battery_powered_domain_access(TRUE);
  109. #if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
  110. defined (SOC_SERIES_AT32F415) || defined (SOC_SERIES_AT32F421) || \
  111. defined (SOC_SERIES_AT32F425) || defined (SOC_SERIES_AT32F423) || \
  112. defined (SOC_SERIES_AT32F402) || defined (SOC_SERIES_AT32F405) || \
  113. defined (SOC_SERIES_AT32A423) || defined (SOC_SERIES_AT32M412) || \
  114. defined (SOC_SERIES_AT32M416) || defined (SOC_SERIES_AT32F455) || \
  115. defined (SOC_SERIES_AT32F456) || defined (SOC_SERIES_AT32F457)
  116. /* select rtc clock source */
  117. #ifdef BSP_RTC_USING_LICK
  118. crm_ertc_clock_select(CRM_ERTC_CLOCK_LICK);
  119. #else
  120. crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
  121. #endif /* BSP_RTC_USING_LICK */
  122. /* enable rtc */
  123. crm_ertc_clock_enable(TRUE);
  124. /* wait for ertc registers update */
  125. ertc_wait_update();
  126. if (ertc_bpr_data_read(ERTC_DT1)!= BKUP_REG_DATA)
  127. {
  128. LOG_I("RTC hasn't been configured, please use <date> command to config.");
  129. /* configure the ertc divider */
  130. ertc_divider_set(0x7F, 0xFF);
  131. /* configure the ertc hour mode */
  132. ertc_hour_mode_set(ERTC_HOUR_MODE_24);
  133. }
  134. #else
  135. #ifdef BSP_RTC_USING_LICK
  136. crm_rtc_clock_select(CRM_RTC_CLOCK_LICK);
  137. #else
  138. crm_rtc_clock_select(CRM_RTC_CLOCK_LEXT);
  139. #endif /* BSP_RTC_USING_LICK */
  140. /* enable rtc */
  141. crm_rtc_clock_enable(TRUE);
  142. /* wait for rtc registers update finish */
  143. rtc_wait_update_finish();
  144. /* wait until last write operation on rtc registers has finished */
  145. rtc_wait_config_finish();
  146. if (bpr_data_read(BPR_DATA1) != BKUP_REG_DATA)
  147. {
  148. LOG_I("RTC hasn't been configured, please use <date> command to config.");
  149. /* set rtc divider: set rtc period to 1sec */
  150. rtc_divider_set(32767);
  151. /* wait until last write operation on rtc registers has finished */
  152. rtc_wait_config_finish();
  153. }
  154. #endif
  155. return RT_EOK;
  156. }
  157. static rt_err_t _rtc_init(void)
  158. {
  159. crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
  160. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  161. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  162. crm_periph_clock_enable(CRM_BPR_PERIPH_CLOCK, TRUE);
  163. #endif
  164. #ifdef BSP_RTC_USING_LICK
  165. crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
  166. while(crm_flag_get(CRM_LICK_STABLE_FLAG) == RESET);
  167. #else
  168. pwc_battery_powered_domain_access(TRUE);
  169. crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
  170. while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET);
  171. #endif /* BSP_RTC_USING_LICK */
  172. if (rt_rtc_config() != RT_EOK)
  173. {
  174. LOG_E("rtc init failed.");
  175. return -RT_ERROR;
  176. }
  177. return RT_EOK;
  178. }
  179. static rt_err_t _rtc_get_secs(time_t *args)
  180. {
  181. *(rt_uint32_t *)args = get_rtc_timestamp();
  182. LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
  183. return RT_EOK;
  184. }
  185. static rt_err_t _rtc_set_secs(time_t *args)
  186. {
  187. rt_err_t result = RT_EOK;
  188. if (set_rtc_time_stamp(*(rt_uint32_t *)args))
  189. {
  190. result = -RT_ERROR;
  191. }
  192. LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
  193. return result;
  194. }
  195. #ifdef RT_USING_ALARM
  196. static rt_err_t rtc_alarm_time_set(struct rtc_device_object* p_dev)
  197. {
  198. exint_init_type exint_init_struct;
  199. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  200. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  201. struct tm tm_new;
  202. time_t sec_count;
  203. #endif
  204. /* config the exint line of the rtc alarm */
  205. exint_init_struct.line_select = EXINT_LINE_17;
  206. exint_init_struct.line_enable = TRUE;
  207. exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
  208. exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
  209. exint_init(&exint_init_struct);
  210. if (p_dev->wkalarm.enable)
  211. {
  212. nvic_irq_enable(Alarm_IRQn, 0, 0);
  213. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  214. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  215. /* clear alarm flag */
  216. rtc_flag_clear(RTC_TA_FLAG);
  217. /* wait for the register write to complete */
  218. rtc_wait_config_finish();
  219. /* enable alarm interrupt */
  220. rtc_interrupt_enable(RTC_TA_INT, TRUE);
  221. /* wait for the register write to complete */
  222. rtc_wait_config_finish();
  223. tm_new.tm_sec = p_dev->wkalarm.tm_sec;
  224. tm_new.tm_min = p_dev->wkalarm.tm_min;
  225. tm_new.tm_hour = p_dev->wkalarm.tm_hour;
  226. tm_new.tm_mday = p_dev->wkalarm.tm_mday;
  227. tm_new.tm_mon = p_dev->wkalarm.tm_mon;
  228. tm_new.tm_year = p_dev->wkalarm.tm_year;
  229. sec_count = timegm(&tm_new);
  230. rtc_alarm_set(sec_count);
  231. /* wait for the register write to complete */
  232. rtc_wait_config_finish();
  233. #else
  234. ertc_alarm_enable(ERTC_ALA, FALSE);
  235. ertc_flag_clear(ERTC_ALAF_FLAG);
  236. ertc_alarm_mask_set(ERTC_ALA, ERTC_ALARM_MASK_DATE_WEEK);
  237. ertc_alarm_week_date_select(ERTC_ALA, ERTC_SLECT_DATE);
  238. ertc_alarm_set(ERTC_ALA, p_dev->wkalarm.tm_mday, p_dev->wkalarm.tm_hour, \
  239. p_dev->wkalarm.tm_min, p_dev->wkalarm.tm_sec, ERTC_24H);
  240. ertc_interrupt_enable(ERTC_ALA_INT, TRUE);
  241. ertc_alarm_enable(ERTC_ALA, TRUE);
  242. ertc_flag_clear(ERTC_ALAF_FLAG);
  243. #endif
  244. }
  245. return RT_EOK;
  246. }
  247. void Alarm_IRQHandler(void)
  248. {
  249. rt_interrupt_enter();
  250. #if defined (SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407) || \
  251. defined (SOC_SERIES_AT32F413) || defined (SOC_SERIES_AT32A403A)
  252. if(rtc_flag_get(RTC_TA_FLAG) != RESET)
  253. {
  254. /* clear exint line flag */
  255. exint_flag_clear(EXINT_LINE_17);
  256. /* wait for the register write to complete */
  257. rtc_wait_config_finish();
  258. /* clear alarm flag */
  259. rtc_flag_clear(RTC_TA_FLAG);
  260. /* wait for the register write to complete */
  261. rtc_wait_config_finish();
  262. rt_alarm_update(&rtc_device.rtc_dev.parent, 1);
  263. }
  264. #else
  265. if(ertc_flag_get(ERTC_ALAF_FLAG) != RESET)
  266. {
  267. /* clear alarm flag */
  268. ertc_flag_clear(ERTC_ALAF_FLAG);
  269. /* clear exint flag */
  270. exint_flag_clear(EXINT_LINE_17);
  271. rt_alarm_update(&rtc_device.rtc_dev.parent, 1);
  272. }
  273. #endif
  274. rt_interrupt_leave();
  275. }
  276. #endif
  277. static rt_err_t _rtc_get_alarm(struct rt_rtc_wkalarm *alarm)
  278. {
  279. #ifdef RT_USING_ALARM
  280. *alarm = rtc_device.wkalarm;
  281. LOG_D("GET_ALARM %d:%d:%d",rtc_device.wkalarm.tm_hour,
  282. rtc_device.wkalarm.tm_min,rtc_device.wkalarm.tm_sec);
  283. return RT_EOK;
  284. #else
  285. return -RT_ERROR;
  286. #endif
  287. }
  288. static rt_err_t _rtc_set_alarm(struct rt_rtc_wkalarm *alarm)
  289. {
  290. #ifdef RT_USING_ALARM
  291. LOG_D("RT_DEVICE_CTRL_RTC_SET_ALARM");
  292. if (alarm != RT_NULL)
  293. {
  294. rtc_device.wkalarm.enable = alarm->enable;
  295. rtc_device.wkalarm.tm_year = alarm->tm_year;
  296. rtc_device.wkalarm.tm_mon = alarm->tm_mon;
  297. rtc_device.wkalarm.tm_mday = alarm->tm_mday;
  298. rtc_device.wkalarm.tm_hour = alarm->tm_hour;
  299. rtc_device.wkalarm.tm_min = alarm->tm_min;
  300. rtc_device.wkalarm.tm_sec = alarm->tm_sec;
  301. rtc_alarm_time_set(&rtc_device);
  302. }
  303. else
  304. {
  305. LOG_E("RT_DEVICE_CTRL_RTC_SET_ALARM error!!");
  306. return -RT_ERROR;
  307. }
  308. LOG_D("SET_ALARM %d:%d:%d",alarm->tm_hour,
  309. alarm->tm_min, alarm->tm_sec);
  310. return RT_EOK;
  311. #else
  312. return -RT_ERROR;
  313. #endif
  314. }
  315. static rt_err_t _rtc_get_timeval(struct timeval *tv)
  316. {
  317. tv->tv_sec = get_rtc_timestamp();
  318. return RT_EOK;
  319. }
  320. static const struct rt_rtc_ops _rtc_ops =
  321. {
  322. _rtc_init,
  323. _rtc_get_secs,
  324. _rtc_set_secs,
  325. _rtc_get_alarm,
  326. _rtc_set_alarm,
  327. _rtc_get_timeval,
  328. RT_NULL,
  329. };
  330. int rt_hw_rtc_init(void)
  331. {
  332. rt_err_t result;
  333. rtc_device.rtc_dev.ops = &_rtc_ops;
  334. result = rt_hw_rtc_register(&rtc_device.rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL);
  335. if (result != RT_EOK)
  336. {
  337. LOG_E("rtc register err code: %d", result);
  338. return result;
  339. }
  340. LOG_D("rtc init success");
  341. return RT_EOK;
  342. }
  343. INIT_DEVICE_EXPORT(rt_hw_rtc_init);
  344. #endif /* BSP_USING_RTC */