drv_adc.c 6.5 KB

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  1. /*
  2. * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. *
  18. * Change Logs:
  19. * Date Author Notes
  20. * 2019-04-03 wangyq the first version
  21. * 2019-11-01 wangyq update libraries
  22. * 2021-04-20 liuhy the second version
  23. */
  24. #include <rthw.h>
  25. #include <rtthread.h>
  26. #include <rtdevice.h>
  27. #include "board.h"
  28. #include "drv_adc.h"
  29. #ifdef RT_USING_ADC
  30. /* define adc instance */
  31. #ifdef BSP_USING_ADC0
  32. static struct rt_adc_device _device_adc0;
  33. #endif /*BSP_USING_ADC0*/
  34. #ifdef BSP_USING_ADC1
  35. static struct rt_adc_device _device_adc1;
  36. #endif /*BSP_USING_ADC1*/
  37. /* enable or disable adc */
  38. static rt_err_t es32f3_adc_enabled(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
  39. {
  40. ald_adc_handle_t *_hadc = (ald_adc_handle_t *)device->parent.user_data;
  41. RT_ASSERT(device != RT_NULL);
  42. if (enabled)
  43. {
  44. ALD_ADC_ENABLE(_hadc); ;
  45. }
  46. else
  47. {
  48. ALD_ADC_DISABLE(_hadc);
  49. }
  50. return RT_EOK;
  51. }
  52. static ald_adc_channel_t es32f3_adc_get_channel(rt_uint32_t channel)
  53. {
  54. ald_adc_channel_t es32f3_channel;
  55. ald_gpio_init_t gpio_initstruct;
  56. /* Initialize ADC pin */
  57. gpio_initstruct.mode = ALD_GPIO_MODE_CLOSE;
  58. gpio_initstruct.pupd = ALD_GPIO_FLOATING;
  59. gpio_initstruct.od = ALD_GPIO_PUSH_PULL;
  60. gpio_initstruct.odrv = ALD_GPIO_OUT_DRIVE_NORMAL;
  61. gpio_initstruct.flt = ALD_GPIO_FILTER_DISABLE;
  62. gpio_initstruct.type = ALD_GPIO_TYPE_CMOS;
  63. gpio_initstruct.func = ALD_GPIO_FUNC_0;
  64. /* select gpio pin as adc function */
  65. switch (channel)
  66. {
  67. case 0:
  68. es32f3_channel = ALD_ADC_CHANNEL_0;
  69. ald_gpio_init(ES_GPIO_ADC_CH0_GPIO, ES_GPIO_ADC_CH0_PIN, &gpio_initstruct);
  70. break;
  71. case 1:
  72. es32f3_channel = ALD_ADC_CHANNEL_1;
  73. ald_gpio_init(ES_GPIO_ADC_CH1_GPIO, ES_GPIO_ADC_CH1_PIN, &gpio_initstruct);
  74. break;
  75. case 2:
  76. es32f3_channel = ALD_ADC_CHANNEL_2;
  77. ald_gpio_init(ES_GPIO_ADC_CH2_GPIO, ES_GPIO_ADC_CH2_PIN, &gpio_initstruct);
  78. break;
  79. case 3:
  80. es32f3_channel = ALD_ADC_CHANNEL_3;
  81. ald_gpio_init(ES_GPIO_ADC_CH3_GPIO, ES_GPIO_ADC_CH3_PIN, &gpio_initstruct);
  82. break;
  83. case 4:
  84. es32f3_channel = ALD_ADC_CHANNEL_4;
  85. ald_gpio_init(ES_GPIO_ADC_CH4_GPIO, ES_GPIO_ADC_CH4_PIN, &gpio_initstruct);
  86. break;
  87. case 5:
  88. es32f3_channel = ALD_ADC_CHANNEL_5;
  89. ald_gpio_init(ES_GPIO_ADC_CH5_GPIO, ES_GPIO_ADC_CH5_PIN, &gpio_initstruct);
  90. break;
  91. case 6:
  92. es32f3_channel = ALD_ADC_CHANNEL_6;
  93. ald_gpio_init(ES_GPIO_ADC_CH6_GPIO, ES_GPIO_ADC_CH6_PIN, &gpio_initstruct);
  94. break;
  95. case 7:
  96. es32f3_channel = ALD_ADC_CHANNEL_7;
  97. ald_gpio_init(ES_GPIO_ADC_CH7_GPIO, ES_GPIO_ADC_CH7_PIN, &gpio_initstruct);
  98. break;
  99. case 8:
  100. es32f3_channel = ALD_ADC_CHANNEL_8;
  101. ald_gpio_init(ES_GPIO_ADC_CH8_GPIO, ES_GPIO_ADC_CH8_PIN, &gpio_initstruct);
  102. break;
  103. case 9:
  104. es32f3_channel = ALD_ADC_CHANNEL_9;
  105. ald_gpio_init(ES_GPIO_ADC_CH9_GPIO, ES_GPIO_ADC_CH9_PIN, &gpio_initstruct);
  106. break;
  107. case 10:
  108. es32f3_channel = ALD_ADC_CHANNEL_10;
  109. ald_gpio_init(ES_GPIO_ADC_CH10_GPIO, ES_GPIO_ADC_CH10_PIN, &gpio_initstruct);
  110. break;
  111. case 11:
  112. es32f3_channel = ALD_ADC_CHANNEL_11;
  113. ald_gpio_init(ES_GPIO_ADC_CH11_GPIO, ES_GPIO_ADC_CH11_PIN, &gpio_initstruct);
  114. break;
  115. case 12:
  116. es32f3_channel = ALD_ADC_CHANNEL_12;
  117. ald_gpio_init(ES_GPIO_ADC_CH12_GPIO, ES_GPIO_ADC_CH12_PIN, &gpio_initstruct);
  118. break;
  119. case 13:
  120. es32f3_channel = ALD_ADC_CHANNEL_13;
  121. ald_gpio_init(ES_GPIO_ADC_CH13_GPIO, ES_GPIO_ADC_CH13_PIN, &gpio_initstruct);
  122. break;
  123. case 14:
  124. es32f3_channel = ALD_ADC_CHANNEL_14;
  125. ald_gpio_init(ES_GPIO_ADC_CH14_GPIO, ES_GPIO_ADC_CH14_PIN, &gpio_initstruct);
  126. break;
  127. case 15:
  128. es32f3_channel = ALD_ADC_CHANNEL_15;
  129. ald_gpio_init(ES_GPIO_ADC_CH15_GPIO, ES_GPIO_ADC_CH15_PIN, &gpio_initstruct);
  130. break;
  131. default:
  132. break;
  133. }
  134. return es32f3_channel;
  135. }
  136. static rt_err_t es32f3_get_adc_value(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
  137. {
  138. ald_adc_handle_t *_hadc = (ald_adc_handle_t *)device->parent.user_data;
  139. ald_adc_nch_conf_t nm_config;
  140. RT_ASSERT(device != RT_NULL);
  141. RT_ASSERT(value != RT_NULL);
  142. /* config adc channel */
  143. nm_config.ch = es32f3_adc_get_channel(channel);
  144. nm_config.idx = ALD_ADC_NCH_IDX_1;
  145. nm_config.samp = ES_ADC0_NCH_SAMPLETIME;
  146. ald_adc_normal_channel_config(_hadc, &nm_config);
  147. ald_adc_normal_start(_hadc);
  148. if (ald_adc_normal_poll_for_conversion(_hadc, 5000) == ALD_OK)
  149. *value = ald_adc_normal_get_value(_hadc);
  150. return RT_EOK;
  151. }
  152. static const struct rt_adc_ops es32f3_adc_ops =
  153. {
  154. es32f3_adc_enabled,
  155. es32f3_get_adc_value,
  156. };
  157. int rt_hw_adc_init(void)
  158. {
  159. ald_adc_handle_t _h_adc;
  160. /* adc function initialization */
  161. _h_adc.init.scan = ENABLE;
  162. _h_adc.init.cont = DISABLE;
  163. _h_adc.init.disc = ALD_ADC_ALL_DISABLE;
  164. _h_adc.init.disc_nr = ALD_ADC_DISC_NR_1;
  165. _h_adc.init.data_bit = ALD_ADC_CONV_BIT_12;
  166. _h_adc.init.div = ALD_ADC_CKDIV_16;
  167. _h_adc.init.nch_nr = ALD_ADC_NCH_NR_1;
  168. _h_adc.init.nche_sel = ALD_ADC_NCHESEL_MODE_ALL;
  169. _h_adc.init.cont = DISABLE;
  170. _h_adc.init.n_ref = ALD_ADC_NEG_REF_VSS;
  171. _h_adc.init.p_ref = ALD_ADC_POS_REF_VDD;
  172. #ifdef BSP_USING_ADC0
  173. static ald_adc_handle_t _h_adc0;
  174. _h_adc0.init = _h_adc.init;
  175. _h_adc0.perh = ADC;
  176. _h_adc0.init.align = ES_ADC0_ALIGN;
  177. _h_adc0.init.data_bit = ES_ADC0_DATA_BIT;
  178. _h_adc0.init.div = ES_ADC0_CLK_DIV;
  179. ALD_ADC_ENABLE(&_h_adc0);
  180. ALD_ADC_DISABLE(&_h_adc0);
  181. ald_adc_init(&_h_adc0);
  182. rt_hw_adc_register(&_device_adc0, ES_DEVICE_NAME_ADC0, &es32f3_adc_ops, &_h_adc0);
  183. #endif /*BSP_USING_ADC0*/
  184. return RT_EOK;
  185. }
  186. INIT_BOARD_EXPORT(rt_hw_adc_init);
  187. #endif