drv_i2c.c 9.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347
  1. /*
  2. *
  3. * SPDX-License-Identifier: Apache-2.0
  4. *
  5. * Licensed under the Apache License, Version 2.0 (the License); you may
  6. * not use this file except in compliance with the License.
  7. * You may obtain a copy of the License at
  8. *
  9. * www.apache.org/licenses/LICENSE-2.0
  10. *
  11. * Unless required by applicable law or agreed to in writing, software
  12. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  13. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  14. * See the License for the specific language governing permissions and
  15. * limitations under the License.
  16. *
  17. * Change Logs:
  18. * Date Author Notes
  19. * 2019-11-01 wangyq update libraries
  20. * 2020-01-14 wangyq the first version
  21. * 2021-04-20 liuhy the second version
  22. */
  23. #include <rthw.h>
  24. #include <rtthread.h>
  25. #include <rtdevice.h>
  26. #include "board.h"
  27. #include "drv_i2c.h"
  28. #ifdef RT_USING_I2C
  29. #define TIMEOUT 0x0FFF
  30. /* I2C struct definition */
  31. #ifdef BSP_USING_I2C0
  32. static ald_i2c_handle_t _h_i2c0;
  33. #endif
  34. #ifdef BSP_USING_I2C1
  35. static i2c_handle_t _h_i2c1;
  36. #endif
  37. static void _i2c_init(void)
  38. {
  39. ald_gpio_init_t gpio_instruct;
  40. /* Initialize I2C Pin */
  41. gpio_instruct.mode = ALD_GPIO_MODE_OUTPUT;
  42. gpio_instruct.od = ALD_GPIO_OPEN_DRAIN;
  43. gpio_instruct.pupd = ALD_GPIO_PUSH_UP;
  44. gpio_instruct.odrv = ALD_GPIO_OUT_DRIVE_NORMAL;
  45. gpio_instruct.flt = ALD_GPIO_FILTER_DISABLE;
  46. gpio_instruct.type = ALD_GPIO_TYPE_CMOS;
  47. #ifdef BSP_USING_I2C0
  48. #if defined(ES_I2C0_SCL_GPIO_FUNC)&&defined(ES_I2C0_SCL_GPIO_PORT)&&defined(ES_I2C0_SCL_GPIO_PIN)
  49. gpio_instruct.func = ES_I2C0_SCL_GPIO_FUNC;
  50. ald_gpio_init(ES_I2C0_SCL_GPIO_PORT, ES_I2C0_SCL_GPIO_PIN, &gpio_instruct);
  51. #endif
  52. #if defined(ES_I2C0_SDA_GPIO_FUNC)&&defined(ES_I2C0_SDA_GPIO_PORT)&&defined(ES_I2C0_SDA_GPIO_PIN)
  53. gpio_instruct.func = ES_I2C0_SDA_GPIO_FUNC;
  54. ald_gpio_init(ES_I2C0_SDA_GPIO_PORT, ES_I2C0_SDA_GPIO_PIN, &gpio_instruct);
  55. #endif
  56. /* Initialize I2C Function */
  57. _h_i2c0.perh = I2C0;
  58. _h_i2c0.init.module = ALD_I2C_MODULE_MASTER;
  59. _h_i2c0.init.clk_speed = ES_I2C0_CLK_SPEED;
  60. _h_i2c0.init.own_addr1 = ES_I2C0_OWN_ADDR1;
  61. _h_i2c0.init.addr_mode = ES_I2C0_ADDR_MODE;
  62. _h_i2c0.init.general_call = ES_I2C0_GENERAL_CALL;
  63. _h_i2c0.init.no_stretch = ES_I2C0_STRETCH;
  64. ald_i2c_reset(&_h_i2c0);
  65. ald_i2c_init(&_h_i2c0);
  66. #endif
  67. #ifdef BSP_USING_I2C1
  68. #if defined(ES_I2C1_SCL_GPIO_FUNC)&&defined(ES_I2C1_SCL_GPIO_PORT)&&defined(ES_I2C1_SCL_GPIO_PIN)
  69. gpio_instruct.func = ES_I2C1_SCL_GPIO_FUNC;
  70. ald_gpio_init(ES_I2C1_SCL_GPIO_PORT, ES_I2C1_SCL_GPIO_PIN, &gpio_instruct);
  71. #endif
  72. #if defined(ES_I2C1_SDA_GPIO_FUNC)&&defined(ES_I2C1_SDA_GPIO_PORT)&&defined(ES_I2C1_SDA_GPIO_PIN)
  73. gpio_instruct.func = ES_I2C1_SDA_GPIO_FUNC;
  74. ald_gpio_init(ES_I2C1_SDA_GPIO_PORT, ES_I2C1_SDA_GPIO_PIN, &gpio_instruct);
  75. #endif
  76. /* Initialize i2c function */
  77. _h_i2c1.perh = I2C1;
  78. _h_i2c1.init.module = I2C_MODULE_MASTER;
  79. _h_i2c1.init.clk_speed = ES_I2C1_CLK_SPEED;
  80. _h_i2c1.init.own_addr1 = ES_I2C1_OWN_ADDR1;
  81. _h_i2c1.init.addr_mode = ES_I2C1_ADDR_MODE;
  82. _h_i2c1.init.general_call = ES_I2C1_GENERAL_CALL;
  83. _h_i2c1.init.no_stretch = ES_I2C1_STRETCH;
  84. ald_i2c_reset(&_h_i2c1);
  85. ald_i2c_init(&_h_i2c1);
  86. #endif
  87. }
  88. #define _I2C_NO_START 0x1
  89. #define _I2C_NO_STOP 0x2
  90. int _i2c_master_req(ald_i2c_handle_t *hperh, uint16_t dev_addr, uint32_t timeout,uint32_t req_write)
  91. {
  92. if (hperh->init.addr_mode == ALD_I2C_ADDR_7BIT) {
  93. CLEAR_BIT(hperh->perh->CON2, I2C_CON2_ADD10_MSK);
  94. }
  95. else {
  96. SET_BIT(hperh->perh->CON2, I2C_CON2_ADD10_MSK);
  97. }
  98. MODIFY_REG(hperh->perh->CON2, I2C_CON2_SADD_MSK, dev_addr << I2C_CON2_SADD_POSS);
  99. if (req_write)
  100. CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RD_WRN_MSK);
  101. else
  102. SET_BIT(hperh->perh->CON2, I2C_CON2_RD_WRN_MSK);
  103. return ALD_OK;
  104. }
  105. int _i2c_wait_flag(ald_i2c_handle_t *hperh, uint32_t flag, flag_status_t status, uint32_t timeout)
  106. {
  107. uint32_t tickstart = 0;
  108. tickstart = ald_get_tick();
  109. while (ALD_I2C_GET_FLAG(hperh, flag) == status) {
  110. if ((timeout == 0) || ((ald_get_tick() - tickstart ) > timeout)) {
  111. hperh->error_code |= ALD_I2C_ERROR_TIMEOUT;
  112. return TIMEOUT;
  113. }
  114. }
  115. return ALD_OK;
  116. }
  117. int _i2c_wait_txe(ald_i2c_handle_t *hperh, uint32_t timeout)
  118. {
  119. uint32_t tickstart = ald_get_tick();
  120. while (ALD_I2C_GET_FLAG(hperh, ALD_I2C_STAT_TXE) == RESET) {
  121. if (ALD_I2C_GET_IT_FLAG(hperh, ALD_I2C_IT_ARLO)) {
  122. hperh->error_code |= ALD_I2C_ERROR_ARLO;
  123. return ALD_ERROR;
  124. }
  125. if (ALD_I2C_GET_IT_FLAG(hperh, ALD_I2C_IT_NACK) == SET) {
  126. hperh->error_code |= ALD_I2C_ERROR_AF;
  127. return ALD_ERROR;
  128. }
  129. if ((timeout == 0) || ((ald_get_tick() - tickstart) > timeout)) {
  130. hperh->error_code |= ALD_I2C_ERROR_TIMEOUT;
  131. return ALD_ERROR;
  132. }
  133. }
  134. return ALD_OK;
  135. }
  136. int _i2c_master_send(ald_i2c_handle_t *hperh, uint16_t dev_addr, uint8_t *buf,
  137. uint32_t size, uint32_t timeout,uint32_t flag)
  138. {
  139. if (hperh->state != ALD_I2C_STATE_READY)
  140. return ALD_BUSY;
  141. if ((buf == NULL) || (size == 0))
  142. return ALD_ERROR;
  143. if ((flag&_I2C_NO_START)==0x0) //NOSTART==0
  144. {
  145. if (_i2c_wait_flag(hperh, ALD_I2C_STAT_BUSY, SET, 100) != ALD_OK)
  146. return ALD_BUSY;
  147. _i2c_master_req(hperh, dev_addr, timeout,1);
  148. }
  149. assert_param(IS_I2C_TYPE(hperh->perh));
  150. __LOCK(hperh);
  151. hperh->state = ALD_I2C_STATE_BUSY_TX;
  152. hperh->mode = ALD_I2C_MODE_MASTER;
  153. hperh->error_code = ALD_I2C_ERROR_NONE;
  154. hperh->p_buff = buf;
  155. hperh->xfer_size = size;
  156. hperh->xfer_count = 0;
  157. if ((flag&_I2C_NO_STOP)!=0) //NOSTOP==1
  158. SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
  159. else
  160. CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
  161. if (size <= 0xFF) {
  162. MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
  163. }
  164. else {
  165. MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
  166. SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
  167. }
  168. if ((flag&_I2C_NO_START)==0x0)
  169. SET_BIT(hperh->perh->CON2, I2C_CON2_START_MSK);
  170. while (size > 0) {
  171. hperh->perh->TXDATA = (*buf++);
  172. size--;
  173. hperh->xfer_count++;
  174. if (_i2c_wait_txe(hperh, timeout) != ALD_OK)
  175. goto ERROR;
  176. if (((hperh->xfer_count % 0xFF) == 0) && (READ_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK))) {
  177. if (_i2c_wait_flag(hperh, ALD_I2C_STAT_TCR, RESET, 10) == ALD_OK) {
  178. if (size > 0xFF) {
  179. MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
  180. }
  181. else {
  182. MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
  183. if ((flag&_I2C_NO_STOP)==0)
  184. CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
  185. }
  186. }
  187. else {
  188. goto ERROR;
  189. }
  190. }
  191. }
  192. if (READ_BIT(hperh->perh->CON2, I2C_CON2_AUTOEND_MSK) == SET)
  193. goto SUCCESS;
  194. if ((flag&_I2C_NO_STOP)!=0&&_i2c_wait_flag(hperh, ALD_I2C_STAT_TCR, RESET, 10) == ALD_OK)
  195. {
  196. goto SUCCESS;
  197. }
  198. if (_i2c_wait_flag(hperh, ALD_I2C_STAT_TC, RESET, 10) == ALD_OK) {
  199. if ((flag&_I2C_NO_STOP)==0x0)
  200. SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
  201. goto SUCCESS;
  202. }
  203. else {
  204. goto ERROR;
  205. }
  206. ERROR:
  207. SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
  208. hperh->state = ALD_I2C_STATE_READY;
  209. hperh->mode = ALD_I2C_MODE_NONE;
  210. __UNLOCK(hperh);
  211. return ALD_ERROR;
  212. SUCCESS:
  213. hperh->state = ALD_I2C_STATE_READY;
  214. hperh->mode = ALD_I2C_MODE_NONE;
  215. __UNLOCK(hperh);
  216. return ALD_OK;
  217. }
  218. static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
  219. struct rt_i2c_msg msgs[],
  220. rt_uint32_t num)
  221. {
  222. struct rt_i2c_msg *msg;
  223. rt_uint32_t i;
  224. rt_err_t ret = RT_ERROR;
  225. for (i = 0; i < num; i++)
  226. {
  227. msg = &msgs[i];
  228. if (msg->flags & RT_I2C_RD)
  229. {
  230. if (ald_i2c_master_recv(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
  231. {
  232. LOG_E("i2c bus write failed,i2c bus stop!\n");
  233. goto out;
  234. }
  235. }
  236. else
  237. {
  238. uint32_t f=((msg->flags&RT_I2C_NO_START)?0x1:0)|((msg->flags&RT_I2C_NO_STOP)?0x2:0);
  239. if (_i2c_master_send(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT,f) != 0)
  240. {
  241. LOG_E("i2c bus write failed,i2c bus stop!\n");
  242. goto out;
  243. }
  244. }
  245. }
  246. ret = i;
  247. out:
  248. //LOG_E("send stop condition\n");
  249. return ret;
  250. }
  251. const struct rt_i2c_bus_device_ops es32f3_i2c_ops =
  252. {
  253. es32f3_master_xfer,
  254. RT_NULL,
  255. RT_NULL,
  256. };
  257. int rt_hw_i2c_init(void)
  258. {
  259. int result = RT_EOK;
  260. _i2c_init();
  261. #ifdef BSP_USING_I2C0
  262. /* define i2c Instance */
  263. static struct rt_i2c_bus_device _i2c_device0;
  264. rt_memset((void *)&_i2c_device0, 0, sizeof(struct rt_i2c_bus_device));
  265. _i2c_device0.ops = &es32f3_i2c_ops;
  266. _i2c_device0.priv = &_h_i2c0;
  267. result = rt_i2c_bus_device_register(&_i2c_device0, ES_DEVICE_NAME_I2C0);
  268. if (result != RT_EOK)
  269. {
  270. return result;
  271. }
  272. #endif
  273. #ifdef BSP_USING_I2C1
  274. /* define i2c Instance */
  275. static struct rt_i2c_bus_device _i2c_device1;
  276. rt_memset((void *)&_i2c_device1, 0, sizeof(struct rt_i2c_bus_device));
  277. _i2c_device1.ops = &es32f3_i2c_ops;
  278. _i2c_device1.priv = &_h_i2c1;
  279. rt_i2c_bus_device_register(&_i2c_device1, ES_DEVICE_NAME_I2C1);
  280. if (result != RT_EOK)
  281. {
  282. return result;
  283. }
  284. #endif
  285. return RT_EOK;
  286. }
  287. INIT_DEVICE_EXPORT(rt_hw_i2c_init);
  288. #endif