drv_uart.c 21 KB

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  1. /*
  2. * Copyright (C) 2022 Shanghai Eastsoft Microelectronics Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. *
  18. * Change Logs:
  19. * Date Author Notes
  20. * 2023-02-11 liuhy the first version
  21. */
  22. #include "drv_uart.h"
  23. #ifdef RT_USING_SERIAL
  24. #define UART_DMA_BUF_SECTIONS 4
  25. /*
  26. * To use UART DMA,
  27. * 1. select 'DMA->DMA0'
  28. * 2. select 'UART->UARTx->DMATX(or DMARX)'
  29. * 3. add RT_DEVICE_FLAG_DMA_TX(or RT_DEVICE_FLAG_DMA_RX) flag when open serial device
  30. */
  31. #ifdef BSP_EUART0_TX_USING_DMA
  32. #define EUART0_DMATX_CHANNEL ES_EUART0_DMATX_CHANNEL
  33. #define EUART0_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
  34. #else
  35. #define EUART0_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
  36. #define EUART0_DMATX_FLAG 0
  37. #endif
  38. #ifdef BSP_EUART0_RX_USING_DMA
  39. #define EUART0_DMARX_CHANNEL ES_EUART0_DMARX_CHANNEL
  40. #define EUART0_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
  41. #else
  42. #define EUART0_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
  43. #define EUART0_DMARX_FLAG 0
  44. #endif
  45. #ifdef BSP_EUART1_TX_USING_DMA
  46. #define EUART1_DMATX_CHANNEL ES_EUART1_DMATX_CHANNEL
  47. #define EUART1_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
  48. #else
  49. #define EUART1_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
  50. #define EUART1_DMATX_FLAG 0
  51. #endif
  52. #ifdef BSP_EUART1_RX_USING_DMA
  53. #define EUART1_DMARX_CHANNEL ES_EUART1_DMARX_CHANNEL
  54. #define EUART1_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
  55. #else
  56. #define EUART1_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
  57. #define EUART1_DMARX_FLAG 0
  58. #endif
  59. #ifdef BSP_CUART0_TX_USING_DMA
  60. #define CUART0_DMATX_CHANNEL ES_CUART0_DMATX_CHANNEL
  61. #define CUART0_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
  62. #else
  63. #define CUART0_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
  64. #define CUART0_DMATX_FLAG 0
  65. #endif
  66. #ifdef BSP_CUART0_RX_USING_DMA
  67. #define CUART0_DMARX_CHANNEL ES_CUART0_DMARX_CHANNEL
  68. #define CUART0_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
  69. #else
  70. #define CUART0_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
  71. #define CUART0_DMARX_FLAG 0
  72. #endif
  73. #ifdef BSP_CUART1_TX_USING_DMA
  74. #define CUART1_DMATX_CHANNEL ES_CUART1_DMATX_CHANNEL
  75. #define CUART1_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
  76. #else
  77. #define CUART1_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
  78. #define CUART1_DMATX_FLAG 0
  79. #endif
  80. #ifdef BSP_CUART1_RX_USING_DMA
  81. #define CUART1_DMARX_CHANNEL ES_CUART1_DMARX_CHANNEL
  82. #define CUART1_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
  83. #else
  84. #define CUART1_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
  85. #define CUART1_DMARX_FLAG 0
  86. #endif
  87. #ifdef BSP_CUART2_TX_USING_DMA
  88. #define CUART2_DMATX_CHANNEL ES_CUART2_DMATX_CHANNEL
  89. #define CUART2_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
  90. #else
  91. #define CUART2_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
  92. #define CUART2_DMATX_FLAG 0
  93. #endif
  94. #ifdef BSP_CUART2_RX_USING_DMA
  95. #define CUART2_DMARX_CHANNEL ES_CUART2_DMARX_CHANNEL
  96. #define CUART2_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
  97. #else
  98. #define CUART2_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
  99. #define CUART2_DMARX_FLAG 0
  100. #endif
  101. #define UART_INVAILD_DMA_CHANNEL (ES_DMA_INVAILD_CHANNEL)
  102. /* es32 uart driver */
  103. struct es32_uart
  104. {
  105. ald_uart_handle_t huart;
  106. struct rt_serial_device *serial;
  107. IRQn_Type irq;
  108. #ifdef RT_SERIAL_USING_DMA
  109. uint16_t dma_tx_channel;
  110. uint16_t dma_rx_channel;
  111. uint32_t last_rx_count;
  112. uint32_t buf_select;
  113. #endif /* RT_SERIAL_USING_DMA */
  114. };
  115. #ifdef RT_SERIAL_USING_DMA
  116. static void _dma_recv_timeout(struct es32_uart *uart, uint32_t dma_end);
  117. #endif /* RT_SERIAL_USING_DMA */
  118. static void uart_int_handler(struct es32_uart*uart)
  119. {
  120. if ((ald_uart_get_mask_flag_status(&uart->huart, ALD_UART_IF_RFNEMPTY)) != RESET)
  121. {
  122. rt_hw_serial_isr(uart->serial, RT_SERIAL_EVENT_RX_IND);
  123. ald_uart_clear_flag_status(&uart->huart, ALD_UART_IF_RFNEMPTY);
  124. }
  125. #ifdef RT_SERIAL_USING_DMA
  126. if ((ald_uart_get_mask_flag_status(&uart->huart, ALD_UART_IF_RXTO)) != RESET)
  127. {
  128. ald_uart_clear_flag_status(&uart->huart, ALD_UART_IF_RXTO);
  129. _dma_recv_timeout(uart, 0);
  130. }
  131. if ((ald_uart_get_mask_flag_status(&uart->huart, ALD_UART_IF_TBC)) != RESET)
  132. {
  133. uint32_t cnt = 1000;
  134. ald_uart_clear_flag_status(&uart->huart, ALD_UART_IF_TBC);
  135. ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_TBC, DISABLE);
  136. CLEAR_BIT(uart->huart.state, ALD_UART_STATE_TX_MASK);
  137. while ((uart->huart.perh->STAT & ALD_UART_STATUS_TSBUSY) && (cnt--));
  138. ald_uart_clear_flag_status(&uart->huart, ALD_UART_IF_TBC);
  139. if (uart->huart.tx_cplt_cbk)
  140. uart->huart.tx_cplt_cbk(&uart->huart);
  141. }
  142. #endif /* RT_SERIAL_USING_DMA */
  143. }
  144. #ifdef BSP_USING_EUART0
  145. struct rt_serial_device serial0;
  146. /* EUART0 device driver structure */
  147. struct es32_uart uart0 =
  148. {
  149. {EUART0},
  150. &serial0,
  151. EUART0_IRQn,
  152. #ifdef RT_SERIAL_USING_DMA
  153. EUART0_DMATX_CHANNEL,
  154. EUART0_DMARX_CHANNEL
  155. #endif /* RT_SERIAL_USING_DMA */
  156. };
  157. void __attribute__((interrupt)) EUART0_Handler(void)
  158. {
  159. /* enter interrupt */
  160. rt_interrupt_enter();
  161. uart_int_handler(&uart0);
  162. /* leave interrupt */
  163. rt_interrupt_leave();
  164. }
  165. #endif /* BSP_USING_EUART0 */
  166. #ifdef BSP_USING_EUART1
  167. struct rt_serial_device serial1;
  168. /* EUART1 device driver structure */
  169. struct es32_uart uart1 =
  170. {
  171. {EUART1},
  172. &serial1,
  173. EUART1_IRQn,
  174. #ifdef RT_SERIAL_USING_DMA
  175. EUART1_DMATX_CHANNEL,
  176. EUART1_DMARX_CHANNEL
  177. #endif /* RT_SERIAL_USING_DMA */
  178. };
  179. void __attribute__((interrupt)) EUART1_Handler(void)
  180. {
  181. /* enter interrupt */
  182. rt_interrupt_enter();
  183. uart_int_handler(&uart1);
  184. /* leave interrupt */
  185. rt_interrupt_leave();
  186. }
  187. #endif /* BSP_USING_EUART1 */
  188. #ifdef BSP_USING_CUART0
  189. struct rt_serial_device serial2;
  190. /* CUART0 device driver structure */
  191. struct es32_uart uart2 =
  192. {
  193. {CUART0},
  194. &serial2,
  195. CUART0_IRQn,
  196. #ifdef RT_SERIAL_USING_DMA
  197. CUART0_DMATX_CHANNEL,
  198. CUART0_DMARX_CHANNEL
  199. #endif /* RT_SERIAL_USING_DMA */
  200. };
  201. void __attribute__((interrupt)) CUART0_Handler(void)
  202. {
  203. /* enter interrupt */
  204. rt_interrupt_enter();
  205. uart_int_handler(&uart2);
  206. /* leave interrupt */
  207. rt_interrupt_leave();
  208. }
  209. #endif /* BSP_USING_CUART0 */
  210. #ifdef BSP_USING_CUART1
  211. struct rt_serial_device serial3;
  212. /* CUART1 device driver structure */
  213. struct es32_uart uart3 =
  214. {
  215. {CUART1},
  216. &serial3,
  217. CUART1_IRQn,
  218. #ifdef RT_SERIAL_USING_DMA
  219. CUART1_DMATX_CHANNEL,
  220. CUART1_DMARX_CHANNEL
  221. #endif /* RT_SERIAL_USING_DMA */
  222. };
  223. void __attribute__((interrupt)) CUART1_Handler(void)
  224. {
  225. /* enter interrupt */
  226. rt_interrupt_enter();
  227. uart_int_handler(&uart3);
  228. /* leave interrupt */
  229. rt_interrupt_leave();
  230. }
  231. #endif /* BSP_USING_CUART1 */
  232. #ifdef BSP_USING_CUART2
  233. struct rt_serial_device serial4;
  234. /* CUART2 device driver structure */
  235. struct es32_uart uart4 =
  236. {
  237. {CUART2},
  238. &serial4,
  239. CUART2_IRQn,
  240. #ifdef RT_SERIAL_USING_DMA
  241. CUART2_DMATX_CHANNEL,
  242. CUART2_DMARX_CHANNEL
  243. #endif /* RT_SERIAL_USING_DMA */
  244. };
  245. void __attribute__((interrupt)) CUART2_Handler(void)
  246. {
  247. /* enter interrupt */
  248. rt_interrupt_enter();
  249. uart_int_handler(&uart4);
  250. /* leave interrupt */
  251. rt_interrupt_leave();
  252. }
  253. #endif /* BSP_USING_CUART2 */
  254. static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  255. {
  256. ald_gpio_init_t gpio_initstructure;
  257. struct es32_uart *uart;
  258. RT_ASSERT(serial != RT_NULL);
  259. RT_ASSERT(cfg != RT_NULL);
  260. uart = (struct es32_uart *)serial->parent.user_data;
  261. /* Initialize tx pin */
  262. gpio_initstructure.mode = ALD_GPIO_MODE_OUTPUT;
  263. gpio_initstructure.od = ALD_GPIO_PUSH_PULL;
  264. gpio_initstructure.pupd = ALD_GPIO_PUSH_UP;
  265. gpio_initstructure.odrv = ALD_GPIO_OUT_DRIVE_NORMAL;
  266. gpio_initstructure.flt = ALD_GPIO_FILTER_DISABLE;
  267. gpio_initstructure.type = ALD_GPIO_TYPE_CMOS;
  268. #ifdef BSP_USING_EUART0
  269. if (uart == (&uart0))
  270. {
  271. #if defined(ES_EUART0_TX_GPIO_FUNC)&&defined(ES_EUART0_TX_GPIO_PORT)&&defined(ES_EUART0_TX_GPIO_PIN)
  272. gpio_initstructure.func = ES_EUART0_TX_GPIO_FUNC;
  273. ald_gpio_init(ES_EUART0_TX_GPIO_PORT, ES_EUART0_TX_GPIO_PIN, &gpio_initstructure);
  274. #endif
  275. #if defined(ES_EUART0_RX_GPIO_FUNC)&&defined(ES_EUART0_RX_GPIO_PORT)&&defined(ES_EUART0_RX_GPIO_PIN)
  276. /* Initialize rx pin ,the same as txpin except mode */
  277. gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
  278. gpio_initstructure.func = ES_EUART0_RX_GPIO_FUNC;
  279. ald_gpio_init(ES_EUART0_RX_GPIO_PORT, ES_EUART0_RX_GPIO_PIN, &gpio_initstructure);
  280. #endif
  281. }
  282. #endif /* uart0 gpio init */
  283. #ifdef BSP_USING_EUART1
  284. if (uart == (&uart1))
  285. {
  286. #if defined(ES_EUART1_TX_GPIO_FUNC)&&defined(ES_EUART1_TX_GPIO_PORT)&&defined(ES_EUART1_TX_GPIO_PIN)
  287. gpio_initstructure.func = ES_EUART1_TX_GPIO_FUNC;
  288. ald_gpio_init(ES_EUART1_TX_GPIO_PORT, ES_EUART1_TX_GPIO_PIN, &gpio_initstructure);
  289. #endif
  290. #if defined(ES_EUART1_RX_GPIO_FUNC)&&defined(ES_EUART1_RX_GPIO_PORT)&&defined(ES_EUART1_RX_GPIO_PIN)
  291. /* Initialize rx pin ,the same as txpin except mode */
  292. gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
  293. gpio_initstructure.func = ES_EUART1_RX_GPIO_FUNC;
  294. ald_gpio_init(ES_EUART1_RX_GPIO_PORT, ES_EUART1_RX_GPIO_PIN, &gpio_initstructure);
  295. #endif
  296. }
  297. #endif /* uart1 gpio init */
  298. #ifdef BSP_USING_CUART0
  299. if (uart == (&uart2))
  300. {
  301. #if defined(ES_CUART0_TX_GPIO_FUNC)&&defined(ES_CUART0_TX_GPIO_PORT)&&defined(ES_CUART0_TX_GPIO_PIN)
  302. gpio_initstructure.func = ES_CUART0_TX_GPIO_FUNC;
  303. ald_gpio_init(ES_CUART0_TX_GPIO_PORT, ES_CUART0_TX_GPIO_PIN, &gpio_initstructure);
  304. #endif
  305. #if defined(ES_CUART0_RX_GPIO_FUNC)&&defined(ES_CUART0_RX_GPIO_PORT)&&defined(ES_CUART0_RX_GPIO_PIN)
  306. /* Initialize rx pin ,the same as txpin except mode */
  307. gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
  308. gpio_initstructure.func = ES_CUART0_RX_GPIO_FUNC;
  309. ald_gpio_init(ES_CUART0_RX_GPIO_PORT, ES_CUART0_RX_GPIO_PIN, &gpio_initstructure);
  310. #endif
  311. }
  312. #endif /* uart2 gpio init */
  313. #ifdef BSP_USING_CUART1
  314. if (uart == (&uart3))
  315. {
  316. #if defined(ES_CUART1_TX_GPIO_FUNC)&&defined(ES_CUART1_TX_GPIO_PORT)&&defined(ES_CUART1_TX_GPIO_PIN)
  317. gpio_initstructure.func = ES_CUART1_TX_GPIO_FUNC;
  318. ald_gpio_init(ES_CUART1_TX_GPIO_PORT, ES_CUART1_TX_GPIO_PIN, &gpio_initstructure);
  319. #endif
  320. #if defined(ES_CUART1_RX_GPIO_FUNC)&&defined(ES_CUART1_RX_GPIO_PORT)&&defined(ES_CUART1_RX_GPIO_PIN)
  321. /* Initialize rx pin ,the same as txpin except mode */
  322. gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
  323. gpio_initstructure.func = ES_CUART1_RX_GPIO_FUNC;
  324. ald_gpio_init(ES_CUART1_RX_GPIO_PORT, ES_CUART1_RX_GPIO_PIN, &gpio_initstructure);
  325. #endif
  326. }
  327. #endif /* uart3 gpio init */
  328. #ifdef BSP_USING_CUART2
  329. if (uart == (&uart4))
  330. {
  331. #if defined(ES_CUART2_TX_GPIO_FUNC)&&defined(ES_CUART2_TX_GPIO_PORT)&&defined(ES_CUART2_TX_GPIO_PIN)
  332. gpio_initstructure.func = ES_CUART2_TX_GPIO_FUNC;
  333. ald_gpio_init(ES_CUART2_TX_GPIO_PORT, ES_CUART2_TX_GPIO_PIN, &gpio_initstructure);
  334. #endif
  335. #if defined(ES_CUART2_RX_GPIO_FUNC)&&defined(ES_CUART2_RX_GPIO_PORT)&&defined(ES_CUART2_RX_GPIO_PIN)
  336. /* Initialize rx pin ,the same as txpin except mode */
  337. gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
  338. gpio_initstructure.func = ES_CUART2_RX_GPIO_FUNC;
  339. ald_gpio_init(ES_CUART2_RX_GPIO_PORT, ES_CUART2_RX_GPIO_PIN, &gpio_initstructure);
  340. #endif
  341. }
  342. #endif /* uart4 gpio init */
  343. uart->huart.init.mode = ALD_UART_MODE_UART;
  344. uart->huart.init.baud = cfg->baud_rate;
  345. uart->huart.init.word_length = (ald_uart_word_length_t)(8 - cfg->data_bits);
  346. uart->huart.init.parity = (ald_uart_parity_t)(cfg->parity == PARITY_EVEN ? ALD_UART_PARITY_EVEN : cfg->parity);
  347. uart->huart.init.fctl = ALD_UART_HW_FLOW_CTL_DISABLE;
  348. uart->huart.init.stop_bits = ALD_UART_STOP_BITS_1;
  349. ald_uart_init(&uart->huart);
  350. if (cfg->bit_order == BIT_ORDER_MSB)
  351. {
  352. ALD_UART_MSB_FIRST_ENABLE(&uart->huart);
  353. }
  354. else
  355. {
  356. ALD_UART_MSB_FIRST_DISABLE(&uart->huart);
  357. }
  358. if (cfg->invert == NRZ_INVERTED)
  359. {
  360. ALD_UART_DATA_INV_ENABLE(&uart->huart);
  361. }
  362. else
  363. {
  364. ALD_UART_DATA_INV_DISABLE(&uart->huart);
  365. }
  366. return RT_EOK;
  367. }
  368. #ifdef RT_SERIAL_USING_DMA
  369. static void _dma_recv_timeout(struct es32_uart *uart, uint32_t dma_end)
  370. {
  371. ald_dma_config_t *dma_cfg;
  372. uint32_t rx_count_total;
  373. uint32_t rx_count;
  374. uint16_t dma_remain_transfer_num;
  375. if (dma_end)
  376. {
  377. rx_count = dma_end - uart->last_rx_count;
  378. uart->last_rx_count = 0;
  379. }
  380. else
  381. {
  382. dma_cfg = &uart->huart.hdmarx.config;
  383. dma_remain_transfer_num = (uint16_t)((DMA->CHANNEL[dma_cfg->channel].NDT) >> 16);
  384. rx_count_total = (dma_cfg->size) - dma_remain_transfer_num;
  385. if (rx_count_total)
  386. rx_count = rx_count_total - uart->last_rx_count;
  387. else
  388. return;
  389. uart->last_rx_count = rx_count_total;
  390. }
  391. rt_hw_serial_isr(uart->serial, RT_SERIAL_EVENT_RX_DMADONE | (rx_count << 8));
  392. }
  393. /**
  394. * DMA TX complete callback
  395. */
  396. static void _uart_tx_dma_cplt(ald_uart_handle_t *arg)
  397. {
  398. struct es32_uart *uart;
  399. uart = rt_container_of(arg, struct es32_uart, huart);
  400. rt_hw_serial_isr(uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
  401. }
  402. /**
  403. * DMA RX complete callback
  404. */
  405. static void _uart_rx_dma_cplt(ald_uart_handle_t *arg)
  406. {
  407. struct es32_uart *uart;
  408. uart = rt_container_of(arg, struct es32_uart, huart);
  409. if (uart->buf_select == UART_DMA_BUF_SECTIONS - 1)
  410. {
  411. arg->hdmarx.config.dst = (uint8_t *)arg->hdmarx.config.dst - arg->hdmarx.config.size * (UART_DMA_BUF_SECTIONS - 1);
  412. uart->buf_select = 0;
  413. }
  414. else
  415. {
  416. arg->hdmarx.config.dst = (uint8_t *)arg->hdmarx.config.dst + arg->hdmarx.config.size;
  417. uart->buf_select += 1;
  418. }
  419. ald_dma_config_basic(&(arg->hdmarx));
  420. ald_uart_dma_req_config(arg, ALD_UART_DMA_REQ_RX, ENABLE);
  421. _dma_recv_timeout(uart, arg->hdmarx.config.size);
  422. }
  423. /**
  424. * Setup DMA
  425. */
  426. static rt_err_t es32f3x_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
  427. {
  428. struct es32_uart *uart;
  429. struct rt_serial_rx_fifo *rx_fifo;
  430. extern ald_dma_call_back_t dma_cbk[];
  431. RT_ASSERT(serial != RT_NULL);
  432. uart = (struct es32_uart *)serial->parent.user_data;
  433. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  434. if (serial->config.bufsz > 0xFFFF)
  435. return -RT_ERROR;
  436. if (RT_DEVICE_FLAG_DMA_RX == flag)
  437. {
  438. if (uart->dma_rx_channel >= UART_INVAILD_DMA_CHANNEL)
  439. return -ALD_ERROR;
  440. uart->huart.rx_cplt_cbk = _uart_rx_dma_cplt;
  441. //dma_cbk[uart->dma_rx_channel].cplt_tc_cbk = _uart_rx_dma_cplt;
  442. ALD_UART_SET_TIMEOUT_VALUE(&uart->huart, 0xFF);
  443. ALD_UART_RX_TIMEOUT_ENABLE(&uart->huart);
  444. ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_RFNEMPTY, DISABLE);
  445. ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_RXTO, ENABLE);
  446. uart->last_rx_count = 0;
  447. if (serial->config.bufsz > 0)
  448. {
  449. ald_uart_recv_by_dma(&uart->huart, rx_fifo->buffer, serial->config.bufsz / UART_DMA_BUF_SECTIONS, uart->dma_rx_channel);;
  450. }
  451. }
  452. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  453. {
  454. if (uart->dma_tx_channel >= UART_INVAILD_DMA_CHANNEL)
  455. return -ALD_ERROR;
  456. uart->huart.tx_cplt_cbk = _uart_tx_dma_cplt;
  457. dma_cbk[uart->dma_tx_channel].cplt_tc_cbk = _uart_tx_dma_cplt;
  458. }
  459. uart->huart.err_code = ALD_UART_ERROR_NONE;
  460. csi_vic_enable_sirq(uart->irq);
  461. return RT_EOK;
  462. }
  463. #endif /* RT_SERIAL_USING_DMA */
  464. static rt_err_t es32f3x_control(struct rt_serial_device *serial, int cmd, void *arg)
  465. {
  466. struct es32_uart *uart;
  467. #ifdef RT_SERIAL_USING_DMA
  468. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  469. #endif
  470. RT_ASSERT(serial != RT_NULL);
  471. uart = (struct es32_uart *)serial->parent.user_data;
  472. switch (cmd)
  473. {
  474. case RT_DEVICE_CTRL_CLR_INT:
  475. /* disable rx irq */
  476. csi_vic_disable_sirq(uart->irq);
  477. /* disable interrupt */
  478. ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_RFNEMPTY, DISABLE);
  479. #ifdef RT_SERIAL_USING_DMA
  480. /* disable DMA */
  481. if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
  482. {
  483. ald_uart_dma_req_config(&uart->huart, ALD_UART_DMA_REQ_RX, DISABLE);
  484. }
  485. else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX)
  486. {
  487. ald_uart_dma_req_config(&uart->huart, ALD_UART_DMA_REQ_TX, DISABLE);
  488. }
  489. #endif
  490. break;
  491. case RT_DEVICE_CTRL_SET_INT:
  492. /* enable rx irq */
  493. csi_vic_enable_sirq(uart->irq);
  494. /* enable interrupt */
  495. ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_RFNEMPTY, ENABLE);
  496. break;
  497. #ifdef RT_SERIAL_USING_DMA
  498. case RT_DEVICE_CTRL_CONFIG:
  499. /* Setup DMA */
  500. es32f3x_dma_config(serial, ctrl_arg);
  501. break;
  502. #endif
  503. case RT_DEVICE_CTRL_CLOSE:
  504. while (ald_uart_get_status(&uart->huart, (ALD_UART_STATUS_TSBUSY)));
  505. #ifdef RT_SERIAL_USING_DMA
  506. uart->huart.rx_cplt_cbk = NULL;
  507. uart->huart.tx_cplt_cbk = NULL;
  508. /* disable DMA */
  509. ald_uart_dma_stop(&uart->huart);
  510. #endif
  511. ald_uart_reset(&uart->huart);
  512. break;
  513. }
  514. return RT_EOK;
  515. }
  516. static int es32f3x_putc(struct rt_serial_device *serial, char c)
  517. {
  518. struct es32_uart *uart;
  519. RT_ASSERT(serial != RT_NULL);
  520. uart = (struct es32_uart *)serial->parent.user_data;
  521. while (ald_uart_get_status(&uart->huart, ALD_UART_STATUS_TFEMPTY) == RESET)
  522. ;
  523. WRITE_REG(uart->huart.perh->TXBUF, c);
  524. return 1;
  525. }
  526. static int es32f3x_getc(struct rt_serial_device *serial)
  527. {
  528. int ch = -1;
  529. struct es32_uart *uart;
  530. RT_ASSERT(serial != RT_NULL);
  531. uart = (struct es32_uart *)serial->parent.user_data;
  532. if (ald_uart_get_status(&uart->huart, ALD_UART_STATUS_RFNEMPTY))
  533. {
  534. ch = (uint8_t)(uart->huart.perh->RXBUF & 0xFF);
  535. }
  536. return ch;
  537. }
  538. #ifdef RT_SERIAL_USING_DMA
  539. /**
  540. * DMA transmit
  541. */
  542. static rt_ssize_t es32f3x_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  543. {
  544. struct es32_uart *uart;
  545. RT_ASSERT(serial != RT_NULL);
  546. uart = (struct es32_uart *)serial->parent.user_data;
  547. if (direction == RT_SERIAL_DMA_TX)
  548. {
  549. if (uart->dma_tx_channel >= UART_INVAILD_DMA_CHANNEL)
  550. return 0;
  551. if (ALD_OK == ald_uart_send_by_dma(&uart->huart, buf, size, uart->dma_tx_channel))
  552. {
  553. return size;
  554. }
  555. else
  556. {
  557. return 0;
  558. }
  559. }
  560. else if (direction == RT_SERIAL_DMA_RX)
  561. {
  562. if (uart->dma_rx_channel >= UART_INVAILD_DMA_CHANNEL)
  563. return 0;
  564. if (ALD_OK == ald_uart_recv_by_dma(&uart->huart, buf, size, uart->dma_rx_channel))
  565. {
  566. return size;
  567. }
  568. else
  569. {
  570. return 0;
  571. }
  572. }
  573. return 0;
  574. }
  575. #endif
  576. static const struct rt_uart_ops es32f3x_uart_ops =
  577. {
  578. es32f3x_configure,
  579. es32f3x_control,
  580. es32f3x_putc,
  581. es32f3x_getc,
  582. #ifdef RT_SERIAL_USING_DMA
  583. es32f3x_dma_transmit
  584. #else
  585. NULL
  586. #endif
  587. };
  588. int rt_hw_uart_init(void)
  589. {
  590. struct es32_uart *uart;
  591. #ifdef BSP_USING_EUART0
  592. uart = &uart0;
  593. serial0.ops = &es32f3x_uart_ops;
  594. serial0.config = (struct serial_configure)ES_EUART0_CONFIG;
  595. /* register EUART0 device */
  596. rt_hw_serial_register(&serial0, ES_DEVICE_NAME_EUART0,
  597. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
  598. EUART0_DMATX_FLAG | EUART0_DMARX_FLAG,
  599. uart);
  600. #endif /* BSP_USING_EUART0 */
  601. #ifdef BSP_USING_EUART1
  602. uart = &uart1;
  603. serial1.ops = &es32f3x_uart_ops;
  604. serial1.config = (struct serial_configure)ES_EUART1_CONFIG;
  605. /* register EUART1 device */
  606. rt_hw_serial_register(&serial1, ES_DEVICE_NAME_EUART1,
  607. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
  608. EUART1_DMATX_FLAG | EUART1_DMARX_FLAG,
  609. uart);
  610. #endif /* BSP_USING_EUART1 */
  611. #ifdef BSP_USING_CUART0
  612. uart = &uart2;
  613. serial2.ops = &es32f3x_uart_ops;
  614. serial2.config = (struct serial_configure)ES_CUART0_CONFIG;
  615. /* register CUART0 device */
  616. rt_hw_serial_register(&serial2, ES_DEVICE_NAME_CUART0,
  617. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
  618. CUART0_DMATX_FLAG | CUART0_DMARX_FLAG,
  619. uart);
  620. #endif /* BSP_USING_CUART0 */
  621. #ifdef BSP_USING_CUART1
  622. uart = &uart3;
  623. serial3.ops = &es32f3x_uart_ops;
  624. serial3.config = (struct serial_configure)ES_CUART1_CONFIG;
  625. /* register CUART1 device */
  626. rt_hw_serial_register(&serial3, ES_DEVICE_NAME_CUART1,
  627. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
  628. CUART1_DMATX_FLAG | CUART1_DMARX_FLAG,
  629. uart);
  630. #endif /* BSP_USING_CUART1 */
  631. #ifdef BSP_USING_CUART2
  632. uart = &uart4;
  633. serial4.ops = &es32f3x_uart_ops;
  634. serial4.config = (struct serial_configure)ES_CUART2_CONFIG;
  635. /* register CUART2 device */
  636. rt_hw_serial_register(&serial4, ES_DEVICE_NAME_CUART2,
  637. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
  638. CUART2_DMATX_FLAG | CUART2_DMARX_FLAG,
  639. uart);
  640. #endif /* BSP_USING_CUART2 */
  641. return 0;
  642. }
  643. INIT_BOARD_EXPORT(rt_hw_uart_init);
  644. #endif