drv_rtc.c 11 KB

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  1. /*
  2. * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-04-28 CDT first version
  9. * 2022-05-31 CDT delete this file
  10. * 2022-06-10 xiaoxiaolisunny re-add this file for F460
  11. * 2023-02-14 CDT add alarm(precision is 1 minute)
  12. * 2024-06-07 CDT Add support for F448/F472
  13. */
  14. #include <board.h>
  15. #include <sys/time.h>
  16. #include "board_config.h"
  17. #if defined(BSP_USING_RTC)
  18. //#define DRV_DEBUG
  19. #define LOG_TAG "drv.rtc"
  20. #include <drv_log.h>
  21. #if defined(HC32F4A0) || defined(HC32F4A8)
  22. /* BACKUP REG: 96~127 for RTC used */
  23. #define RTC_BACKUP_DATA_SIZE (32U)
  24. #define RTC_BACKUP_REG_OFFSET (128U - RTC_BACKUP_DATA_SIZE)
  25. static const uint8_t m_au8BackupWriteData[RTC_BACKUP_DATA_SIZE] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
  26. 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
  27. 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,
  28. 31
  29. };
  30. static uint8_t m_au8BackupReadData[RTC_BACKUP_DATA_SIZE];
  31. #endif
  32. static rt_rtc_dev_t rtc_dev;
  33. #ifdef RT_USING_ALARM
  34. struct stc_hc32_alarm_irq
  35. {
  36. struct hc32_irq_config irq_config;
  37. func_ptr_t irq_callback;
  38. };
  39. static void _rtc_alarm_irq_handler(void);
  40. #define RTC_ALARM_IRQ_CONFIG \
  41. { \
  42. .irq_num = BSP_RTC_ALARM_IRQ_NUM, \
  43. .irq_prio = BSP_RTC_ALARM_IRQ_PRIO, \
  44. .int_src = INT_SRC_RTC_ALM, \
  45. }
  46. static struct stc_hc32_alarm_irq hc32_alarm_irq =
  47. {
  48. .irq_config = RTC_ALARM_IRQ_CONFIG,
  49. .irq_callback = _rtc_alarm_irq_handler,
  50. };
  51. #endif
  52. #if defined(HC32F4A0) || defined(HC32F4A8)
  53. static void _bakup_reg_write(void)
  54. {
  55. uint8_t u8Num;
  56. for (u8Num = 0U; u8Num < RTC_BACKUP_DATA_SIZE; u8Num++)
  57. {
  58. PWC_BKR_Write(u8Num + RTC_BACKUP_REG_OFFSET, m_au8BackupWriteData[u8Num]);
  59. }
  60. }
  61. static int32_t _bakup_reg_check(void)
  62. {
  63. uint8_t u8Num;
  64. int32_t i32Ret = LL_OK;
  65. for (u8Num = 0U; u8Num < RTC_BACKUP_DATA_SIZE; u8Num++)
  66. {
  67. m_au8BackupReadData[u8Num] = PWC_BKR_Read(u8Num + RTC_BACKUP_REG_OFFSET);
  68. }
  69. for (u8Num = 0U; u8Num < RTC_BACKUP_DATA_SIZE; u8Num++)
  70. {
  71. if (m_au8BackupWriteData[u8Num] != m_au8BackupReadData[u8Num])
  72. {
  73. i32Ret = LL_ERR;
  74. break;
  75. }
  76. }
  77. return i32Ret;
  78. }
  79. static int32_t _hc32_rtc_rw_check(void)
  80. {
  81. int32_t i32Ret = LL_ERR;
  82. /* Enter read/write mode */
  83. if (LL_OK == RTC_EnterRwMode())
  84. {
  85. /* Exit read/write mode */
  86. if (LL_OK == RTC_ExitRwMode())
  87. {
  88. i32Ret = LL_OK;
  89. }
  90. }
  91. return i32Ret;
  92. }
  93. #endif
  94. static rt_err_t _rtc_get_timeval(struct timeval *tv)
  95. {
  96. stc_rtc_time_t stcRtcTime = {0};
  97. stc_rtc_date_t stcRtcDate = {0};
  98. struct tm tm_new = {0};
  99. if (LL_OK != RTC_GetTime(RTC_DATA_FMT_DEC, &stcRtcTime))
  100. {
  101. return -RT_ERROR;
  102. }
  103. if (LL_OK != RTC_GetDate(RTC_DATA_FMT_DEC, &stcRtcDate))
  104. {
  105. return -RT_ERROR;
  106. }
  107. tm_new.tm_sec = stcRtcTime.u8Second;
  108. tm_new.tm_min = stcRtcTime.u8Minute;
  109. tm_new.tm_hour = stcRtcTime.u8Hour;
  110. tm_new.tm_mday = stcRtcDate.u8Day;
  111. tm_new.tm_mon = stcRtcDate.u8Month - 1;
  112. tm_new.tm_year = stcRtcDate.u8Year + 100;
  113. tv->tv_sec = timegm(&tm_new);
  114. return RT_EOK;
  115. }
  116. static rt_err_t hc32_rtc_set_time_stamp(time_t time_stamp)
  117. {
  118. stc_rtc_time_t stcRtcTime = {0};
  119. stc_rtc_date_t stcRtcDate = {0};
  120. struct tm tm_set = {0};
  121. gmtime_r(&time_stamp, &tm_set);
  122. if (tm_set.tm_year < 100)
  123. {
  124. return -RT_ERROR;
  125. }
  126. stcRtcTime.u8Second = tm_set.tm_sec ;
  127. stcRtcTime.u8Minute = tm_set.tm_min ;
  128. stcRtcTime.u8Hour = tm_set.tm_hour;
  129. stcRtcDate.u8Day = tm_set.tm_mday;
  130. stcRtcDate.u8Month = tm_set.tm_mon + 1;
  131. stcRtcDate.u8Year = tm_set.tm_year - 100;
  132. stcRtcDate.u8Weekday = tm_set.tm_wday;
  133. if (LL_OK != RTC_SetTime(RTC_DATA_FMT_DEC, &stcRtcTime))
  134. {
  135. return -RT_ERROR;
  136. }
  137. if (LL_OK != RTC_SetDate(RTC_DATA_FMT_DEC, &stcRtcDate))
  138. {
  139. return -RT_ERROR;
  140. }
  141. LOG_D("set rtc time.");
  142. return RT_EOK;
  143. }
  144. #if defined(HC32F4A0) || defined(HC32F460)
  145. #if defined(BSP_RTC_USING_XTAL32)
  146. #define RTC_CLK_SRC_SEL (RTC_CLK_SRC_XTAL32)
  147. #else
  148. #define RTC_CLK_SRC_SEL (RTC_CLK_SRC_LRC)
  149. #endif
  150. #elif defined(HC32F448) || defined(HC32F4A8)
  151. #if defined(BSP_RTC_USING_XTAL32)
  152. #define RTC_CLK_SRC_SEL (RTC_CLK_SRC_XTAL32)
  153. #elif defined(BSP_RTC_USING_XTAL_DIV)
  154. #define RTC_CLK_SRC_SEL (RTC_CLK_SRC_XTAL_DIV)
  155. #else
  156. #define RTC_CLK_SRC_SEL (RTC_CLK_SRC_LRC)
  157. #endif
  158. #elif defined(HC32F472) || defined (HC32F334)
  159. #if defined(BSP_RTC_USING_XTAL32)
  160. #define RTC_CLK_SRC_SEL (RTC_CLK_SRC_XTAL32)
  161. #elif defined(BSP_RTC_USING_XTAL_DIV)
  162. #define RTC_CLK_SRC_SEL (RTC_CLK_SRC_XTAL_DIV)
  163. #elif defined(BSP_RTC_USING_EXTCLK)
  164. #define RTC_CLK_SRC_SEL (RTC_CLK_SRC_EXTCLK)
  165. #else
  166. #define RTC_CLK_SRC_SEL (RTC_CLK_SRC_LRC)
  167. #endif
  168. #endif
  169. #if defined(HC32F4A8)
  170. static en_flag_status_t VBAT_PowerDownCheck(void)
  171. {
  172. en_flag_status_t ret;
  173. ret = PWC_VBAT_GetStatus(PWC_FLAG_VBAT_POR);
  174. if (SET == ret)
  175. {
  176. PWC_VBAT_ClearStatus(PWC_FLAG_VBAT_POR);
  177. }
  178. return ret;
  179. }
  180. #endif
  181. static rt_err_t _rtc_init(void)
  182. {
  183. stc_rtc_init_t stcRtcInit;
  184. #if defined(HC32F4A8)
  185. if ((SET == VBAT_PowerDownCheck()) || (LL_OK != _bakup_reg_check()) || (LL_OK != _hc32_rtc_rw_check()))
  186. #elif defined(HC32F4A0)
  187. if ((LL_OK != _bakup_reg_check()) || (LL_OK != _hc32_rtc_rw_check()))
  188. #elif defined(HC32F460) || defined(HC32F448) || defined(HC32F472) || defined (HC32F334)
  189. if (DISABLE == RTC_GetCounterState())
  190. #endif
  191. {
  192. /* Reset RTC counter */
  193. if (LL_ERR_TIMEOUT == RTC_DeInit())
  194. {
  195. LOG_E("Reset RTC failed!");
  196. return -RT_ERROR;
  197. }
  198. else
  199. {
  200. /* Stop RTC */
  201. RTC_Cmd(DISABLE);
  202. /* Configure structure initialization */
  203. (void)RTC_StructInit(&stcRtcInit);
  204. /* Configuration RTC structure */
  205. stcRtcInit.u8ClockSrc = RTC_CLK_SRC_SEL;
  206. stcRtcInit.u8HourFormat = RTC_HOUR_FMT_24H;
  207. (void)RTC_Init(&stcRtcInit);
  208. /* Clear all status */
  209. RTC_ClearStatus(RTC_FLAG_CLR_ALL);
  210. /* Startup RTC count */
  211. RTC_Cmd(ENABLE);
  212. #if defined(HC32F4A0) || defined(HC32F4A8)
  213. /* Write sequence flag to backup register */
  214. _bakup_reg_write();
  215. #endif
  216. LOG_D("rtc init success");
  217. }
  218. }
  219. else
  220. {
  221. LOG_D("rtc does not need to init");
  222. }
  223. return RT_EOK;
  224. }
  225. static rt_err_t _rtc_get_secs(time_t *sec)
  226. {
  227. struct timeval tv;
  228. _rtc_get_timeval(&tv);
  229. *(time_t *) sec = tv.tv_sec;
  230. LOG_D("RTC: get rtc_time %d", *sec);
  231. return RT_EOK;
  232. }
  233. static rt_err_t _rtc_set_secs(time_t *sec)
  234. {
  235. rt_err_t result = RT_EOK;
  236. if (hc32_rtc_set_time_stamp(*sec))
  237. {
  238. result = -RT_ERROR;
  239. }
  240. LOG_D("RTC: set rtc_time %d", *sec);
  241. #ifdef RT_USING_ALARM
  242. rt_alarm_update(&rtc_dev.parent, 1);
  243. #endif
  244. return result;
  245. }
  246. #ifdef RT_USING_ALARM
  247. static void _rtc_alarm_irq_handler(void)
  248. {
  249. rt_interrupt_enter();
  250. RTC_ClearStatus(RTC_FLAG_ALARM);
  251. rt_alarm_update(&rtc_dev.parent, 1);
  252. rt_interrupt_leave();
  253. }
  254. #if defined(HC32F448) || defined(HC32F472) || defined (HC32F334)
  255. void RTC_Handler(void)
  256. {
  257. if (RTC_GetStatus(RTC_FLAG_ALARM) != RESET)
  258. {
  259. _rtc_alarm_irq_handler();
  260. }
  261. }
  262. #endif
  263. static void hc32_rtc_alarm_enable(void)
  264. {
  265. NVIC_EnableIRQ(hc32_alarm_irq.irq_config.irq_num);
  266. RTC_IntCmd(RTC_INT_ALARM, ENABLE);
  267. RTC_AlarmCmd(ENABLE);
  268. LOG_D("hc32 alarm enable");
  269. }
  270. static void hc32_rtc_alarm_disable(void)
  271. {
  272. RTC_AlarmCmd(DISABLE);
  273. RTC_IntCmd(RTC_INT_ALARM, DISABLE);
  274. NVIC_DisableIRQ(hc32_alarm_irq.irq_config.irq_num);
  275. LOG_D("hc32 alarm disable");
  276. }
  277. #endif
  278. static rt_err_t _rtc_get_alarm(struct rt_rtc_wkalarm *alarm)
  279. {
  280. #ifdef RT_USING_ALARM
  281. stc_rtc_alarm_t stcRtcAlarm;
  282. RTC_GetAlarm(RTC_DATA_FMT_DEC, &stcRtcAlarm);
  283. alarm->tm_hour = stcRtcAlarm.u8AlarmHour;
  284. alarm->tm_min = stcRtcAlarm.u8AlarmMinute;
  285. alarm->tm_sec = 0; /* alarms precision is 1 minute */
  286. LOG_D("GET_ALARM %d:%d:%d", alarm->tm_hour, alarm->tm_min, alarm->tm_sec);
  287. return RT_EOK;
  288. #else
  289. return -RT_ERROR;
  290. #endif
  291. }
  292. static rt_err_t _rtc_set_alarm(struct rt_rtc_wkalarm *alarm)
  293. {
  294. #ifdef RT_USING_ALARM
  295. stc_rtc_alarm_t stcRtcAlarm;
  296. LOG_D("RT_DEVICE_CTRL_RTC_SET_ALARM");
  297. if (alarm != RT_NULL)
  298. {
  299. if (alarm->enable)
  300. {
  301. RTC_AlarmCmd(DISABLE);
  302. /* Configuration alarm time: precision is 1 minute */
  303. stcRtcAlarm.u8AlarmHour = alarm->tm_hour;
  304. stcRtcAlarm.u8AlarmMinute = alarm->tm_min;
  305. stcRtcAlarm.u8AlarmWeekday = RTC_ALARM_WEEKDAY_EVERYDAY;
  306. stcRtcAlarm.u8AlarmAmPm = RTC_HOUR_24H;
  307. RTC_ClearStatus(RTC_FLAG_ALARM);
  308. (void)RTC_SetAlarm(RTC_DATA_FMT_DEC, &stcRtcAlarm);
  309. hc32_rtc_alarm_enable();
  310. LOG_D("SET_ALARM %d:%d:%d", alarm->tm_hour,
  311. alarm->tm_min, 0);
  312. }
  313. else
  314. {
  315. hc32_rtc_alarm_disable();
  316. }
  317. }
  318. else
  319. {
  320. LOG_E("RT_DEVICE_CTRL_RTC_SET_ALARM error!!");
  321. return -RT_ERROR;
  322. }
  323. return RT_EOK;
  324. #else
  325. return -RT_ERROR;
  326. #endif
  327. }
  328. const static struct rt_rtc_ops _ops =
  329. {
  330. _rtc_init,
  331. _rtc_get_secs,
  332. _rtc_set_secs,
  333. _rtc_get_alarm,
  334. _rtc_set_alarm,
  335. _rtc_get_timeval,
  336. RT_NULL
  337. };
  338. int rt_hw_rtc_init(void)
  339. {
  340. rt_err_t result;
  341. #ifdef RT_USING_ALARM
  342. /* register interrupt */
  343. hc32_install_irq_handler(&hc32_alarm_irq.irq_config, hc32_alarm_irq.irq_callback, RT_FALSE);
  344. #endif
  345. rtc_dev.ops = &_ops;
  346. result = rt_hw_rtc_register(&rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL);
  347. if (result != RT_EOK)
  348. {
  349. LOG_E("rtc register err code: %d", result);
  350. return result;
  351. }
  352. LOG_D("rtc register done");
  353. return RT_EOK;
  354. }
  355. INIT_DEVICE_EXPORT(rt_hw_rtc_init);
  356. #endif /* BSP_USING_RTC */