drv_gpio.c 15 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-08-15 Jonas first version
  9. */
  10. #include <board.h>
  11. #include "drv_gpio.h"
  12. #ifdef RT_USING_PIN
  13. #define PIN_NUM(port, no) (((((port) & 0xFu) << 4) | ((no) & 0xFu)))
  14. #define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu))
  15. #define PIN_NO(pin) ((uint8_t)((pin) & 0xFu))
  16. #define PIN_HKPORTSOURCE(pin) ((uint8_t)(((pin) & 0xF0u) >> 4))
  17. #define PIN_HKPINSOURCE(pin) ((uint8_t)((pin) & 0xFu))
  18. #define PIN_HKPORT(pin) ((GPIO_TypeDef *)(GPIOA_BASE + (0x400u * PIN_PORT(pin))))
  19. #define PIN_HKPIN(pin) ((uint16_t)(1u << PIN_NO(pin)))
  20. #if defined(GPIOZ)
  21. #define __HK32_PORT_MAX 12u
  22. #elif defined(GPIOK)
  23. #define __HK32_PORT_MAX 11u
  24. #elif defined(GPIOJ)
  25. #define __HK32_PORT_MAX 10u
  26. #elif defined(GPIOI)
  27. #define __HK32_PORT_MAX 9u
  28. #elif defined(GPIOH)
  29. #define __HK32_PORT_MAX 8u
  30. #elif defined(GPIOG)
  31. #define __HK32_PORT_MAX 7u
  32. #elif defined(GPIOF)
  33. #define __HK32_PORT_MAX 6u
  34. #elif defined(GPIOE)
  35. #define __HK32_PORT_MAX 5u
  36. #elif defined(GPIOD)
  37. #define __HK32_PORT_MAX 4u
  38. #elif defined(GPIOC)
  39. #define __HK32_PORT_MAX 3u
  40. #elif defined(GPIOB)
  41. #define __HK32_PORT_MAX 2u
  42. #elif defined(GPIOA)
  43. #define __HK32_PORT_MAX 1u
  44. #else
  45. #define __HK32_PORT_MAX 0u
  46. #error Unsupported HK32 GPIO peripheral.
  47. #endif
  48. #define PIN_HKPORT_MAX __HK32_PORT_MAX
  49. static const struct pin_irq_map pin_irq_map[] =
  50. {
  51. {GPIO_Pin_0, EXTI_Line0, EXTI0_1_IRQn},
  52. {GPIO_Pin_1, EXTI_Line1, EXTI0_1_IRQn},
  53. {GPIO_Pin_2, EXTI_Line2, EXTI2_3_IRQn},
  54. {GPIO_Pin_3, EXTI_Line3, EXTI2_3_IRQn},
  55. {GPIO_Pin_4, EXTI_Line4, EXTI4_15_IRQn},
  56. {GPIO_Pin_5, EXTI_Line5, EXTI4_15_IRQn},
  57. {GPIO_Pin_6, EXTI_Line6, EXTI4_15_IRQn},
  58. {GPIO_Pin_7, EXTI_Line7, EXTI4_15_IRQn},
  59. {GPIO_Pin_8, EXTI_Line8, EXTI4_15_IRQn},
  60. {GPIO_Pin_9, EXTI_Line9, EXTI4_15_IRQn},
  61. {GPIO_Pin_10, EXTI_Line10, EXTI4_15_IRQn},
  62. {GPIO_Pin_11, EXTI_Line11, EXTI4_15_IRQn},
  63. {GPIO_Pin_12, EXTI_Line12, EXTI4_15_IRQn},
  64. {GPIO_Pin_13, EXTI_Line13, EXTI4_15_IRQn},
  65. {GPIO_Pin_14, EXTI_Line14, EXTI4_15_IRQn},
  66. {GPIO_Pin_15, EXTI_Line15, EXTI4_15_IRQn},
  67. };
  68. static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
  69. {
  70. {-1, 0, RT_NULL, RT_NULL},
  71. {-1, 0, RT_NULL, RT_NULL},
  72. {-1, 0, RT_NULL, RT_NULL},
  73. {-1, 0, RT_NULL, RT_NULL},
  74. {-1, 0, RT_NULL, RT_NULL},
  75. {-1, 0, RT_NULL, RT_NULL},
  76. {-1, 0, RT_NULL, RT_NULL},
  77. {-1, 0, RT_NULL, RT_NULL},
  78. {-1, 0, RT_NULL, RT_NULL},
  79. {-1, 0, RT_NULL, RT_NULL},
  80. {-1, 0, RT_NULL, RT_NULL},
  81. {-1, 0, RT_NULL, RT_NULL},
  82. {-1, 0, RT_NULL, RT_NULL},
  83. {-1, 0, RT_NULL, RT_NULL},
  84. {-1, 0, RT_NULL, RT_NULL},
  85. {-1, 0, RT_NULL, RT_NULL},
  86. };
  87. static uint32_t pin_irq_enable_mask = 0;
  88. #define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
  89. static void hk32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
  90. {
  91. GPIO_TypeDef *gpio_port;
  92. uint16_t gpio_pin;
  93. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  94. {
  95. gpio_port = PIN_HKPORT(pin);
  96. gpio_pin = PIN_HKPIN(pin);
  97. GPIO_WriteBit(gpio_port, gpio_pin, (BitAction)value);
  98. }
  99. }
  100. static rt_int8_t hk32_pin_read(rt_device_t dev, rt_base_t pin)
  101. {
  102. GPIO_TypeDef *gpio_port;
  103. uint16_t gpio_pin;
  104. rt_int8_t value;
  105. value = PIN_LOW;
  106. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  107. {
  108. gpio_port = PIN_HKPORT(pin);
  109. gpio_pin = PIN_HKPIN(pin);
  110. value = GPIO_ReadInputDataBit(gpio_port, gpio_pin);
  111. }
  112. else
  113. {
  114. return -RT_ENOSYS;
  115. }
  116. return value;
  117. }
  118. static void hk32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
  119. {
  120. GPIO_InitTypeDef GPIO_InitStruct;
  121. GPIO_TypeDef *gpio_port;
  122. uint16_t gpio_pin;
  123. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  124. {
  125. gpio_port = PIN_HKPORT(pin);
  126. gpio_pin = PIN_HKPIN(pin);
  127. }
  128. else
  129. {
  130. return;
  131. }
  132. /* Configure GPIO_InitStructure */
  133. GPIO_StructInit(&GPIO_InitStruct);
  134. GPIO_InitStruct.GPIO_Pin = gpio_pin;
  135. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
  136. GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  137. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
  138. GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  139. if (mode == PIN_MODE_OUTPUT)
  140. {
  141. /* output setting */
  142. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
  143. }
  144. else if (mode == PIN_MODE_INPUT)
  145. {
  146. /* input setting: not pull. */
  147. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
  148. }
  149. else if (mode == PIN_MODE_INPUT_PULLUP)
  150. {
  151. /* input setting: pull up. */
  152. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
  153. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  154. }
  155. else if (mode == PIN_MODE_INPUT_PULLDOWN)
  156. {
  157. /* input setting: pull down. */
  158. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
  159. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
  160. }
  161. else if (mode == PIN_MODE_OUTPUT_OD)
  162. {
  163. /* output setting: od. */
  164. GPIO_InitStruct.GPIO_OType = GPIO_OType_OD;
  165. }
  166. GPIO_Init(gpio_port, &GPIO_InitStruct);
  167. }
  168. rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
  169. {
  170. int i;
  171. for (i = 0; i < 32; i++)
  172. {
  173. if ((0x01 << i) == bit)
  174. {
  175. return i;
  176. }
  177. }
  178. return -1;
  179. }
  180. rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
  181. {
  182. rt_int32_t mapindex = bit2bitno(pinbit);
  183. if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map))
  184. {
  185. return RT_NULL;
  186. }
  187. return &pin_irq_map[mapindex];
  188. };
  189. static rt_err_t hk32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
  190. rt_uint8_t mode, void (*hdr)(void *args), void *args)
  191. {
  192. rt_base_t level;
  193. rt_int32_t irqindex = -1;
  194. uint16_t gpio_pin;
  195. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  196. {
  197. gpio_pin = PIN_HKPIN(pin);
  198. }
  199. else
  200. {
  201. return -RT_ENOSYS;
  202. }
  203. irqindex = bit2bitno(gpio_pin);
  204. if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
  205. {
  206. return -RT_ENOSYS;
  207. }
  208. level = rt_hw_interrupt_disable();
  209. if (pin_irq_hdr_tab[irqindex].pin == pin &&
  210. pin_irq_hdr_tab[irqindex].hdr == hdr &&
  211. pin_irq_hdr_tab[irqindex].mode == mode &&
  212. pin_irq_hdr_tab[irqindex].args == args)
  213. {
  214. rt_hw_interrupt_enable(level);
  215. return RT_EOK;
  216. }
  217. if (pin_irq_hdr_tab[irqindex].pin != -1)
  218. {
  219. rt_hw_interrupt_enable(level);
  220. return -RT_EBUSY;
  221. }
  222. pin_irq_hdr_tab[irqindex].pin = pin;
  223. pin_irq_hdr_tab[irqindex].hdr = hdr;
  224. pin_irq_hdr_tab[irqindex].mode = mode;
  225. pin_irq_hdr_tab[irqindex].args = args;
  226. rt_hw_interrupt_enable(level);
  227. return RT_EOK;
  228. }
  229. static rt_err_t hk32_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
  230. {
  231. rt_base_t level;
  232. rt_int32_t irqindex = -1;
  233. uint16_t gpio_pin;
  234. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  235. {
  236. gpio_pin = PIN_HKPIN(pin);
  237. }
  238. else
  239. {
  240. return -RT_ENOSYS;
  241. }
  242. irqindex = bit2bitno(gpio_pin);
  243. if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
  244. {
  245. return -RT_ENOSYS;
  246. }
  247. level = rt_hw_interrupt_disable();
  248. if (pin_irq_hdr_tab[irqindex].pin == -1)
  249. {
  250. rt_hw_interrupt_enable(level);
  251. return RT_EOK;
  252. }
  253. pin_irq_hdr_tab[irqindex].pin = -1;
  254. pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
  255. pin_irq_hdr_tab[irqindex].mode = 0;
  256. pin_irq_hdr_tab[irqindex].args = RT_NULL;
  257. rt_hw_interrupt_enable(level);
  258. return RT_EOK;
  259. }
  260. static rt_err_t hk32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
  261. rt_uint8_t enabled)
  262. {
  263. GPIO_InitTypeDef GPIO_InitStruct;
  264. EXTI_InitTypeDef EXTI_InitStruct;
  265. NVIC_InitTypeDef NVIC_InitStruct;
  266. const struct pin_irq_map *irqmap;
  267. rt_base_t level;
  268. rt_int32_t irqindex = -1;
  269. GPIO_TypeDef *gpio_port;
  270. uint16_t gpio_pin;
  271. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  272. {
  273. gpio_port = PIN_HKPORT(pin);
  274. gpio_pin = PIN_HKPIN(pin);
  275. }
  276. else
  277. {
  278. return -RT_ENOSYS;
  279. }
  280. if (enabled == PIN_IRQ_ENABLE)
  281. {
  282. irqindex = bit2bitno(gpio_pin);
  283. if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
  284. {
  285. return -RT_ENOSYS;
  286. }
  287. level = rt_hw_interrupt_disable();
  288. if (pin_irq_hdr_tab[irqindex].pin == -1)
  289. {
  290. rt_hw_interrupt_enable(level);
  291. return -RT_ENOSYS;
  292. }
  293. irqmap = &pin_irq_map[irqindex];
  294. /* Configure GPIO_InitStructure */
  295. GPIO_StructInit(&GPIO_InitStruct);
  296. EXTI_StructInit(&EXTI_InitStruct);
  297. GPIO_InitStruct.GPIO_Pin = irqmap->pinbit;
  298. GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  299. EXTI_InitStruct.EXTI_Line = irqmap->pinbit;
  300. EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
  301. EXTI_InitStruct.EXTI_LineCmd = ENABLE;
  302. switch (pin_irq_hdr_tab[irqindex].mode)
  303. {
  304. case PIN_IRQ_MODE_RISING:
  305. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
  306. EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Rising;
  307. break;
  308. case PIN_IRQ_MODE_FALLING:
  309. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  310. EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Falling;
  311. break;
  312. case PIN_IRQ_MODE_RISING_FALLING:
  313. EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
  314. break;
  315. }
  316. GPIO_Init(gpio_port, &GPIO_InitStruct);
  317. SYSCFG_EXTILineConfig(PIN_HKPORTSOURCE(pin), PIN_HKPINSOURCE(pin));
  318. EXTI_Init(&EXTI_InitStruct);
  319. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  320. NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
  321. NVIC_InitStruct.NVIC_IRQChannelPriority = 3;
  322. NVIC_Init(&NVIC_InitStruct);
  323. pin_irq_enable_mask |= irqmap->pinbit;
  324. rt_hw_interrupt_enable(level);
  325. }
  326. else if (enabled == PIN_IRQ_DISABLE)
  327. {
  328. irqmap = get_pin_irq_map(gpio_pin);
  329. if (irqmap == RT_NULL)
  330. {
  331. return -RT_ENOSYS;
  332. }
  333. level = rt_hw_interrupt_disable();
  334. pin_irq_enable_mask &= ~irqmap->pinbit;
  335. NVIC_InitStruct.NVIC_IRQChannelCmd = DISABLE;
  336. NVIC_InitStruct.NVIC_IRQChannelPriority = 3;
  337. if ((irqmap->pinbit >= GPIO_Pin_0) && (irqmap->pinbit <= GPIO_Pin_1))
  338. {
  339. if (!(pin_irq_enable_mask & (GPIO_Pin_0 | GPIO_Pin_1)))
  340. {
  341. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  342. }
  343. }
  344. else if ((irqmap->pinbit >= GPIO_Pin_2) && \
  345. (irqmap->pinbit <= GPIO_Pin_3))
  346. {
  347. if (!(pin_irq_enable_mask & (GPIO_Pin_2 | GPIO_Pin_3)))
  348. {
  349. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  350. }
  351. }
  352. else if ((irqmap->pinbit >= GPIO_Pin_4) && \
  353. (irqmap->pinbit <= GPIO_Pin_15))
  354. {
  355. if (!(pin_irq_enable_mask & (GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | \
  356. GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | \
  357. GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | \
  358. GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15)))
  359. {
  360. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  361. }
  362. }
  363. else
  364. {
  365. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  366. }
  367. NVIC_Init(&NVIC_InitStruct);
  368. rt_hw_interrupt_enable(level);
  369. }
  370. else
  371. {
  372. return -RT_ENOSYS;
  373. }
  374. return RT_EOK;
  375. }
  376. const static struct rt_pin_ops _hk32_pin_ops =
  377. {
  378. hk32_pin_mode,
  379. hk32_pin_write,
  380. hk32_pin_read,
  381. hk32_pin_attach_irq,
  382. hk32_pin_dettach_irq,
  383. hk32_pin_irq_enable,
  384. RT_NULL,
  385. };
  386. rt_inline void pin_irq_hdr(int irqno)
  387. {
  388. EXTI_ClearITPendingBit(pin_irq_map[irqno].lineno);
  389. if (pin_irq_hdr_tab[irqno].hdr)
  390. {
  391. pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
  392. }
  393. }
  394. void GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
  395. {
  396. pin_irq_hdr(bit2bitno(GPIO_Pin));
  397. }
  398. void EXTI0_1_IRQHandler(void)
  399. {
  400. rt_interrupt_enter();
  401. if (RESET != EXTI_GetITStatus(EXTI_Line0))
  402. {
  403. GPIO_EXTI_IRQHandler(GPIO_Pin_0);
  404. }
  405. if (RESET != EXTI_GetITStatus(EXTI_Line1))
  406. {
  407. GPIO_EXTI_IRQHandler(GPIO_Pin_1);
  408. }
  409. rt_interrupt_leave();
  410. }
  411. void EXTI2_3_IRQHandler(void)
  412. {
  413. rt_interrupt_enter();
  414. if (RESET != EXTI_GetITStatus(EXTI_Line2))
  415. {
  416. GPIO_EXTI_IRQHandler(GPIO_Pin_2);
  417. }
  418. if (RESET != EXTI_GetITStatus(EXTI_Line3))
  419. {
  420. GPIO_EXTI_IRQHandler(GPIO_Pin_3);
  421. }
  422. rt_interrupt_leave();
  423. }
  424. void EXTI4_15_IRQHandler(void)
  425. {
  426. rt_interrupt_enter();
  427. if (RESET != EXTI_GetITStatus(EXTI_Line4))
  428. {
  429. GPIO_EXTI_IRQHandler(GPIO_Pin_4);
  430. }
  431. if (RESET != EXTI_GetITStatus(EXTI_Line5))
  432. {
  433. GPIO_EXTI_IRQHandler(GPIO_Pin_5);
  434. }
  435. if (RESET != EXTI_GetITStatus(EXTI_Line6))
  436. {
  437. GPIO_EXTI_IRQHandler(GPIO_Pin_6);
  438. }
  439. if (RESET != EXTI_GetITStatus(EXTI_Line7))
  440. {
  441. GPIO_EXTI_IRQHandler(GPIO_Pin_7);
  442. }
  443. if (RESET != EXTI_GetITStatus(EXTI_Line8))
  444. {
  445. GPIO_EXTI_IRQHandler(GPIO_Pin_8);
  446. }
  447. if (RESET != EXTI_GetITStatus(EXTI_Line9))
  448. {
  449. GPIO_EXTI_IRQHandler(GPIO_Pin_9);
  450. }
  451. if (RESET != EXTI_GetITStatus(EXTI_Line10))
  452. {
  453. GPIO_EXTI_IRQHandler(GPIO_Pin_10);
  454. }
  455. if (RESET != EXTI_GetITStatus(EXTI_Line11))
  456. {
  457. GPIO_EXTI_IRQHandler(GPIO_Pin_11);
  458. }
  459. if (RESET != EXTI_GetITStatus(EXTI_Line12))
  460. {
  461. GPIO_EXTI_IRQHandler(GPIO_Pin_12);
  462. }
  463. if (RESET != EXTI_GetITStatus(EXTI_Line13))
  464. {
  465. GPIO_EXTI_IRQHandler(GPIO_Pin_13);
  466. }
  467. if (RESET != EXTI_GetITStatus(EXTI_Line14))
  468. {
  469. GPIO_EXTI_IRQHandler(GPIO_Pin_14);
  470. }
  471. if (RESET != EXTI_GetITStatus(EXTI_Line15))
  472. {
  473. GPIO_EXTI_IRQHandler(GPIO_Pin_15);
  474. }
  475. rt_interrupt_leave();
  476. }
  477. int rt_hw_pin_init(void)
  478. {
  479. RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
  480. #ifdef GPIOA
  481. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
  482. #endif
  483. #ifdef GPIOB
  484. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
  485. #endif
  486. #ifdef GPIOC
  487. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
  488. #endif
  489. #ifdef GPIOD
  490. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD, ENABLE);
  491. #endif
  492. #ifdef GPIOE
  493. RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOE, ENABLE);
  494. #endif
  495. #ifdef GPIOF
  496. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOF, ENABLE);
  497. #endif
  498. #ifdef GPIOG
  499. RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOG, ENABLE);
  500. #endif
  501. return rt_device_pin_register("pin", &_hk32_pin_ops, RT_NULL);
  502. }
  503. INIT_BOARD_EXPORT(rt_hw_pin_init);
  504. #endif /* RT_USING_PIN */